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Commit | Line | Data |
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f4ef6668 TW |
1 | /* |
2 | * (C) Copyright 2010,2011 | |
3 | * NVIDIA Corporation <www.nvidia.com> | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
f4ef6668 TW |
6 | */ |
7 | ||
8 | #include <common.h> | |
9 | #include <asm/io.h> | |
150c2493 | 10 | #include <asm/arch/tegra.h> |
ca28090d SG |
11 | #include <asm/arch/clock.h> |
12 | #include <asm/arch/funcmux.h> | |
a2ab6b7d | 13 | #include <asm/arch/gpio.h> |
ae03661f | 14 | #include <asm/arch/pinmux.h> |
ccf7988b | 15 | #include <asm/gpio.h> |
f4ef6668 | 16 | |
a04eba99 | 17 | /* TODO: Remove this code when the SPI switch is working */ |
9000652d | 18 | #if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA) |
a2ab6b7d | 19 | void gpio_early_init_uart(void) |
f4ef6668 | 20 | { |
f4ef6668 | 21 | /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ |
a2ab6b7d | 22 | #ifndef CONFIG_SPL_BUILD |
5fac236a | 23 | gpio_request(GPIO_PI3, NULL); |
a2ab6b7d | 24 | #endif |
5fac236a | 25 | gpio_direction_output(GPIO_PI3, 0); |
f4ef6668 | 26 | } |
a04eba99 | 27 | #endif |
d5ef19b9 | 28 | |
3f82d89d | 29 | #ifdef CONFIG_TEGRA_MMC |
ae03661f SW |
30 | /* |
31 | * Routine: pin_mux_mmc | |
32 | * Description: setup the pin muxes/tristate values for the SDMMC(s) | |
33 | */ | |
c9aa831e | 34 | void pin_mux_mmc(void) |
ae03661f | 35 | { |
ca28090d SG |
36 | funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); |
37 | funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT); | |
ae03661f SW |
38 | |
39 | /* For power GPIO PI6 */ | |
40 | pinmux_tristate_disable(PINGRP_ATA); | |
41 | /* For CD GPIO PI5 */ | |
42 | pinmux_tristate_disable(PINGRP_ATC); | |
43 | } | |
ccf7988b | 44 | #endif |
f10393e5 SG |
45 | |
46 | void pin_mux_usb(void) | |
47 | { | |
48 | /* For USB's GPIO PD0. For now, since we have no pinmux in fdt */ | |
49 | pinmux_tristate_disable(PINGRP_SLXK); | |
50 | } |