[people/ms/u-boot.git] / board / omap1610inn / flash.c

/*
 * (C) Copyright 2001
 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
 *
 * (C) Copyright 2001-2004
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * (C) Copyright 2003
 * Texas Instruments, <www.ti.com>
 * Kshitij Gupta <Kshitij@ti.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <linux/byteorder/swab.h>

#define PHYS_FLASH_SECT_SIZE	0x00020000	/* 256 KB sectors (x2) */
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips	   */

/* Board support for 1 or 2 flash devices */
#undef FLASH_PORT_WIDTH32
#define FLASH_PORT_WIDTH16

#ifdef FLASH_PORT_WIDTH16
#define FLASH_PORT_WIDTH		ushort
#define FLASH_PORT_WIDTHV		vu_short
#define SWAP(x)			__swab16(x)
#else
#define FLASH_PORT_WIDTH		ulong
#define FLASH_PORT_WIDTHV		vu_long
#define SWAP(x)			__swab32(x)
#endif

#define FPW	FLASH_PORT_WIDTH
#define FPWV	FLASH_PORT_WIDTHV

#define mb() __asm__ __volatile__ ("" : : : "memory")


/* Flash Organization Structure */
typedef struct OrgDef {
	unsigned int sector_number;
	unsigned int sector_size;
} OrgDef;


/* Flash Organizations */
OrgDef OrgIntel_28F256L18T[] = {
	{4, 32 * 1024},				/* 4 * 32kBytes sectors */
	{255, 128 * 1024},			/* 255 * 128kBytes sectors */
};


/*-----------------------------------------------------------------------
 * Functions
 */
unsigned long flash_init (void);
static ulong flash_get_size (FPW * addr, flash_info_t * info);
static int write_data (flash_info_t * info, ulong dest, FPW data);
static void flash_get_offsets (ulong base, flash_info_t * info);
void inline spin_wheel (void);
void flash_print_info (flash_info_t * info);
void flash_unprotect_sectors (FPWV * addr);
int flash_erase (flash_info_t * info, int s_first, int s_last);
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
void flash_unlock(flash_info_t * info);

/*-----------------------------------------------------------------------
 */

unsigned long flash_init (void)
{
	int i;
	ulong size = 0;

	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
		switch (i) {
		case 0:
			flash_get_size ((FPW *) CFG_FLASH_BASE, &flash_info[i]);
			flash_get_offsets (CFG_FLASH_BASE, &flash_info[i]);
			/* to reset the lock bit */
			flash_unlock(&flash_info[i]);
			break;
		default:
			panic ("configured too many flash banks!\n");
			break;
		}
		size += flash_info[i].size;
	}

	/* Protect monitor and environment sectors
	 */
	flash_protect (FLAG_PROTECT_SET,
			CFG_FLASH_BASE,
			CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);

	flash_protect (FLAG_PROTECT_SET,
			CONFIG_ENV_ADDR,
			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);

	return size;
}

/*-----------------------------------------------------------------------
 */
void flash_unlock(flash_info_t * info)
{
	int j;
	for (j=2;j<CFG_MAX_FLASH_SECT;j++){
	FPWV *addr = (FPWV *) (info->start[j]);
	flash_unprotect_sectors (addr);
	*addr = (FPW) 0x00500050;/* clear status register */
	*addr = (FPW) 0x00FF00FF;/* resest to read mode */
	}
}

/*-----------------------------------------------------------------------
 */
static void flash_get_offsets (ulong base, flash_info_t * info)
{
	int i;
	OrgDef *pOrgDef;

	pOrgDef = OrgIntel_28F256L18T;
	if (info->flash_id == FLASH_UNKNOWN) {
		return;
	}

	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
		for (i = 0; i < info->sector_count; i++) {
			if (i > 255) {
				info->start[i] = base + (i * 0x8000);
				info->protect[i] = 0;
			} else {
				info->start[i] = base +
						(i * PHYS_FLASH_SECT_SIZE);
				info->protect[i] = 0;
			}
		}
	}
}

/*-----------------------------------------------------------------------
 */
void flash_print_info (flash_info_t * info)
{
	int i;

	if (info->flash_id == FLASH_UNKNOWN) {
		printf ("missing or unknown FLASH type\n");
		return;
	}

	switch (info->flash_id & FLASH_VENDMASK) {
	case FLASH_MAN_INTEL:
		printf ("INTEL ");
		break;
	default:
		printf ("Unknown Vendor ");
		break;
	}

	switch (info->flash_id & FLASH_TYPEMASK) {
	case FLASH_28F256L18T:
		printf ("FLASH 28F256L18T\n");
		break;
	default:
		printf ("Unknown Chip Type\n");
		break;
	}

	printf ("  Size: %ld MB in %d Sectors\n",
			info->size >> 20, info->sector_count);

	printf ("  Sector Start Addresses:");
	for (i = 0; i < info->sector_count; ++i) {
		if ((i % 5) == 0)
			printf ("\n   ");
		printf (" %08lX%s",
			info->start[i], info->protect[i] ? " (RO)" : "	   ");
	}
	printf ("\n");
	return;
}

/*
 * The following code cannot be run from FLASH!
 */
static ulong flash_get_size (FPW * addr, flash_info_t * info)
{
	volatile FPW value;

	/* Write auto select command: read Manufacturer ID */
	addr[0x5555] = (FPW) 0x00AA00AA;
	addr[0x2AAA] = (FPW) 0x00550055;
	addr[0x5555] = (FPW) 0x00900090;

	mb ();
	value = addr[0];

	switch (value) {

	case (FPW) INTEL_MANUFACT:
		info->flash_id = FLASH_MAN_INTEL;
		break;

	default:
		info->flash_id = FLASH_UNKNOWN;
		info->sector_count = 0;
		info->size = 0;
		addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
		return (0);		/* no or unknown flash	*/
	}

	mb ();
	value = addr[1];	/* device ID	    */
	switch (value) {

	case (FPW) (INTEL_ID_28F256L18T):
		info->flash_id += FLASH_28F256L18T;
		info->sector_count = 259;
		info->size = 0x02000000;
		break;			/* => 32 MB	*/

	default:
		info->flash_id = FLASH_UNKNOWN;
		break;
	}

	if (info->sector_count > CFG_MAX_FLASH_SECT) {
		printf ("** ERROR: sector count %d > max (%d) **\n",
				info->sector_count, CFG_MAX_FLASH_SECT);
		info->sector_count = CFG_MAX_FLASH_SECT;
	}

	addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */

	return (info->size);
}


/* unprotects a sector for write and erase
 * on some intel parts, this unprotects the entire chip, but it
 * wont hurt to call this additional times per sector...
 */
void flash_unprotect_sectors (FPWV * addr)
{
#define PD_FINTEL_WSMS_READY_MASK    0x0080

	*addr = (FPW) 0x00500050;	/* clear status register */

	/* this sends the clear lock bit command */
	*addr = (FPW) 0x00600060;
	*addr = (FPW) 0x00D000D0;
}


/*-----------------------------------------------------------------------
 */

int flash_erase (flash_info_t * info, int s_first, int s_last)
{
	int flag, prot, sect;
	ulong type, start, last;
	int rcode = 0;

	if ((s_first < 0) || (s_first > s_last)) {
		if (info->flash_id == FLASH_UNKNOWN) {
			printf ("- missing\n");
		} else {
			printf ("- no sectors to erase\n");
		}
		return 1;
	}

	type = (info->flash_id & FLASH_VENDMASK);
	if ((type != FLASH_MAN_INTEL)) {
		printf ("Can't erase unknown flash type %08lx - aborted\n",
				info->flash_id);
		return 1;
	}

	prot = 0;
	for (sect = s_first; sect <= s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}

	if (prot) {
		printf ("- Warning: %d protected sectors will not be erased!\n",
				prot);
	} else {
		printf ("\n");
	}


	start = get_timer (0);
	last = start;

	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts ();

	/* Start erase on unprotected sectors */
	for (sect = s_first; sect <= s_last; sect++) {
		if (info->protect[sect] == 0) { /* not protected */
			FPWV *addr = (FPWV *) (info->start[sect]);
			FPW status;

			printf ("Erasing sector %2d ... ", sect);

			flash_unprotect_sectors (addr);

			/* arm simple, non interrupt dependent timer */
			reset_timer_masked ();

			*addr = (FPW) 0x00500050;/* clear status register */
			*addr = (FPW) 0x00200020;/* erase setup */
			*addr = (FPW) 0x00D000D0;/* erase confirm */

			while (((status =
				*addr) & (FPW) 0x00800080) !=
				(FPW) 0x00800080) {
					if (get_timer_masked () >
					CFG_FLASH_ERASE_TOUT) {
					printf ("Timeout\n");
					/* suspend erase     */
					*addr = (FPW) 0x00B000B0;
					/* reset to read mode */
					*addr = (FPW) 0x00FF00FF;
					rcode = 1;
					break;
				}
			}

			/* clear status register cmd.	*/
			*addr = (FPW) 0x00500050;
			*addr = (FPW) 0x00FF00FF;/* resest to read mode */
			printf (" done\n");
		}
	}
	return rcode;
}

/*-----------------------------------------------------------------------
 * Copy memory to flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 * 4 - Flash not identified
 */

int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
	ulong cp, wp;
	FPW data;
	int count, i, l, rc, port_width;

	if (info->flash_id == FLASH_UNKNOWN) {
		return 4;
	}
/* get lower word aligned address */
#ifdef FLASH_PORT_WIDTH16
	wp = (addr & ~1);
	port_width = 2;
#else
	wp = (addr & ~3);
	port_width = 4;
#endif

	/*
	 * handle unaligned start bytes
	 */
	if ((l = addr - wp) != 0) {
		data = 0;
		for (i = 0, cp = wp; i < l; ++i, ++cp) {
			data = (data << 8) | (*(uchar *) cp);
		}
		for (; i < port_width && cnt > 0; ++i) {
			data = (data << 8) | *src++;
			--cnt;
			++cp;
		}
		for (; cnt == 0 && i < port_width; ++i, ++cp) {
			data = (data << 8) | (*(uchar *) cp);
		}

		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
			return (rc);
		}
		wp += port_width;
	}

	/*
	 * handle word aligned part
	 */
	count = 0;
	while (cnt >= port_width) {
		data = 0;
		for (i = 0; i < port_width; ++i) {
			data = (data << 8) | *src++;
		}
		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
			return (rc);
		}
		wp += port_width;
		cnt -= port_width;
		if (count++ > 0x800) {
			spin_wheel ();
			count = 0;
		}
	}

	if (cnt == 0) {
		return (0);
	}

	/*
	 * handle unaligned tail bytes
	 */
	data = 0;
	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
		data = (data << 8) | *src++;
		--cnt;
	}
	for (; i < port_width; ++i, ++cp) {
		data = (data << 8) | (*(uchar *) cp);
	}

	return (write_data (info, wp, SWAP (data)));
}

/*-----------------------------------------------------------------------
 * Write a word or halfword to Flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 */
static int write_data (flash_info_t * info, ulong dest, FPW data)
{
	FPWV *addr = (FPWV *) dest;
	ulong status;
	int flag;

	/* Check if Flash is (sufficiently) erased */
	if ((*addr & data) != data) {
		printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
		return (2);
	}
	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts ();
	*addr = (FPW) 0x00400040;	/* write setup */
	*addr = data;

	/* arm simple, non interrupt dependent timer */
	reset_timer_masked ();

	/* wait while polling the status register */
	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
		if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
			*addr = (FPW) 0x00FF00FF;	/* restore read mode */
			return (1);
		}
	}
	*addr = (FPW) 0x00FF00FF;	/* restore read mode */
	return (0);
}

void inline spin_wheel (void)
{
	static int p = 0;
	static char w[] = "\\/-";

	printf ("\010%c", w[p]);
	(++p == 3) ? (p = 0) : 0;
}
Commit	Line	Data
6f21347d WD	1	/*
	2	* (C) Copyright 2001
	3	* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
	4	*
198ea9e2	5	* (C) Copyright 2001-2004
6f21347d WD	6	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	7	*
	8	* (C) Copyright 2003
	9	* Texas Instruments, <www.ti.com>
	10	* Kshitij Gupta <Kshitij@ti.com>
	11	*
	12	* See file CREDITS for list of people who contributed to this
	13	* project.
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License as
	17	* published by the Free Software Foundation; either version 2 of
	18	* the License, or (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
cd37d9e6	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6f21347d WD	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, write to the Free Software
	27	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	28	* MA 02111-1307 USA
	29	*/
	30
	31	#include <common.h>
	32	#include <linux/byteorder/swab.h>
	33
	34	#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
cd37d9e6	35	flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
6f21347d WD	36
	37	/* Board support for 1 or 2 flash devices */
	38	#undef FLASH_PORT_WIDTH32
	39	#define FLASH_PORT_WIDTH16
	40
	41	#ifdef FLASH_PORT_WIDTH16
	42	#define FLASH_PORT_WIDTH ushort
	43	#define FLASH_PORT_WIDTHV vu_short
	44	#define SWAP(x) __swab16(x)
	45	#else
	46	#define FLASH_PORT_WIDTH ulong
	47	#define FLASH_PORT_WIDTHV vu_long
	48	#define SWAP(x) __swab32(x)
	49	#endif
	50
	51	#define FPW FLASH_PORT_WIDTH
	52	#define FPWV FLASH_PORT_WIDTHV
	53
	54	#define mb() __asm__ __volatile__ ("" : : : "memory")
	55
	56
6f21347d WD	57	/* Flash Organization Structure */
	58	typedef struct OrgDef {
	59	unsigned int sector_number;
	60	unsigned int sector_size;
	61	} OrgDef;
	62
	63
	64	/* Flash Organizations */
	65	OrgDef OrgIntel_28F256L18T[] = {
	66	{4, 32 * 1024}, /* 4 * 32kBytes sectors */
	67	{255, 128 * 1024}, /* 255 * 128kBytes sectors */
	68	};
	69
	70
	71	/*-----------------------------------------------------------------------
	72	* Functions
	73	*/
	74	unsigned long flash_init (void);
	75	static ulong flash_get_size (FPW * addr, flash_info_t * info);
	76	static int write_data (flash_info_t * info, ulong dest, FPW data);
	77	static void flash_get_offsets (ulong base, flash_info_t * info);
	78	void inline spin_wheel (void);
	79	void flash_print_info (flash_info_t * info);
	80	void flash_unprotect_sectors (FPWV * addr);
	81	int flash_erase (flash_info_t * info, int s_first, int s_last);
	82	int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
198ea9e2	83	void flash_unlock(flash_info_t * info);
6f21347d WD	84
	85	/*-----------------------------------------------------------------------
	86	*/
	87
	88	unsigned long flash_init (void)
	89	{
	90	int i;
	91	ulong size = 0;
3ff02c27	92
6f21347d WD	93	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
	94	switch (i) {
	95	case 0:
3ff02c27 WD	96	flash_get_size ((FPW *) CFG_FLASH_BASE, &flash_info[i]);
3ff02c27 WD	97	flash_get_offsets (CFG_FLASH_BASE, &flash_info[i]);
b98fff1d WD	98	/* to reset the lock bit */
b98fff1d WD	99	flash_unlock(&flash_info[i]);
6f21347d WD	100	break;
6f21347d WD	101	default:
5f535fe1	102	panic ("configured too many flash banks!\n");
6f21347d WD	103	break;
	104	}
	105	size += flash_info[i].size;
	106	}
	107
	108	/* Protect monitor and environment sectors
	109	*/
	110	flash_protect (FLAG_PROTECT_SET,
	111	CFG_FLASH_BASE,
	112	CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
	113
	114	flash_protect (FLAG_PROTECT_SET,
0e8d1586 JCPV	115	CONFIG_ENV_ADDR,
0e8d1586 JCPV	116	CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
6f21347d WD	117
	118	return size;
	119	}
	120
b98fff1d WD	121	/*-----------------------------------------------------------------------
b98fff1d WD	122	*/
198ea9e2	123	void flash_unlock(flash_info_t * info)
b98fff1d	124	{
cd37d9e6 WD	125	int j;
	126	for (j=2;j<CFG_MAX_FLASH_SECT;j++){
	127	FPWV addr = (FPWV ) (info->start[j]);
	128	flash_unprotect_sectors (addr);
	129	addr = (FPW) 0x00500050;/ clear status register */
	130	addr = (FPW) 0x00FF00FF;/ resest to read mode */
	131	}
b98fff1d WD	132	}
b98fff1d WD	133
6f21347d WD	134	/*-----------------------------------------------------------------------
	135	*/
	136	static void flash_get_offsets (ulong base, flash_info_t * info)
	137	{
	138	int i;
	139	OrgDef *pOrgDef;
	140
	141	pOrgDef = OrgIntel_28F256L18T;
	142	if (info->flash_id == FLASH_UNKNOWN) {
	143	return;
	144	}
	145
	146	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
	147	for (i = 0; i < info->sector_count; i++) {
	148	if (i > 255) {
	149	info->start[i] = base + (i * 0x8000);
	150	info->protect[i] = 0;
	151	} else {
	152	info->start[i] = base +
	153	(i * PHYS_FLASH_SECT_SIZE);
	154	info->protect[i] = 0;
	155	}
	156	}
	157	}
	158	}
	159
	160	/*-----------------------------------------------------------------------
	161	*/
	162	void flash_print_info (flash_info_t * info)
	163	{
	164	int i;
	165
	166	if (info->flash_id == FLASH_UNKNOWN) {
	167	printf ("missing or unknown FLASH type\n");
	168	return;
	169	}
	170
	171	switch (info->flash_id & FLASH_VENDMASK) {
	172	case FLASH_MAN_INTEL:
	173	printf ("INTEL ");
	174	break;
	175	default:
	176	printf ("Unknown Vendor ");
	177	break;
	178	}
	179
	180	switch (info->flash_id & FLASH_TYPEMASK) {
	181	case FLASH_28F256L18T:
	182	printf ("FLASH 28F256L18T\n");
	183	break;
	184	default:
	185	printf ("Unknown Chip Type\n");
	186	break;
	187	}
	188
	189	printf (" Size: %ld MB in %d Sectors\n",
	190	info->size >> 20, info->sector_count);
	191
	192	printf (" Sector Start Addresses:");
	193	for (i = 0; i < info->sector_count; ++i) {
	194	if ((i % 5) == 0)
	195	printf ("\n ");
	196	printf (" %08lX%s",
cd37d9e6	197	info->start[i], info->protect[i] ? " (RO)" : " ");
6f21347d WD	198	}
	199	printf ("\n");
	200	return;
	201	}
	202
	203	/*
	204	* The following code cannot be run from FLASH!
	205	*/
	206	static ulong flash_get_size (FPW * addr, flash_info_t * info)
	207	{
	208	volatile FPW value;
	209
	210	/* Write auto select command: read Manufacturer ID */
	211	addr[0x5555] = (FPW) 0x00AA00AA;
	212	addr[0x2AAA] = (FPW) 0x00550055;
	213	addr[0x5555] = (FPW) 0x00900090;
	214
	215	mb ();
	216	value = addr[0];
	217
	218	switch (value) {
	219
	220	case (FPW) INTEL_MANUFACT:
	221	info->flash_id = FLASH_MAN_INTEL;
	222	break;
	223
	224	default:
	225	info->flash_id = FLASH_UNKNOWN;
	226	info->sector_count = 0;
	227	info->size = 0;
	228	addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
cd37d9e6	229	return (0); /* no or unknown flash */
6f21347d WD	230	}
	231
	232	mb ();
cd37d9e6	233	value = addr[1]; /* device ID */
6f21347d WD	234	switch (value) {
	235
	236	case (FPW) (INTEL_ID_28F256L18T):
	237	info->flash_id += FLASH_28F256L18T;
	238	info->sector_count = 259;
	239	info->size = 0x02000000;
cd37d9e6	240	break; /* => 32 MB */
6f21347d WD	241
	242	default:
	243	info->flash_id = FLASH_UNKNOWN;
	244	break;
	245	}
	246
	247	if (info->sector_count > CFG_MAX_FLASH_SECT) {
	248	printf (" ERROR: sector count %d > max (%d) \n",
	249	info->sector_count, CFG_MAX_FLASH_SECT);
	250	info->sector_count = CFG_MAX_FLASH_SECT;
	251	}
	252
	253	addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
	254
	255	return (info->size);
	256	}
	257
	258
6f21347d WD	259	/* unprotects a sector for write and erase
	260	* on some intel parts, this unprotects the entire chip, but it
	261	* wont hurt to call this additional times per sector...
	262	*/
	263	void flash_unprotect_sectors (FPWV * addr)
	264	{
	265	#define PD_FINTEL_WSMS_READY_MASK 0x0080
	266
	267	addr = (FPW) 0x00500050; / clear status register */
	268
	269	/* this sends the clear lock bit command */
	270	*addr = (FPW) 0x00600060;
	271	*addr = (FPW) 0x00D000D0;
	272	}
	273
	274
	275	/*-----------------------------------------------------------------------
	276	*/
	277
	278	int flash_erase (flash_info_t * info, int s_first, int s_last)
	279	{
	280	int flag, prot, sect;
	281	ulong type, start, last;
	282	int rcode = 0;
	283
	284	if ((s_first < 0) \|\| (s_first > s_last)) {
	285	if (info->flash_id == FLASH_UNKNOWN) {
	286	printf ("- missing\n");
	287	} else {
	288	printf ("- no sectors to erase\n");
	289	}
	290	return 1;
	291	}
	292
	293	type = (info->flash_id & FLASH_VENDMASK);
	294	if ((type != FLASH_MAN_INTEL)) {
	295	printf ("Can't erase unknown flash type %08lx - aborted\n",
	296	info->flash_id);
	297	return 1;
	298	}
	299
	300	prot = 0;
	301	for (sect = s_first; sect <= s_last; ++sect) {
	302	if (info->protect[sect]) {
	303	prot++;
	304	}
	305	}
	306
	307	if (prot) {
	308	printf ("- Warning: %d protected sectors will not be erased!\n",
	309	prot);
	310	} else {
	311	printf ("\n");
	312	}
	313
	314
6f21347d WD	315	start = get_timer (0);
	316	last = start;
	317
	318	/* Disable interrupts which might cause a timeout here */
	319	flag = disable_interrupts ();
	320
	321	/* Start erase on unprotected sectors */
	322	for (sect = s_first; sect <= s_last; sect++) {
cd37d9e6	323	if (info->protect[sect] == 0) { /* not protected */
6f21347d WD	324	FPWV addr = (FPWV ) (info->start[sect]);
	325	FPW status;
	326
	327	printf ("Erasing sector %2d ... ", sect);
	328
	329	flash_unprotect_sectors (addr);
	330
	331	/* arm simple, non interrupt dependent timer */
	332	reset_timer_masked ();
	333
	334	addr = (FPW) 0x00500050;/ clear status register */
	335	addr = (FPW) 0x00200020;/ erase setup */
	336	addr = (FPW) 0x00D000D0;/ erase confirm */
	337
	338	while (((status =
	339	*addr) & (FPW) 0x00800080) !=
	340	(FPW) 0x00800080) {
42d1f039	341	if (get_timer_masked () >
6f21347d WD	342	CFG_FLASH_ERASE_TOUT) {
	343	printf ("Timeout\n");
	344	/* suspend erase */
	345	*addr = (FPW) 0x00B000B0;
	346	/* reset to read mode */
	347	*addr = (FPW) 0x00FF00FF;
	348	rcode = 1;
	349	break;
	350	}
	351	}
	352
cd37d9e6	353	/* clear status register cmd. */
6f21347d WD	354	*addr = (FPW) 0x00500050;
	355	addr = (FPW) 0x00FF00FF;/ resest to read mode */
	356	printf (" done\n");
	357	}
	358	}
	359	return rcode;
	360	}
	361
	362	/*-----------------------------------------------------------------------
	363	* Copy memory to flash, returns:
	364	* 0 - OK
	365	* 1 - write timeout
	366	* 2 - Flash not erased
	367	* 4 - Flash not identified
	368	*/
	369
	370	int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
	371	{
	372	ulong cp, wp;
	373	FPW data;
	374	int count, i, l, rc, port_width;
	375
	376	if (info->flash_id == FLASH_UNKNOWN) {
	377	return 4;
	378	}
	379	/* get lower word aligned address */
	380	#ifdef FLASH_PORT_WIDTH16
	381	wp = (addr & ~1);
	382	port_width = 2;
	383	#else
	384	wp = (addr & ~3);
	385	port_width = 4;
	386	#endif
	387
	388	/*
	389	* handle unaligned start bytes
	390	*/
	391	if ((l = addr - wp) != 0) {
	392	data = 0;
	393	for (i = 0, cp = wp; i < l; ++i, ++cp) {
	394	data = (data << 8) \| ((uchar ) cp);
	395	}
	396	for (; i < port_width && cnt > 0; ++i) {
	397	data = (data << 8) \| *src++;
	398	--cnt;
	399	++cp;
	400	}
	401	for (; cnt == 0 && i < port_width; ++i, ++cp) {
	402	data = (data << 8) \| ((uchar ) cp);
	403	}
	404
	405	if ((rc = write_data (info, wp, SWAP (data))) != 0) {
	406	return (rc);
	407	}
	408	wp += port_width;
	409	}
	410
	411	/*
	412	* handle word aligned part
	413	*/
	414	count = 0;
	415	while (cnt >= port_width) {
	416	data = 0;
	417	for (i = 0; i < port_width; ++i) {
418	data = (data << 8) \| *src++;
419	}
420	if ((rc = write_data (info, wp, SWAP (data))) != 0) {
421	return (rc);
422	}
423	wp += port_width;
424	cnt -= port_width;
425	if (count++ > 0x800) {
426	spin_wheel ();
427	count = 0;
428	}
429	}
430
431	if (cnt == 0) {
432	return (0);
433	}
434
435	/*
436	* handle unaligned tail bytes
437	*/
438	data = 0;
439	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
440	data = (data << 8) \| *src++;
441	--cnt;
442	}
443	for (; i < port_width; ++i, ++cp) {
444	data = (data << 8) \| ((uchar ) cp);
445	}
446
447	return (write_data (info, wp, SWAP (data)));
448	}
449
450	/*-----------------------------------------------------------------------
451	* Write a word or halfword to Flash, returns:
452	* 0 - OK
453	* 1 - write timeout
454	* 2 - Flash not erased
455	*/
456	static int write_data (flash_info_t * info, ulong dest, FPW data)
457	{
458	FPWV addr = (FPWV ) dest;
459	ulong status;
460	int flag;
461
462	/* Check if Flash is (sufficiently) erased */
463	if ((*addr & data) != data) {
464	printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
465	return (2);
466	}
6f21347d WD	467	/* Disable interrupts which might cause a timeout here */
	468	flag = disable_interrupts ();
	469	addr = (FPW) 0x00400040; / write setup */
	470	*addr = data;
	471
	472	/* arm simple, non interrupt dependent timer */
	473	reset_timer_masked ();
	474
	475	/* wait while polling the status register */
	476	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
	477	if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
	478	addr = (FPW) 0x00FF00FF; / restore read mode */
	479	return (1);
	480	}
	481	}
	482	addr = (FPW) 0x00FF00FF; / restore read mode */
	483	return (0);
	484	}
	485
	486	void inline spin_wheel (void)
	487	{
	488	static int p = 0;
	489	static char w[] = "\\/-";
	490
	491	printf ("\010%c", w[p]);
	492	(++p == 3) ? (p = 0) : 0;
	493	}