[people/ms/u-boot.git] / board / overo / overo.c

/*
 * Maintainer : Steve Sakoman <steve@sakoman.com>
 *
 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
 *	Richard Woodruff <r-woodruff2@ti.com>
 *	Syed Mohammed Khasim <khasim@ti.com>
 *	Sunil Kumar <sunilsaini05@gmail.com>
 *	Shashi Ranjan <shashiranjanmca05@gmail.com>
 *
 * (C) Copyright 2004-2008
 * Texas Instruments, <www.ti.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */
#include <common.h>
#include <netdev.h>
#include <twl4030.h>
#include <asm/io.h>
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/gpio.h>
#include <asm/mach-types.h>
#include "overo.h"

#if defined(CONFIG_CMD_NET)
static void setup_net_chip(void);
#endif

/* GPMC definitions for LAN9221 chips on Tobi expansion boards */
static const u32 gpmc_lan_config[] = {
    NET_LAN9221_GPMC_CONFIG1,
    NET_LAN9221_GPMC_CONFIG2,
    NET_LAN9221_GPMC_CONFIG3,
    NET_LAN9221_GPMC_CONFIG4,
    NET_LAN9221_GPMC_CONFIG5,
    NET_LAN9221_GPMC_CONFIG6,
    /*CONFIG7- computed as params */
};

/*
 * Routine: board_init
 * Description: Early hardware init.
 */
int board_init(void)
{
	DECLARE_GLOBAL_DATA_PTR;

	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	/* board id for Linux */
	gd->bd->bi_arch_number = MACH_TYPE_OVERO;
	/* boot param addr */
	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);

	return 0;
}

/*
 * Routine: get_board_revision
 * Description: Returns the board revision
 */
int get_board_revision(void)
{
	int revision;

	if (!omap_request_gpio(112) &&
	    !omap_request_gpio(113) &&
	    !omap_request_gpio(115)) {

		omap_set_gpio_direction(112, 1);
		omap_set_gpio_direction(113, 1);
		omap_set_gpio_direction(115, 1);

		revision = omap_get_gpio_datain(115) << 2 |
			   omap_get_gpio_datain(113) << 1 |
			   omap_get_gpio_datain(112);

		omap_free_gpio(112);
		omap_free_gpio(113);
		omap_free_gpio(115);
	} else {
		printf("Error: unable to acquire board revision GPIOs\n");
		revision = -1;
	}

	return revision;
}

/*
 * Routine: get_sdio2_config
 * Description: Return information about the wifi module connection
 *              Returns 0 if the module connects though a level translator
 *              Returns 1 if the module connects directly
 */
int get_sdio2_config(void)
{
	int sdio_direct;

	if (!omap_request_gpio(130) && !omap_request_gpio(139)) {

		omap_set_gpio_direction(130, 0);
		omap_set_gpio_direction(139, 1);

		sdio_direct = 1;
		omap_set_gpio_dataout(130, 0);
		if (omap_get_gpio_datain(139) == 0) {
			omap_set_gpio_dataout(130, 1);
			if (omap_get_gpio_datain(139) == 1)
				sdio_direct = 0;
		}

		omap_free_gpio(130);
		omap_free_gpio(139);
	} else {
		printf("Error: unable to acquire sdio2 clk GPIOs\n");
		sdio_direct = -1;
	}

	return sdio_direct;
}

/*
 * Routine: misc_init_r
 * Description: Configure board specific parts
 */
int misc_init_r(void)
{
	twl4030_power_init();
	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);

#if defined(CONFIG_CMD_NET)
	setup_net_chip();
#endif

	printf("Board revision: %d\n", get_board_revision());

	switch (get_sdio2_config()) {
	case 0:
		printf("Tranceiver detected on mmc2\n");
		MUX_OVERO_SDIO2_TRANSCEIVER();
		break;
	case 1:
		printf("Direct connection on mmc2\n");
		MUX_OVERO_SDIO2_DIRECT();
		break;
	default:
		printf("Unable to detect mmc2 connection type\n");
	}

	dieid_num_r();

	return 0;
}

/*
 * Routine: set_muxconf_regs
 * Description: Setting up the configuration Mux registers specific to the
 *		hardware. Many pins need to be moved from protect to primary
 *		mode.
 */
void set_muxconf_regs(void)
{
	MUX_OVERO();
}

#if defined(CONFIG_CMD_NET)
/*
 * Routine: setup_net_chip
 * Description: Setting up the configuration GPMC registers specific to the
 *	      Ethernet hardware.
 */
static void setup_net_chip(void)
{
	struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;

	/* first lan chip */
	enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
			GPMC_SIZE_16M);

	/* second lan chip */
	enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4], 0x2B000000,
			GPMC_SIZE_16M);

	/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
	writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
	/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
	writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
	/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
	writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
		&ctrl_base->gpmc_nadv_ale);

	/* Make GPIO 64 as output pin and send a magic pulse through it */
	if (!omap_request_gpio(64)) {
		omap_set_gpio_direction(64, 0);
		omap_set_gpio_dataout(64, 1);
		udelay(1);
		omap_set_gpio_dataout(64, 0);
		udelay(1);
		omap_set_gpio_dataout(64, 1);
	}
}
#endif

int board_eth_init(bd_t *bis)
{
	int rc = 0;
#ifdef CONFIG_SMC911X
	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
#endif
	return rc;
}
Commit	Line	Data
9d0fc811 DB	1	/*
	2	* Maintainer : Steve Sakoman <steve@sakoman.com>
	3	*
	4	* Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
	5	* Richard Woodruff <r-woodruff2@ti.com>
	6	* Syed Mohammed Khasim <khasim@ti.com>
	7	* Sunil Kumar <sunilsaini05@gmail.com>
	8	* Shashi Ranjan <shashiranjanmca05@gmail.com>
	9	*
	10	* (C) Copyright 2004-2008
	11	* Texas Instruments, <www.ti.com>
	12	*
	13	* See file CREDITS for list of people who contributed to this
	14	* project.
	15	*
	16	* This program is free software; you can redistribute it and/or
	17	* modify it under the terms of the GNU General Public License as
	18	* published by the Free Software Foundation; either version 2 of
	19	* the License, or (at your option) any later version.
	20	*
	21	* This program is distributed in the hope that it will be useful,
	22	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	23	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	24	* GNU General Public License for more details.
	25	*
	26	* You should have received a copy of the GNU General Public License
	27	* along with this program; if not, write to the Free Software
	28	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	29	* MA 02111-1307 USA
	30	*/
	31	#include <common.h>
df382626	32	#include <netdev.h>
2c155130	33	#include <twl4030.h>
9d0fc811 DB	34	#include <asm/io.h>
9d0fc811 DB	35	#include <asm/arch/mux.h>
df382626	36	#include <asm/arch/mem.h>
9d0fc811	37	#include <asm/arch/sys_proto.h>
df382626	38	#include <asm/arch/gpio.h>
9d0fc811 DB	39	#include <asm/mach-types.h>
	40	#include "overo.h"
	41
df382626 OJ	42	#if defined(CONFIG_CMD_NET)
	43	static void setup_net_chip(void);
	44	#endif
	45
ba9a11e4 SS	46	/* GPMC definitions for LAN9221 chips on Tobi expansion boards */
	47	static const u32 gpmc_lan_config[] = {
	48	NET_LAN9221_GPMC_CONFIG1,
	49	NET_LAN9221_GPMC_CONFIG2,
	50	NET_LAN9221_GPMC_CONFIG3,
	51	NET_LAN9221_GPMC_CONFIG4,
	52	NET_LAN9221_GPMC_CONFIG5,
	53	NET_LAN9221_GPMC_CONFIG6,
	54	/CONFIG7- computed as params /
	55	};
	56
58911517	57	/*
9d0fc811 DB	58	* Routine: board_init
9d0fc811 DB	59	* Description: Early hardware init.
58911517	60	*/
9d0fc811 DB	61	int board_init(void)
	62	{
	63	DECLARE_GLOBAL_DATA_PTR;
	64
	65	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	66	/* board id for Linux */
	67	gd->bd->bi_arch_number = MACH_TYPE_OVERO;
	68	/* boot param addr */
	69	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
	70
	71	return 0;
	72	}
	73
c2d5b341 SS	74	/*
	75	* Routine: get_board_revision
	76	* Description: Returns the board revision
	77	*/
	78	int get_board_revision(void)
	79	{
	80	int revision;
	81
	82	if (!omap_request_gpio(112) &&
	83	!omap_request_gpio(113) &&
	84	!omap_request_gpio(115)) {
	85
	86	omap_set_gpio_direction(112, 1);
	87	omap_set_gpio_direction(113, 1);
	88	omap_set_gpio_direction(115, 1);
	89
	90	revision = omap_get_gpio_datain(115) << 2 \|
	91	omap_get_gpio_datain(113) << 1 \|
	92	omap_get_gpio_datain(112);
	93
	94	omap_free_gpio(112);
	95	omap_free_gpio(113);
	96	omap_free_gpio(115);
	97	} else {
	98	printf("Error: unable to acquire board revision GPIOs\n");
	99	revision = -1;
	100	}
	101
	102	return revision;
	103	}
	104
a06e1629 SS	105	/*
	106	* Routine: get_sdio2_config
	107	* Description: Return information about the wifi module connection
	108	* Returns 0 if the module connects though a level translator
	109	* Returns 1 if the module connects directly
	110	*/
	111	int get_sdio2_config(void)
	112	{
	113	int sdio_direct;
	114
	115	if (!omap_request_gpio(130) && !omap_request_gpio(139)) {
	116
	117	omap_set_gpio_direction(130, 0);
	118	omap_set_gpio_direction(139, 1);
	119
	120	sdio_direct = 1;
	121	omap_set_gpio_dataout(130, 0);
	122	if (omap_get_gpio_datain(139) == 0) {
	123	omap_set_gpio_dataout(130, 1);
	124	if (omap_get_gpio_datain(139) == 1)
	125	sdio_direct = 0;
	126	}
	127
	128	omap_free_gpio(130);
	129	omap_free_gpio(139);
	130	} else {
	131	printf("Error: unable to acquire sdio2 clk GPIOs\n");
	132	sdio_direct = -1;
	133	}
	134
	135	return sdio_direct;
	136	}
	137
58911517	138	/*
9d0fc811 DB	139	* Routine: misc_init_r
9d0fc811 DB	140	* Description: Configure board specific parts
58911517	141	*/
9d0fc811 DB	142	int misc_init_r(void)
9d0fc811 DB	143	{
2c155130	144	twl4030_power_init();
ead39d7a	145	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON \| TWL4030_LED_LEDEN_LEDBON);
9d0fc811	146
df382626 OJ	147	#if defined(CONFIG_CMD_NET)
	148	setup_net_chip();
	149	#endif
	150
c2d5b341	151	printf("Board revision: %d\n", get_board_revision());
a06e1629 SS	152
	153	switch (get_sdio2_config()) {
	154	case 0:
	155	printf("Tranceiver detected on mmc2\n");
	156	MUX_OVERO_SDIO2_TRANSCEIVER();
	157	break;
	158	case 1:
	159	printf("Direct connection on mmc2\n");
	160	MUX_OVERO_SDIO2_DIRECT();
	161	break;
	162	default:
	163	printf("Unable to detect mmc2 connection type\n");
	164	}
	165
e6a6a704 DB	166	dieid_num_r();
e6a6a704 DB	167
9d0fc811 DB	168	return 0;
	169	}
	170
58911517	171	/*
9d0fc811 DB	172	* Routine: set_muxconf_regs
	173	* Description: Setting up the configuration Mux registers specific to the
	174	* hardware. Many pins need to be moved from protect to primary
	175	* mode.
58911517	176	*/
9d0fc811 DB	177	void set_muxconf_regs(void)
	178	{
	179	MUX_OVERO();
	180	}
df382626 OJ	181
	182	#if defined(CONFIG_CMD_NET)
	183	/*
	184	* Routine: setup_net_chip
	185	* Description: Setting up the configuration GPMC registers specific to the
	186	* Ethernet hardware.
	187	*/
	188	static void setup_net_chip(void)
	189	{
	190	struct ctrl ctrl_base = (struct ctrl )OMAP34XX_CTRL_BASE;
	191
ba9a11e4 SS	192	/* first lan chip */
	193	enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
	194	GPMC_SIZE_16M);
	195
	196	/* second lan chip */
	197	enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4], 0x2B000000,
	198	GPMC_SIZE_16M);
df382626 OJ	199
	200	/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
	201	writew(readw(&ctrl_base ->gpmc_nwe) \| 0x0E00, &ctrl_base->gpmc_nwe);
	202	/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
	203	writew(readw(&ctrl_base->gpmc_noe) \| 0x0E00, &ctrl_base->gpmc_noe);
	204	/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
	205	writew(readw(&ctrl_base->gpmc_nadv_ale) \| 0x0E00,
	206	&ctrl_base->gpmc_nadv_ale);
	207
	208	/* Make GPIO 64 as output pin and send a magic pulse through it */
	209	if (!omap_request_gpio(64)) {
	210	omap_set_gpio_direction(64, 0);
	211	omap_set_gpio_dataout(64, 1);
	212	udelay(1);
	213	omap_set_gpio_dataout(64, 0);
	214	udelay(1);
	215	omap_set_gpio_dataout(64, 1);
	216	}
	217	}
	218	#endif
	219
	220	int board_eth_init(bd_t *bis)
	221	{
	222	int rc = 0;
	223	#ifdef CONFIG_SMC911X
	224	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
	225	#endif
	226	return rc;
	227	}