[people/ms/u-boot.git] / board / overo / overo.c

/*
 * Maintainer : Steve Sakoman <steve@sakoman.com>
 *
 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
 *	Richard Woodruff <r-woodruff2@ti.com>
 *	Syed Mohammed Khasim <khasim@ti.com>
 *	Sunil Kumar <sunilsaini05@gmail.com>
 *	Shashi Ranjan <shashiranjanmca05@gmail.com>
 *
 * (C) Copyright 2004-2008
 * Texas Instruments, <www.ti.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#include <common.h>
#include <netdev.h>
#include <twl4030.h>
#include <linux/mtd/nand.h>
#include <asm/io.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-types.h>
#include "overo.h"

DECLARE_GLOBAL_DATA_PTR;

#define TWL4030_I2C_BUS			0
#define EXPANSION_EEPROM_I2C_BUS	2
#define EXPANSION_EEPROM_I2C_ADDRESS	0x51

#define GUMSTIX_SUMMIT			0x01000200
#define GUMSTIX_TOBI			0x02000200
#define GUMSTIX_TOBI_DUO		0x03000200
#define GUMSTIX_PALO35			0x04000200
#define GUMSTIX_PALO43			0x05000200
#define GUMSTIX_CHESTNUT43		0x06000200
#define GUMSTIX_PINTO			0x07000200
#define GUMSTIX_GALLOP43		0x08000200
#define GUMSTIX_ALTO35			0x09000200
#define GUMSTIX_STAGECOACH		0x0A000200
#define GUMSTIX_THUMBO			0x0B000200
#define GUMSTIX_TURTLECORE		0x0C000200
#define GUMSTIX_ARBOR43C		0x0D000200

#define ETTUS_USRP_E			0x01000300

#define GUMSTIX_NO_EEPROM		0xffffffff

static struct {
	unsigned int device_vendor;
	unsigned char revision;
	unsigned char content;
	char fab_revision[8];
	char env_var[16];
	char env_setting[64];
} expansion_config;

#if defined(CONFIG_CMD_NET)
static void setup_net_chip(void);
#endif

/* GPMC definitions for LAN9221 chips on Tobi expansion boards */
static const u32 gpmc_lan_config[] = {
    NET_LAN9221_GPMC_CONFIG1,
    NET_LAN9221_GPMC_CONFIG2,
    NET_LAN9221_GPMC_CONFIG3,
    NET_LAN9221_GPMC_CONFIG4,
    NET_LAN9221_GPMC_CONFIG5,
    NET_LAN9221_GPMC_CONFIG6,
    /*CONFIG7- computed as params */
};

/*
 * Routine: board_init
 * Description: Early hardware init.
 */
int board_init(void)
{
	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	/* board id for Linux */
	gd->bd->bi_arch_number = MACH_TYPE_OVERO;
	/* boot param addr */
	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);

	return 0;
}

/*
 * Routine: get_board_revision
 * Description: Returns the board revision
 */
int get_board_revision(void)
{
	int revision;

#ifdef CONFIG_SYS_I2C_OMAP34XX
	unsigned char data;

	/* board revisions <= R2410 connect 4030 irq_1 to gpio112             */
	/* these boards should return a revision number of 0                  */
	/* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
	i2c_set_bus_num(TWL4030_I2C_BUS);
	data = 0x01;
	i2c_write(0x4B, 0x29, 1, &data, 1);
	data = 0x0c;
	i2c_write(0x4B, 0x2b, 1, &data, 1);
	i2c_read(0x4B, 0x2a, 1, &data, 1);
#endif

	if (!gpio_request(112, "") &&
	    !gpio_request(113, "") &&
	    !gpio_request(115, "")) {

		gpio_direction_input(112);
		gpio_direction_input(113);
		gpio_direction_input(115);

		revision = gpio_get_value(115) << 2 |
			   gpio_get_value(113) << 1 |
			   gpio_get_value(112);
	} else {
		puts("Error: unable to acquire board revision GPIOs\n");
		revision = -1;
	}

	return revision;
}

#ifdef CONFIG_SPL_BUILD
/*
 * Routine: get_board_mem_timings
 * Description: If we use SPL then there is no x-loader nor config header
 * so we have to setup the DDR timings ourself on both banks.
 */
void get_board_mem_timings(struct board_sdrc_timings *timings)
{
	timings->mr = MICRON_V_MR_165;
	switch (get_board_revision()) {
	case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
		timings->ctrla = MICRON_V_ACTIMA_165;
		timings->ctrlb = MICRON_V_ACTIMB_165;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
		break;
	case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
	case REVISION_4:
		timings->mcfg = MICRON_V_MCFG_200(256 << 20);
		timings->ctrla = MICRON_V_ACTIMA_200;
		timings->ctrlb = MICRON_V_ACTIMB_200;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
		break;
	case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
		timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
		timings->ctrla = HYNIX_V_ACTIMA_200;
		timings->ctrlb = HYNIX_V_ACTIMB_200;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
		break;
	case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */
		timings->mcfg = MCFG(512 << 20, 15);
		timings->ctrla = MICRON_V_ACTIMA_200;
		timings->ctrlb = MICRON_V_ACTIMB_200;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
		break;
	default:
		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
		timings->ctrla = MICRON_V_ACTIMA_165;
		timings->ctrlb = MICRON_V_ACTIMB_165;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	}
}
#endif

/*
 * Routine: get_sdio2_config
 * Description: Return information about the wifi module connection
 *              Returns 0 if the module connects though a level translator
 *              Returns 1 if the module connects directly
 */
int get_sdio2_config(void)
{
	int sdio_direct;

	if (!gpio_request(130, "") && !gpio_request(139, "")) {

		gpio_direction_output(130, 0);
		gpio_direction_input(139);

		sdio_direct = 1;
		gpio_set_value(130, 0);
		if (gpio_get_value(139) == 0) {
			gpio_set_value(130, 1);
			if (gpio_get_value(139) == 1)
				sdio_direct = 0;
		}

		gpio_direction_input(130);
	} else {
		puts("Error: unable to acquire sdio2 clk GPIOs\n");
		sdio_direct = -1;
	}

	return sdio_direct;
}

/*
 * Routine: get_expansion_id
 * Description: This function checks for expansion board by checking I2C
 *		bus 2 for the availability of an AT24C01B serial EEPROM.
 *		returns the device_vendor field from the EEPROM
 */
unsigned int get_expansion_id(void)
{
	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);

	/* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
		i2c_set_bus_num(TWL4030_I2C_BUS);
		return GUMSTIX_NO_EEPROM;
	}

	/* read configuration data */
	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
		 sizeof(expansion_config));

	i2c_set_bus_num(TWL4030_I2C_BUS);

	return expansion_config.device_vendor;
}

/*
 * Routine: misc_init_r
 * Description: Configure board specific parts
 */
int misc_init_r(void)
{
	unsigned int expansion_id;

	twl4030_power_init();
	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);

#if defined(CONFIG_CMD_NET)
	setup_net_chip();
#endif

	printf("Board revision: %d\n", get_board_revision());

	switch (get_sdio2_config()) {
	case 0:
		puts("Tranceiver detected on mmc2\n");
		MUX_OVERO_SDIO2_TRANSCEIVER();
		break;
	case 1:
		puts("Direct connection on mmc2\n");
		MUX_OVERO_SDIO2_DIRECT();
		break;
	default:
		puts("Unable to detect mmc2 connection type\n");
	}

	expansion_id = get_expansion_id();
	switch (expansion_id) {
	case GUMSTIX_SUMMIT:
		printf("Recognized Summit expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		setenv("defaultdisplay", "dvi");
		setenv("expansionname", "summit");
		break;
	case GUMSTIX_TOBI:
		printf("Recognized Tobi expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		setenv("defaultdisplay", "dvi");
		setenv("expansionname", "tobi");
		break;
	case GUMSTIX_TOBI_DUO:
		printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		/* second lan chip */
		enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
		    0x2B000000, GPMC_SIZE_16M);
		break;
	case GUMSTIX_PALO35:
		printf("Recognized Palo35 expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		setenv("defaultdisplay", "lcd35");
		break;
	case GUMSTIX_PALO43:
		printf("Recognized Palo43 expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		setenv("defaultdisplay", "lcd43");
		setenv("expansionname", "palo43");
		break;
	case GUMSTIX_CHESTNUT43:
		printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		setenv("defaultdisplay", "lcd43");
		setenv("expansionname", "chestnut43");
		break;
	case GUMSTIX_PINTO:
		printf("Recognized Pinto expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		break;
	case GUMSTIX_GALLOP43:
		printf("Recognized Gallop43 expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		setenv("defaultdisplay", "lcd43");
		setenv("expansionname", "gallop43");
		break;
	case GUMSTIX_ALTO35:
		printf("Recognized Alto35 expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_ALTO35();
		setenv("defaultdisplay", "lcd35");
		setenv("expansionname", "alto35");
		break;
	case GUMSTIX_STAGECOACH:
		printf("Recognized Stagecoach expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		break;
	case GUMSTIX_THUMBO:
		printf("Recognized Thumbo expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		break;
	case GUMSTIX_TURTLECORE:
		printf("Recognized Turtlecore expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		break;
	case GUMSTIX_ARBOR43C:
		printf("Recognized Arbor43C expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_ARBOR43C();
		setenv("defaultdisplay", "lcd43");
		break;
	case ETTUS_USRP_E:
		printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_USRP_E();
		setenv("defaultdisplay", "dvi");
		break;
	case GUMSTIX_NO_EEPROM:
		puts("No EEPROM on expansion board\n");
		setenv("expansionname", "tobi");
		break;
	default:
		if (expansion_id == 0x0)
			setenv("expansionname", "tobi");
		printf("Unrecognized expansion board 0x%08x\n", expansion_id);
		break;
	}

	if (expansion_config.content == 1)
		setenv(expansion_config.env_var, expansion_config.env_setting);

	dieid_num_r();

	if (get_cpu_family() == CPU_OMAP34XX)
		setenv("boardname", "overo");
	else
		setenv("boardname", "overo-storm");

	return 0;
}

/*
 * Routine: set_muxconf_regs
 * Description: Setting up the configuration Mux registers specific to the
 *		hardware. Many pins need to be moved from protect to primary
 *		mode.
 */
void set_muxconf_regs(void)
{
	MUX_OVERO();
}

#if defined(CONFIG_CMD_NET)
/*
 * Routine: setup_net_chip
 * Description: Setting up the configuration GPMC registers specific to the
 *	      Ethernet hardware.
 */
static void setup_net_chip(void)
{
	struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;

	/* first lan chip */
	enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
			GPMC_SIZE_16M);

	/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
	writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
	/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
	writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
	/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
	writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
		&ctrl_base->gpmc_nadv_ale);

	/* Make GPIO 64 as output pin and send a magic pulse through it */
	if (!gpio_request(64, "")) {
		gpio_direction_output(64, 0);
		gpio_set_value(64, 1);
		udelay(1);
		gpio_set_value(64, 0);
		udelay(1);
		gpio_set_value(64, 1);
	}
}
#endif

int board_eth_init(bd_t *bis)
{
	int rc = 0;
#ifdef CONFIG_SMC911X
	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
#endif
	return rc;
}

#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
	return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif
Commit	Line	Data
9d0fc811 DB	1	/*
	2	* Maintainer : Steve Sakoman <steve@sakoman.com>
	3	*
	4	* Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
	5	* Richard Woodruff <r-woodruff2@ti.com>
	6	* Syed Mohammed Khasim <khasim@ti.com>
	7	* Sunil Kumar <sunilsaini05@gmail.com>
	8	* Shashi Ranjan <shashiranjanmca05@gmail.com>
	9	*
	10	* (C) Copyright 2004-2008
	11	* Texas Instruments, <www.ti.com>
	12	*
1a459660	13	* SPDX-License-Identifier: GPL-2.0+
9d0fc811 DB	14	*/
9d0fc811 DB	15	#include <common.h>
df382626	16	#include <netdev.h>
2c155130	17	#include <twl4030.h>
137703b8	18	#include <linux/mtd/nand.h>
9d0fc811	19	#include <asm/io.h>
cd7c5726	20	#include <asm/arch/mmc_host_def.h>
9d0fc811	21	#include <asm/arch/mux.h>
df382626	22	#include <asm/arch/mem.h>
9d0fc811	23	#include <asm/arch/sys_proto.h>
84c3b631	24	#include <asm/gpio.h>
9d0fc811 DB	25	#include <asm/mach-types.h>
	26	#include "overo.h"
	27
29565326 JR	28	DECLARE_GLOBAL_DATA_PTR;
29565326 JR	29
d64b5b89 SS	30	#define TWL4030_I2C_BUS 0
	31	#define EXPANSION_EEPROM_I2C_BUS 2
	32	#define EXPANSION_EEPROM_I2C_ADDRESS 0x51
	33
	34	#define GUMSTIX_SUMMIT 0x01000200
	35	#define GUMSTIX_TOBI 0x02000200
	36	#define GUMSTIX_TOBI_DUO 0x03000200
	37	#define GUMSTIX_PALO35 0x04000200
	38	#define GUMSTIX_PALO43 0x05000200
	39	#define GUMSTIX_CHESTNUT43 0x06000200
	40	#define GUMSTIX_PINTO 0x07000200
	41	#define GUMSTIX_GALLOP43 0x08000200
ea5940e9 AC	42	#define GUMSTIX_ALTO35 0x09000200
	43	#define GUMSTIX_STAGECOACH 0x0A000200
	44	#define GUMSTIX_THUMBO 0x0B000200
	45	#define GUMSTIX_TURTLECORE 0x0C000200
	46	#define GUMSTIX_ARBOR43C 0x0D000200
d64b5b89 SS	47
	48	#define ETTUS_USRP_E 0x01000300
	49
	50	#define GUMSTIX_NO_EEPROM 0xffffffff
	51
	52	static struct {
	53	unsigned int device_vendor;
	54	unsigned char revision;
	55	unsigned char content;
	56	char fab_revision[8];
	57	char env_var[16];
	58	char env_setting[64];
	59	} expansion_config;
	60
df382626 OJ	61	#if defined(CONFIG_CMD_NET)
	62	static void setup_net_chip(void);
	63	#endif
	64
ba9a11e4 SS	65	/* GPMC definitions for LAN9221 chips on Tobi expansion boards */
	66	static const u32 gpmc_lan_config[] = {
	67	NET_LAN9221_GPMC_CONFIG1,
	68	NET_LAN9221_GPMC_CONFIG2,
	69	NET_LAN9221_GPMC_CONFIG3,
	70	NET_LAN9221_GPMC_CONFIG4,
	71	NET_LAN9221_GPMC_CONFIG5,
	72	NET_LAN9221_GPMC_CONFIG6,
	73	/CONFIG7- computed as params /
	74	};
	75
58911517	76	/*
9d0fc811 DB	77	* Routine: board_init
9d0fc811 DB	78	* Description: Early hardware init.
58911517	79	*/
9d0fc811 DB	80	int board_init(void)
9d0fc811 DB	81	{
9d0fc811 DB	82	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	83	/* board id for Linux */
	84	gd->bd->bi_arch_number = MACH_TYPE_OVERO;
	85	/* boot param addr */
	86	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
	87
	88	return 0;
	89	}
	90
c2d5b341 SS	91	/*
	92	* Routine: get_board_revision
	93	* Description: Returns the board revision
	94	*/
	95	int get_board_revision(void)
	96	{
	97	int revision;
	98
6789e84e	99	#ifdef CONFIG_SYS_I2C_OMAP34XX
137703b8 AM	100	unsigned char data;
	101
	102	/* board revisions <= R2410 connect 4030 irq_1 to gpio112 */
	103	/* these boards should return a revision number of 0 */
	104	/* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
	105	i2c_set_bus_num(TWL4030_I2C_BUS);
	106	data = 0x01;
	107	i2c_write(0x4B, 0x29, 1, &data, 1);
	108	data = 0x0c;
	109	i2c_write(0x4B, 0x2b, 1, &data, 1);
	110	i2c_read(0x4B, 0x2a, 1, &data, 1);
	111	#endif
	112
84c3b631 SP	113	if (!gpio_request(112, "") &&
	114	!gpio_request(113, "") &&
	115	!gpio_request(115, "")) {
c2d5b341	116
84c3b631 SP	117	gpio_direction_input(112);
	118	gpio_direction_input(113);
	119	gpio_direction_input(115);
c2d5b341	120
84c3b631 SP	121	revision = gpio_get_value(115) << 2 \|
	122	gpio_get_value(113) << 1 \|
	123	gpio_get_value(112);
c2d5b341	124	} else {
bae485db	125	puts("Error: unable to acquire board revision GPIOs\n");
c2d5b341 SS	126	revision = -1;
	127	}
	128
	129	return revision;
	130	}
	131
137703b8 AM	132	#ifdef CONFIG_SPL_BUILD
	133	/*
	134	* Routine: get_board_mem_timings
	135	* Description: If we use SPL then there is no x-loader nor config header
	136	* so we have to setup the DDR timings ourself on both banks.
	137	*/
8c4445d2	138	void get_board_mem_timings(struct board_sdrc_timings *timings)
137703b8	139	{
8c4445d2	140	timings->mr = MICRON_V_MR_165;
137703b8 AM	141	switch (get_board_revision()) {
137703b8 AM	142	case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
8c4445d2 PB	143	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
	144	timings->ctrla = MICRON_V_ACTIMA_165;
	145	timings->ctrlb = MICRON_V_ACTIMB_165;
	146	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
137703b8 AM	147	break;
137703b8 AM	148	case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
be4cc457	149	case REVISION_4:
802b3c7c AC	150	timings->mcfg = MICRON_V_MCFG_200(256 << 20);
	151	timings->ctrla = MICRON_V_ACTIMA_200;
	152	timings->ctrlb = MICRON_V_ACTIMB_200;
	153	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
137703b8 AM	154	break;
137703b8 AM	155	case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
802b3c7c AC	156	timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
	157	timings->ctrla = HYNIX_V_ACTIMA_200;
	158	timings->ctrlb = HYNIX_V_ACTIMB_200;
	159	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
137703b8	160	break;
49720a4b SS	161	case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */
	162	timings->mcfg = MCFG(512 << 20, 15);
	163	timings->ctrla = MICRON_V_ACTIMA_200;
	164	timings->ctrlb = MICRON_V_ACTIMB_200;
	165	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
	166	break;
137703b8	167	default:
8c4445d2 PB	168	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
	169	timings->ctrla = MICRON_V_ACTIMA_165;
	170	timings->ctrlb = MICRON_V_ACTIMB_165;
	171	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
137703b8 AM	172	}
	173	}
	174	#endif
	175
a06e1629 SS	176	/*
	177	* Routine: get_sdio2_config
	178	* Description: Return information about the wifi module connection
	179	* Returns 0 if the module connects though a level translator
	180	* Returns 1 if the module connects directly
	181	*/
	182	int get_sdio2_config(void)
	183	{
	184	int sdio_direct;
	185
84c3b631	186	if (!gpio_request(130, "") && !gpio_request(139, "")) {
a06e1629	187
84c3b631 SP	188	gpio_direction_output(130, 0);
84c3b631 SP	189	gpio_direction_input(139);
a06e1629 SS	190
a06e1629 SS	191	sdio_direct = 1;
84c3b631 SP	192	gpio_set_value(130, 0);
	193	if (gpio_get_value(139) == 0) {
	194	gpio_set_value(130, 1);
	195	if (gpio_get_value(139) == 1)
a06e1629 SS	196	sdio_direct = 0;
	197	}
	198
b5db0a06	199	gpio_direction_input(130);
a06e1629	200	} else {
bae485db	201	puts("Error: unable to acquire sdio2 clk GPIOs\n");
a06e1629 SS	202	sdio_direct = -1;
	203	}
	204
	205	return sdio_direct;
	206	}
	207
d64b5b89 SS	208	/*
	209	* Routine: get_expansion_id
	210	* Description: This function checks for expansion board by checking I2C
	211	* bus 2 for the availability of an AT24C01B serial EEPROM.
	212	* returns the device_vendor field from the EEPROM
	213	*/
	214	unsigned int get_expansion_id(void)
	215	{
	216	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
	217
	218	/* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
	219	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
	220	i2c_set_bus_num(TWL4030_I2C_BUS);
	221	return GUMSTIX_NO_EEPROM;
	222	}
	223
	224	/* read configuration data */
	225	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
	226	sizeof(expansion_config));
	227
	228	i2c_set_bus_num(TWL4030_I2C_BUS);
	229
	230	return expansion_config.device_vendor;
	231	}
	232
58911517	233	/*
9d0fc811 DB	234	* Routine: misc_init_r
9d0fc811 DB	235	* Description: Configure board specific parts
58911517	236	*/
9d0fc811 DB	237	int misc_init_r(void)
9d0fc811 DB	238	{
ea5940e9 AC	239	unsigned int expansion_id;
ea5940e9 AC	240
2c155130	241	twl4030_power_init();
ead39d7a	242	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON \| TWL4030_LED_LEDEN_LEDBON);
9d0fc811	243
df382626 OJ	244	#if defined(CONFIG_CMD_NET)
	245	setup_net_chip();
	246	#endif
	247
c2d5b341	248	printf("Board revision: %d\n", get_board_revision());
a06e1629 SS	249
	250	switch (get_sdio2_config()) {
	251	case 0:
bae485db	252	puts("Tranceiver detected on mmc2\n");
a06e1629 SS	253	MUX_OVERO_SDIO2_TRANSCEIVER();
	254	break;
	255	case 1:
bae485db	256	puts("Direct connection on mmc2\n");
a06e1629 SS	257	MUX_OVERO_SDIO2_DIRECT();
	258	break;
	259	default:
bae485db	260	puts("Unable to detect mmc2 connection type\n");
a06e1629 SS	261	}
a06e1629 SS	262
ea5940e9 AC	263	expansion_id = get_expansion_id();
ea5940e9 AC	264	switch (expansion_id) {
d64b5b89 SS	265	case GUMSTIX_SUMMIT:
	266	printf("Recognized Summit expansion board (rev %d %s)\n",
	267	expansion_config.revision,
	268	expansion_config.fab_revision);
	269	setenv("defaultdisplay", "dvi");
12cc5437	270	setenv("expansionname", "summit");
d64b5b89 SS	271	break;
	272	case GUMSTIX_TOBI:
	273	printf("Recognized Tobi expansion board (rev %d %s)\n",
	274	expansion_config.revision,
	275	expansion_config.fab_revision);
	276	setenv("defaultdisplay", "dvi");
12cc5437	277	setenv("expansionname", "tobi");
d64b5b89 SS	278	break;
	279	case GUMSTIX_TOBI_DUO:
	280	printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
	281	expansion_config.revision,
	282	expansion_config.fab_revision);
8f7109b3 PB	283	/* second lan chip */
	284	enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
	285	0x2B000000, GPMC_SIZE_16M);
d64b5b89 SS	286	break;
	287	case GUMSTIX_PALO35:
	288	printf("Recognized Palo35 expansion board (rev %d %s)\n",
	289	expansion_config.revision,
	290	expansion_config.fab_revision);
	291	setenv("defaultdisplay", "lcd35");
	292	break;
	293	case GUMSTIX_PALO43:
	294	printf("Recognized Palo43 expansion board (rev %d %s)\n",
	295	expansion_config.revision,
	296	expansion_config.fab_revision);
	297	setenv("defaultdisplay", "lcd43");
12cc5437	298	setenv("expansionname", "palo43");
d64b5b89 SS	299	break;
	300	case GUMSTIX_CHESTNUT43:
	301	printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
	302	expansion_config.revision,
	303	expansion_config.fab_revision);
	304	setenv("defaultdisplay", "lcd43");
12cc5437	305	setenv("expansionname", "chestnut43");
d64b5b89 SS	306	break;
	307	case GUMSTIX_PINTO:
	308	printf("Recognized Pinto expansion board (rev %d %s)\n",
	309	expansion_config.revision,
	310	expansion_config.fab_revision);
	311	break;
	312	case GUMSTIX_GALLOP43:
	313	printf("Recognized Gallop43 expansion board (rev %d %s)\n",
	314	expansion_config.revision,
	315	expansion_config.fab_revision);
	316	setenv("defaultdisplay", "lcd43");
12cc5437	317	setenv("expansionname", "gallop43");
d64b5b89	318	break;
ea5940e9 AC	319	case GUMSTIX_ALTO35:
	320	printf("Recognized Alto35 expansion board (rev %d %s)\n",
	321	expansion_config.revision,
	322	expansion_config.fab_revision);
	323	MUX_ALTO35();
	324	setenv("defaultdisplay", "lcd35");
12cc5437	325	setenv("expansionname", "alto35");
ea5940e9 AC	326	break;
	327	case GUMSTIX_STAGECOACH:
	328	printf("Recognized Stagecoach expansion board (rev %d %s)\n",
	329	expansion_config.revision,
	330	expansion_config.fab_revision);
	331	break;
	332	case GUMSTIX_THUMBO:
	333	printf("Recognized Thumbo expansion board (rev %d %s)\n",
	334	expansion_config.revision,
	335	expansion_config.fab_revision);
	336	break;
	337	case GUMSTIX_TURTLECORE:
	338	printf("Recognized Turtlecore expansion board (rev %d %s)\n",
	339	expansion_config.revision,
	340	expansion_config.fab_revision);
	341	break;
	342	case GUMSTIX_ARBOR43C:
	343	printf("Recognized Arbor43C expansion board (rev %d %s)\n",
	344	expansion_config.revision,
	345	expansion_config.fab_revision);
	346	MUX_ARBOR43C();
	347	setenv("defaultdisplay", "lcd43");
	348	break;
d64b5b89 SS	349	case ETTUS_USRP_E:
	350	printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
	351	expansion_config.revision,
	352	expansion_config.fab_revision);
	353	MUX_USRP_E();
	354	setenv("defaultdisplay", "dvi");
	355	break;
	356	case GUMSTIX_NO_EEPROM:
bae485db	357	puts("No EEPROM on expansion board\n");
12cc5437	358	setenv("expansionname", "tobi");
d64b5b89 SS	359	break;
d64b5b89 SS	360	default:
12cc5437 AC	361	if (expansion_id == 0x0)
12cc5437 AC	362	setenv("expansionname", "tobi");
ea5940e9 AC	363	printf("Unrecognized expansion board 0x%08x\n", expansion_id);
ea5940e9 AC	364	break;
d64b5b89 SS	365	}
	366
	367	if (expansion_config.content == 1)
	368	setenv(expansion_config.env_var, expansion_config.env_setting);
	369
e6a6a704 DB	370	dieid_num_r();
e6a6a704 DB	371
12cc5437 AC	372	if (get_cpu_family() == CPU_OMAP34XX)
	373	setenv("boardname", "overo");
	374	else
	375	setenv("boardname", "overo-storm");
	376
9d0fc811 DB	377	return 0;
	378	}
	379
58911517	380	/*
9d0fc811 DB	381	* Routine: set_muxconf_regs
	382	* Description: Setting up the configuration Mux registers specific to the
	383	* hardware. Many pins need to be moved from protect to primary
	384	* mode.
58911517	385	*/
9d0fc811 DB	386	void set_muxconf_regs(void)
	387	{
	388	MUX_OVERO();
	389	}
df382626 OJ	390
	391	#if defined(CONFIG_CMD_NET)
	392	/*
	393	* Routine: setup_net_chip
	394	* Description: Setting up the configuration GPMC registers specific to the
	395	* Ethernet hardware.
	396	*/
	397	static void setup_net_chip(void)
	398	{
	399	struct ctrl ctrl_base = (struct ctrl )OMAP34XX_CTRL_BASE;
	400
ba9a11e4 SS	401	/* first lan chip */
	402	enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
	403	GPMC_SIZE_16M);
	404
df382626 OJ	405	/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
	406	writew(readw(&ctrl_base ->gpmc_nwe) \| 0x0E00, &ctrl_base->gpmc_nwe);
	407	/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
	408	writew(readw(&ctrl_base->gpmc_noe) \| 0x0E00, &ctrl_base->gpmc_noe);
	409	/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
	410	writew(readw(&ctrl_base->gpmc_nadv_ale) \| 0x0E00,
	411	&ctrl_base->gpmc_nadv_ale);
	412
	413	/* Make GPIO 64 as output pin and send a magic pulse through it */
84c3b631 SP	414	if (!gpio_request(64, "")) {
	415	gpio_direction_output(64, 0);
	416	gpio_set_value(64, 1);
df382626	417	udelay(1);
84c3b631	418	gpio_set_value(64, 0);
df382626	419	udelay(1);
84c3b631	420	gpio_set_value(64, 1);
df382626 OJ	421	}
	422	}
	423	#endif
	424
	425	int board_eth_init(bd_t *bis)
	426	{
	427	int rc = 0;
	428	#ifdef CONFIG_SMC911X
	429	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
	430	#endif
	431	return rc;
	432	}
cd7c5726	433
137703b8	434	#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
cd7c5726 SS	435	int board_mmc_init(bd_t *bis)
cd7c5726 SS	436	{
e3913f56	437	return omap_mmc_init(0, 0, 0, -1, -1);
cd7c5726 SS	438	}
cd7c5726 SS	439	#endif