[people/ms/u-boot.git] / board / overo / overo.c

/*
 * Maintainer : Steve Sakoman <steve@sakoman.com>
 *
 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
 *	Richard Woodruff <r-woodruff2@ti.com>
 *	Syed Mohammed Khasim <khasim@ti.com>
 *	Sunil Kumar <sunilsaini05@gmail.com>
 *	Shashi Ranjan <shashiranjanmca05@gmail.com>
 *
 * (C) Copyright 2004-2008
 * Texas Instruments, <www.ti.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#include <common.h>
#include <netdev.h>
#include <twl4030.h>
#include <linux/mtd/nand.h>
#include <asm/io.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-types.h>
#include "overo.h"

DECLARE_GLOBAL_DATA_PTR;

#define TWL4030_I2C_BUS			0
#define EXPANSION_EEPROM_I2C_BUS	2
#define EXPANSION_EEPROM_I2C_ADDRESS	0x51

#define GUMSTIX_EMPTY_EEPROM		0x0

#define GUMSTIX_SUMMIT			0x01000200
#define GUMSTIX_TOBI			0x02000200
#define GUMSTIX_TOBI_DUO		0x03000200
#define GUMSTIX_PALO35			0x04000200
#define GUMSTIX_PALO43			0x05000200
#define GUMSTIX_CHESTNUT43		0x06000200
#define GUMSTIX_PINTO			0x07000200
#define GUMSTIX_GALLOP43		0x08000200
#define GUMSTIX_ALTO35			0x09000200
#define GUMSTIX_STAGECOACH		0x0A000200
#define GUMSTIX_THUMBO			0x0B000200
#define GUMSTIX_TURTLECORE		0x0C000200
#define GUMSTIX_ARBOR43C		0x0D000200

#define ETTUS_USRP_E			0x01000300

#define GUMSTIX_NO_EEPROM		0xffffffff

static struct {
	unsigned int device_vendor;
	unsigned char revision;
	unsigned char content;
	char fab_revision[8];
	char env_var[16];
	char env_setting[64];
} expansion_config = {0x0};

/*
 * Routine: board_init
 * Description: Early hardware init.
 */
int board_init(void)
{
	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	/* board id for Linux */
	gd->bd->bi_arch_number = MACH_TYPE_OVERO;
	/* boot param addr */
	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);

	return 0;
}

/*
 * Routine: get_board_revision
 * Description: Returns the board revision
 */
int get_board_revision(void)
{
	int revision;

#ifdef CONFIG_SYS_I2C_OMAP34XX
	unsigned char data;

	/* board revisions <= R2410 connect 4030 irq_1 to gpio112             */
	/* these boards should return a revision number of 0                  */
	/* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
	i2c_set_bus_num(TWL4030_I2C_BUS);
	data = 0x01;
	i2c_write(0x4B, 0x29, 1, &data, 1);
	data = 0x0c;
	i2c_write(0x4B, 0x2b, 1, &data, 1);
	i2c_read(0x4B, 0x2a, 1, &data, 1);
#endif

	if (!gpio_request(112, "") &&
	    !gpio_request(113, "") &&
	    !gpio_request(115, "")) {

		gpio_direction_input(112);
		gpio_direction_input(113);
		gpio_direction_input(115);

		revision = gpio_get_value(115) << 2 |
			   gpio_get_value(113) << 1 |
			   gpio_get_value(112);
	} else {
		puts("Error: unable to acquire board revision GPIOs\n");
		revision = -1;
	}

	return revision;
}

#ifdef CONFIG_SPL_BUILD
/*
 * Routine: get_board_mem_timings
 * Description: If we use SPL then there is no x-loader nor config header
 * so we have to setup the DDR timings ourself on both banks.
 */
void get_board_mem_timings(struct board_sdrc_timings *timings)
{
	timings->mr = MICRON_V_MR_165;
	switch (get_board_revision()) {
	case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
		timings->ctrla = MICRON_V_ACTIMA_165;
		timings->ctrlb = MICRON_V_ACTIMB_165;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
		break;
	case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
	case REVISION_4:
		timings->mcfg = MICRON_V_MCFG_200(256 << 20);
		timings->ctrla = MICRON_V_ACTIMA_200;
		timings->ctrlb = MICRON_V_ACTIMB_200;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
		break;
	case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
		timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
		timings->ctrla = HYNIX_V_ACTIMA_200;
		timings->ctrlb = HYNIX_V_ACTIMB_200;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
		break;
	case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */
		timings->mcfg = MCFG(512 << 20, 15);
		timings->ctrla = MICRON_V_ACTIMA_200;
		timings->ctrlb = MICRON_V_ACTIMB_200;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
		break;
	default:
		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
		timings->ctrla = MICRON_V_ACTIMA_165;
		timings->ctrlb = MICRON_V_ACTIMB_165;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	}
}
#endif

/*
 * Routine: get_sdio2_config
 * Description: Return information about the wifi module connection
 *              Returns 0 if the module connects though a level translator
 *              Returns 1 if the module connects directly
 */
int get_sdio2_config(void)
{
	int sdio_direct;

	if (!gpio_request(130, "") && !gpio_request(139, "")) {

		gpio_direction_output(130, 0);
		gpio_direction_input(139);

		sdio_direct = 1;
		gpio_set_value(130, 0);
		if (gpio_get_value(139) == 0) {
			gpio_set_value(130, 1);
			if (gpio_get_value(139) == 1)
				sdio_direct = 0;
		}

		gpio_direction_input(130);
	} else {
		puts("Error: unable to acquire sdio2 clk GPIOs\n");
		sdio_direct = -1;
	}

	return sdio_direct;
}

/*
 * Routine: get_expansion_id
 * Description: This function checks for expansion board by checking I2C
 *		bus 2 for the availability of an AT24C01B serial EEPROM.
 *		returns the device_vendor field from the EEPROM
 */
unsigned int get_expansion_id(void)
{
	if (expansion_config.device_vendor != 0x0)
		return expansion_config.device_vendor;

	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);

	/* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
		i2c_set_bus_num(TWL4030_I2C_BUS);
		return GUMSTIX_NO_EEPROM;
	}

	/* read configuration data */
	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
		 sizeof(expansion_config));

	i2c_set_bus_num(TWL4030_I2C_BUS);

	return expansion_config.device_vendor;
}

/*
 * Routine: misc_init_r
 * Description: Configure board specific parts
 */
int misc_init_r(void)
{
	unsigned int expansion_id;

	twl4030_power_init();
	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);

	printf("Board revision: %d\n", get_board_revision());

	switch (get_sdio2_config()) {
	case 0:
		puts("Tranceiver detected on mmc2\n");
		MUX_OVERO_SDIO2_TRANSCEIVER();
		break;
	case 1:
		puts("Direct connection on mmc2\n");
		MUX_OVERO_SDIO2_DIRECT();
		break;
	default:
		puts("Unable to detect mmc2 connection type\n");
	}

	expansion_id = get_expansion_id();
	switch (expansion_id) {
	case GUMSTIX_SUMMIT:
		printf("Recognized Summit expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		setenv("defaultdisplay", "dvi");
		setenv("expansionname", "summit");
		break;
	case GUMSTIX_TOBI:
		printf("Recognized Tobi expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		setenv("defaultdisplay", "dvi");
		setenv("expansionname", "tobi");
		break;
	case GUMSTIX_TOBI_DUO:
		printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		break;
	case GUMSTIX_PALO35:
		printf("Recognized Palo35 expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		setenv("defaultdisplay", "lcd35");
		break;
	case GUMSTIX_PALO43:
		printf("Recognized Palo43 expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		setenv("defaultdisplay", "lcd43");
		setenv("expansionname", "palo43");
		break;
	case GUMSTIX_CHESTNUT43:
		printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		setenv("defaultdisplay", "lcd43");
		setenv("expansionname", "chestnut43");
		break;
	case GUMSTIX_PINTO:
		printf("Recognized Pinto expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		break;
	case GUMSTIX_GALLOP43:
		printf("Recognized Gallop43 expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		setenv("defaultdisplay", "lcd43");
		setenv("expansionname", "gallop43");
		break;
	case GUMSTIX_ALTO35:
		printf("Recognized Alto35 expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		MUX_ALTO35();
		setenv("defaultdisplay", "lcd35");
		setenv("expansionname", "alto35");
		break;
	case GUMSTIX_STAGECOACH:
		printf("Recognized Stagecoach expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		break;
	case GUMSTIX_THUMBO:
		printf("Recognized Thumbo expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		break;
	case GUMSTIX_TURTLECORE:
		printf("Recognized Turtlecore expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		break;
	case GUMSTIX_ARBOR43C:
		printf("Recognized Arbor43C expansion board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		MUX_ARBOR43C();
		setenv("defaultdisplay", "lcd43");
		break;
	case ETTUS_USRP_E:
		printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_GUMSTIX();
		MUX_USRP_E();
		setenv("defaultdisplay", "dvi");
		break;
	case GUMSTIX_NO_EEPROM:
	case GUMSTIX_EMPTY_EEPROM:
		puts("No or empty EEPROM on expansion board\n");
		MUX_GUMSTIX();
		setenv("expansionname", "tobi");
		break;
	default:
		printf("Unrecognized expansion board 0x%08x\n", expansion_id);
		break;
	}

	if (expansion_config.content == 1)
		setenv(expansion_config.env_var, expansion_config.env_setting);

	dieid_num_r();

	if (get_cpu_family() == CPU_OMAP34XX)
		setenv("boardname", "overo");
	else
		setenv("boardname", "overo-storm");

	return 0;
}

/*
 * Routine: set_muxconf_regs
 * Description: Setting up the configuration Mux registers specific to the
 *		hardware. Many pins need to be moved from protect to primary
 *		mode.
 */
void set_muxconf_regs(void)
{
	MUX_OVERO();
}

#if defined(CONFIG_CMD_NET) && !defined(CONFIG_SPL_BUILD)
/* GPMC definitions for LAN9221 chips on Tobi expansion boards */
static const u32 gpmc_lan_config[] = {
	NET_LAN9221_GPMC_CONFIG1,
	NET_LAN9221_GPMC_CONFIG2,
	NET_LAN9221_GPMC_CONFIG3,
	NET_LAN9221_GPMC_CONFIG4,
	NET_LAN9221_GPMC_CONFIG5,
	NET_LAN9221_GPMC_CONFIG6,
	/*CONFIG7- computed as params */
};

/*
 * Routine: setup_net_chip
 * Description: Setting up the configuration GPMC registers specific to the
 *	      Ethernet hardware.
 */
static void setup_net_chip(void)
{
	struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;

	/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
	writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
	/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
	writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
	/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
	writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
		&ctrl_base->gpmc_nadv_ale);
}

/*
 * Routine: reset_net_chip
 * Description: Reset the Ethernet hardware.
 */
static void reset_net_chip(void)
{
	/* Make GPIO 64 as output pin and send a magic pulse through it */
	if (!gpio_request(64, "")) {
		gpio_direction_output(64, 0);
		gpio_set_value(64, 1);
		udelay(1);
		gpio_set_value(64, 0);
		udelay(1);
		gpio_set_value(64, 1);
	}
}

int board_eth_init(bd_t *bis)
{
	unsigned int expansion_id;
	int rc = 0;

#ifdef CONFIG_SMC911X
	expansion_id = get_expansion_id();
	switch (expansion_id) {
	case GUMSTIX_TOBI_DUO:
		/* second lan chip */
		enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
				      0x2B000000, GPMC_SIZE_16M);
		/* no break */
	case GUMSTIX_TOBI:
	case GUMSTIX_CHESTNUT43:
	case GUMSTIX_STAGECOACH:
	case GUMSTIX_NO_EEPROM:
	case GUMSTIX_EMPTY_EEPROM:
		/* first lan chip */
		enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
				      0x2C000000, GPMC_SIZE_16M);

		setup_net_chip();
		reset_net_chip();

		rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
		break;
	default:
		break;
	}
#endif

	return rc;
}
#endif

#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
	return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif
Commit	Line	Data
9d0fc811 DB	1	/*
	2	* Maintainer : Steve Sakoman <steve@sakoman.com>
	3	*
	4	* Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
	5	* Richard Woodruff <r-woodruff2@ti.com>
	6	* Syed Mohammed Khasim <khasim@ti.com>
	7	* Sunil Kumar <sunilsaini05@gmail.com>
	8	* Shashi Ranjan <shashiranjanmca05@gmail.com>
	9	*
	10	* (C) Copyright 2004-2008
	11	* Texas Instruments, <www.ti.com>
	12	*
1a459660	13	* SPDX-License-Identifier: GPL-2.0+
9d0fc811 DB	14	*/
9d0fc811 DB	15	#include <common.h>
df382626	16	#include <netdev.h>
2c155130	17	#include <twl4030.h>
137703b8	18	#include <linux/mtd/nand.h>
9d0fc811	19	#include <asm/io.h>
cd7c5726	20	#include <asm/arch/mmc_host_def.h>
9d0fc811	21	#include <asm/arch/mux.h>
df382626	22	#include <asm/arch/mem.h>
9d0fc811	23	#include <asm/arch/sys_proto.h>
84c3b631	24	#include <asm/gpio.h>
9d0fc811 DB	25	#include <asm/mach-types.h>
	26	#include "overo.h"
	27
29565326 JR	28	DECLARE_GLOBAL_DATA_PTR;
29565326 JR	29
d64b5b89 SS	30	#define TWL4030_I2C_BUS 0
	31	#define EXPANSION_EEPROM_I2C_BUS 2
	32	#define EXPANSION_EEPROM_I2C_ADDRESS 0x51
	33
4ed914a2 SH	34	#define GUMSTIX_EMPTY_EEPROM 0x0
4ed914a2 SH	35
d64b5b89 SS	36	#define GUMSTIX_SUMMIT 0x01000200
	37	#define GUMSTIX_TOBI 0x02000200
	38	#define GUMSTIX_TOBI_DUO 0x03000200
	39	#define GUMSTIX_PALO35 0x04000200
	40	#define GUMSTIX_PALO43 0x05000200
	41	#define GUMSTIX_CHESTNUT43 0x06000200
	42	#define GUMSTIX_PINTO 0x07000200
	43	#define GUMSTIX_GALLOP43 0x08000200
ea5940e9 AC	44	#define GUMSTIX_ALTO35 0x09000200
	45	#define GUMSTIX_STAGECOACH 0x0A000200
	46	#define GUMSTIX_THUMBO 0x0B000200
	47	#define GUMSTIX_TURTLECORE 0x0C000200
	48	#define GUMSTIX_ARBOR43C 0x0D000200
d64b5b89 SS	49
	50	#define ETTUS_USRP_E 0x01000300
	51
	52	#define GUMSTIX_NO_EEPROM 0xffffffff
	53
	54	static struct {
	55	unsigned int device_vendor;
	56	unsigned char revision;
	57	unsigned char content;
	58	char fab_revision[8];
	59	char env_var[16];
	60	char env_setting[64];
4ed914a2	61	} expansion_config = {0x0};
d64b5b89	62
58911517	63	/*
9d0fc811 DB	64	* Routine: board_init
9d0fc811 DB	65	* Description: Early hardware init.
58911517	66	*/
9d0fc811 DB	67	int board_init(void)
9d0fc811 DB	68	{
9d0fc811 DB	69	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	70	/* board id for Linux */
	71	gd->bd->bi_arch_number = MACH_TYPE_OVERO;
	72	/* boot param addr */
	73	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
	74
	75	return 0;
	76	}
	77
c2d5b341 SS	78	/*
	79	* Routine: get_board_revision
	80	* Description: Returns the board revision
	81	*/
	82	int get_board_revision(void)
	83	{
	84	int revision;
	85
6789e84e	86	#ifdef CONFIG_SYS_I2C_OMAP34XX
137703b8 AM	87	unsigned char data;
	88
	89	/* board revisions <= R2410 connect 4030 irq_1 to gpio112 */
	90	/* these boards should return a revision number of 0 */
	91	/* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
	92	i2c_set_bus_num(TWL4030_I2C_BUS);
	93	data = 0x01;
	94	i2c_write(0x4B, 0x29, 1, &data, 1);
	95	data = 0x0c;
	96	i2c_write(0x4B, 0x2b, 1, &data, 1);
	97	i2c_read(0x4B, 0x2a, 1, &data, 1);
	98	#endif
	99
84c3b631 SP	100	if (!gpio_request(112, "") &&
	101	!gpio_request(113, "") &&
	102	!gpio_request(115, "")) {
c2d5b341	103
84c3b631 SP	104	gpio_direction_input(112);
	105	gpio_direction_input(113);
	106	gpio_direction_input(115);
c2d5b341	107
84c3b631 SP	108	revision = gpio_get_value(115) << 2 \|
	109	gpio_get_value(113) << 1 \|
	110	gpio_get_value(112);
c2d5b341	111	} else {
bae485db	112	puts("Error: unable to acquire board revision GPIOs\n");
c2d5b341 SS	113	revision = -1;
	114	}
	115
	116	return revision;
	117	}
	118
137703b8 AM	119	#ifdef CONFIG_SPL_BUILD
	120	/*
	121	* Routine: get_board_mem_timings
	122	* Description: If we use SPL then there is no x-loader nor config header
	123	* so we have to setup the DDR timings ourself on both banks.
	124	*/
8c4445d2	125	void get_board_mem_timings(struct board_sdrc_timings *timings)
137703b8	126	{
8c4445d2	127	timings->mr = MICRON_V_MR_165;
137703b8 AM	128	switch (get_board_revision()) {
137703b8 AM	129	case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
8c4445d2 PB	130	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
	131	timings->ctrla = MICRON_V_ACTIMA_165;
	132	timings->ctrlb = MICRON_V_ACTIMB_165;
	133	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
137703b8 AM	134	break;
137703b8 AM	135	case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
be4cc457	136	case REVISION_4:
802b3c7c AC	137	timings->mcfg = MICRON_V_MCFG_200(256 << 20);
	138	timings->ctrla = MICRON_V_ACTIMA_200;
	139	timings->ctrlb = MICRON_V_ACTIMB_200;
	140	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
137703b8 AM	141	break;
137703b8 AM	142	case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
802b3c7c AC	143	timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
	144	timings->ctrla = HYNIX_V_ACTIMA_200;
	145	timings->ctrlb = HYNIX_V_ACTIMB_200;
	146	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
137703b8	147	break;
49720a4b SS	148	case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */
	149	timings->mcfg = MCFG(512 << 20, 15);
	150	timings->ctrla = MICRON_V_ACTIMA_200;
	151	timings->ctrlb = MICRON_V_ACTIMB_200;
	152	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
	153	break;
137703b8	154	default:
8c4445d2 PB	155	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
	156	timings->ctrla = MICRON_V_ACTIMA_165;
	157	timings->ctrlb = MICRON_V_ACTIMB_165;
	158	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
137703b8 AM	159	}
	160	}
	161	#endif
	162
a06e1629 SS	163	/*
	164	* Routine: get_sdio2_config
	165	* Description: Return information about the wifi module connection
	166	* Returns 0 if the module connects though a level translator
	167	* Returns 1 if the module connects directly
	168	*/
	169	int get_sdio2_config(void)
	170	{
	171	int sdio_direct;
	172
84c3b631	173	if (!gpio_request(130, "") && !gpio_request(139, "")) {
a06e1629	174
84c3b631 SP	175	gpio_direction_output(130, 0);
84c3b631 SP	176	gpio_direction_input(139);
a06e1629 SS	177
a06e1629 SS	178	sdio_direct = 1;
84c3b631 SP	179	gpio_set_value(130, 0);
	180	if (gpio_get_value(139) == 0) {
	181	gpio_set_value(130, 1);
	182	if (gpio_get_value(139) == 1)
a06e1629 SS	183	sdio_direct = 0;
	184	}
	185
b5db0a06	186	gpio_direction_input(130);
a06e1629	187	} else {
bae485db	188	puts("Error: unable to acquire sdio2 clk GPIOs\n");
a06e1629 SS	189	sdio_direct = -1;
	190	}
	191
	192	return sdio_direct;
	193	}
	194
d64b5b89 SS	195	/*
	196	* Routine: get_expansion_id
	197	* Description: This function checks for expansion board by checking I2C
	198	* bus 2 for the availability of an AT24C01B serial EEPROM.
	199	* returns the device_vendor field from the EEPROM
	200	*/
	201	unsigned int get_expansion_id(void)
	202	{
4ed914a2 SH	203	if (expansion_config.device_vendor != 0x0)
	204	return expansion_config.device_vendor;
	205
d64b5b89 SS	206	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
	207
	208	/* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
	209	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
	210	i2c_set_bus_num(TWL4030_I2C_BUS);
	211	return GUMSTIX_NO_EEPROM;
	212	}
	213
	214	/* read configuration data */
	215	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
	216	sizeof(expansion_config));
	217
	218	i2c_set_bus_num(TWL4030_I2C_BUS);
	219
	220	return expansion_config.device_vendor;
	221	}
	222
58911517	223	/*
9d0fc811 DB	224	* Routine: misc_init_r
9d0fc811 DB	225	* Description: Configure board specific parts
58911517	226	*/
9d0fc811 DB	227	int misc_init_r(void)
9d0fc811 DB	228	{
ea5940e9 AC	229	unsigned int expansion_id;
ea5940e9 AC	230
2c155130	231	twl4030_power_init();
ead39d7a	232	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON \| TWL4030_LED_LEDEN_LEDBON);
9d0fc811	233
c2d5b341	234	printf("Board revision: %d\n", get_board_revision());
a06e1629 SS	235
	236	switch (get_sdio2_config()) {
	237	case 0:
bae485db	238	puts("Tranceiver detected on mmc2\n");
a06e1629 SS	239	MUX_OVERO_SDIO2_TRANSCEIVER();
	240	break;
	241	case 1:
bae485db	242	puts("Direct connection on mmc2\n");
a06e1629 SS	243	MUX_OVERO_SDIO2_DIRECT();
	244	break;
	245	default:
bae485db	246	puts("Unable to detect mmc2 connection type\n");
a06e1629 SS	247	}
a06e1629 SS	248
ea5940e9 AC	249	expansion_id = get_expansion_id();
ea5940e9 AC	250	switch (expansion_id) {
d64b5b89 SS	251	case GUMSTIX_SUMMIT:
	252	printf("Recognized Summit expansion board (rev %d %s)\n",
	253	expansion_config.revision,
	254	expansion_config.fab_revision);
4ed914a2	255	MUX_GUMSTIX();
d64b5b89	256	setenv("defaultdisplay", "dvi");
12cc5437	257	setenv("expansionname", "summit");
d64b5b89 SS	258	break;
	259	case GUMSTIX_TOBI:
	260	printf("Recognized Tobi expansion board (rev %d %s)\n",
	261	expansion_config.revision,
	262	expansion_config.fab_revision);
4ed914a2	263	MUX_GUMSTIX();
d64b5b89	264	setenv("defaultdisplay", "dvi");
12cc5437	265	setenv("expansionname", "tobi");
d64b5b89 SS	266	break;
	267	case GUMSTIX_TOBI_DUO:
	268	printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
	269	expansion_config.revision,
	270	expansion_config.fab_revision);
4ed914a2	271	MUX_GUMSTIX();
d64b5b89 SS	272	break;
	273	case GUMSTIX_PALO35:
	274	printf("Recognized Palo35 expansion board (rev %d %s)\n",
	275	expansion_config.revision,
	276	expansion_config.fab_revision);
4ed914a2	277	MUX_GUMSTIX();
d64b5b89 SS	278	setenv("defaultdisplay", "lcd35");
	279	break;
	280	case GUMSTIX_PALO43:
	281	printf("Recognized Palo43 expansion board (rev %d %s)\n",
	282	expansion_config.revision,
	283	expansion_config.fab_revision);
4ed914a2	284	MUX_GUMSTIX();
d64b5b89	285	setenv("defaultdisplay", "lcd43");
12cc5437	286	setenv("expansionname", "palo43");
d64b5b89 SS	287	break;
	288	case GUMSTIX_CHESTNUT43:
	289	printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
	290	expansion_config.revision,
	291	expansion_config.fab_revision);
4ed914a2	292	MUX_GUMSTIX();
d64b5b89	293	setenv("defaultdisplay", "lcd43");
12cc5437	294	setenv("expansionname", "chestnut43");
d64b5b89 SS	295	break;
	296	case GUMSTIX_PINTO:
	297	printf("Recognized Pinto expansion board (rev %d %s)\n",
	298	expansion_config.revision,
	299	expansion_config.fab_revision);
4ed914a2	300	MUX_GUMSTIX();
d64b5b89 SS	301	break;
	302	case GUMSTIX_GALLOP43:
	303	printf("Recognized Gallop43 expansion board (rev %d %s)\n",
	304	expansion_config.revision,
	305	expansion_config.fab_revision);
4ed914a2	306	MUX_GUMSTIX();
d64b5b89	307	setenv("defaultdisplay", "lcd43");
12cc5437	308	setenv("expansionname", "gallop43");
d64b5b89	309	break;
ea5940e9 AC	310	case GUMSTIX_ALTO35:
	311	printf("Recognized Alto35 expansion board (rev %d %s)\n",
	312	expansion_config.revision,
	313	expansion_config.fab_revision);
4ed914a2	314	MUX_GUMSTIX();
ea5940e9 AC	315	MUX_ALTO35();
ea5940e9 AC	316	setenv("defaultdisplay", "lcd35");
12cc5437	317	setenv("expansionname", "alto35");
ea5940e9 AC	318	break;
	319	case GUMSTIX_STAGECOACH:
	320	printf("Recognized Stagecoach expansion board (rev %d %s)\n",
	321	expansion_config.revision,
	322	expansion_config.fab_revision);
4ed914a2	323	MUX_GUMSTIX();
ea5940e9 AC	324	break;
	325	case GUMSTIX_THUMBO:
	326	printf("Recognized Thumbo expansion board (rev %d %s)\n",
	327	expansion_config.revision,
	328	expansion_config.fab_revision);
4ed914a2	329	MUX_GUMSTIX();
ea5940e9 AC	330	break;
	331	case GUMSTIX_TURTLECORE:
	332	printf("Recognized Turtlecore expansion board (rev %d %s)\n",
	333	expansion_config.revision,
	334	expansion_config.fab_revision);
4ed914a2	335	MUX_GUMSTIX();
ea5940e9 AC	336	break;
	337	case GUMSTIX_ARBOR43C:
	338	printf("Recognized Arbor43C expansion board (rev %d %s)\n",
	339	expansion_config.revision,
	340	expansion_config.fab_revision);
4ed914a2	341	MUX_GUMSTIX();
ea5940e9 AC	342	MUX_ARBOR43C();
	343	setenv("defaultdisplay", "lcd43");
	344	break;
d64b5b89 SS	345	case ETTUS_USRP_E:
	346	printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
	347	expansion_config.revision,
	348	expansion_config.fab_revision);
4ed914a2	349	MUX_GUMSTIX();
d64b5b89 SS	350	MUX_USRP_E();
	351	setenv("defaultdisplay", "dvi");
	352	break;
	353	case GUMSTIX_NO_EEPROM:
4ed914a2 SH	354	case GUMSTIX_EMPTY_EEPROM:
	355	puts("No or empty EEPROM on expansion board\n");
	356	MUX_GUMSTIX();
12cc5437	357	setenv("expansionname", "tobi");
d64b5b89 SS	358	break;
d64b5b89 SS	359	default:
ea5940e9 AC	360	printf("Unrecognized expansion board 0x%08x\n", expansion_id);
ea5940e9 AC	361	break;
d64b5b89 SS	362	}
	363
	364	if (expansion_config.content == 1)
	365	setenv(expansion_config.env_var, expansion_config.env_setting);
	366
e6a6a704 DB	367	dieid_num_r();
e6a6a704 DB	368
12cc5437 AC	369	if (get_cpu_family() == CPU_OMAP34XX)
	370	setenv("boardname", "overo");
	371	else
	372	setenv("boardname", "overo-storm");
	373
9d0fc811 DB	374	return 0;
	375	}
	376
58911517	377	/*
9d0fc811 DB	378	* Routine: set_muxconf_regs
	379	* Description: Setting up the configuration Mux registers specific to the
	380	* hardware. Many pins need to be moved from protect to primary
	381	* mode.
58911517	382	*/
9d0fc811 DB	383	void set_muxconf_regs(void)
	384	{
	385	MUX_OVERO();
	386	}
df382626	387
113429a2 SH	388	#if defined(CONFIG_CMD_NET) && !defined(CONFIG_SPL_BUILD)
	389	/* GPMC definitions for LAN9221 chips on Tobi expansion boards */
	390	static const u32 gpmc_lan_config[] = {
	391	NET_LAN9221_GPMC_CONFIG1,
	392	NET_LAN9221_GPMC_CONFIG2,
	393	NET_LAN9221_GPMC_CONFIG3,
	394	NET_LAN9221_GPMC_CONFIG4,
	395	NET_LAN9221_GPMC_CONFIG5,
	396	NET_LAN9221_GPMC_CONFIG6,
	397	/CONFIG7- computed as params /
	398	};
	399
df382626 OJ	400	/*
	401	* Routine: setup_net_chip
	402	* Description: Setting up the configuration GPMC registers specific to the
	403	* Ethernet hardware.
	404	*/
	405	static void setup_net_chip(void)
	406	{
	407	struct ctrl ctrl_base = (struct ctrl )OMAP34XX_CTRL_BASE;
	408
df382626 OJ	409	/* Enable off mode for NWE in PADCONF_GPMC_NWE register */
	410	writew(readw(&ctrl_base ->gpmc_nwe) \| 0x0E00, &ctrl_base->gpmc_nwe);
	411	/* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
	412	writew(readw(&ctrl_base->gpmc_noe) \| 0x0E00, &ctrl_base->gpmc_noe);
	413	/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
	414	writew(readw(&ctrl_base->gpmc_nadv_ale) \| 0x0E00,
	415	&ctrl_base->gpmc_nadv_ale);
113429a2	416	}
df382626	417
113429a2 SH	418	/*
	419	* Routine: reset_net_chip
	420	* Description: Reset the Ethernet hardware.
	421	*/
	422	static void reset_net_chip(void)
	423	{
df382626	424	/* Make GPIO 64 as output pin and send a magic pulse through it */
84c3b631 SP	425	if (!gpio_request(64, "")) {
	426	gpio_direction_output(64, 0);
	427	gpio_set_value(64, 1);
df382626	428	udelay(1);
84c3b631	429	gpio_set_value(64, 0);
df382626	430	udelay(1);
84c3b631	431	gpio_set_value(64, 1);
df382626 OJ	432	}
df382626 OJ	433	}
df382626 OJ	434
	435	int board_eth_init(bd_t *bis)
	436	{
113429a2	437	unsigned int expansion_id;
df382626	438	int rc = 0;
113429a2	439
df382626	440	#ifdef CONFIG_SMC911X
113429a2 SH	441	expansion_id = get_expansion_id();
	442	switch (expansion_id) {
	443	case GUMSTIX_TOBI_DUO:
	444	/* second lan chip */
	445	enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
	446	0x2B000000, GPMC_SIZE_16M);
	447	/* no break */
	448	case GUMSTIX_TOBI:
	449	case GUMSTIX_CHESTNUT43:
	450	case GUMSTIX_STAGECOACH:
	451	case GUMSTIX_NO_EEPROM:
	452	case GUMSTIX_EMPTY_EEPROM:
	453	/* first lan chip */
	454	enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5],
	455	0x2C000000, GPMC_SIZE_16M);
	456
	457	setup_net_chip();
	458	reset_net_chip();
	459
	460	rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
	461	break;
	462	default:
	463	break;
	464	}
df382626	465	#endif
113429a2	466
df382626 OJ	467	return rc;
df382626 OJ	468	}
113429a2	469	#endif
cd7c5726	470
137703b8	471	#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
cd7c5726 SS	472	int board_mmc_init(bd_t *bis)
cd7c5726 SS	473	{
e3913f56	474	return omap_mmc_init(0, 0, 0, -1, -1);
cd7c5726 SS	475	}
cd7c5726 SS	476	#endif