]> git.ipfire.org Git - people/ms/u-boot.git/blame - board/prodrive/p3p440/p3p440.c
Fix incorrect use of getenv() before relocation
[people/ms/u-boot.git] / board / prodrive / p3p440 / p3p440.c
CommitLineData
5568e613
SR
1/*
2 * (C) Copyright 2005
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/processor.h>
28#include <command.h>
29
30#include "p3p440.h"
31
d87080b7
WD
32DECLARE_GLOBAL_DATA_PTR;
33
5568e613
SR
34void set_led(int color)
35{
36 switch (color) {
37 case LED_OFF:
6d0f6bcf 38 out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_LED_GREEN & ~CONFIG_SYS_LED_RED);
5568e613
SR
39 break;
40
41 case LED_GREEN:
6d0f6bcf 42 out32(GPIO0_OR, (in32(GPIO0_OR) | CONFIG_SYS_LED_GREEN) & ~CONFIG_SYS_LED_RED);
5568e613
SR
43 break;
44
45 case LED_RED:
6d0f6bcf 46 out32(GPIO0_OR, (in32(GPIO0_OR) | CONFIG_SYS_LED_RED) & ~CONFIG_SYS_LED_GREEN);
5568e613
SR
47 break;
48
49 case LED_ORANGE:
6d0f6bcf 50 out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_LED_GREEN | CONFIG_SYS_LED_RED);
5568e613
SR
51 break;
52 }
53}
54
55static int is_monarch(void)
56{
6d0f6bcf 57 out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_GPIO_RDY);
5568e613
SR
58 udelay(1000);
59
6d0f6bcf 60 if (in32(GPIO0_IR) & CONFIG_SYS_MONARCH_IO)
5568e613
SR
61 return 0;
62 else
63 return 1;
64}
65
66static void wait_for_pci_ready(void)
67{
68 /*
69 * Configure EREADY_IO as input
70 */
6d0f6bcf 71 out32(GPIO0_TCR, in32(GPIO0_TCR) & ~CONFIG_SYS_EREADY_IO);
5568e613
SR
72 udelay(1000);
73
74 for (;;) {
6d0f6bcf 75 if (in32(GPIO0_IR) & CONFIG_SYS_EREADY_IO)
5568e613 76 return;
f013dacf 77 }
5568e613
SR
78
79}
80
81int board_early_init_f(void)
82{
83 uint reg;
84
85 /*--------------------------------------------------------------------
86 * Setup the external bus controller/chip selects
87 *-------------------------------------------------------------------*/
d1c3b275
SR
88 mtdcr(EBC0_CFGADDR, EBC0_CFG);
89 reg = mfdcr(EBC0_CFGDATA);
90 mtdcr(EBC0_CFGDATA, reg | 0x04000000); /* Set ATC */
5568e613
SR
91
92 /*--------------------------------------------------------------------
93 * Setup pin multiplexing (GPIO/IRQ...)
94 *-------------------------------------------------------------------*/
d1c3b275 95 mtdcr(CPC0_GPIO, 0x03F01F80);
5568e613
SR
96
97 out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
6d0f6bcf
JCPV
98 out32(GPIO0_TCR, CONFIG_SYS_GPIO_RDY | CONFIG_SYS_EREADY_IO | CONFIG_SYS_LED_RED | CONFIG_SYS_LED_GREEN);
99 out32(GPIO0_OR, CONFIG_SYS_GPIO_RDY);
5568e613
SR
100
101 /*--------------------------------------------------------------------
102 * Setup the interrupt controller polarities, triggers, etc.
103 *-------------------------------------------------------------------*/
952e7760
SR
104 mtdcr(UIC0SR, 0xffffffff); /* clear all */
105 mtdcr(UIC0ER, 0x00000000); /* disable all */
106 mtdcr(UIC0CR, 0x00000001); /* UIC1 crit is critical */
107 mtdcr(UIC0PR, 0xfffffe13); /* per ref-board manual */
108 mtdcr(UIC0TR, 0x01c00008); /* per ref-board manual */
109 mtdcr(UIC0VR, 0x00000001); /* int31 highest, base=0x000 */
110 mtdcr(UIC0SR, 0xffffffff); /* clear all */
111
112 mtdcr(UIC1SR, 0xffffffff); /* clear all */
113 mtdcr(UIC1ER, 0x00000000); /* disable all */
114 mtdcr(UIC1CR, 0x00000000); /* all non-critical */
115 mtdcr(UIC1PR, 0xffffe0ff); /* per ref-board manual */
116 mtdcr(UIC1TR, 0x00ffc000); /* per ref-board manual */
117 mtdcr(UIC1VR, 0x00000001); /* int31 highest, base=0x000 */
118 mtdcr(UIC1SR, 0xffffffff); /* clear all */
5568e613
SR
119
120 return 0;
121}
122
123int checkboard(void)
124{
f0c0b3a9
WD
125 char buf[64];
126 int i = getenv_f("serial#", buf, sizeof(buf));
5568e613
SR
127
128 printf("Board: P3P440");
f0c0b3a9 129 if (i > 0) {
5568e613 130 puts(", serial# ");
f0c0b3a9 131 puts(buf);
5568e613
SR
132 }
133
134 if (is_monarch()) {
135 puts(", Monarch");
136 } else {
137 puts(", None-Monarch");
138 }
139
140 putc('\n');
141
5568e613
SR
142 return (0);
143}
144
145int misc_init_r (void)
146{
5568e613
SR
147 /*
148 * Adjust flash start and offset to detected values
149 */
150 gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
151 gd->bd->bi_flashoffset = 0;
152
153 /*
154 * Check if only one FLASH bank is available
155 */
6d0f6bcf 156 if (gd->bd->bi_flashsize != CONFIG_SYS_MAX_FLASH_BANKS * (0 - CONFIG_SYS_FLASH0)) {
d1c3b275
SR
157 mtebc(PB1CR, 0); /* disable cs */
158 mtebc(PB1AP, 0);
159 mtebc(PB2CR, 0); /* disable cs */
160 mtebc(PB2AP, 0);
161 mtebc(PB3CR, 0); /* disable cs */
162 mtebc(PB3AP, 0);
5568e613
SR
163 }
164
165 return 0;
166}
167
5568e613 168/*************************************************************************
9a81c612 169 * Override weak is_pci_host()
5568e613
SR
170 *
171 * This routine is called to determine if a pci scan should be
172 * performed. With various hardware environments (especially cPCI and
173 * PPMC) it's insufficient to depend on the state of the arbiter enable
174 * bit in the strap register, or generic host/adapter assumptions.
175 *
176 * Rather than hard-code a bad assumption in the general 440 code, the
177 * 440 pci code requires the board to decide at runtime.
178 *
179 * Return 0 for adapter mode, non-zero for host (monarch) mode.
180 *
181 *
182 ************************************************************************/
183#if defined(CONFIG_PCI)
184int is_pci_host(struct pci_controller *hose)
185{
186 if (is_monarch()) {
187 wait_for_pci_ready();
188 return 1; /* return 1 for host controller */
189 } else {
190 return 0; /* return 0 for adapter controller */
191 }
192}
193#endif /* defined(CONFIG_PCI) */