]> git.ipfire.org Git - people/ms/u-boot.git/blame - board/r360mpi/flash.c
OneNAND: Fix compiler warnings
[people/ms/u-boot.git] / board / r360mpi / flash.c
CommitLineData
89930721
WD
1/*
2 * (C) Copyright 2001
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2001
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
43d9616c
WD
27/* #define DEBUG */
28
89930721
WD
29#include <common.h>
30#include <mpc8xx.h>
31
6d0f6bcf 32flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
89930721 33
5a1aceb0 34#if defined(CONFIG_ENV_IS_IN_FLASH)
0e8d1586 35# ifndef CONFIG_ENV_ADDR
6d0f6bcf 36# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
89930721 37# endif
0e8d1586
JCPV
38# ifndef CONFIG_ENV_SIZE
39# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
89930721 40# endif
0e8d1586
JCPV
41# ifndef CONFIG_ENV_SECT_SIZE
42# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
89930721
WD
43# endif
44#endif
45
46/*-----------------------------------------------------------------------
47 * Protection Flags:
48 */
49#define FLAG_PROTECT_SET 0x01
50#define FLAG_PROTECT_CLEAR 0x02
51
52/* Board support for 1 or 2 flash devices */
53#undef FLASH_PORT_WIDTH32
54#define FLASH_PORT_WIDTH16
55
56#ifdef FLASH_PORT_WIDTH16
43d9616c
WD
57#define FLASH_PORT_WIDTH ushort
58#define FLASH_PORT_WIDTHV vu_short
89930721 59#else
43d9616c
WD
60#define FLASH_PORT_WIDTH ulong
61#define FLASH_PORT_WIDTHV vu_long
89930721
WD
62#endif
63
43d9616c
WD
64#define FPW FLASH_PORT_WIDTH
65#define FPWV FLASH_PORT_WIDTHV
89930721
WD
66
67/*-----------------------------------------------------------------------
68 * Functions
69 */
43d9616c
WD
70static ulong flash_get_size (FPW * addr, flash_info_t * info);
71static int write_data (flash_info_t * info, ulong dest, FPW data);
72static void flash_get_offsets (ulong base, flash_info_t * info);
89930721
WD
73
74/*-----------------------------------------------------------------------
75 */
76
77unsigned long flash_init (void)
78{
6d0f6bcf 79 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
89930721
WD
80 volatile memctl8xx_t *memctl = &immap->im_memctl;
81 unsigned long size_b0;
82 int i;
83
84 /* Init: no FLASHes known */
6d0f6bcf 85 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
89930721
WD
86 flash_info[i].flash_id = FLASH_UNKNOWN;
87 }
88
89 /* Static FLASH Bank configuration here - FIXME XXX */
43d9616c 90 size_b0 = flash_get_size ((FPW *) FLASH_BASE0_PRELIM, &flash_info[0]);
89930721
WD
91
92 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
93 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
43d9616c 94 size_b0, size_b0 << 20);
89930721
WD
95 }
96
97 /* Remap FLASH according to real size */
6d0f6bcf
JCPV
98 memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
99 memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V;
89930721
WD
100
101 /* Re-do sizing to get full correct info */
6d0f6bcf 102 size_b0 = flash_get_size ((FPW *) CONFIG_SYS_FLASH_BASE, &flash_info[0]);
89930721 103
6d0f6bcf 104 flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
89930721 105
6d0f6bcf 106#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
89930721 107 /* monitor protection ON by default */
43d9616c 108 (void) flash_protect (FLAG_PROTECT_SET,
6d0f6bcf
JCPV
109 CONFIG_SYS_FLASH_BASE,
110 CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
43d9616c 111 &flash_info[0]);
89930721
WD
112#endif
113
5a1aceb0 114#ifdef CONFIG_ENV_IS_IN_FLASH
89930721 115 /* ENV protection ON by default */
43d9616c 116 flash_protect (FLAG_PROTECT_SET,
0e8d1586
JCPV
117 CONFIG_ENV_ADDR,
118 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
43d9616c 119 &flash_info[0]);
89930721
WD
120#endif
121
122 flash_info[0].size = size_b0;
123
124 return (size_b0);
125}
126
127/*-----------------------------------------------------------------------
128 */
43d9616c 129static void flash_get_offsets (ulong base, flash_info_t * info)
89930721
WD
130{
131 int i;
132
133 if (info->flash_id == FLASH_UNKNOWN) {
134 return;
135 }
136
137 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
138 for (i = 0; i < info->sector_count; i++) {
139 info->start[i] = base + (i * 0x00020000);
140 }
141 }
142}
143
144/*-----------------------------------------------------------------------
145 */
43d9616c 146void flash_print_info (flash_info_t * info)
89930721
WD
147{
148 int i;
149
150 if (info->flash_id == FLASH_UNKNOWN) {
151 printf ("missing or unknown FLASH type\n");
152 return;
153 }
154
155 switch (info->flash_id & FLASH_VENDMASK) {
43d9616c
WD
156 case FLASH_MAN_INTEL:
157 printf ("INTEL ");
158 break;
159 default:
160 printf ("Unknown Vendor ");
161 break;
89930721
WD
162 }
163
164 switch (info->flash_id & FLASH_TYPEMASK) {
43d9616c
WD
165 case FLASH_28F320J3A:
166 printf ("28F320J3A\n");
167 break;
168 case FLASH_28F640J3A:
169 printf ("28F640J3A\n");
170 break;
171 case FLASH_28F128J3A:
172 printf ("28F128J3A\n");
173 break;
174 default:
175 printf ("Unknown Chip Type\n");
176 break;
89930721
WD
177 }
178
179 printf (" Size: %ld MB in %d Sectors\n",
43d9616c 180 info->size >> 20, info->sector_count);
89930721
WD
181
182 printf (" Sector Start Addresses:");
43d9616c 183 for (i = 0; i < info->sector_count; ++i) {
89930721
WD
184 if ((i % 5) == 0)
185 printf ("\n ");
186 printf (" %08lX%s",
187 info->start[i],
43d9616c 188 info->protect[i] ? " (RO)" : " ");
89930721
WD
189 }
190 printf ("\n");
191 return;
192}
193
194/*-----------------------------------------------------------------------
195 */
196
197
198/*-----------------------------------------------------------------------
199 */
200
201/*
202 * The following code cannot be run from FLASH!
203 */
204
43d9616c 205static ulong flash_get_size (FPW * addr, flash_info_t * info)
89930721
WD
206{
207 FPW value;
208
d791b1dc
WD
209 /* Make sure Block Lock Bits get cleared */
210 addr[0] = (FPW) 0x00FF00FF;
211 addr[0] = (FPW) 0x00600060;
212 addr[0] = (FPW) 0x00D000D0;
213 addr[0] = (FPW) 0x00FF00FF;
214
89930721 215 /* Write auto select command: read Manufacturer ID */
43d9616c
WD
216 addr[0x5555] = (FPW) 0x00AA00AA;
217 addr[0x2AAA] = (FPW) 0x00550055;
218 addr[0x5555] = (FPW) 0x00900090;
89930721
WD
219
220 value = addr[0];
221
43d9616c
WD
222 debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value);
223
224 switch (value) {
225 case (FPW) INTEL_MANUFACT:
226 info->flash_id = FLASH_MAN_INTEL;
227 break;
89930721
WD
228 default:
229 info->flash_id = FLASH_UNKNOWN;
230 info->sector_count = 0;
231 info->size = 0;
43d9616c
WD
232 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
233 return (0); /* no or unknown flash */
89930721
WD
234 }
235
43d9616c
WD
236 value = addr[1]; /* device ID */
237
238 debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value);
89930721 239
43d9616c
WD
240 switch (value) {
241 case (FPW) INTEL_ID_28F320J3A:
242 info->flash_id += FLASH_28F320J3A;
243 info->sector_count = 32;
244 info->size = 0x00400000;
245 break; /* => 4 MB */
89930721 246
43d9616c
WD
247 case (FPW) INTEL_ID_28F640J3A:
248 info->flash_id += FLASH_28F640J3A;
249 info->sector_count = 64;
250 info->size = 0x00800000;
251 break; /* => 8 MB */
89930721 252
43d9616c
WD
253 case (FPW) INTEL_ID_28F128J3A:
254 info->flash_id += FLASH_28F128J3A;
255 info->sector_count = 128;
256 info->size = 0x01000000;
257 break; /* => 16 MB */
89930721
WD
258
259 default:
260 info->flash_id = FLASH_UNKNOWN;
261 break;
262 }
263
6d0f6bcf 264 if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
89930721 265 printf ("** ERROR: sector count %d > max (%d) **\n",
6d0f6bcf
JCPV
266 info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
267 info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
89930721
WD
268 }
269
43d9616c 270 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
89930721
WD
271
272 return (info->size);
273}
274
275
276/*-----------------------------------------------------------------------
277 */
278
43d9616c 279int flash_erase (flash_info_t * info, int s_first, int s_last)
89930721
WD
280{
281 int flag, prot, sect;
282 ulong type, start, now, last;
283 int rcode = 0;
284
285 if ((s_first < 0) || (s_first > s_last)) {
286 if (info->flash_id == FLASH_UNKNOWN) {
287 printf ("- missing\n");
288 } else {
289 printf ("- no sectors to erase\n");
290 }
291 return 1;
292 }
293
294 type = (info->flash_id & FLASH_VENDMASK);
295 if ((type != FLASH_MAN_INTEL)) {
296 printf ("Can't erase unknown flash type %08lx - aborted\n",
297 info->flash_id);
298 return 1;
299 }
300
301 prot = 0;
43d9616c 302 for (sect = s_first; sect <= s_last; ++sect) {
89930721
WD
303 if (info->protect[sect]) {
304 prot++;
305 }
306 }
307
308 if (prot) {
309 printf ("- Warning: %d protected sectors will not be erased!\n",
310 prot);
311 } else {
312 printf ("\n");
313 }
314
315 start = get_timer (0);
43d9616c 316 last = start;
89930721 317 /* Start erase on unprotected sectors */
43d9616c 318 for (sect = s_first; sect <= s_last; sect++) {
89930721 319 if (info->protect[sect] == 0) { /* not protected */
43d9616c 320 FPWV *addr = (FPWV *) (info->start[sect]);
89930721
WD
321 FPW status;
322
323 /* Disable interrupts which might cause a timeout here */
43d9616c 324 flag = disable_interrupts ();
89930721 325
43d9616c
WD
326 *addr = (FPW) 0x00500050; /* clear status register */
327 *addr = (FPW) 0x00200020; /* erase setup */
328 *addr = (FPW) 0x00D000D0; /* erase confirm */
89930721
WD
329
330 /* re-enable interrupts if necessary */
331 if (flag)
43d9616c 332 enable_interrupts ();
89930721
WD
333
334 /* wait at least 80us - let's wait 1 ms */
335 udelay (1000);
336
43d9616c 337 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
6d0f6bcf 338 if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
43d9616c
WD
339 printf ("Timeout\n");
340 *addr = (FPW) 0x00B000B0; /* suspend erase */
341 *addr = (FPW) 0x00FF00FF; /* reset to read mode */
342 rcode = 1;
343 break;
344 }
345
346 /* show that we're waiting */
347 if ((now - last) > 1000) { /* every second */
348 putc ('.');
349 last = now;
350 }
89930721
WD
351 }
352
43d9616c 353 *addr = (FPW) 0x00FF00FF; /* reset to read mode */
89930721
WD
354 }
355 }
356 printf (" done\n");
357 return rcode;
358}
359
360/*-----------------------------------------------------------------------
361 * Copy memory to flash, returns:
362 * 0 - OK
363 * 1 - write timeout
364 * 2 - Flash not erased
365 * 4 - Flash not identified
366 */
367
43d9616c 368int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
89930721
WD
369{
370 ulong cp, wp;
371 FPW data;
43d9616c 372
89930721 373 int i, l, rc, port_width;
89930721
WD
374
375 if (info->flash_id == FLASH_UNKNOWN) {
376 return 4;
377 }
378/* get lower word aligned address */
379#ifdef FLASH_PORT_WIDTH16
380 wp = (addr & ~1);
381 port_width = 2;
382#else
383 wp = (addr & ~3);
384 port_width = 4;
385#endif
386
387 /*
388 * handle unaligned start bytes
389 */
390 if ((l = addr - wp) != 0) {
391 data = 0;
43d9616c
WD
392 for (i = 0, cp = wp; i < l; ++i, ++cp) {
393 data = (data << 8) | (*(uchar *) cp);
89930721 394 }
43d9616c 395 for (; i < port_width && cnt > 0; ++i) {
89930721
WD
396 data = (data << 8) | *src++;
397 --cnt;
398 ++cp;
399 }
43d9616c
WD
400 for (; cnt == 0 && i < port_width; ++i, ++cp) {
401 data = (data << 8) | (*(uchar *) cp);
89930721
WD
402 }
403
43d9616c 404 if ((rc = write_data (info, wp, data)) != 0) {
89930721
WD
405 return (rc);
406 }
407 wp += port_width;
408 }
409
410 /*
411 * handle word aligned part
412 */
89930721
WD
413 while (cnt >= port_width) {
414 data = 0;
43d9616c 415 for (i = 0; i < port_width; ++i) {
89930721
WD
416 data = (data << 8) | *src++;
417 }
43d9616c 418 if ((rc = write_data (info, wp, data)) != 0) {
89930721
WD
419 return (rc);
420 }
43d9616c 421 wp += port_width;
89930721 422 cnt -= port_width;
89930721
WD
423 }
424
425 if (cnt == 0) {
426 return (0);
427 }
428
429 /*
430 * handle unaligned tail bytes
431 */
432 data = 0;
43d9616c 433 for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
89930721
WD
434 data = (data << 8) | *src++;
435 --cnt;
436 }
43d9616c
WD
437 for (; i < port_width; ++i, ++cp) {
438 data = (data << 8) | (*(uchar *) cp);
89930721
WD
439 }
440
43d9616c 441 return (write_data (info, wp, data));
89930721
WD
442}
443
444/*-----------------------------------------------------------------------
445 * Write a word or halfword to Flash, returns:
446 * 0 - OK
447 * 1 - write timeout
448 * 2 - Flash not erased
449 */
43d9616c 450static int write_data (flash_info_t * info, ulong dest, FPW data)
89930721 451{
43d9616c 452 FPWV *addr = (FPWV *) dest;
89930721
WD
453 ulong status;
454 ulong start;
455 int flag;
456
457 /* Check if Flash is (sufficiently) erased */
458 if ((*addr & data) != data) {
43d9616c 459 printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
89930721
WD
460 return (2);
461 }
462 /* Disable interrupts which might cause a timeout here */
43d9616c 463 flag = disable_interrupts ();
89930721 464
43d9616c 465 *addr = (FPW) 0x00400040; /* write setup */
89930721
WD
466 *addr = data;
467
468 /* re-enable interrupts if necessary */
469 if (flag)
43d9616c 470 enable_interrupts ();
89930721
WD
471
472 start = get_timer (0);
473
43d9616c 474 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
6d0f6bcf 475 if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
43d9616c 476 *addr = (FPW) 0x00FF00FF; /* restore read mode */
89930721
WD
477 return (1);
478 }
479 }
480
43d9616c 481 *addr = (FPW) 0x00FF00FF; /* restore read mode */
89930721
WD
482
483 return (0);
484}