[people/ms/u-boot.git] / board / r360mpi / flash.c

/*
 * (C) Copyright 2001
 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
 *
 * (C) Copyright 2001
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/* #define DEBUG */

#include <common.h>
#include <mpc8xx.h>

flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	/* info for FLASH chips    */

#if defined(CONFIG_ENV_IS_IN_FLASH)
# ifndef  CONFIG_ENV_ADDR
#  define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
# endif
# ifndef  CONFIG_ENV_SIZE
#  define CONFIG_ENV_SIZE	CONFIG_ENV_SECT_SIZE
# endif
# ifndef  CONFIG_ENV_SECT_SIZE
#  define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
# endif
#endif

/*-----------------------------------------------------------------------
 * Protection Flags:
 */
#define FLAG_PROTECT_SET	0x01
#define FLAG_PROTECT_CLEAR	0x02

/* Board support for 1 or 2 flash devices */
#undef FLASH_PORT_WIDTH32
#define FLASH_PORT_WIDTH16

#ifdef FLASH_PORT_WIDTH16
#define FLASH_PORT_WIDTH	ushort
#define FLASH_PORT_WIDTHV	vu_short
#else
#define FLASH_PORT_WIDTH	ulong
#define FLASH_PORT_WIDTHV	vu_long
#endif

#define FPW			FLASH_PORT_WIDTH
#define FPWV			FLASH_PORT_WIDTHV

/*-----------------------------------------------------------------------
 * Functions
 */
static ulong flash_get_size (FPW * addr, flash_info_t * info);
static int write_data (flash_info_t * info, ulong dest, FPW data);
static void flash_get_offsets (ulong base, flash_info_t * info);

/*-----------------------------------------------------------------------
 */

unsigned long flash_init (void)
{
	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
	volatile memctl8xx_t *memctl = &immap->im_memctl;
	unsigned long size_b0;
	int i;

	/* Init: no FLASHes known */
	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
		flash_info[i].flash_id = FLASH_UNKNOWN;
	}

	/* Static FLASH Bank configuration here - FIXME XXX */
	size_b0 = flash_get_size ((FPW *) FLASH_BASE0_PRELIM, &flash_info[0]);

	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
			size_b0, size_b0 << 20);
	}

	/* Remap FLASH according to real size */
	memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000);
	memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V;

	/* Re-do sizing to get full correct info */
	size_b0 = flash_get_size ((FPW *) CONFIG_SYS_FLASH_BASE, &flash_info[0]);

	flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);

#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
	/* monitor protection ON by default */
	(void) flash_protect (FLAG_PROTECT_SET,
				CONFIG_SYS_FLASH_BASE,
				CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
				&flash_info[0]);
#endif

#ifdef	CONFIG_ENV_IS_IN_FLASH
	/* ENV protection ON by default */
	flash_protect (FLAG_PROTECT_SET,
			CONFIG_ENV_ADDR,
			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
			&flash_info[0]);
#endif

	flash_info[0].size = size_b0;

	return (size_b0);
}

/*-----------------------------------------------------------------------
 */
static void flash_get_offsets (ulong base, flash_info_t * info)
{
	int i;

	if (info->flash_id == FLASH_UNKNOWN) {
		return;
	}

	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
		for (i = 0; i < info->sector_count; i++) {
			info->start[i] = base + (i * 0x00020000);
		}
	}
}

/*-----------------------------------------------------------------------
 */
void flash_print_info (flash_info_t * info)
{
	int i;

	if (info->flash_id == FLASH_UNKNOWN) {
		printf ("missing or unknown FLASH type\n");
		return;
	}

	switch (info->flash_id & FLASH_VENDMASK) {
	case FLASH_MAN_INTEL:
		printf ("INTEL ");
		break;
	default:
		printf ("Unknown Vendor ");
		break;
	}

	switch (info->flash_id & FLASH_TYPEMASK) {
	case FLASH_28F320J3A:
		printf ("28F320J3A\n");
		break;
	case FLASH_28F640J3A:
		printf ("28F640J3A\n");
		break;
	case FLASH_28F128J3A:
		printf ("28F128J3A\n");
		break;
	default:
		printf ("Unknown Chip Type\n");
		break;
	}

	printf ("  Size: %ld MB in %d Sectors\n",
			info->size >> 20, info->sector_count);

	printf ("  Sector Start Addresses:");
	for (i = 0; i < info->sector_count; ++i) {
		if ((i % 5) == 0)
			printf ("\n   ");
		printf (" %08lX%s",
			info->start[i],
			info->protect[i] ? " (RO)" : "     ");
	}
	printf ("\n");
	return;
}

/*-----------------------------------------------------------------------
 */


/*-----------------------------------------------------------------------
 */

/*
 * The following code cannot be run from FLASH!
 */

static ulong flash_get_size (FPW * addr, flash_info_t * info)
{
	FPW value;

	/* Make sure Block Lock Bits get cleared */
	addr[0] = (FPW) 0x00FF00FF;
	addr[0] = (FPW) 0x00600060;
	addr[0] = (FPW) 0x00D000D0;
	addr[0] = (FPW) 0x00FF00FF;

	/* Write auto select command: read Manufacturer ID */
	addr[0x5555] = (FPW) 0x00AA00AA;
	addr[0x2AAA] = (FPW) 0x00550055;
	addr[0x5555] = (FPW) 0x00900090;

	value = addr[0];

	debug("Manuf. ID @ 0x%08lx: 0x%08x\n", (ulong)addr, value);

	switch (value) {
	case (FPW) INTEL_MANUFACT:
		info->flash_id = FLASH_MAN_INTEL;
		break;
	default:
		info->flash_id = FLASH_UNKNOWN;
		info->sector_count = 0;
		info->size = 0;
		addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
		return (0);			/* no or unknown flash  */
	}

	value = addr[1];			/* device ID        */

	debug("Device ID @ 0x%08lx: 0x%08x\n", (ulong)(&addr[1]), value);

	switch (value) {
	case (FPW) INTEL_ID_28F320J3A:
		info->flash_id += FLASH_28F320J3A;
		info->sector_count = 32;
		info->size = 0x00400000;
		break;				/* => 4 MB     */

	case (FPW) INTEL_ID_28F640J3A:
		info->flash_id += FLASH_28F640J3A;
		info->sector_count = 64;
		info->size = 0x00800000;
		break;				/* => 8 MB     */

	case (FPW) INTEL_ID_28F128J3A:
		info->flash_id += FLASH_28F128J3A;
		info->sector_count = 128;
		info->size = 0x01000000;
		break;				/* => 16 MB     */

	default:
		info->flash_id = FLASH_UNKNOWN;
		break;
	}

	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
		printf ("** ERROR: sector count %d > max (%d) **\n",
				info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
		info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
	}

	addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */

	return (info->size);
}


/*-----------------------------------------------------------------------
 */

int flash_erase (flash_info_t * info, int s_first, int s_last)
{
	int flag, prot, sect;
	ulong type, start, now, last;
	int rcode = 0;

	if ((s_first < 0) || (s_first > s_last)) {
		if (info->flash_id == FLASH_UNKNOWN) {
			printf ("- missing\n");
		} else {
			printf ("- no sectors to erase\n");
		}
		return 1;
	}

	type = (info->flash_id & FLASH_VENDMASK);
	if ((type != FLASH_MAN_INTEL)) {
		printf ("Can't erase unknown flash type %08lx - aborted\n",
			info->flash_id);
		return 1;
	}

	prot = 0;
	for (sect = s_first; sect <= s_last; ++sect) {
		if (info->protect[sect]) {
			prot++;
		}
	}

	if (prot) {
		printf ("- Warning: %d protected sectors will not be erased!\n",
			prot);
	} else {
		printf ("\n");
	}

	start = get_timer (0);
	last = start;
	/* Start erase on unprotected sectors */
	for (sect = s_first; sect <= s_last; sect++) {
		if (info->protect[sect] == 0) {	/* not protected */
			FPWV *addr = (FPWV *) (info->start[sect]);
			FPW status;

			/* Disable interrupts which might cause a timeout here */
			flag = disable_interrupts ();

			*addr = (FPW) 0x00500050;	/* clear status register */
			*addr = (FPW) 0x00200020;	/* erase setup */
			*addr = (FPW) 0x00D000D0;	/* erase confirm */

			/* re-enable interrupts if necessary */
			if (flag)
				enable_interrupts ();

			/* wait at least 80us - let's wait 1 ms */
			udelay (1000);

			while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
			    if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
				printf ("Timeout\n");
				*addr = (FPW) 0x00B000B0;	/* suspend erase     */
				*addr = (FPW) 0x00FF00FF;	/* reset to read mode */
				rcode = 1;
				break;
			    }

			    /* show that we're waiting */
			    if ((now - last) > 1000) {	/* every second */
				putc ('.');
				last = now;
			    }
			}

			*addr = (FPW) 0x00FF00FF;	/* reset to read mode */
		}
	}
	printf (" done\n");
	return rcode;
}

/*-----------------------------------------------------------------------
 * Copy memory to flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 * 4 - Flash not identified
 */

int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
	ulong cp, wp;
	FPW data;

	int i, l, rc, port_width;

	if (info->flash_id == FLASH_UNKNOWN) {
		return 4;
	}
/* get lower word aligned address */
#ifdef FLASH_PORT_WIDTH16
	wp = (addr & ~1);
	port_width = 2;
#else
	wp = (addr & ~3);
	port_width = 4;
#endif

	/*
	 * handle unaligned start bytes
	 */
	if ((l = addr - wp) != 0) {
		data = 0;
		for (i = 0, cp = wp; i < l; ++i, ++cp) {
			data = (data << 8) | (*(uchar *) cp);
		}
		for (; i < port_width && cnt > 0; ++i) {
			data = (data << 8) | *src++;
			--cnt;
			++cp;
		}
		for (; cnt == 0 && i < port_width; ++i, ++cp) {
			data = (data << 8) | (*(uchar *) cp);
		}

		if ((rc = write_data (info, wp, data)) != 0) {
			return (rc);
		}
		wp += port_width;
	}

	/*
	 * handle word aligned part
	 */
	while (cnt >= port_width) {
		data = 0;
		for (i = 0; i < port_width; ++i) {
			data = (data << 8) | *src++;
		}
		if ((rc = write_data (info, wp, data)) != 0) {
			return (rc);
		}
		wp += port_width;
		cnt -= port_width;
	}

	if (cnt == 0) {
		return (0);
	}

	/*
	 * handle unaligned tail bytes
	 */
	data = 0;
	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
		data = (data << 8) | *src++;
		--cnt;
	}
	for (; i < port_width; ++i, ++cp) {
		data = (data << 8) | (*(uchar *) cp);
	}

	return (write_data (info, wp, data));
}

/*-----------------------------------------------------------------------
 * Write a word or halfword to Flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 */
static int write_data (flash_info_t * info, ulong dest, FPW data)
{
	FPWV *addr = (FPWV *) dest;
	ulong status;
	ulong start;
	int flag;

	/* Check if Flash is (sufficiently) erased */
	if ((*addr & data) != data) {
		printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
		return (2);
	}
	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts ();

	*addr = (FPW) 0x00400040;	/* write setup */
	*addr = data;

	/* re-enable interrupts if necessary */
	if (flag)
		enable_interrupts ();

	start = get_timer (0);

	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
		if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
			*addr = (FPW) 0x00FF00FF;	/* restore read mode */
			return (1);
		}
	}

	*addr = (FPW) 0x00FF00FF;	/* restore read mode */

	return (0);
}
Commit	Line	Data
89930721 WD	1	/*
	2	* (C) Copyright 2001
	3	* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
	4	*
	5	* (C) Copyright 2001
	6	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	7	*
1a459660	8	* SPDX-License-Identifier: GPL-2.0+
89930721 WD	9	*/
89930721 WD	10
43d9616c WD	11	/* #define DEBUG */
43d9616c WD	12
89930721 WD	13	#include <common.h>
	14	#include <mpc8xx.h>
	15
6d0f6bcf	16	flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
89930721	17
5a1aceb0	18	#if defined(CONFIG_ENV_IS_IN_FLASH)
0e8d1586	19	# ifndef CONFIG_ENV_ADDR
6d0f6bcf	20	# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
89930721	21	# endif
0e8d1586 JCPV	22	# ifndef CONFIG_ENV_SIZE
0e8d1586 JCPV	23	# define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
89930721	24	# endif
0e8d1586 JCPV	25	# ifndef CONFIG_ENV_SECT_SIZE
0e8d1586 JCPV	26	# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
89930721 WD	27	# endif
	28	#endif
	29
	30	/*-----------------------------------------------------------------------
	31	* Protection Flags:
	32	*/
	33	#define FLAG_PROTECT_SET 0x01
	34	#define FLAG_PROTECT_CLEAR 0x02
	35
	36	/* Board support for 1 or 2 flash devices */
	37	#undef FLASH_PORT_WIDTH32
	38	#define FLASH_PORT_WIDTH16
	39
	40	#ifdef FLASH_PORT_WIDTH16
43d9616c WD	41	#define FLASH_PORT_WIDTH ushort
43d9616c WD	42	#define FLASH_PORT_WIDTHV vu_short
89930721	43	#else
43d9616c WD	44	#define FLASH_PORT_WIDTH ulong
43d9616c WD	45	#define FLASH_PORT_WIDTHV vu_long
89930721 WD	46	#endif
89930721 WD	47
43d9616c WD	48	#define FPW FLASH_PORT_WIDTH
43d9616c WD	49	#define FPWV FLASH_PORT_WIDTHV
89930721 WD	50
	51	/*-----------------------------------------------------------------------
	52	* Functions
	53	*/
43d9616c WD	54	static ulong flash_get_size (FPW * addr, flash_info_t * info);
	55	static int write_data (flash_info_t * info, ulong dest, FPW data);
	56	static void flash_get_offsets (ulong base, flash_info_t * info);
89930721 WD	57
	58	/*-----------------------------------------------------------------------
	59	*/
	60
	61	unsigned long flash_init (void)
	62	{
6d0f6bcf	63	volatile immap_t immap = (immap_t ) CONFIG_SYS_IMMR;
89930721 WD	64	volatile memctl8xx_t *memctl = &immap->im_memctl;
	65	unsigned long size_b0;
	66	int i;
	67
	68	/* Init: no FLASHes known */
6d0f6bcf	69	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
89930721 WD	70	flash_info[i].flash_id = FLASH_UNKNOWN;
	71	}
	72
	73	/* Static FLASH Bank configuration here - FIXME XXX */
43d9616c	74	size_b0 = flash_get_size ((FPW *) FLASH_BASE0_PRELIM, &flash_info[0]);
89930721 WD	75
	76	if (flash_info[0].flash_id == FLASH_UNKNOWN) {
	77	printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
43d9616c	78	size_b0, size_b0 << 20);
89930721 WD	79	}
	80
	81	/* Remap FLASH according to real size */
6d0f6bcf JCPV	82	memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH \| (-size_b0 & 0xFFFF8000);
6d0f6bcf JCPV	83	memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) \| BR_PS_16 \| BR_MS_GPCM \| BR_V;
89930721 WD	84
89930721 WD	85	/* Re-do sizing to get full correct info */
6d0f6bcf	86	size_b0 = flash_get_size ((FPW *) CONFIG_SYS_FLASH_BASE, &flash_info[0]);
89930721	87
6d0f6bcf	88	flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]);
89930721	89
6d0f6bcf	90	#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
89930721	91	/* monitor protection ON by default */
43d9616c	92	(void) flash_protect (FLAG_PROTECT_SET,
6d0f6bcf JCPV	93	CONFIG_SYS_FLASH_BASE,
6d0f6bcf JCPV	94	CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
43d9616c	95	&flash_info[0]);
89930721 WD	96	#endif
89930721 WD	97
5a1aceb0	98	#ifdef CONFIG_ENV_IS_IN_FLASH
89930721	99	/* ENV protection ON by default */
43d9616c	100	flash_protect (FLAG_PROTECT_SET,
0e8d1586 JCPV	101	CONFIG_ENV_ADDR,
0e8d1586 JCPV	102	CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
43d9616c	103	&flash_info[0]);
89930721 WD	104	#endif
	105
	106	flash_info[0].size = size_b0;
	107
	108	return (size_b0);
	109	}
	110
	111	/*-----------------------------------------------------------------------
	112	*/
43d9616c	113	static void flash_get_offsets (ulong base, flash_info_t * info)
89930721 WD	114	{
	115	int i;
	116
	117	if (info->flash_id == FLASH_UNKNOWN) {
	118	return;
	119	}
	120
	121	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
	122	for (i = 0; i < info->sector_count; i++) {
	123	info->start[i] = base + (i * 0x00020000);
	124	}
	125	}
	126	}
	127
	128	/*-----------------------------------------------------------------------
	129	*/
43d9616c	130	void flash_print_info (flash_info_t * info)
89930721 WD	131	{
	132	int i;
	133
	134	if (info->flash_id == FLASH_UNKNOWN) {
	135	printf ("missing or unknown FLASH type\n");
	136	return;
	137	}
	138
	139	switch (info->flash_id & FLASH_VENDMASK) {
43d9616c WD	140	case FLASH_MAN_INTEL:
	141	printf ("INTEL ");
	142	break;
	143	default:
	144	printf ("Unknown Vendor ");
	145	break;
89930721 WD	146	}
	147
	148	switch (info->flash_id & FLASH_TYPEMASK) {
43d9616c WD	149	case FLASH_28F320J3A:
	150	printf ("28F320J3A\n");
	151	break;
	152	case FLASH_28F640J3A:
	153	printf ("28F640J3A\n");
	154	break;
	155	case FLASH_28F128J3A:
	156	printf ("28F128J3A\n");
	157	break;
	158	default:
	159	printf ("Unknown Chip Type\n");
	160	break;
89930721 WD	161	}
	162
	163	printf (" Size: %ld MB in %d Sectors\n",
43d9616c	164	info->size >> 20, info->sector_count);
89930721 WD	165
89930721 WD	166	printf (" Sector Start Addresses:");
43d9616c	167	for (i = 0; i < info->sector_count; ++i) {
89930721 WD	168	if ((i % 5) == 0)
	169	printf ("\n ");
	170	printf (" %08lX%s",
	171	info->start[i],
43d9616c	172	info->protect[i] ? " (RO)" : " ");
89930721 WD	173	}
	174	printf ("\n");
	175	return;
	176	}
	177
	178	/*-----------------------------------------------------------------------
	179	*/
	180
	181
	182	/*-----------------------------------------------------------------------
	183	*/
	184
	185	/*
	186	* The following code cannot be run from FLASH!
	187	*/
	188
43d9616c	189	static ulong flash_get_size (FPW * addr, flash_info_t * info)
89930721 WD	190	{
	191	FPW value;
	192
d791b1dc WD	193	/* Make sure Block Lock Bits get cleared */
	194	addr[0] = (FPW) 0x00FF00FF;
	195	addr[0] = (FPW) 0x00600060;
	196	addr[0] = (FPW) 0x00D000D0;
	197	addr[0] = (FPW) 0x00FF00FF;
	198
89930721	199	/* Write auto select command: read Manufacturer ID */
43d9616c WD	200	addr[0x5555] = (FPW) 0x00AA00AA;
	201	addr[0x2AAA] = (FPW) 0x00550055;
	202	addr[0x5555] = (FPW) 0x00900090;
89930721 WD	203
	204	value = addr[0];
	205
d6248f40	206	debug("Manuf. ID @ 0x%08lx: 0x%08x\n", (ulong)addr, value);
43d9616c WD	207
	208	switch (value) {
	209	case (FPW) INTEL_MANUFACT:
	210	info->flash_id = FLASH_MAN_INTEL;
	211	break;
89930721 WD	212	default:
	213	info->flash_id = FLASH_UNKNOWN;
	214	info->sector_count = 0;
	215	info->size = 0;
43d9616c WD	216	addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
43d9616c WD	217	return (0); /* no or unknown flash */
89930721 WD	218	}
89930721 WD	219
43d9616c WD	220	value = addr[1]; /* device ID */
43d9616c WD	221
d6248f40	222	debug("Device ID @ 0x%08lx: 0x%08x\n", (ulong)(&addr[1]), value);
89930721	223
43d9616c WD	224	switch (value) {
	225	case (FPW) INTEL_ID_28F320J3A:
	226	info->flash_id += FLASH_28F320J3A;
	227	info->sector_count = 32;
	228	info->size = 0x00400000;
	229	break; /* => 4 MB */
89930721	230
43d9616c WD	231	case (FPW) INTEL_ID_28F640J3A:
	232	info->flash_id += FLASH_28F640J3A;
	233	info->sector_count = 64;
	234	info->size = 0x00800000;
	235	break; /* => 8 MB */
89930721	236
43d9616c WD	237	case (FPW) INTEL_ID_28F128J3A:
	238	info->flash_id += FLASH_28F128J3A;
	239	info->sector_count = 128;
	240	info->size = 0x01000000;
	241	break; /* => 16 MB */
89930721 WD	242
	243	default:
	244	info->flash_id = FLASH_UNKNOWN;
	245	break;
	246	}
	247
6d0f6bcf	248	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
89930721	249	printf (" ERROR: sector count %d > max (%d) \n",
6d0f6bcf JCPV	250	info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
6d0f6bcf JCPV	251	info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
89930721 WD	252	}
89930721 WD	253
43d9616c	254	addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
89930721 WD	255
	256	return (info->size);
	257	}
	258
	259
	260	/*-----------------------------------------------------------------------
	261	*/
	262
43d9616c	263	int flash_erase (flash_info_t * info, int s_first, int s_last)
89930721 WD	264	{
	265	int flag, prot, sect;
	266	ulong type, start, now, last;
	267	int rcode = 0;
	268
	269	if ((s_first < 0) \|\| (s_first > s_last)) {
	270	if (info->flash_id == FLASH_UNKNOWN) {
	271	printf ("- missing\n");
	272	} else {
	273	printf ("- no sectors to erase\n");
	274	}
	275	return 1;
	276	}
	277
	278	type = (info->flash_id & FLASH_VENDMASK);
	279	if ((type != FLASH_MAN_INTEL)) {
	280	printf ("Can't erase unknown flash type %08lx - aborted\n",
	281	info->flash_id);
	282	return 1;
	283	}
	284
	285	prot = 0;
43d9616c	286	for (sect = s_first; sect <= s_last; ++sect) {
89930721 WD	287	if (info->protect[sect]) {
	288	prot++;
	289	}
	290	}
	291
	292	if (prot) {
	293	printf ("- Warning: %d protected sectors will not be erased!\n",
	294	prot);
	295	} else {
	296	printf ("\n");
	297	}
	298
	299	start = get_timer (0);
43d9616c	300	last = start;
89930721	301	/* Start erase on unprotected sectors */
43d9616c	302	for (sect = s_first; sect <= s_last; sect++) {
89930721	303	if (info->protect[sect] == 0) { /* not protected */
43d9616c	304	FPWV addr = (FPWV ) (info->start[sect]);
89930721 WD	305	FPW status;
	306
	307	/* Disable interrupts which might cause a timeout here */
43d9616c	308	flag = disable_interrupts ();
89930721	309
43d9616c WD	310	addr = (FPW) 0x00500050; / clear status register */
	311	addr = (FPW) 0x00200020; / erase setup */
	312	addr = (FPW) 0x00D000D0; / erase confirm */
89930721 WD	313
	314	/* re-enable interrupts if necessary */
	315	if (flag)
43d9616c	316	enable_interrupts ();
89930721 WD	317
	318	/* wait at least 80us - let's wait 1 ms */
	319	udelay (1000);
	320
43d9616c	321	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
6d0f6bcf	322	if ((now = get_timer (start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
43d9616c WD	323	printf ("Timeout\n");
	324	addr = (FPW) 0x00B000B0; / suspend erase */
	325	addr = (FPW) 0x00FF00FF; / reset to read mode */
	326	rcode = 1;
	327	break;
	328	}
	329
	330	/* show that we're waiting */
	331	if ((now - last) > 1000) { /* every second */
	332	putc ('.');
	333	last = now;
	334	}
89930721 WD	335	}
89930721 WD	336
43d9616c	337	addr = (FPW) 0x00FF00FF; / reset to read mode */
89930721 WD	338	}
	339	}
	340	printf (" done\n");
	341	return rcode;
	342	}
	343
	344	/*-----------------------------------------------------------------------
	345	* Copy memory to flash, returns:
	346	* 0 - OK
	347	* 1 - write timeout
	348	* 2 - Flash not erased
	349	* 4 - Flash not identified
	350	*/
	351
43d9616c	352	int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
89930721 WD	353	{
	354	ulong cp, wp;
	355	FPW data;
43d9616c	356
89930721	357	int i, l, rc, port_width;
89930721 WD	358
	359	if (info->flash_id == FLASH_UNKNOWN) {
	360	return 4;
	361	}
	362	/* get lower word aligned address */
	363	#ifdef FLASH_PORT_WIDTH16
	364	wp = (addr & ~1);
	365	port_width = 2;
	366	#else
	367	wp = (addr & ~3);
	368	port_width = 4;
	369	#endif
	370
	371	/*
	372	* handle unaligned start bytes
	373	*/
	374	if ((l = addr - wp) != 0) {
	375	data = 0;
43d9616c WD	376	for (i = 0, cp = wp; i < l; ++i, ++cp) {
43d9616c WD	377	data = (data << 8) \| ((uchar ) cp);
89930721	378	}
43d9616c	379	for (; i < port_width && cnt > 0; ++i) {
89930721 WD	380	data = (data << 8) \| *src++;
	381	--cnt;
	382	++cp;
	383	}
43d9616c WD	384	for (; cnt == 0 && i < port_width; ++i, ++cp) {
43d9616c WD	385	data = (data << 8) \| ((uchar ) cp);
89930721 WD	386	}
89930721 WD	387
43d9616c	388	if ((rc = write_data (info, wp, data)) != 0) {
89930721 WD	389	return (rc);
	390	}
	391	wp += port_width;
	392	}
	393
	394	/*
	395	* handle word aligned part
	396	*/
89930721 WD	397	while (cnt >= port_width) {
89930721 WD	398	data = 0;
43d9616c	399	for (i = 0; i < port_width; ++i) {
89930721 WD	400	data = (data << 8) \| *src++;
89930721 WD	401	}
43d9616c	402	if ((rc = write_data (info, wp, data)) != 0) {
89930721 WD	403	return (rc);
89930721 WD	404	}
43d9616c	405	wp += port_width;
89930721	406	cnt -= port_width;
89930721 WD	407	}
	408
	409	if (cnt == 0) {
	410	return (0);
	411	}
	412
	413	/*
	414	* handle unaligned tail bytes
	415	*/
	416	data = 0;
43d9616c	417	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
89930721 WD	418	data = (data << 8) \| *src++;
	419	--cnt;
	420	}
43d9616c WD	421	for (; i < port_width; ++i, ++cp) {
43d9616c WD	422	data = (data << 8) \| ((uchar ) cp);
89930721 WD	423	}
89930721 WD	424
43d9616c	425	return (write_data (info, wp, data));
89930721 WD	426	}
	427
	428	/*-----------------------------------------------------------------------
	429	* Write a word or halfword to Flash, returns:
	430	* 0 - OK
	431	* 1 - write timeout
	432	* 2 - Flash not erased
	433	*/
43d9616c	434	static int write_data (flash_info_t * info, ulong dest, FPW data)
89930721	435	{
43d9616c	436	FPWV addr = (FPWV ) dest;
89930721 WD	437	ulong status;
	438	ulong start;
	439	int flag;
	440
	441	/* Check if Flash is (sufficiently) erased */
	442	if ((*addr & data) != data) {
43d9616c	443	printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
89930721 WD	444	return (2);
	445	}
	446	/* Disable interrupts which might cause a timeout here */
43d9616c	447	flag = disable_interrupts ();
89930721	448
43d9616c	449	addr = (FPW) 0x00400040; / write setup */
89930721 WD	450	*addr = data;
	451
	452	/* re-enable interrupts if necessary */
	453	if (flag)
43d9616c	454	enable_interrupts ();
89930721 WD	455
	456	start = get_timer (0);
	457
43d9616c	458	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
6d0f6bcf	459	if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
43d9616c	460	addr = (FPW) 0x00FF00FF; / restore read mode */
89930721 WD	461	return (1);
	462	}
	463	}
	464
43d9616c	465	addr = (FPW) 0x00FF00FF; / restore read mode */
89930721 WD	466
	467	return (0);
	468	}