]>
Commit | Line | Data |
---|---|---|
89930721 WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net | |
4 | * | |
5 | * (C) Copyright 2001 | |
6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | */ | |
26 | ||
43d9616c WD |
27 | /* #define DEBUG */ |
28 | ||
89930721 WD |
29 | #include <common.h> |
30 | #include <mpc8xx.h> | |
31 | ||
43d9616c | 32 | flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
89930721 WD |
33 | |
34 | #if defined(CFG_ENV_IS_IN_FLASH) | |
35 | # ifndef CFG_ENV_ADDR | |
36 | # define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET) | |
37 | # endif | |
38 | # ifndef CFG_ENV_SIZE | |
39 | # define CFG_ENV_SIZE CFG_ENV_SECT_SIZE | |
40 | # endif | |
41 | # ifndef CFG_ENV_SECT_SIZE | |
42 | # define CFG_ENV_SECT_SIZE CFG_ENV_SIZE | |
43 | # endif | |
44 | #endif | |
45 | ||
46 | /*----------------------------------------------------------------------- | |
47 | * Protection Flags: | |
48 | */ | |
49 | #define FLAG_PROTECT_SET 0x01 | |
50 | #define FLAG_PROTECT_CLEAR 0x02 | |
51 | ||
52 | /* Board support for 1 or 2 flash devices */ | |
53 | #undef FLASH_PORT_WIDTH32 | |
54 | #define FLASH_PORT_WIDTH16 | |
55 | ||
56 | #ifdef FLASH_PORT_WIDTH16 | |
43d9616c WD |
57 | #define FLASH_PORT_WIDTH ushort |
58 | #define FLASH_PORT_WIDTHV vu_short | |
89930721 | 59 | #else |
43d9616c WD |
60 | #define FLASH_PORT_WIDTH ulong |
61 | #define FLASH_PORT_WIDTHV vu_long | |
89930721 WD |
62 | #endif |
63 | ||
43d9616c WD |
64 | #define FPW FLASH_PORT_WIDTH |
65 | #define FPWV FLASH_PORT_WIDTHV | |
89930721 WD |
66 | |
67 | /*----------------------------------------------------------------------- | |
68 | * Functions | |
69 | */ | |
43d9616c WD |
70 | static ulong flash_get_size (FPW * addr, flash_info_t * info); |
71 | static int write_data (flash_info_t * info, ulong dest, FPW data); | |
72 | static void flash_get_offsets (ulong base, flash_info_t * info); | |
89930721 WD |
73 | |
74 | /*----------------------------------------------------------------------- | |
75 | */ | |
76 | ||
77 | unsigned long flash_init (void) | |
78 | { | |
43d9616c | 79 | volatile immap_t *immap = (immap_t *) CFG_IMMR; |
89930721 WD |
80 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
81 | unsigned long size_b0; | |
82 | int i; | |
83 | ||
84 | /* Init: no FLASHes known */ | |
43d9616c | 85 | for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { |
89930721 WD |
86 | flash_info[i].flash_id = FLASH_UNKNOWN; |
87 | } | |
88 | ||
89 | /* Static FLASH Bank configuration here - FIXME XXX */ | |
43d9616c | 90 | size_b0 = flash_get_size ((FPW *) FLASH_BASE0_PRELIM, &flash_info[0]); |
89930721 WD |
91 | |
92 | if (flash_info[0].flash_id == FLASH_UNKNOWN) { | |
93 | printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", | |
43d9616c | 94 | size_b0, size_b0 << 20); |
89930721 WD |
95 | } |
96 | ||
97 | /* Remap FLASH according to real size */ | |
98 | memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000); | |
99 | memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_GPCM | BR_V; | |
100 | ||
101 | /* Re-do sizing to get full correct info */ | |
43d9616c | 102 | size_b0 = flash_get_size ((FPW *) CFG_FLASH_BASE, &flash_info[0]); |
89930721 WD |
103 | |
104 | flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); | |
105 | ||
106 | #if CFG_MONITOR_BASE >= CFG_FLASH_BASE | |
107 | /* monitor protection ON by default */ | |
43d9616c WD |
108 | (void) flash_protect (FLAG_PROTECT_SET, |
109 | CFG_FLASH_BASE, | |
110 | CFG_FLASH_BASE + CFG_MONITOR_LEN - 1, | |
111 | &flash_info[0]); | |
89930721 WD |
112 | #endif |
113 | ||
114 | #ifdef CFG_ENV_IS_IN_FLASH | |
115 | /* ENV protection ON by default */ | |
43d9616c WD |
116 | flash_protect (FLAG_PROTECT_SET, |
117 | CFG_ENV_ADDR, | |
118 | CFG_ENV_ADDR + CFG_ENV_SIZE - 1, | |
119 | &flash_info[0]); | |
89930721 WD |
120 | #endif |
121 | ||
122 | flash_info[0].size = size_b0; | |
123 | ||
124 | return (size_b0); | |
125 | } | |
126 | ||
127 | /*----------------------------------------------------------------------- | |
128 | */ | |
43d9616c | 129 | static void flash_get_offsets (ulong base, flash_info_t * info) |
89930721 WD |
130 | { |
131 | int i; | |
132 | ||
133 | if (info->flash_id == FLASH_UNKNOWN) { | |
134 | return; | |
135 | } | |
136 | ||
137 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { | |
138 | for (i = 0; i < info->sector_count; i++) { | |
139 | info->start[i] = base + (i * 0x00020000); | |
140 | } | |
141 | } | |
142 | } | |
143 | ||
144 | /*----------------------------------------------------------------------- | |
145 | */ | |
43d9616c | 146 | void flash_print_info (flash_info_t * info) |
89930721 WD |
147 | { |
148 | int i; | |
149 | ||
150 | if (info->flash_id == FLASH_UNKNOWN) { | |
151 | printf ("missing or unknown FLASH type\n"); | |
152 | return; | |
153 | } | |
154 | ||
155 | switch (info->flash_id & FLASH_VENDMASK) { | |
43d9616c WD |
156 | case FLASH_MAN_INTEL: |
157 | printf ("INTEL "); | |
158 | break; | |
159 | default: | |
160 | printf ("Unknown Vendor "); | |
161 | break; | |
89930721 WD |
162 | } |
163 | ||
164 | switch (info->flash_id & FLASH_TYPEMASK) { | |
43d9616c WD |
165 | case FLASH_28F320J3A: |
166 | printf ("28F320J3A\n"); | |
167 | break; | |
168 | case FLASH_28F640J3A: | |
169 | printf ("28F640J3A\n"); | |
170 | break; | |
171 | case FLASH_28F128J3A: | |
172 | printf ("28F128J3A\n"); | |
173 | break; | |
174 | default: | |
175 | printf ("Unknown Chip Type\n"); | |
176 | break; | |
89930721 WD |
177 | } |
178 | ||
179 | printf (" Size: %ld MB in %d Sectors\n", | |
43d9616c | 180 | info->size >> 20, info->sector_count); |
89930721 WD |
181 | |
182 | printf (" Sector Start Addresses:"); | |
43d9616c | 183 | for (i = 0; i < info->sector_count; ++i) { |
89930721 WD |
184 | if ((i % 5) == 0) |
185 | printf ("\n "); | |
186 | printf (" %08lX%s", | |
187 | info->start[i], | |
43d9616c | 188 | info->protect[i] ? " (RO)" : " "); |
89930721 WD |
189 | } |
190 | printf ("\n"); | |
191 | return; | |
192 | } | |
193 | ||
194 | /*----------------------------------------------------------------------- | |
195 | */ | |
196 | ||
197 | ||
198 | /*----------------------------------------------------------------------- | |
199 | */ | |
200 | ||
201 | /* | |
202 | * The following code cannot be run from FLASH! | |
203 | */ | |
204 | ||
43d9616c | 205 | static ulong flash_get_size (FPW * addr, flash_info_t * info) |
89930721 WD |
206 | { |
207 | FPW value; | |
208 | ||
209 | /* Write auto select command: read Manufacturer ID */ | |
43d9616c WD |
210 | addr[0x5555] = (FPW) 0x00AA00AA; |
211 | addr[0x2AAA] = (FPW) 0x00550055; | |
212 | addr[0x5555] = (FPW) 0x00900090; | |
89930721 WD |
213 | |
214 | value = addr[0]; | |
215 | ||
43d9616c WD |
216 | debug ("Manuf. ID @ 0x%08lx: 0x%08lx\n", (ulong)addr, value); |
217 | ||
218 | switch (value) { | |
219 | case (FPW) INTEL_MANUFACT: | |
220 | info->flash_id = FLASH_MAN_INTEL; | |
221 | break; | |
89930721 WD |
222 | default: |
223 | info->flash_id = FLASH_UNKNOWN; | |
224 | info->sector_count = 0; | |
225 | info->size = 0; | |
43d9616c WD |
226 | addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ |
227 | return (0); /* no or unknown flash */ | |
89930721 WD |
228 | } |
229 | ||
43d9616c WD |
230 | value = addr[1]; /* device ID */ |
231 | ||
232 | debug ("Device ID @ 0x%08lx: 0x%08lx\n", (ulong)(&addr[1]), value); | |
89930721 | 233 | |
43d9616c WD |
234 | switch (value) { |
235 | case (FPW) INTEL_ID_28F320J3A: | |
236 | info->flash_id += FLASH_28F320J3A; | |
237 | info->sector_count = 32; | |
238 | info->size = 0x00400000; | |
239 | break; /* => 4 MB */ | |
89930721 | 240 | |
43d9616c WD |
241 | case (FPW) INTEL_ID_28F640J3A: |
242 | info->flash_id += FLASH_28F640J3A; | |
243 | info->sector_count = 64; | |
244 | info->size = 0x00800000; | |
245 | break; /* => 8 MB */ | |
89930721 | 246 | |
43d9616c WD |
247 | case (FPW) INTEL_ID_28F128J3A: |
248 | info->flash_id += FLASH_28F128J3A; | |
249 | info->sector_count = 128; | |
250 | info->size = 0x01000000; | |
251 | break; /* => 16 MB */ | |
89930721 WD |
252 | |
253 | default: | |
254 | info->flash_id = FLASH_UNKNOWN; | |
255 | break; | |
256 | } | |
257 | ||
258 | if (info->sector_count > CFG_MAX_FLASH_SECT) { | |
259 | printf ("** ERROR: sector count %d > max (%d) **\n", | |
43d9616c | 260 | info->sector_count, CFG_MAX_FLASH_SECT); |
89930721 WD |
261 | info->sector_count = CFG_MAX_FLASH_SECT; |
262 | } | |
263 | ||
43d9616c | 264 | addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ |
89930721 WD |
265 | |
266 | return (info->size); | |
267 | } | |
268 | ||
269 | ||
270 | /*----------------------------------------------------------------------- | |
271 | */ | |
272 | ||
43d9616c | 273 | int flash_erase (flash_info_t * info, int s_first, int s_last) |
89930721 WD |
274 | { |
275 | int flag, prot, sect; | |
276 | ulong type, start, now, last; | |
277 | int rcode = 0; | |
278 | ||
279 | if ((s_first < 0) || (s_first > s_last)) { | |
280 | if (info->flash_id == FLASH_UNKNOWN) { | |
281 | printf ("- missing\n"); | |
282 | } else { | |
283 | printf ("- no sectors to erase\n"); | |
284 | } | |
285 | return 1; | |
286 | } | |
287 | ||
288 | type = (info->flash_id & FLASH_VENDMASK); | |
289 | if ((type != FLASH_MAN_INTEL)) { | |
290 | printf ("Can't erase unknown flash type %08lx - aborted\n", | |
291 | info->flash_id); | |
292 | return 1; | |
293 | } | |
294 | ||
295 | prot = 0; | |
43d9616c | 296 | for (sect = s_first; sect <= s_last; ++sect) { |
89930721 WD |
297 | if (info->protect[sect]) { |
298 | prot++; | |
299 | } | |
300 | } | |
301 | ||
302 | if (prot) { | |
303 | printf ("- Warning: %d protected sectors will not be erased!\n", | |
304 | prot); | |
305 | } else { | |
306 | printf ("\n"); | |
307 | } | |
308 | ||
309 | start = get_timer (0); | |
43d9616c | 310 | last = start; |
89930721 | 311 | /* Start erase on unprotected sectors */ |
43d9616c | 312 | for (sect = s_first; sect <= s_last; sect++) { |
89930721 | 313 | if (info->protect[sect] == 0) { /* not protected */ |
43d9616c | 314 | FPWV *addr = (FPWV *) (info->start[sect]); |
89930721 WD |
315 | FPW status; |
316 | ||
317 | /* Disable interrupts which might cause a timeout here */ | |
43d9616c | 318 | flag = disable_interrupts (); |
89930721 | 319 | |
43d9616c WD |
320 | *addr = (FPW) 0x00500050; /* clear status register */ |
321 | *addr = (FPW) 0x00200020; /* erase setup */ | |
322 | *addr = (FPW) 0x00D000D0; /* erase confirm */ | |
89930721 WD |
323 | |
324 | /* re-enable interrupts if necessary */ | |
325 | if (flag) | |
43d9616c | 326 | enable_interrupts (); |
89930721 WD |
327 | |
328 | /* wait at least 80us - let's wait 1 ms */ | |
329 | udelay (1000); | |
330 | ||
43d9616c WD |
331 | while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { |
332 | if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) { | |
333 | printf ("Timeout\n"); | |
334 | *addr = (FPW) 0x00B000B0; /* suspend erase */ | |
335 | *addr = (FPW) 0x00FF00FF; /* reset to read mode */ | |
336 | rcode = 1; | |
337 | break; | |
338 | } | |
339 | ||
340 | /* show that we're waiting */ | |
341 | if ((now - last) > 1000) { /* every second */ | |
342 | putc ('.'); | |
343 | last = now; | |
344 | } | |
89930721 WD |
345 | } |
346 | ||
43d9616c | 347 | *addr = (FPW) 0x00FF00FF; /* reset to read mode */ |
89930721 WD |
348 | } |
349 | } | |
350 | printf (" done\n"); | |
351 | return rcode; | |
352 | } | |
353 | ||
354 | /*----------------------------------------------------------------------- | |
355 | * Copy memory to flash, returns: | |
356 | * 0 - OK | |
357 | * 1 - write timeout | |
358 | * 2 - Flash not erased | |
359 | * 4 - Flash not identified | |
360 | */ | |
361 | ||
43d9616c | 362 | int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) |
89930721 WD |
363 | { |
364 | ulong cp, wp; | |
365 | FPW data; | |
43d9616c | 366 | |
89930721 | 367 | int i, l, rc, port_width; |
89930721 WD |
368 | |
369 | if (info->flash_id == FLASH_UNKNOWN) { | |
370 | return 4; | |
371 | } | |
372 | /* get lower word aligned address */ | |
373 | #ifdef FLASH_PORT_WIDTH16 | |
374 | wp = (addr & ~1); | |
375 | port_width = 2; | |
376 | #else | |
377 | wp = (addr & ~3); | |
378 | port_width = 4; | |
379 | #endif | |
380 | ||
381 | /* | |
382 | * handle unaligned start bytes | |
383 | */ | |
384 | if ((l = addr - wp) != 0) { | |
385 | data = 0; | |
43d9616c WD |
386 | for (i = 0, cp = wp; i < l; ++i, ++cp) { |
387 | data = (data << 8) | (*(uchar *) cp); | |
89930721 | 388 | } |
43d9616c | 389 | for (; i < port_width && cnt > 0; ++i) { |
89930721 WD |
390 | data = (data << 8) | *src++; |
391 | --cnt; | |
392 | ++cp; | |
393 | } | |
43d9616c WD |
394 | for (; cnt == 0 && i < port_width; ++i, ++cp) { |
395 | data = (data << 8) | (*(uchar *) cp); | |
89930721 WD |
396 | } |
397 | ||
43d9616c | 398 | if ((rc = write_data (info, wp, data)) != 0) { |
89930721 WD |
399 | return (rc); |
400 | } | |
401 | wp += port_width; | |
402 | } | |
403 | ||
404 | /* | |
405 | * handle word aligned part | |
406 | */ | |
89930721 WD |
407 | while (cnt >= port_width) { |
408 | data = 0; | |
43d9616c | 409 | for (i = 0; i < port_width; ++i) { |
89930721 WD |
410 | data = (data << 8) | *src++; |
411 | } | |
43d9616c | 412 | if ((rc = write_data (info, wp, data)) != 0) { |
89930721 WD |
413 | return (rc); |
414 | } | |
43d9616c | 415 | wp += port_width; |
89930721 | 416 | cnt -= port_width; |
89930721 WD |
417 | } |
418 | ||
419 | if (cnt == 0) { | |
420 | return (0); | |
421 | } | |
422 | ||
423 | /* | |
424 | * handle unaligned tail bytes | |
425 | */ | |
426 | data = 0; | |
43d9616c | 427 | for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { |
89930721 WD |
428 | data = (data << 8) | *src++; |
429 | --cnt; | |
430 | } | |
43d9616c WD |
431 | for (; i < port_width; ++i, ++cp) { |
432 | data = (data << 8) | (*(uchar *) cp); | |
89930721 WD |
433 | } |
434 | ||
43d9616c | 435 | return (write_data (info, wp, data)); |
89930721 WD |
436 | } |
437 | ||
438 | /*----------------------------------------------------------------------- | |
439 | * Write a word or halfword to Flash, returns: | |
440 | * 0 - OK | |
441 | * 1 - write timeout | |
442 | * 2 - Flash not erased | |
443 | */ | |
43d9616c | 444 | static int write_data (flash_info_t * info, ulong dest, FPW data) |
89930721 | 445 | { |
43d9616c | 446 | FPWV *addr = (FPWV *) dest; |
89930721 WD |
447 | ulong status; |
448 | ulong start; | |
449 | int flag; | |
450 | ||
451 | /* Check if Flash is (sufficiently) erased */ | |
452 | if ((*addr & data) != data) { | |
43d9616c | 453 | printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr); |
89930721 WD |
454 | return (2); |
455 | } | |
456 | /* Disable interrupts which might cause a timeout here */ | |
43d9616c | 457 | flag = disable_interrupts (); |
89930721 | 458 | |
43d9616c | 459 | *addr = (FPW) 0x00400040; /* write setup */ |
89930721 WD |
460 | *addr = data; |
461 | ||
462 | /* re-enable interrupts if necessary */ | |
463 | if (flag) | |
43d9616c | 464 | enable_interrupts (); |
89930721 WD |
465 | |
466 | start = get_timer (0); | |
467 | ||
43d9616c WD |
468 | while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { |
469 | if (get_timer (start) > CFG_FLASH_WRITE_TOUT) { | |
470 | *addr = (FPW) 0x00FF00FF; /* restore read mode */ | |
89930721 WD |
471 | return (1); |
472 | } | |
473 | } | |
474 | ||
43d9616c | 475 | *addr = (FPW) 0x00FF00FF; /* restore read mode */ |
89930721 WD |
476 | |
477 | return (0); | |
478 | } |