[people/ms/u-boot.git] / board / r360mpi / r360mpi.c

/*
 * (C) Copyright 2001
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <config.h>
#include <mpc8xx.h>
#include <i2c.h>

#include <commproc.h>
#include <command.h>
#include <cmd_bsp.h>
#include <malloc.h>

#include <linux/types.h>
#include <linux/string.h>       /* for strdup */


/*
 *  Memory Controller Using
 *
 *  CS0 - Flash memory            (0x40000000)
 *  CS1 - SDRAM                   (0x00000000}
 *  CS2 -
 *  CS3 -
 *  CS4 -
 *  CS5 -
 *  CS6 - PCMCIA device
 *  CS7 - PCMCIA device
 */

/* ------------------------------------------------------------------------- */

#define _not_used_	0xffffffff

const uint sdram_table[]=
{
        /* single read. (offset 0 in upm RAM) */
        0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
        0x1ff77c47,

        /* MRS initialization (offset 5) */

        0x1ff77c34, 0xefeabc34, 0x1fb57c35,

        /* burst read. (offset 8 in upm RAM) */
        0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
        0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,
        _not_used_, _not_used_, _not_used_, _not_used_,
        _not_used_, _not_used_, _not_used_, _not_used_,

        /* single write. (offset 18 in upm RAM) */
        0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47,
        _not_used_, _not_used_, _not_used_, _not_used_,

        /* burst write. (offset 20 in upm RAM) */
        0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
        0xf0affc00, 0xe1bbbc04, 0x1ff77c47, _not_used_,
        _not_used_, _not_used_, _not_used_, _not_used_,
        _not_used_, _not_used_, _not_used_, _not_used_,

        /* refresh. (offset 30 in upm RAM) */
        0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
        0xfffffc84, 0xfffffc07, _not_used_, _not_used_,
        _not_used_, _not_used_, _not_used_, _not_used_,

        /* exception. (offset 3c in upm RAM) */
        0x7ffffc07, _not_used_, _not_used_, _not_used_ };

/* ------------------------------------------------------------------------- */

/*
 * Check Board Identity:
 */

int checkboard (void)
{
	puts ("Board: R360 MPI Board\n");
	return 0;
}

/* ------------------------------------------------------------------------- */

static long int dram_size (long int, long int *, long int);

/* ------------------------------------------------------------------------- */

long int initdram (int board_type)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;
	volatile memctl8xx_t *memctl = &immap->im_memctl;
	long int size8, size9;
	long int size_b0 = 0;
	unsigned long reg;

	upmconfig (UPMA, (uint *) sdram_table,
			   sizeof (sdram_table) / sizeof (uint));

	/*
	 * Preliminary prescaler for refresh (depends on number of
	 * banks): This value is selected for four cycles every 62.4 us
	 * with two SDRAM banks or four cycles every 31.2 us with one
	 * bank. It will be adjusted after memory sizing.
	 */
	memctl->memc_mptpr = CFG_MPTPR_2BK_8K;

	memctl->memc_mar = 0x00000088;

	/*
	 * Map controller bank 1 to the SDRAM bank at
	 * preliminary address - these have to be modified after the
	 * SDRAM size has been determined.
	 */
	memctl->memc_or1 = CFG_OR1_PRELIM;
	memctl->memc_br1 = CFG_BR1_PRELIM;

	memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE));	/* no refresh yet */

	udelay (200);

	/* perform SDRAM initializsation sequence */

	memctl->memc_mcr = 0x80002105;	/* SDRAM bank 0 */
	udelay (200);
	memctl->memc_mcr = 0x80002230;	/* SDRAM bank 0 - execute twice */
	udelay (200);

	memctl->memc_mamr |= MAMR_PTAE;	/* enable refresh */

	udelay (1000);

	/*
	 * Check Bank 0 Memory Size for re-configuration
	 *
	 * try 8 column mode
	 */
	size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE1_PRELIM,
					   SDRAM_MAX_SIZE);

	udelay (1000);

	/*
	 * try 9 column mode
	 */
	size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE1_PRELIM,
					   SDRAM_MAX_SIZE);

	if (size8 < size9) {		/* leave configuration at 9 columns */
		size_b0 = size9;
/*	debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20);	*/
	} else {					/* back to 8 columns            */
		size_b0 = size8;
		memctl->memc_mamr = CFG_MAMR_8COL;
		udelay (500);
/*	debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20);	*/
	}

	udelay (1000);

	/*
	 * Adjust refresh rate depending on SDRAM type, both banks
	 * For types > 128 MBit leave it at the current (fast) rate
	 */
	if ((size_b0 < 0x02000000)) {
		/* reduce to 15.6 us (62.4 us / quad) */
		memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
		udelay (1000);
	}

	/*
	 * Final mapping
	 */

	memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM;
	memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V;

	/* adjust refresh rate depending on SDRAM type, one bank */
	reg = memctl->memc_mptpr;
	reg >>= 1;		/* reduce to CFG_MPTPR_1BK_8K / _4K */
	memctl->memc_mptpr = reg;

	udelay (10000);

	return (size_b0);
}

/* ------------------------------------------------------------------------- */

/*
 * Check memory range for valid RAM. A simple memory test determines
 * the actually available RAM size between addresses `base' and
 * `base + maxsize'. Some (not all) hardware errors are detected:
 * - short between address lines
 * - short between data lines
 */

static long int dram_size (long int mamr_value, long int *base,
						   long int maxsize)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;
	volatile memctl8xx_t *memctl = &immap->im_memctl;
	volatile long int *addr;
	ulong cnt, val;
	ulong save[32];			/* to make test non-destructive */
	unsigned char i = 0;

	memctl->memc_mamr = mamr_value;

	for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
		addr = base + cnt;	/* pointer arith! */

		save[i++] = *addr;
		*addr = ~cnt;
	}

	/* write 0 to base address */
	addr = base;
	save[i] = *addr;
	*addr = 0;

	/* check at base address */
	if ((val = *addr) != 0) {
		*addr = save[i];
		return (0);
	}

	for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
		addr = base + cnt;	/* pointer arith! */
		val = *addr;
		*addr = save[--i];

		if (val != (~cnt)) {
			return (cnt * sizeof (long));
		}
	}
	return (maxsize);
}

/* ------------------------------------------------------------------------- */

void r360_pwm_write (uchar reg, uchar val)
{
	if (i2c_write (CFG_I2C_PWM_ADDR, reg, 1, &val, 1)) {
		printf ("Can't write PWM register 0x%02X.\n", reg);
	}
}

/* ------------------------------------------------------------------------- */

/*-----------------------------------------------------------------------
 * Keyboard Controller
 */

/* Number of bytes returned from Keyboard Controller */
#define KEYBD_KEY_MAX		20				/* maximum key number */
#define KEYBD_DATALEN		((KEYBD_KEY_MAX + 7) / 8)	/* normal key scan data */

static uchar kbd_addr = CFG_I2C_KBD_ADDR;

static uchar *key_match (uchar *);

int misc_init_r (void)
{
	uchar kbd_data[KEYBD_DATALEN];
	uchar keybd_env[2 * KEYBD_DATALEN + 1];
	uchar *str;
	int i;

	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);

	i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);

	for (i = 0; i < KEYBD_DATALEN; ++i) {
		sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
	}
	setenv ("keybd", keybd_env);

	str = strdup (key_match (kbd_data));	/* decode keys */

#ifdef CONFIG_PREBOOT	/* automatically configure "preboot" command on key match */
	setenv ("preboot", str);	/* set or delete definition */
#endif /* CONFIG_PREBOOT */
	if (str != NULL) {
		free (str);
	}

	return (0);
}

/*-----------------------------------------------------------------------
 * Check if pressed key(s) match magic sequence,
 * and return the command string associated with that key(s).
 *
 * If no key press was decoded, NULL is returned.
 *
 * Note: the first character of the argument will be overwritten with
 * the "magic charcter code" of the decoded key(s), or '\0'.
 *
 *
 * Note: the string points to static environment data and must be
 * saved before you call any function that modifies the environment.
 */
#ifdef CONFIG_PREBOOT

static uchar kbd_magic_prefix[] = "key_magic";
static uchar kbd_command_prefix[] = "key_cmd";

static uchar *key_match (uchar * kbd_data)
{
	uchar compare[KEYBD_DATALEN];
	uchar magic[sizeof (kbd_magic_prefix) + 1];
	uchar cmd_name[sizeof (kbd_command_prefix) + 1];
	uchar key_mask;
	uchar *str, *nxt, *suffix;
	uchar *kbd_magic_keys;
	char *cmd;
	int i;

	/*
	 * The following string defines the characters that can pe appended
	 * to "key_magic" to form the names of environment variables that
	 * hold "magic" key codes, i. e. such key codes that can cause
	 * pre-boot actions. If the string is empty (""), then only
	 * "key_magic" is checked (old behaviour); the string "125" causes
	 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
	 */
	if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
		kbd_magic_keys = "";

	/* loop over all magic keys;
	 * use '\0' suffix in case of empty string
	 */
	for (suffix=kbd_magic_keys; *suffix || suffix==kbd_magic_keys; ++suffix) {
		sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
#if 0
		printf ("### Check magic \"%s\"\n", magic);
#endif

		memcpy(compare, kbd_data, KEYBD_DATALEN);

		for (str = getenv(magic); str != NULL; str = (*nxt) ? nxt+1 : nxt) {
			uchar c;

			c = (uchar) simple_strtoul (str, (char **) (&nxt), 16);

			if (str == nxt)				/* invalid character */
				break;

			if (c >= KEYBD_KEY_MAX)			/* bad key number */
				goto next_magic;

			key_mask = 0x80 >> (c % 8);

			if (!(compare[c / 8] & key_mask))	/* key not pressed */
				goto next_magic;

			compare[c / 8] &= ~key_mask;
		}

		for (i=0; i<KEYBD_DATALEN; i++)
			if (compare[i])			/* key(s) not released */
				goto next_magic;

		sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);

		cmd = getenv (cmd_name);
#if 0
		printf ("### Set PREBOOT to $(%s): \"%s\"\n",
			cmd_name, cmd ? cmd : "<<NULL>>");
#endif
		*kbd_data = *suffix;
		return (cmd);

	next_magic:;
	}
#if 0
	printf ("### Delete PREBOOT\n");
#endif
	*kbd_data = '\0';
	return (NULL);
}
#endif							/* CONFIG_PREBOOT */

/* Read Keyboard status */
int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
	uchar kbd_data[KEYBD_DATALEN];
	uchar keybd_env[2 * KEYBD_DATALEN + 1];
	int i;

	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);

	/* Read keys */
	i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);

	puts ("Keys:");
	for (i = 0; i < KEYBD_DATALEN; ++i) {
		sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
		printf (" %02x", kbd_data[i]);
	}
	putc ('\n');
	setenv ("keybd", keybd_env);
	return 0;
}
Commit	Line	Data
c609719b WD	1	/*
	2	* (C) Copyright 2001
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	#include <common.h>
	25	#include <config.h>
	26	#include <mpc8xx.h>
	27	#include <i2c.h>
	28
	29	#include <commproc.h>
	30	#include <command.h>
	31	#include <cmd_bsp.h>
	32	#include <malloc.h>
	33
	34	#include <linux/types.h>
	35	#include <linux/string.h> /* for strdup */
	36
	37
	38	/*
	39	* Memory Controller Using
	40	*
	41	* CS0 - Flash memory (0x40000000)
	42	* CS1 - SDRAM (0x00000000}
	43	* CS2 -
	44	* CS3 -
	45	* CS4 -
	46	* CS5 -
	47	* CS6 - PCMCIA device
	48	* CS7 - PCMCIA device
	49	*/
	50
	51	/* ------------------------------------------------------------------------- */
	52
	53	#define _not_used_ 0xffffffff
	54
	55	const uint sdram_table[]=
	56	{
	57	/* single read. (offset 0 in upm RAM) */
	58	0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00,
	59	0x1ff77c47,
	60
	61	/* MRS initialization (offset 5) */
	62
	63	0x1ff77c34, 0xefeabc34, 0x1fb57c35,
	64
65	/* burst read. (offset 8 in upm RAM) */
66	0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
67	0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,
68	_not_used_, _not_used_, _not_used_, _not_used_,
69	_not_used_, _not_used_, _not_used_, _not_used_,
70
71	/* single write. (offset 18 in upm RAM) */
72	0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47,
73	_not_used_, _not_used_, _not_used_, _not_used_,
74
75	/* burst write. (offset 20 in upm RAM) */
76	0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
77	0xf0affc00, 0xe1bbbc04, 0x1ff77c47, _not_used_,
78	_not_used_, _not_used_, _not_used_, _not_used_,
79	_not_used_, _not_used_, _not_used_, _not_used_,
80
81	/* refresh. (offset 30 in upm RAM) */
82	0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
83	0xfffffc84, 0xfffffc07, _not_used_, _not_used_,
84	_not_used_, _not_used_, _not_used_, _not_used_,
85
86	/* exception. (offset 3c in upm RAM) */
87	0x7ffffc07, _not_used_, _not_used_, _not_used_ };
88
89	/* ------------------------------------------------------------------------- */
90
91	/*
92	* Check Board Identity:
93	*/
94
95	int checkboard (void)
96	{
97	puts ("Board: R360 MPI Board\n");
98	return 0;
99	}
100
101	/* ------------------------------------------------------------------------- */
102
103	static long int dram_size (long int, long int *, long int);
104
105	/* ------------------------------------------------------------------------- */
106
107	long int initdram (int board_type)
108	{
109	volatile immap_t immap = (immap_t ) CFG_IMMR;
110	volatile memctl8xx_t *memctl = &immap->im_memctl;
111	long int size8, size9;
112	long int size_b0 = 0;
113	unsigned long reg;
114
115	upmconfig (UPMA, (uint *) sdram_table,
116	sizeof (sdram_table) / sizeof (uint));
117
118	/*
119	* Preliminary prescaler for refresh (depends on number of
120	* banks): This value is selected for four cycles every 62.4 us
121	* with two SDRAM banks or four cycles every 31.2 us with one
122	* bank. It will be adjusted after memory sizing.
123	*/
124	memctl->memc_mptpr = CFG_MPTPR_2BK_8K;
125
126	memctl->memc_mar = 0x00000088;
127
128	/*
d791b1dc	129	* Map controller bank 1 to the SDRAM bank at
c609719b WD	130	* preliminary address - these have to be modified after the
	131	* SDRAM size has been determined.
	132	*/
d791b1dc WD	133	memctl->memc_or1 = CFG_OR1_PRELIM;
d791b1dc WD	134	memctl->memc_br1 = CFG_BR1_PRELIM;
c609719b WD	135
	136	memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */
	137
	138	udelay (200);
	139
	140	/* perform SDRAM initializsation sequence */
	141
d791b1dc	142	memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
c609719b	143	udelay (200);
d791b1dc	144	memctl->memc_mcr = 0x80002230; /* SDRAM bank 0 - execute twice */
c609719b WD	145	udelay (200);
	146
	147	memctl->memc_mamr \|= MAMR_PTAE; /* enable refresh */
	148
	149	udelay (1000);
	150
	151	/*
	152	* Check Bank 0 Memory Size for re-configuration
	153	*
	154	* try 8 column mode
	155	*/
d791b1dc	156	size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE1_PRELIM,
c609719b WD	157	SDRAM_MAX_SIZE);
	158
	159	udelay (1000);
	160
	161	/*
	162	* try 9 column mode
	163	*/
d791b1dc	164	size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE1_PRELIM,
c609719b WD	165	SDRAM_MAX_SIZE);
	166
	167	if (size8 < size9) { /* leave configuration at 9 columns */
	168	size_b0 = size9;
	169	/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */
d791b1dc	170	} else { /* back to 8 columns */
c609719b WD	171	size_b0 = size8;
	172	memctl->memc_mamr = CFG_MAMR_8COL;
	173	udelay (500);
	174	/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */
	175	}
	176
	177	udelay (1000);
	178
	179	/*
	180	* Adjust refresh rate depending on SDRAM type, both banks
	181	* For types > 128 MBit leave it at the current (fast) rate
	182	*/
	183	if ((size_b0 < 0x02000000)) {
	184	/* reduce to 15.6 us (62.4 us / quad) */
	185	memctl->memc_mptpr = CFG_MPTPR_2BK_4K;
	186	udelay (1000);
	187	}
	188
	189	/*
	190	* Final mapping
	191	*/
	192
	193	memctl->memc_or1 = ((-size_b0) & 0xFFFF0000) \| CFG_OR_TIMING_SDRAM;
	194	memctl->memc_br1 = (CFG_SDRAM_BASE & BR_BA_MSK) \| BR_MS_UPMA \| BR_V;
	195
	196	/* adjust refresh rate depending on SDRAM type, one bank */
	197	reg = memctl->memc_mptpr;
	198	reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */
	199	memctl->memc_mptpr = reg;
	200
	201	udelay (10000);
	202
	203	return (size_b0);
	204	}
	205
	206	/* ------------------------------------------------------------------------- */
	207
	208	/*
	209	* Check memory range for valid RAM. A simple memory test determines
	210	* the actually available RAM size between addresses `base' and
	211	* `base + maxsize'. Some (not all) hardware errors are detected:
	212	* - short between address lines
	213	* - short between data lines
	214	*/
	215
d791b1dc WD	216	static long int dram_size (long int mamr_value, long int *base,
d791b1dc WD	217	long int maxsize)
c609719b WD	218	{
	219	volatile immap_t immap = (immap_t ) CFG_IMMR;
	220	volatile memctl8xx_t *memctl = &immap->im_memctl;
	221	volatile long int *addr;
	222	ulong cnt, val;
	223	ulong save[32]; /* to make test non-destructive */
	224	unsigned char i = 0;
	225
	226	memctl->memc_mamr = mamr_value;
	227
	228	for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
	229	addr = base + cnt; /* pointer arith! */
	230
	231	save[i++] = *addr;
	232	*addr = ~cnt;
	233	}
	234
	235	/* write 0 to base address */
	236	addr = base;
	237	save[i] = *addr;
	238	*addr = 0;
	239
	240	/* check at base address */
	241	if ((val = *addr) != 0) {
	242	*addr = save[i];
	243	return (0);
	244	}
	245
	246	for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
	247	addr = base + cnt; /* pointer arith! */
	248	val = *addr;
	249	*addr = save[--i];
	250
	251	if (val != (~cnt)) {
	252	return (cnt * sizeof (long));
	253	}
	254	}
	255	return (maxsize);
	256	}
	257
	258	/* ------------------------------------------------------------------------- */
	259
d791b1dc	260	void r360_pwm_write (uchar reg, uchar val)
c609719b	261	{
d791b1dc WD	262	if (i2c_write (CFG_I2C_PWM_ADDR, reg, 1, &val, 1)) {
d791b1dc WD	263	printf ("Can't write PWM register 0x%02X.\n", reg);
c609719b WD	264	}
	265	}
	266
	267	/* ------------------------------------------------------------------------- */
	268
	269	/*-----------------------------------------------------------------------
	270	* Keyboard Controller
	271	*/
	272
	273	/* Number of bytes returned from Keyboard Controller */
d791b1dc WD	274	#define KEYBD_KEY_MAX 20 /* maximum key number */
	275	#define KEYBD_DATALEN ((KEYBD_KEY_MAX + 7) / 8) /* normal key scan data */
	276
	277	static uchar kbd_addr = CFG_I2C_KBD_ADDR;
c609719b WD	278
	279	static uchar key_match (uchar );
	280
	281	int misc_init_r (void)
	282	{
	283	uchar kbd_data[KEYBD_DATALEN];
	284	uchar keybd_env[2 * KEYBD_DATALEN + 1];
	285	uchar *str;
	286	int i;
	287
	288	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
	289
d791b1dc	290	i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
c609719b WD	291
	292	for (i = 0; i < KEYBD_DATALEN; ++i) {
	293	sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
	294	}
	295	setenv ("keybd", keybd_env);
	296
d791b1dc	297	str = strdup (key_match (kbd_data)); /* decode keys */
c609719b WD	298
	299	#ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
	300	setenv ("preboot", str); /* set or delete definition */
	301	#endif /* CONFIG_PREBOOT */
	302	if (str != NULL) {
	303	free (str);
	304	}
	305
	306	return (0);
	307	}
	308
	309	/*-----------------------------------------------------------------------
	310	* Check if pressed key(s) match magic sequence,
	311	* and return the command string associated with that key(s).
	312	*
	313	* If no key press was decoded, NULL is returned.
	314	*
	315	* Note: the first character of the argument will be overwritten with
	316	* the "magic charcter code" of the decoded key(s), or '\0'.
	317	*
	318	*
	319	* Note: the string points to static environment data and must be
	320	* saved before you call any function that modifies the environment.
	321	*/
	322	#ifdef CONFIG_PREBOOT
	323
	324	static uchar kbd_magic_prefix[] = "key_magic";
	325	static uchar kbd_command_prefix[] = "key_cmd";
	326
d791b1dc	327	static uchar key_match (uchar kbd_data)
c609719b	328	{
d791b1dc	329	uchar compare[KEYBD_DATALEN];
c609719b WD	330	uchar magic[sizeof (kbd_magic_prefix) + 1];
c609719b WD	331	uchar cmd_name[sizeof (kbd_command_prefix) + 1];
d791b1dc WD	332	uchar key_mask;
d791b1dc WD	333	uchar str, nxt, *suffix;
c609719b WD	334	uchar *kbd_magic_keys;
c609719b WD	335	char *cmd;
d791b1dc	336	int i;
c609719b WD	337
	338	/*
	339	* The following string defines the characters that can pe appended
	340	* to "key_magic" to form the names of environment variables that
	341	* hold "magic" key codes, i. e. such key codes that can cause
	342	* pre-boot actions. If the string is empty (""), then only
	343	* "key_magic" is checked (old behaviour); the string "125" causes
	344	* checks for "key_magic1", "key_magic2" and "key_magic5", etc.
	345	*/
d791b1dc WD	346	if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
d791b1dc WD	347	kbd_magic_keys = "";
c609719b	348
d791b1dc WD	349	/* loop over all magic keys;
	350	* use '\0' suffix in case of empty string
	351	*/
	352	for (suffix=kbd_magic_keys; *suffix \|\| suffix==kbd_magic_keys; ++suffix) {
	353	sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
c609719b	354	#if 0
d791b1dc	355	printf ("### Check magic \"%s\"\n", magic);
c609719b WD	356	#endif
c609719b WD	357
d791b1dc	358	memcpy(compare, kbd_data, KEYBD_DATALEN);
c609719b	359
d791b1dc WD	360	for (str = getenv(magic); str != NULL; str = (*nxt) ? nxt+1 : nxt) {
	361	uchar c;
	362
	363	c = (uchar) simple_strtoul (str, (char **) (&nxt), 16);
	364
	365	if (str == nxt) /* invalid character */
	366	break;
	367
	368	if (c >= KEYBD_KEY_MAX) /* bad key number */
	369	goto next_magic;
	370
	371	key_mask = 0x80 >> (c % 8);
c609719b	372
d791b1dc WD	373	if (!(compare[c / 8] & key_mask)) /* key not pressed */
	374	goto next_magic;
	375
	376	compare[c / 8] &= ~key_mask;
	377	}
	378
	379	for (i=0; i<KEYBD_DATALEN; i++)
	380	if (compare[i]) /* key(s) not released */
	381	goto next_magic;
	382
	383	sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
	384
	385	cmd = getenv (cmd_name);
4a6fd34b	386	#if 0
d791b1dc WD	387	printf ("### Set PREBOOT to $(%s): \"%s\"\n",
d791b1dc WD	388	cmd_name, cmd ? cmd : "<<NULL>>");
4a6fd34b	389	#endif
d791b1dc WD	390	kbd_data = suffix;
	391	return (cmd);
	392
	393	next_magic:;
c609719b WD	394	}
	395	#if 0
	396	printf ("### Delete PREBOOT\n");
	397	#endif
d791b1dc	398	*kbd_data = '\0';
c609719b WD	399	return (NULL);
c609719b WD	400	}
d791b1dc	401	#endif /* CONFIG_PREBOOT */
c609719b WD	402
	403	/* Read Keyboard status */
	404	int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
	405	{
	406	uchar kbd_data[KEYBD_DATALEN];
	407	uchar keybd_env[2 * KEYBD_DATALEN + 1];
	408	int i;
	409
	410	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
	411
	412	/* Read keys */
d791b1dc	413	i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
c609719b WD	414
	415	puts ("Keys:");
	416	for (i = 0; i < KEYBD_DATALEN; ++i) {
	417	sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
	418	printf (" %02x", kbd_data[i]);
	419	}
	420	putc ('\n');
	421	setenv ("keybd", keybd_env);
	422	return 0;
	423	}