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cff2f5f0 NI |
1 | /* |
2 | * board/renesas/alt/qos.c | |
3 | * | |
4 | * Copyright (C) 2014 Renesas Electronics Corporation | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0 | |
7 | * | |
8 | */ | |
9 | ||
10 | #include <common.h> | |
11 | #include <asm/processor.h> | |
12 | #include <asm/mach-types.h> | |
13 | #include <asm/io.h> | |
14 | #include <asm/arch/rmobile.h> | |
15 | ||
1cc95f6e | 16 | #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT) |
a5aef732 | 17 | /* QoS version 0.311 for ES1 and version 0.321 for ES2 */ |
cff2f5f0 NI |
18 | |
19 | enum { | |
20 | DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04, | |
21 | DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09, | |
22 | DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14, | |
23 | DBSC3_15, | |
24 | DBSC3_NR, | |
25 | }; | |
26 | ||
27 | static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = { | |
28 | [DBSC3_00] = DBSC3_0_QOS_R0_BASE, | |
29 | [DBSC3_01] = DBSC3_0_QOS_R1_BASE, | |
30 | [DBSC3_02] = DBSC3_0_QOS_R2_BASE, | |
31 | [DBSC3_03] = DBSC3_0_QOS_R3_BASE, | |
32 | [DBSC3_04] = DBSC3_0_QOS_R4_BASE, | |
33 | [DBSC3_05] = DBSC3_0_QOS_R5_BASE, | |
34 | [DBSC3_06] = DBSC3_0_QOS_R6_BASE, | |
35 | [DBSC3_07] = DBSC3_0_QOS_R7_BASE, | |
36 | [DBSC3_08] = DBSC3_0_QOS_R8_BASE, | |
37 | [DBSC3_09] = DBSC3_0_QOS_R9_BASE, | |
38 | [DBSC3_10] = DBSC3_0_QOS_R10_BASE, | |
39 | [DBSC3_11] = DBSC3_0_QOS_R11_BASE, | |
40 | [DBSC3_12] = DBSC3_0_QOS_R12_BASE, | |
41 | [DBSC3_13] = DBSC3_0_QOS_R13_BASE, | |
42 | [DBSC3_14] = DBSC3_0_QOS_R14_BASE, | |
43 | [DBSC3_15] = DBSC3_0_QOS_R15_BASE, | |
44 | }; | |
45 | ||
46 | static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = { | |
47 | [DBSC3_00] = DBSC3_0_QOS_W0_BASE, | |
48 | [DBSC3_01] = DBSC3_0_QOS_W1_BASE, | |
49 | [DBSC3_02] = DBSC3_0_QOS_W2_BASE, | |
50 | [DBSC3_03] = DBSC3_0_QOS_W3_BASE, | |
51 | [DBSC3_04] = DBSC3_0_QOS_W4_BASE, | |
52 | [DBSC3_05] = DBSC3_0_QOS_W5_BASE, | |
53 | [DBSC3_06] = DBSC3_0_QOS_W6_BASE, | |
54 | [DBSC3_07] = DBSC3_0_QOS_W7_BASE, | |
55 | [DBSC3_08] = DBSC3_0_QOS_W8_BASE, | |
56 | [DBSC3_09] = DBSC3_0_QOS_W9_BASE, | |
57 | [DBSC3_10] = DBSC3_0_QOS_W10_BASE, | |
58 | [DBSC3_11] = DBSC3_0_QOS_W11_BASE, | |
59 | [DBSC3_12] = DBSC3_0_QOS_W12_BASE, | |
60 | [DBSC3_13] = DBSC3_0_QOS_W13_BASE, | |
61 | [DBSC3_14] = DBSC3_0_QOS_W14_BASE, | |
62 | [DBSC3_15] = DBSC3_0_QOS_W15_BASE, | |
63 | }; | |
64 | ||
a5aef732 NI |
65 | #if defined(CONFIG_QOS_PRI_MEDIA) |
66 | #define is_qos_pri_media() 1 | |
67 | #else | |
68 | #define is_qos_pri_media() 0 | |
69 | #endif | |
70 | ||
71 | #if defined(CONFIG_QOS_PRI_NORMAL) | |
72 | #define is_qos_pri_normal() 1 | |
73 | #else | |
74 | #define is_qos_pri_normal() 0 | |
75 | #endif | |
76 | ||
77 | #if defined(CONFIG_QOS_PRI_GFX) | |
78 | #define is_qos_pri_gfx() 1 | |
79 | #else | |
80 | #define is_qos_pri_gfx() 0 | |
81 | #endif | |
82 | ||
cff2f5f0 NI |
83 | void qos_init(void) |
84 | { | |
85 | int i; | |
86 | struct rcar_s3c *s3c; | |
87 | struct rcar_s3c_qos *s3c_qos; | |
88 | struct rcar_dbsc3_qos *qos_addr; | |
89 | struct rcar_mxi *mxi; | |
90 | struct rcar_mxi_qos *mxi_qos; | |
91 | struct rcar_axi_qos *axi_qos; | |
92 | ||
93 | /* DBSC DBADJ2 */ | |
94 | writel(0x20042004, DBSC3_0_DBADJ2); | |
95 | ||
96 | /* S3C -QoS */ | |
97 | s3c = (struct rcar_s3c *)S3C_BASE; | |
a5aef732 NI |
98 | if (is_qos_pri_media()) { |
99 | writel(0x1F0B0604, &s3c->s3crorr); | |
100 | writel(0x1F0E0705, &s3c->s3cworr); | |
101 | } else if (is_qos_pri_normal()) { | |
102 | writel(0x1F0B0908, &s3c->s3crorr); | |
103 | writel(0x1F0E0A08, &s3c->s3cworr); | |
104 | } else if (is_qos_pri_media()) { | |
105 | writel(0x1F0B0B0B, &s3c->s3crorr); | |
106 | writel(0x1F0E0C0C, &s3c->s3cworr); | |
107 | } | |
cff2f5f0 NI |
108 | /* QoS Control Registers */ |
109 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE; | |
110 | writel(0x00890089, &s3c_qos->s3cqos0); | |
111 | writel(0x20960010, &s3c_qos->s3cqos1); | |
112 | writel(0x20302030, &s3c_qos->s3cqos2); | |
a5aef732 NI |
113 | if (is_qos_pri_media()) |
114 | writel(0x20AA2300, &s3c_qos->s3cqos3); | |
115 | else if (is_qos_pri_normal()) | |
116 | writel(0x20AA2200, &s3c_qos->s3cqos3); | |
117 | else if (is_qos_pri_media()) | |
118 | writel(0x20AA2100, &s3c_qos->s3cqos3); | |
cff2f5f0 NI |
119 | writel(0x00002032, &s3c_qos->s3cqos4); |
120 | writel(0x20960010, &s3c_qos->s3cqos5); | |
121 | writel(0x20302030, &s3c_qos->s3cqos6); | |
a5aef732 NI |
122 | if (is_qos_pri_media()) |
123 | writel(0x20AA2300, &s3c_qos->s3cqos7); | |
124 | else if (is_qos_pri_normal()) | |
125 | writel(0x20AA2200, &s3c_qos->s3cqos7); | |
126 | else if (is_qos_pri_gfx()) | |
127 | writel(0x20AA2100, &s3c_qos->s3cqos7); | |
cff2f5f0 NI |
128 | writel(0x00002032, &s3c_qos->s3cqos8); |
129 | ||
130 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE; | |
131 | writel(0x00890089, &s3c_qos->s3cqos0); | |
132 | writel(0x20960010, &s3c_qos->s3cqos1); | |
133 | writel(0x20302030, &s3c_qos->s3cqos2); | |
a5aef732 NI |
134 | if (is_qos_pri_media()) |
135 | writel(0x20AA2300, &s3c_qos->s3cqos3); | |
136 | else if (is_qos_pri_normal()) | |
137 | writel(0x20AA2200, &s3c_qos->s3cqos3); | |
138 | else if (is_qos_pri_gfx()) | |
139 | writel(0x20AA2100, &s3c_qos->s3cqos3); | |
cff2f5f0 NI |
140 | writel(0x00002032, &s3c_qos->s3cqos4); |
141 | writel(0x20960010, &s3c_qos->s3cqos5); | |
142 | writel(0x20302030, &s3c_qos->s3cqos6); | |
a5aef732 NI |
143 | if (is_qos_pri_media()) |
144 | writel(0x20AA2300, &s3c_qos->s3cqos7); | |
145 | else if (is_qos_pri_media()) | |
146 | writel(0x20AA2200, &s3c_qos->s3cqos7); | |
147 | else if (is_qos_pri_media()) | |
148 | writel(0x20AA2100, &s3c_qos->s3cqos7); | |
cff2f5f0 NI |
149 | writel(0x00002032, &s3c_qos->s3cqos8); |
150 | ||
151 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE; | |
152 | writel(0x80928092, &s3c_qos->s3cqos0); | |
153 | writel(0x20960020, &s3c_qos->s3cqos1); | |
154 | writel(0x20302030, &s3c_qos->s3cqos2); | |
155 | writel(0x20AA20DC, &s3c_qos->s3cqos3); | |
156 | writel(0x00002032, &s3c_qos->s3cqos4); | |
157 | writel(0x20960020, &s3c_qos->s3cqos5); | |
158 | writel(0x20302030, &s3c_qos->s3cqos6); | |
159 | writel(0x20AA20DC, &s3c_qos->s3cqos7); | |
160 | writel(0x00002032, &s3c_qos->s3cqos8); | |
161 | ||
162 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE; | |
a5aef732 | 163 | writel(0x00820092, &s3c_qos->s3cqos0); |
cff2f5f0 NI |
164 | writel(0x20960020, &s3c_qos->s3cqos1); |
165 | writel(0x20302030, &s3c_qos->s3cqos2); | |
166 | writel(0x20AA20FA, &s3c_qos->s3cqos3); | |
167 | writel(0x00002032, &s3c_qos->s3cqos4); | |
168 | writel(0x20960020, &s3c_qos->s3cqos5); | |
169 | writel(0x20302030, &s3c_qos->s3cqos6); | |
170 | writel(0x20AA20FA, &s3c_qos->s3cqos7); | |
171 | writel(0x00002032, &s3c_qos->s3cqos8); | |
172 | ||
173 | /* DBSC -QoS */ | |
174 | /* DBSC0 - Read */ | |
175 | for (i = DBSC3_00; i < DBSC3_NR; i++) { | |
176 | qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i]; | |
177 | writel(0x00000002, &qos_addr->dblgcnt); | |
178 | writel(0x0000207D, &qos_addr->dbtmval0); | |
179 | writel(0x00002053, &qos_addr->dbtmval1); | |
180 | writel(0x0000202A, &qos_addr->dbtmval2); | |
181 | writel(0x00001FBD, &qos_addr->dbtmval3); | |
182 | writel(0x00000001, &qos_addr->dbrqctr); | |
183 | writel(0x00002064, &qos_addr->dbthres0); | |
184 | writel(0x0000203E, &qos_addr->dbthres1); | |
185 | writel(0x00002019, &qos_addr->dbthres2); | |
186 | writel(0x00000001, &qos_addr->dblgqon); | |
187 | } | |
188 | ||
189 | /* DBSC0 - Write */ | |
190 | for (i = DBSC3_00; i < DBSC3_NR; i++) { | |
191 | qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i]; | |
192 | writel(0x00000002, &qos_addr->dblgcnt); | |
193 | writel(0x0000207D, &qos_addr->dbtmval0); | |
194 | writel(0x00002053, &qos_addr->dbtmval1); | |
195 | writel(0x00002043, &qos_addr->dbtmval2); | |
196 | writel(0x00002030, &qos_addr->dbtmval3); | |
197 | writel(0x00000001, &qos_addr->dbrqctr); | |
198 | writel(0x00002064, &qos_addr->dbthres0); | |
199 | writel(0x0000203E, &qos_addr->dbthres1); | |
200 | writel(0x00002031, &qos_addr->dbthres2); | |
201 | writel(0x00000001, &qos_addr->dblgqon); | |
202 | } | |
203 | ||
204 | /* CCI-400 -QoS */ | |
a5aef732 NI |
205 | if (IS_R8A7794_ES2()) { |
206 | writel(0x20001000, CCI_400_MAXOT_1); | |
207 | writel(0x20001000, CCI_400_MAXOT_2); | |
208 | } else { | |
209 | writel(0x20000800, CCI_400_MAXOT_1); | |
210 | writel(0x20000800, CCI_400_MAXOT_2); | |
211 | } | |
cff2f5f0 NI |
212 | writel(0x0000000C, CCI_400_QOSCNTL_1); |
213 | writel(0x0000000C, CCI_400_QOSCNTL_2); | |
214 | ||
215 | /* MXI -QoS */ | |
216 | /* Transaction Control (MXI) */ | |
217 | mxi = (struct rcar_mxi *)MXI_BASE; | |
218 | writel(0x00000013, &mxi->mxrtcr); | |
a5aef732 | 219 | writel(0x00000016, &mxi->mxwtcr); |
cff2f5f0 NI |
220 | writel(0x00780080, &mxi->mxsaar0); |
221 | writel(0x02000800, &mxi->mxsaar1); | |
222 | ||
223 | /* QoS Control (MXI) */ | |
224 | mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE; | |
225 | writel(0x0000000C, &mxi_qos->vspdu0); | |
226 | writel(0x0000000E, &mxi_qos->du0); | |
227 | ||
228 | /* AXI -QoS */ | |
229 | /* Transaction Control (MXI) */ | |
230 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE; | |
231 | writel(0x00000002, &axi_qos->qosconf); | |
232 | writel(0x00002245, &axi_qos->qosctset0); | |
233 | writel(0x00002096, &axi_qos->qosctset1); | |
234 | writel(0x00002030, &axi_qos->qosctset2); | |
235 | writel(0x00002030, &axi_qos->qosctset3); | |
236 | writel(0x00000001, &axi_qos->qosreqctr); | |
237 | writel(0x00002064, &axi_qos->qosthres0); | |
238 | writel(0x00002004, &axi_qos->qosthres1); | |
239 | writel(0x00000000, &axi_qos->qosthres2); | |
240 | writel(0x00000001, &axi_qos->qosqon); | |
241 | ||
242 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE; | |
243 | writel(0x00000000, &axi_qos->qosconf); | |
244 | writel(0x000020A6, &axi_qos->qosctset0); | |
245 | writel(0x00000001, &axi_qos->qosreqctr); | |
246 | writel(0x00002064, &axi_qos->qosthres0); | |
247 | writel(0x00002004, &axi_qos->qosthres1); | |
248 | writel(0x00000000, &axi_qos->qosthres2); | |
249 | writel(0x00000001, &axi_qos->qosqon); | |
250 | ||
251 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE; | |
252 | writel(0x00000002, &axi_qos->qosconf); | |
253 | writel(0x00002245, &axi_qos->qosctset0); | |
254 | writel(0x00002096, &axi_qos->qosctset1); | |
255 | writel(0x00002030, &axi_qos->qosctset2); | |
256 | writel(0x00002030, &axi_qos->qosctset3); | |
257 | writel(0x00000001, &axi_qos->qosreqctr); | |
258 | writel(0x00002064, &axi_qos->qosthres0); | |
259 | writel(0x00002004, &axi_qos->qosthres1); | |
260 | writel(0x00000000, &axi_qos->qosthres2); | |
261 | writel(0x00000001, &axi_qos->qosqon); | |
262 | ||
263 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE; | |
264 | writel(0x00000002, &axi_qos->qosconf); | |
265 | writel(0x00002245, &axi_qos->qosctset0); | |
266 | writel(0x00002096, &axi_qos->qosctset1); | |
267 | writel(0x00002030, &axi_qos->qosctset2); | |
268 | writel(0x00002030, &axi_qos->qosctset3); | |
269 | writel(0x00000001, &axi_qos->qosreqctr); | |
270 | writel(0x00002064, &axi_qos->qosthres0); | |
271 | writel(0x00002004, &axi_qos->qosthres1); | |
272 | writel(0x00000000, &axi_qos->qosthres2); | |
273 | writel(0x00000001, &axi_qos->qosqon); | |
274 | ||
275 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE; | |
276 | writel(0x00000002, &axi_qos->qosconf); | |
277 | writel(0x00002245, &axi_qos->qosctset0); | |
278 | writel(0x00002096, &axi_qos->qosctset1); | |
279 | writel(0x00002030, &axi_qos->qosctset2); | |
280 | writel(0x00002030, &axi_qos->qosctset3); | |
281 | writel(0x00000001, &axi_qos->qosreqctr); | |
282 | writel(0x00002064, &axi_qos->qosthres0); | |
283 | writel(0x00002004, &axi_qos->qosthres1); | |
284 | writel(0x00000000, &axi_qos->qosthres2); | |
285 | writel(0x00000001, &axi_qos->qosqon); | |
286 | ||
287 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE; | |
288 | writel(0x00000000, &axi_qos->qosconf); | |
289 | writel(0x0000214C, &axi_qos->qosctset0); | |
290 | writel(0x00000001, &axi_qos->qosreqctr); | |
291 | writel(0x00002064, &axi_qos->qosthres0); | |
292 | writel(0x00002004, &axi_qos->qosthres1); | |
293 | writel(0x00000000, &axi_qos->qosthres2); | |
294 | writel(0x00000001, &axi_qos->qosqon); | |
295 | ||
296 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE; | |
297 | writel(0x00000001, &axi_qos->qosconf); | |
298 | writel(0x00002004, &axi_qos->qosctset0); | |
299 | writel(0x00002096, &axi_qos->qosctset1); | |
300 | writel(0x00002030, &axi_qos->qosctset2); | |
301 | writel(0x00002030, &axi_qos->qosctset3); | |
302 | writel(0x00000001, &axi_qos->qosreqctr); | |
303 | writel(0x00002064, &axi_qos->qosthres0); | |
304 | writel(0x00002004, &axi_qos->qosthres1); | |
305 | writel(0x00000000, &axi_qos->qosthres2); | |
306 | writel(0x00000001, &axi_qos->qosqon); | |
307 | ||
308 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE; | |
309 | writel(0x00000001, &axi_qos->qosconf); | |
310 | writel(0x00002004, &axi_qos->qosctset0); | |
311 | writel(0x00002096, &axi_qos->qosctset1); | |
312 | writel(0x00002030, &axi_qos->qosctset2); | |
313 | writel(0x00002030, &axi_qos->qosctset3); | |
314 | writel(0x00000001, &axi_qos->qosreqctr); | |
315 | writel(0x00002064, &axi_qos->qosthres0); | |
316 | writel(0x00002004, &axi_qos->qosthres1); | |
317 | writel(0x00000000, &axi_qos->qosthres2); | |
318 | writel(0x00000001, &axi_qos->qosqon); | |
319 | ||
320 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE; | |
321 | writel(0x00000001, &axi_qos->qosconf); | |
322 | writel(0x00002004, &axi_qos->qosctset0); | |
323 | writel(0x00002096, &axi_qos->qosctset1); | |
324 | writel(0x00002030, &axi_qos->qosctset2); | |
325 | writel(0x00002030, &axi_qos->qosctset3); | |
326 | writel(0x00000001, &axi_qos->qosreqctr); | |
327 | writel(0x00002064, &axi_qos->qosthres0); | |
328 | writel(0x00002004, &axi_qos->qosthres1); | |
329 | writel(0x00000000, &axi_qos->qosthres2); | |
330 | writel(0x00000001, &axi_qos->qosqon); | |
331 | ||
332 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE; | |
333 | writel(0x00000001, &axi_qos->qosconf); | |
334 | writel(0x00002004, &axi_qos->qosctset0); | |
335 | writel(0x00002096, &axi_qos->qosctset1); | |
336 | writel(0x00002030, &axi_qos->qosctset2); | |
337 | writel(0x00002030, &axi_qos->qosctset3); | |
338 | writel(0x00000001, &axi_qos->qosreqctr); | |
339 | writel(0x00002064, &axi_qos->qosthres0); | |
340 | writel(0x00002004, &axi_qos->qosthres1); | |
341 | writel(0x00000000, &axi_qos->qosthres2); | |
342 | writel(0x00000001, &axi_qos->qosqon); | |
343 | ||
344 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE; | |
345 | writel(0x00000002, &axi_qos->qosconf); | |
346 | writel(0x00002245, &axi_qos->qosctset0); | |
347 | writel(0x00002096, &axi_qos->qosctset1); | |
348 | writel(0x00002030, &axi_qos->qosctset2); | |
349 | writel(0x00002030, &axi_qos->qosctset3); | |
350 | writel(0x00000001, &axi_qos->qosreqctr); | |
351 | writel(0x00002064, &axi_qos->qosthres0); | |
352 | writel(0x00002004, &axi_qos->qosthres1); | |
353 | writel(0x00000000, &axi_qos->qosthres2); | |
354 | writel(0x00000001, &axi_qos->qosqon); | |
355 | ||
356 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE; | |
357 | writel(0x00000000, &axi_qos->qosconf); | |
358 | writel(0x000020A6, &axi_qos->qosctset0); | |
359 | writel(0x00000001, &axi_qos->qosreqctr); | |
360 | writel(0x00002064, &axi_qos->qosthres0); | |
361 | writel(0x00002004, &axi_qos->qosthres1); | |
362 | writel(0x00000000, &axi_qos->qosthres2); | |
363 | writel(0x00000001, &axi_qos->qosqon); | |
364 | ||
365 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE; | |
366 | writel(0x00000000, &axi_qos->qosconf); | |
367 | writel(0x000020A6, &axi_qos->qosctset0); | |
368 | writel(0x00000001, &axi_qos->qosreqctr); | |
369 | writel(0x00002064, &axi_qos->qosthres0); | |
370 | writel(0x00002004, &axi_qos->qosthres1); | |
371 | writel(0x00000000, &axi_qos->qosthres2); | |
372 | writel(0x00000001, &axi_qos->qosqon); | |
373 | ||
374 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE; | |
375 | writel(0x00000000, &axi_qos->qosconf); | |
376 | writel(0x00002053, &axi_qos->qosctset0); | |
377 | writel(0x00000001, &axi_qos->qosreqctr); | |
378 | writel(0x00002064, &axi_qos->qosthres0); | |
379 | writel(0x00002004, &axi_qos->qosthres1); | |
380 | writel(0x00000000, &axi_qos->qosthres2); | |
381 | writel(0x00000001, &axi_qos->qosqon); | |
382 | ||
383 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE; | |
384 | writel(0x00000000, &axi_qos->qosconf); | |
385 | writel(0x00002053, &axi_qos->qosctset0); | |
386 | writel(0x00000001, &axi_qos->qosreqctr); | |
387 | writel(0x00002064, &axi_qos->qosthres0); | |
388 | writel(0x00002004, &axi_qos->qosthres1); | |
389 | writel(0x00000000, &axi_qos->qosthres2); | |
390 | writel(0x00000001, &axi_qos->qosqon); | |
391 | ||
392 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE; | |
393 | writel(0x00000002, &axi_qos->qosconf); | |
394 | writel(0x00002245, &axi_qos->qosctset0); | |
395 | writel(0x00000001, &axi_qos->qosreqctr); | |
396 | writel(0x00002064, &axi_qos->qosthres0); | |
397 | writel(0x00002004, &axi_qos->qosthres1); | |
398 | writel(0x00000000, &axi_qos->qosthres2); | |
399 | writel(0x00000001, &axi_qos->qosqon); | |
400 | ||
401 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE; | |
402 | writel(0x00000000, &axi_qos->qosconf); | |
403 | writel(0x00002029, &axi_qos->qosctset0); | |
404 | writel(0x00000001, &axi_qos->qosreqctr); | |
405 | writel(0x00002064, &axi_qos->qosthres0); | |
406 | writel(0x00002004, &axi_qos->qosthres1); | |
407 | writel(0x00000000, &axi_qos->qosthres2); | |
408 | writel(0x00000001, &axi_qos->qosqon); | |
409 | ||
410 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE; | |
411 | writel(0x00000002, &axi_qos->qosconf); | |
412 | writel(0x00002245, &axi_qos->qosctset0); | |
413 | writel(0x00000001, &axi_qos->qosreqctr); | |
414 | writel(0x00002064, &axi_qos->qosthres0); | |
415 | writel(0x00002004, &axi_qos->qosthres1); | |
416 | writel(0x00000000, &axi_qos->qosthres2); | |
417 | writel(0x00000001, &axi_qos->qosqon); | |
418 | ||
419 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE; | |
420 | writel(0x00000000, &axi_qos->qosconf); | |
421 | writel(0x00002053, &axi_qos->qosctset0); | |
422 | writel(0x00000001, &axi_qos->qosreqctr); | |
423 | writel(0x00002064, &axi_qos->qosthres0); | |
424 | writel(0x00002004, &axi_qos->qosthres1); | |
425 | writel(0x00000000, &axi_qos->qosthres2); | |
426 | writel(0x00000001, &axi_qos->qosqon); | |
427 | ||
428 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE; | |
429 | writel(0x00000000, &axi_qos->qosconf); | |
430 | writel(0x000020A6, &axi_qos->qosctset0); | |
431 | writel(0x00000001, &axi_qos->qosreqctr); | |
432 | writel(0x00002064, &axi_qos->qosthres0); | |
433 | writel(0x00002004, &axi_qos->qosthres1); | |
434 | writel(0x00000000, &axi_qos->qosthres2); | |
435 | writel(0x00000001, &axi_qos->qosqon); | |
436 | ||
437 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE; | |
438 | writel(0x00000000, &axi_qos->qosconf); | |
439 | writel(0x00002053, &axi_qos->qosctset0); | |
440 | writel(0x00000001, &axi_qos->qosreqctr); | |
441 | writel(0x00002064, &axi_qos->qosthres0); | |
442 | writel(0x00002004, &axi_qos->qosthres1); | |
443 | writel(0x00000000, &axi_qos->qosthres2); | |
444 | writel(0x00000001, &axi_qos->qosqon); | |
445 | ||
446 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE; | |
447 | writel(0x00000002, &axi_qos->qosconf); | |
448 | writel(0x00002245, &axi_qos->qosctset0); | |
449 | writel(0x00000001, &axi_qos->qosreqctr); | |
450 | writel(0x00002064, &axi_qos->qosthres0); | |
451 | writel(0x00002004, &axi_qos->qosthres1); | |
452 | writel(0x00000000, &axi_qos->qosthres2); | |
453 | writel(0x00000001, &axi_qos->qosqon); | |
454 | ||
455 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE; | |
456 | writel(0x00000000, &axi_qos->qosconf); | |
457 | writel(0x0000214C, &axi_qos->qosctset0); | |
458 | writel(0x00000001, &axi_qos->qosreqctr); | |
459 | writel(0x00002064, &axi_qos->qosthres0); | |
460 | writel(0x00002004, &axi_qos->qosthres1); | |
461 | writel(0x00000000, &axi_qos->qosthres2); | |
462 | writel(0x00000001, &axi_qos->qosqon); | |
463 | ||
464 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE; | |
465 | writel(0x00000000, &axi_qos->qosconf); | |
466 | writel(0x0000214C, &axi_qos->qosctset0); | |
467 | writel(0x00000001, &axi_qos->qosreqctr); | |
468 | writel(0x00002064, &axi_qos->qosthres0); | |
469 | writel(0x00002004, &axi_qos->qosthres1); | |
470 | writel(0x00000000, &axi_qos->qosthres2); | |
471 | writel(0x00000001, &axi_qos->qosqon); | |
472 | ||
473 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE; | |
474 | writel(0x00000000, &axi_qos->qosconf); | |
475 | writel(0x000020A6, &axi_qos->qosctset0); | |
476 | writel(0x00000001, &axi_qos->qosreqctr); | |
477 | writel(0x00002064, &axi_qos->qosthres0); | |
478 | writel(0x00002004, &axi_qos->qosthres1); | |
479 | writel(0x00000000, &axi_qos->qosthres2); | |
480 | writel(0x00000001, &axi_qos->qosqon); | |
481 | ||
482 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE; | |
483 | writel(0x00000000, &axi_qos->qosconf); | |
484 | writel(0x00002053, &axi_qos->qosctset0); | |
485 | writel(0x00000001, &axi_qos->qosreqctr); | |
486 | writel(0x00002064, &axi_qos->qosthres0); | |
487 | writel(0x00002004, &axi_qos->qosthres1); | |
488 | writel(0x00000000, &axi_qos->qosthres2); | |
489 | writel(0x00000001, &axi_qos->qosqon); | |
490 | ||
491 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE; | |
492 | writel(0x00000000, &axi_qos->qosconf); | |
493 | writel(0x00002053, &axi_qos->qosctset0); | |
494 | writel(0x00000001, &axi_qos->qosreqctr); | |
495 | writel(0x00002064, &axi_qos->qosthres0); | |
496 | writel(0x00002004, &axi_qos->qosthres1); | |
497 | writel(0x00000000, &axi_qos->qosthres2); | |
498 | writel(0x00000001, &axi_qos->qosqon); | |
499 | ||
500 | /* QoS Register (RT-AXI) */ | |
501 | axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE; | |
a5aef732 | 502 | writel(0x00000001, &axi_qos->qosconf); |
cff2f5f0 NI |
503 | writel(0x00002053, &axi_qos->qosctset0); |
504 | writel(0x00002096, &axi_qos->qosctset1); | |
505 | writel(0x00002030, &axi_qos->qosctset2); | |
506 | writel(0x00002030, &axi_qos->qosctset3); | |
507 | writel(0x00000001, &axi_qos->qosreqctr); | |
508 | writel(0x00002064, &axi_qos->qosthres0); | |
509 | writel(0x00002004, &axi_qos->qosthres1); | |
510 | writel(0x00000000, &axi_qos->qosthres2); | |
511 | writel(0x00000001, &axi_qos->qosqon); | |
512 | ||
513 | axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE; | |
514 | writel(0x00000000, &axi_qos->qosconf); | |
515 | writel(0x00002053, &axi_qos->qosctset0); | |
516 | writel(0x00002096, &axi_qos->qosctset1); | |
517 | writel(0x00002030, &axi_qos->qosctset2); | |
518 | writel(0x00002030, &axi_qos->qosctset3); | |
519 | writel(0x00000001, &axi_qos->qosreqctr); | |
520 | writel(0x00002064, &axi_qos->qosthres0); | |
521 | writel(0x00002004, &axi_qos->qosthres1); | |
522 | writel(0x00000000, &axi_qos->qosthres2); | |
523 | writel(0x00000001, &axi_qos->qosqon); | |
524 | ||
525 | axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE; | |
526 | writel(0x00000002, &axi_qos->qosconf); | |
527 | writel(0x00002245, &axi_qos->qosctset0); | |
528 | writel(0x00002096, &axi_qos->qosctset1); | |
529 | writel(0x00002030, &axi_qos->qosctset2); | |
530 | writel(0x00002030, &axi_qos->qosctset3); | |
531 | writel(0x00000001, &axi_qos->qosreqctr); | |
532 | writel(0x00002064, &axi_qos->qosthres0); | |
533 | writel(0x00002004, &axi_qos->qosthres1); | |
534 | writel(0x00000000, &axi_qos->qosthres2); | |
535 | writel(0x00000001, &axi_qos->qosqon); | |
536 | ||
537 | axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE; | |
538 | writel(0x00000002, &axi_qos->qosconf); | |
539 | writel(0x00002245, &axi_qos->qosctset0); | |
540 | writel(0x00000001, &axi_qos->qosreqctr); | |
541 | writel(0x00002064, &axi_qos->qosthres0); | |
542 | writel(0x00002004, &axi_qos->qosthres1); | |
543 | writel(0x00000000, &axi_qos->qosthres2); | |
544 | writel(0x00000001, &axi_qos->qosqon); | |
545 | ||
546 | /* QoS Register (MP-AXI) */ | |
547 | axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE; | |
548 | writel(0x00000000, &axi_qos->qosconf); | |
549 | writel(0x00002037, &axi_qos->qosctset0); | |
550 | writel(0x00000001, &axi_qos->qosreqctr); | |
551 | writel(0x00002064, &axi_qos->qosthres0); | |
552 | writel(0x00002004, &axi_qos->qosthres1); | |
553 | writel(0x00000000, &axi_qos->qosthres2); | |
554 | writel(0x00000001, &axi_qos->qosqon); | |
555 | ||
556 | axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE; | |
557 | writel(0x00000001, &axi_qos->qosconf); | |
558 | writel(0x00002014, &axi_qos->qosctset0); | |
559 | writel(0x00000040, &axi_qos->qosreqctr); | |
560 | writel(0x00002064, &axi_qos->qosthres0); | |
561 | writel(0x00002004, &axi_qos->qosthres1); | |
562 | writel(0x00000000, &axi_qos->qosthres2); | |
563 | writel(0x00000001, &axi_qos->qosqon); | |
564 | ||
565 | axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE; | |
566 | writel(0x00000001, &axi_qos->qosconf); | |
567 | writel(0x00002014, &axi_qos->qosctset0); | |
568 | writel(0x00000040, &axi_qos->qosreqctr); | |
569 | writel(0x00002064, &axi_qos->qosthres0); | |
570 | writel(0x00002004, &axi_qos->qosthres1); | |
571 | writel(0x00000000, &axi_qos->qosthres2); | |
572 | writel(0x00000001, &axi_qos->qosqon); | |
573 | ||
574 | axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE; | |
575 | writel(0x00000001, &axi_qos->qosconf); | |
576 | writel(0x00001FF0, &axi_qos->qosctset0); | |
577 | writel(0x00000020, &axi_qos->qosreqctr); | |
578 | writel(0x00002064, &axi_qos->qosthres0); | |
579 | writel(0x00002004, &axi_qos->qosthres1); | |
580 | writel(0x00002001, &axi_qos->qosthres2); | |
581 | writel(0x00000001, &axi_qos->qosqon); | |
582 | ||
583 | axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE; | |
584 | writel(0x00000001, &axi_qos->qosconf); | |
585 | writel(0x00002004, &axi_qos->qosctset0); | |
586 | writel(0x00002096, &axi_qos->qosctset1); | |
587 | writel(0x00002030, &axi_qos->qosctset2); | |
588 | writel(0x00002030, &axi_qos->qosctset3); | |
589 | writel(0x00000001, &axi_qos->qosreqctr); | |
590 | writel(0x00002064, &axi_qos->qosthres0); | |
591 | writel(0x00002004, &axi_qos->qosthres1); | |
592 | writel(0x00000000, &axi_qos->qosthres2); | |
593 | writel(0x00000001, &axi_qos->qosqon); | |
594 | ||
595 | axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE; | |
596 | writel(0x00000000, &axi_qos->qosconf); | |
597 | writel(0x00002053, &axi_qos->qosctset0); | |
598 | writel(0x00000001, &axi_qos->qosreqctr); | |
599 | writel(0x00002064, &axi_qos->qosthres0); | |
600 | writel(0x00002004, &axi_qos->qosthres1); | |
601 | writel(0x00000000, &axi_qos->qosthres2); | |
602 | writel(0x00000001, &axi_qos->qosqon); | |
603 | ||
604 | axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE; | |
605 | writel(0x00000000, &axi_qos->qosconf); | |
606 | writel(0x0000206E, &axi_qos->qosctset0); | |
607 | writel(0x00000001, &axi_qos->qosreqctr); | |
608 | writel(0x00002064, &axi_qos->qosthres0); | |
609 | writel(0x00002004, &axi_qos->qosthres1); | |
610 | writel(0x00000000, &axi_qos->qosthres2); | |
611 | writel(0x00000001, &axi_qos->qosqon); | |
612 | ||
613 | /* QoS Register (SYS-AXI256) */ | |
614 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE; | |
615 | writel(0x00000002, &axi_qos->qosconf); | |
616 | writel(0x000020EB, &axi_qos->qosctset0); | |
617 | writel(0x00002096, &axi_qos->qosctset1); | |
618 | writel(0x00002030, &axi_qos->qosctset2); | |
619 | writel(0x00002030, &axi_qos->qosctset3); | |
620 | writel(0x00000001, &axi_qos->qosreqctr); | |
621 | writel(0x00002064, &axi_qos->qosthres0); | |
622 | writel(0x00002004, &axi_qos->qosthres1); | |
623 | writel(0x00000000, &axi_qos->qosthres2); | |
624 | writel(0x00000001, &axi_qos->qosqon); | |
625 | ||
626 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE; | |
627 | writel(0x00000002, &axi_qos->qosconf); | |
628 | writel(0x000020EB, &axi_qos->qosctset0); | |
629 | writel(0x00002096, &axi_qos->qosctset1); | |
630 | writel(0x00002030, &axi_qos->qosctset2); | |
631 | writel(0x00002030, &axi_qos->qosctset3); | |
632 | writel(0x00000001, &axi_qos->qosreqctr); | |
633 | writel(0x00002064, &axi_qos->qosthres0); | |
634 | writel(0x00002004, &axi_qos->qosthres1); | |
635 | writel(0x00000000, &axi_qos->qosthres2); | |
636 | writel(0x00000001, &axi_qos->qosqon); | |
637 | ||
638 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE; | |
639 | writel(0x00000002, &axi_qos->qosconf); | |
640 | writel(0x000020EB, &axi_qos->qosctset0); | |
641 | writel(0x00002096, &axi_qos->qosctset1); | |
642 | writel(0x00002030, &axi_qos->qosctset2); | |
643 | writel(0x00002030, &axi_qos->qosctset3); | |
644 | writel(0x00000001, &axi_qos->qosreqctr); | |
645 | writel(0x00002064, &axi_qos->qosthres0); | |
646 | writel(0x00002004, &axi_qos->qosthres1); | |
647 | writel(0x00000000, &axi_qos->qosthres2); | |
648 | writel(0x00000001, &axi_qos->qosqon); | |
649 | ||
650 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE; | |
651 | writel(0x00000002, &axi_qos->qosconf); | |
652 | writel(0x000020EB, &axi_qos->qosctset0); | |
653 | writel(0x00002096, &axi_qos->qosctset1); | |
654 | writel(0x00002030, &axi_qos->qosctset2); | |
655 | writel(0x00002030, &axi_qos->qosctset3); | |
656 | writel(0x00000001, &axi_qos->qosreqctr); | |
657 | writel(0x00002064, &axi_qos->qosthres0); | |
658 | writel(0x00002004, &axi_qos->qosthres1); | |
659 | writel(0x00000000, &axi_qos->qosthres2); | |
660 | writel(0x00000001, &axi_qos->qosqon); | |
661 | ||
662 | /* QoS Register (CCI-AXI) */ | |
663 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE; | |
664 | writel(0x00000001, &axi_qos->qosconf); | |
665 | writel(0x00002004, &axi_qos->qosctset0); | |
666 | writel(0x00002096, &axi_qos->qosctset1); | |
667 | writel(0x00002030, &axi_qos->qosctset2); | |
668 | writel(0x00002030, &axi_qos->qosctset3); | |
669 | writel(0x00000001, &axi_qos->qosreqctr); | |
670 | writel(0x00002064, &axi_qos->qosthres0); | |
671 | writel(0x00002004, &axi_qos->qosthres1); | |
672 | writel(0x00000000, &axi_qos->qosthres2); | |
673 | writel(0x00000001, &axi_qos->qosqon); | |
674 | ||
675 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE; | |
676 | writel(0x00000002, &axi_qos->qosconf); | |
677 | writel(0x00002245, &axi_qos->qosctset0); | |
678 | writel(0x00002096, &axi_qos->qosctset1); | |
679 | writel(0x00002030, &axi_qos->qosctset2); | |
680 | writel(0x00002030, &axi_qos->qosctset3); | |
681 | writel(0x00000001, &axi_qos->qosreqctr); | |
682 | writel(0x00002064, &axi_qos->qosthres0); | |
683 | writel(0x00002004, &axi_qos->qosthres1); | |
684 | writel(0x00000000, &axi_qos->qosthres2); | |
685 | writel(0x00000001, &axi_qos->qosqon); | |
686 | ||
687 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE; | |
688 | writel(0x00000001, &axi_qos->qosconf); | |
689 | writel(0x00002004, &axi_qos->qosctset0); | |
690 | writel(0x00002096, &axi_qos->qosctset1); | |
691 | writel(0x00002030, &axi_qos->qosctset2); | |
692 | writel(0x00002030, &axi_qos->qosctset3); | |
693 | writel(0x00000001, &axi_qos->qosreqctr); | |
694 | writel(0x00002064, &axi_qos->qosthres0); | |
695 | writel(0x00002004, &axi_qos->qosthres1); | |
696 | writel(0x00000000, &axi_qos->qosthres2); | |
697 | writel(0x00000001, &axi_qos->qosqon); | |
698 | ||
699 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE; | |
700 | writel(0x00000001, &axi_qos->qosconf); | |
701 | writel(0x00002004, &axi_qos->qosctset0); | |
702 | writel(0x00002096, &axi_qos->qosctset1); | |
703 | writel(0x00002030, &axi_qos->qosctset2); | |
704 | writel(0x00002030, &axi_qos->qosctset3); | |
705 | writel(0x00000001, &axi_qos->qosreqctr); | |
706 | writel(0x00002064, &axi_qos->qosthres0); | |
707 | writel(0x00002004, &axi_qos->qosthres1); | |
708 | writel(0x00000000, &axi_qos->qosthres2); | |
709 | writel(0x00000001, &axi_qos->qosqon); | |
710 | ||
711 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE; | |
712 | writel(0x00000001, &axi_qos->qosconf); | |
713 | writel(0x00002004, &axi_qos->qosctset0); | |
714 | writel(0x00002096, &axi_qos->qosctset1); | |
715 | writel(0x00002030, &axi_qos->qosctset2); | |
716 | writel(0x00002030, &axi_qos->qosctset3); | |
717 | writel(0x00000001, &axi_qos->qosreqctr); | |
718 | writel(0x00002064, &axi_qos->qosthres0); | |
719 | writel(0x00002004, &axi_qos->qosthres1); | |
720 | writel(0x00000000, &axi_qos->qosthres2); | |
721 | writel(0x00000001, &axi_qos->qosqon); | |
722 | ||
723 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE; | |
724 | writel(0x00000002, &axi_qos->qosconf); | |
725 | writel(0x00002245, &axi_qos->qosctset0); | |
726 | writel(0x00002096, &axi_qos->qosctset1); | |
727 | writel(0x00002030, &axi_qos->qosctset2); | |
728 | writel(0x00002030, &axi_qos->qosctset3); | |
729 | writel(0x00000001, &axi_qos->qosreqctr); | |
730 | writel(0x00002064, &axi_qos->qosthres0); | |
731 | writel(0x00002004, &axi_qos->qosthres1); | |
732 | writel(0x00000000, &axi_qos->qosthres2); | |
733 | writel(0x00000001, &axi_qos->qosqon); | |
734 | ||
735 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE; | |
736 | writel(0x00000001, &axi_qos->qosconf); | |
737 | writel(0x00002004, &axi_qos->qosctset0); | |
738 | writel(0x00002096, &axi_qos->qosctset1); | |
739 | writel(0x00002030, &axi_qos->qosctset2); | |
740 | writel(0x00002030, &axi_qos->qosctset3); | |
741 | writel(0x00000001, &axi_qos->qosreqctr); | |
742 | writel(0x00002064, &axi_qos->qosthres0); | |
743 | writel(0x00002004, &axi_qos->qosthres1); | |
744 | writel(0x00000000, &axi_qos->qosthres2); | |
745 | writel(0x00000001, &axi_qos->qosqon); | |
746 | ||
747 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE; | |
748 | writel(0x00000001, &axi_qos->qosconf); | |
749 | writel(0x00002004, &axi_qos->qosctset0); | |
750 | writel(0x00002096, &axi_qos->qosctset1); | |
751 | writel(0x00002030, &axi_qos->qosctset2); | |
752 | writel(0x00002030, &axi_qos->qosctset3); | |
753 | writel(0x00000001, &axi_qos->qosreqctr); | |
754 | writel(0x00002064, &axi_qos->qosthres0); | |
755 | writel(0x00002004, &axi_qos->qosthres1); | |
756 | writel(0x00000000, &axi_qos->qosthres2); | |
757 | writel(0x00000001, &axi_qos->qosqon); | |
758 | ||
759 | /* QoS Register (Media-AXI) */ | |
760 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE; | |
761 | writel(0x00000002, &axi_qos->qosconf); | |
762 | writel(0x000020DC, &axi_qos->qosctset0); | |
763 | writel(0x00002096, &axi_qos->qosctset1); | |
764 | writel(0x00002030, &axi_qos->qosctset2); | |
765 | writel(0x00002030, &axi_qos->qosctset3); | |
766 | writel(0x00000020, &axi_qos->qosreqctr); | |
767 | writel(0x000020AA, &axi_qos->qosthres0); | |
768 | writel(0x00002032, &axi_qos->qosthres1); | |
769 | writel(0x00000001, &axi_qos->qosthres2); | |
770 | ||
771 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE; | |
772 | writel(0x00000002, &axi_qos->qosconf); | |
773 | writel(0x000020DC, &axi_qos->qosctset0); | |
774 | writel(0x00002096, &axi_qos->qosctset1); | |
775 | writel(0x00002030, &axi_qos->qosctset2); | |
776 | writel(0x00002030, &axi_qos->qosctset3); | |
777 | writel(0x00000020, &axi_qos->qosreqctr); | |
778 | writel(0x000020AA, &axi_qos->qosthres0); | |
779 | writel(0x00002032, &axi_qos->qosthres1); | |
780 | writel(0x00000001, &axi_qos->qosthres2); | |
781 | ||
782 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE; | |
783 | writel(0x00000001, &axi_qos->qosconf); | |
784 | writel(0x00002190, &axi_qos->qosctset0); | |
785 | writel(0x00000020, &axi_qos->qosreqctr); | |
786 | writel(0x00002064, &axi_qos->qosthres0); | |
787 | writel(0x00002004, &axi_qos->qosthres1); | |
788 | writel(0x00000001, &axi_qos->qosthres2); | |
789 | writel(0x00000001, &axi_qos->qosqon); | |
790 | ||
791 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE; | |
792 | writel(0x00000001, &axi_qos->qosconf); | |
793 | writel(0x00002190, &axi_qos->qosctset0); | |
794 | writel(0x00000020, &axi_qos->qosreqctr); | |
795 | writel(0x00000001, &axi_qos->qosthres0); | |
796 | writel(0x00000001, &axi_qos->qosthres1); | |
797 | writel(0x00000001, &axi_qos->qosthres2); | |
798 | writel(0x00000001, &axi_qos->qosqon); | |
799 | ||
800 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE; | |
801 | writel(0x00000001, &axi_qos->qosconf); | |
802 | writel(0x00002190, &axi_qos->qosctset0); | |
803 | writel(0x00000020, &axi_qos->qosreqctr); | |
804 | writel(0x00002064, &axi_qos->qosthres0); | |
805 | writel(0x00002004, &axi_qos->qosthres1); | |
806 | writel(0x00000001, &axi_qos->qosthres2); | |
807 | writel(0x00000001, &axi_qos->qosqon); | |
808 | ||
809 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE; | |
810 | writel(0x00000001, &axi_qos->qosconf); | |
811 | writel(0x00002190, &axi_qos->qosctset0); | |
812 | writel(0x00000020, &axi_qos->qosreqctr); | |
813 | writel(0x00000001, &axi_qos->qosthres0); | |
814 | writel(0x00000001, &axi_qos->qosthres1); | |
815 | writel(0x00000001, &axi_qos->qosthres2); | |
816 | writel(0x00000001, &axi_qos->qosqon); | |
817 | ||
818 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE; | |
819 | writel(0x00000001, &axi_qos->qosconf); | |
820 | writel(0x00002190, &axi_qos->qosctset0); | |
821 | writel(0x00000020, &axi_qos->qosreqctr); | |
822 | writel(0x00002064, &axi_qos->qosthres0); | |
823 | writel(0x00002004, &axi_qos->qosthres1); | |
824 | writel(0x00000001, &axi_qos->qosthres2); | |
825 | writel(0x00000001, &axi_qos->qosqon); | |
826 | ||
827 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE; | |
828 | writel(0x00000001, &axi_qos->qosconf); | |
829 | writel(0x00002190, &axi_qos->qosctset0); | |
830 | writel(0x00000020, &axi_qos->qosreqctr); | |
831 | writel(0x00000001, &axi_qos->qosthres0); | |
832 | writel(0x00000001, &axi_qos->qosthres1); | |
833 | writel(0x00000001, &axi_qos->qosthres2); | |
834 | writel(0x00000001, &axi_qos->qosqon); | |
835 | ||
836 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE; | |
837 | writel(0x00000001, &axi_qos->qosconf); | |
838 | writel(0x00001FF0, &axi_qos->qosctset0); | |
839 | writel(0x00000020, &axi_qos->qosreqctr); | |
840 | writel(0x00002064, &axi_qos->qosthres0); | |
841 | writel(0x00002004, &axi_qos->qosthres1); | |
842 | writel(0x00002001, &axi_qos->qosthres2); | |
843 | writel(0x00000001, &axi_qos->qosqon); | |
844 | ||
845 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE; | |
846 | writel(0x00000001, &axi_qos->qosconf); | |
847 | writel(0x000020C8, &axi_qos->qosctset0); | |
848 | writel(0x00000020, &axi_qos->qosreqctr); | |
849 | writel(0x00002064, &axi_qos->qosthres0); | |
850 | writel(0x00002004, &axi_qos->qosthres1); | |
851 | writel(0x00000001, &axi_qos->qosthres2); | |
852 | writel(0x00000001, &axi_qos->qosqon); | |
853 | ||
854 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE; | |
855 | writel(0x00000001, &axi_qos->qosconf); | |
856 | writel(0x000020C8, &axi_qos->qosctset0); | |
857 | writel(0x00000020, &axi_qos->qosreqctr); | |
858 | writel(0x00000001, &axi_qos->qosthres0); | |
859 | writel(0x00000001, &axi_qos->qosthres1); | |
860 | writel(0x00000001, &axi_qos->qosthres2); | |
861 | writel(0x00000001, &axi_qos->qosqon); | |
862 | ||
863 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE; | |
864 | writel(0x00000001, &axi_qos->qosconf); | |
865 | writel(0x000020C8, &axi_qos->qosctset0); | |
866 | writel(0x00000020, &axi_qos->qosreqctr); | |
867 | writel(0x00002064, &axi_qos->qosthres0); | |
868 | writel(0x00002004, &axi_qos->qosthres1); | |
869 | writel(0x00000001, &axi_qos->qosthres2); | |
870 | writel(0x00000001, &axi_qos->qosqon); | |
871 | ||
872 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE; | |
873 | writel(0x00000001, &axi_qos->qosconf); | |
874 | writel(0x000020C8, &axi_qos->qosctset0); | |
875 | writel(0x00000020, &axi_qos->qosreqctr); | |
876 | writel(0x00002064, &axi_qos->qosthres0); | |
877 | writel(0x00002004, &axi_qos->qosthres1); | |
878 | writel(0x00000001, &axi_qos->qosthres2); | |
879 | writel(0x00000001, &axi_qos->qosqon); | |
880 | ||
881 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE; | |
882 | writel(0x00000001, &axi_qos->qosconf); | |
883 | writel(0x000020C8, &axi_qos->qosctset0); | |
884 | writel(0x00000020, &axi_qos->qosreqctr); | |
885 | writel(0x00002064, &axi_qos->qosthres0); | |
886 | writel(0x00002004, &axi_qos->qosthres1); | |
887 | writel(0x00000001, &axi_qos->qosthres2); | |
888 | writel(0x00000001, &axi_qos->qosqon); | |
889 | ||
890 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE; | |
891 | writel(0x00000001, &axi_qos->qosconf); | |
892 | writel(0x000020C8, &axi_qos->qosctset0); | |
893 | writel(0x00000020, &axi_qos->qosreqctr); | |
894 | writel(0x00000001, &axi_qos->qosthres0); | |
895 | writel(0x00000001, &axi_qos->qosthres1); | |
896 | writel(0x00000001, &axi_qos->qosthres2); | |
897 | writel(0x00000001, &axi_qos->qosqon); | |
898 | ||
899 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE; | |
900 | writel(0x00000001, &axi_qos->qosconf); | |
901 | writel(0x000020C8, &axi_qos->qosctset0); | |
902 | writel(0x00000020, &axi_qos->qosreqctr); | |
903 | writel(0x00002064, &axi_qos->qosthres0); | |
904 | writel(0x00002004, &axi_qos->qosthres1); | |
905 | writel(0x00000001, &axi_qos->qosthres2); | |
906 | writel(0x00000001, &axi_qos->qosqon); | |
907 | ||
908 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE; | |
909 | writel(0x00000001, &axi_qos->qosconf); | |
910 | writel(0x000020C8, &axi_qos->qosctset0); | |
911 | writel(0x00000020, &axi_qos->qosreqctr); | |
912 | writel(0x00002064, &axi_qos->qosthres0); | |
913 | writel(0x00002004, &axi_qos->qosthres1); | |
914 | writel(0x00000001, &axi_qos->qosthres2); | |
915 | writel(0x00000001, &axi_qos->qosqon); | |
916 | ||
917 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE; | |
918 | writel(0x00000003, &axi_qos->qosconf); | |
919 | writel(0x000020C8, &axi_qos->qosctset0); | |
920 | writel(0x00002064, &axi_qos->qosthres0); | |
921 | writel(0x00002004, &axi_qos->qosthres1); | |
922 | writel(0x00000001, &axi_qos->qosthres2); | |
923 | writel(0x00000001, &axi_qos->qosqon); | |
924 | ||
925 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE; | |
926 | writel(0x00000003, &axi_qos->qosconf); | |
927 | writel(0x000020C8, &axi_qos->qosctset0); | |
928 | writel(0x00002064, &axi_qos->qosthres0); | |
929 | writel(0x00002004, &axi_qos->qosthres1); | |
930 | writel(0x00000001, &axi_qos->qosthres2); | |
931 | writel(0x00000001, &axi_qos->qosqon); | |
932 | ||
933 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE; | |
934 | writel(0x00000003, &axi_qos->qosconf); | |
935 | writel(0x00002063, &axi_qos->qosctset0); | |
936 | writel(0x00000001, &axi_qos->qosreqctr); | |
937 | writel(0x00002064, &axi_qos->qosthres0); | |
938 | writel(0x00002004, &axi_qos->qosthres1); | |
939 | writel(0x00000001, &axi_qos->qosthres2); | |
940 | writel(0x00000001, &axi_qos->qosqon); | |
941 | ||
942 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE; | |
943 | writel(0x00000003, &axi_qos->qosconf); | |
944 | writel(0x00002063, &axi_qos->qosctset0); | |
945 | writel(0x00000001, &axi_qos->qosreqctr); | |
946 | writel(0x00002064, &axi_qos->qosthres0); | |
947 | writel(0x00002004, &axi_qos->qosthres1); | |
948 | writel(0x00000001, &axi_qos->qosthres2); | |
949 | writel(0x00000001, &axi_qos->qosqon); | |
950 | ||
951 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE; | |
952 | writel(0x00000001, &axi_qos->qosconf); | |
953 | writel(0x00002073, &axi_qos->qosctset0); | |
954 | writel(0x00000020, &axi_qos->qosreqctr); | |
955 | writel(0x00002064, &axi_qos->qosthres0); | |
956 | writel(0x00002004, &axi_qos->qosthres1); | |
957 | writel(0x00000001, &axi_qos->qosthres2); | |
958 | writel(0x00000001, &axi_qos->qosqon); | |
959 | ||
960 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE; | |
961 | writel(0x00000001, &axi_qos->qosconf); | |
962 | writel(0x00002073, &axi_qos->qosctset0); | |
963 | writel(0x00000020, &axi_qos->qosreqctr); | |
964 | writel(0x00000001, &axi_qos->qosthres0); | |
965 | writel(0x00000001, &axi_qos->qosthres1); | |
966 | writel(0x00000001, &axi_qos->qosthres2); | |
967 | writel(0x00000001, &axi_qos->qosqon); | |
968 | ||
969 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE; | |
970 | writel(0x00000001, &axi_qos->qosconf); | |
971 | writel(0x00002073, &axi_qos->qosctset0); | |
972 | writel(0x00000020, &axi_qos->qosreqctr); | |
973 | writel(0x00002064, &axi_qos->qosthres0); | |
974 | writel(0x00002004, &axi_qos->qosthres1); | |
975 | writel(0x00000001, &axi_qos->qosthres2); | |
976 | writel(0x00000001, &axi_qos->qosqon); | |
977 | ||
978 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE; | |
979 | writel(0x00000001, &axi_qos->qosconf); | |
980 | writel(0x00002073, &axi_qos->qosctset0); | |
981 | writel(0x00000020, &axi_qos->qosreqctr); | |
982 | writel(0x00000001, &axi_qos->qosthres0); | |
983 | writel(0x00000001, &axi_qos->qosthres1); | |
984 | writel(0x00000001, &axi_qos->qosthres2); | |
985 | writel(0x00000001, &axi_qos->qosqon); | |
986 | ||
987 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE; | |
988 | writel(0x00000001, &axi_qos->qosconf); | |
989 | writel(0x00002073, &axi_qos->qosctset0); | |
990 | writel(0x00000020, &axi_qos->qosreqctr); | |
991 | writel(0x00002064, &axi_qos->qosthres0); | |
992 | writel(0x00002004, &axi_qos->qosthres1); | |
993 | writel(0x00000001, &axi_qos->qosthres2); | |
994 | writel(0x00000001, &axi_qos->qosqon); | |
995 | } | |
1cc95f6e | 996 | #else /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */ |
c9b59bf7 NI |
997 | void qos_init(void) |
998 | { | |
999 | } | |
1cc95f6e | 1000 | #endif /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */ |