| 83d290c5 |
1 | // SPDX-License-Identifier: GPL-2.0 |
| 6f107e4c |
2 | /* |
| 3 | * board/renesas/blanche/qos.c |
| 4 | * |
| 5 | * Copyright (C) 2016 Renesas Electronics Corporation |
| 6f107e4c |
6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <asm/processor.h> |
| 10 | #include <asm/mach-types.h> |
| 11 | #include <asm/io.h> |
| 12 | #include <asm/arch/rmobile.h> |
| 13 | |
| 14 | #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) |
| 15 | enum { |
| 16 | DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04, |
| 17 | DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09, |
| 18 | DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14, |
| 19 | DBSC3_15, |
| 20 | DBSC3_NR, |
| 21 | }; |
| 22 | |
| 23 | static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = { |
| 24 | [DBSC3_00] = DBSC3_0_QOS_R0_BASE, |
| 25 | [DBSC3_01] = DBSC3_0_QOS_R1_BASE, |
| 26 | [DBSC3_02] = DBSC3_0_QOS_R2_BASE, |
| 27 | [DBSC3_03] = DBSC3_0_QOS_R3_BASE, |
| 28 | [DBSC3_04] = DBSC3_0_QOS_R4_BASE, |
| 29 | [DBSC3_05] = DBSC3_0_QOS_R5_BASE, |
| 30 | [DBSC3_06] = DBSC3_0_QOS_R6_BASE, |
| 31 | [DBSC3_07] = DBSC3_0_QOS_R7_BASE, |
| 32 | [DBSC3_08] = DBSC3_0_QOS_R8_BASE, |
| 33 | [DBSC3_09] = DBSC3_0_QOS_R9_BASE, |
| 34 | [DBSC3_10] = DBSC3_0_QOS_R10_BASE, |
| 35 | [DBSC3_11] = DBSC3_0_QOS_R11_BASE, |
| 36 | [DBSC3_12] = DBSC3_0_QOS_R12_BASE, |
| 37 | [DBSC3_13] = DBSC3_0_QOS_R13_BASE, |
| 38 | [DBSC3_14] = DBSC3_0_QOS_R14_BASE, |
| 39 | [DBSC3_15] = DBSC3_0_QOS_R15_BASE, |
| 40 | }; |
| 41 | |
| 42 | static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = { |
| 43 | [DBSC3_00] = DBSC3_0_QOS_W0_BASE, |
| 44 | [DBSC3_01] = DBSC3_0_QOS_W1_BASE, |
| 45 | [DBSC3_02] = DBSC3_0_QOS_W2_BASE, |
| 46 | [DBSC3_03] = DBSC3_0_QOS_W3_BASE, |
| 47 | [DBSC3_04] = DBSC3_0_QOS_W4_BASE, |
| 48 | [DBSC3_05] = DBSC3_0_QOS_W5_BASE, |
| 49 | [DBSC3_06] = DBSC3_0_QOS_W6_BASE, |
| 50 | [DBSC3_07] = DBSC3_0_QOS_W7_BASE, |
| 51 | [DBSC3_08] = DBSC3_0_QOS_W8_BASE, |
| 52 | [DBSC3_09] = DBSC3_0_QOS_W9_BASE, |
| 53 | [DBSC3_10] = DBSC3_0_QOS_W10_BASE, |
| 54 | [DBSC3_11] = DBSC3_0_QOS_W11_BASE, |
| 55 | [DBSC3_12] = DBSC3_0_QOS_W12_BASE, |
| 56 | [DBSC3_13] = DBSC3_0_QOS_W13_BASE, |
| 57 | [DBSC3_14] = DBSC3_0_QOS_W14_BASE, |
| 58 | [DBSC3_15] = DBSC3_0_QOS_W15_BASE, |
| 59 | }; |
| 60 | |
| 61 | void qos_init(void) |
| 62 | { |
| 63 | int i; |
| 64 | struct rcar_s3c *s3c; |
| 65 | struct rcar_s3c_qos *s3c_qos; |
| 66 | struct rcar_dbsc3_qos *qos_addr; |
| 67 | struct rcar_mxi *mxi; |
| 68 | struct rcar_mxi_qos *mxi_qos; |
| 69 | struct rcar_axi_qos *axi_qos; |
| 70 | |
| 71 | /* DBSC DBADJ2 */ |
| 72 | writel(0x20082004, DBSC3_0_DBADJ2); |
| 73 | |
| 74 | /* S3C -QoS */ |
| 75 | s3c = (struct rcar_s3c *)S3C_BASE; |
| 76 | // writel(0x00000000, &s3c->s3cadsplcr); |
| 77 | writel(0x1F0D0C0C, &s3c->s3crorr); |
| 78 | writel(0x1F1F0C0C, &s3c->s3cworr); |
| 79 | |
| 80 | /* QoS Control Registers */ |
| 81 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE; |
| 82 | writel(0x00890089, &s3c_qos->s3cqos0); |
| 83 | writel(0x20960010, &s3c_qos->s3cqos1); |
| 84 | writel(0x20302030, &s3c_qos->s3cqos2); |
| 85 | writel(0x20AA2200, &s3c_qos->s3cqos3); |
| 86 | writel(0x00002032, &s3c_qos->s3cqos4); |
| 87 | writel(0x20960010, &s3c_qos->s3cqos5); |
| 88 | writel(0x20302030, &s3c_qos->s3cqos6); |
| 89 | writel(0x20AA2200, &s3c_qos->s3cqos7); |
| 90 | writel(0x00002032, &s3c_qos->s3cqos8); |
| 91 | |
| 92 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE; |
| 93 | writel(0x00890089, &s3c_qos->s3cqos0); |
| 94 | writel(0x20960010, &s3c_qos->s3cqos1); |
| 95 | writel(0x20302030, &s3c_qos->s3cqos2); |
| 96 | writel(0x20AA2200, &s3c_qos->s3cqos3); |
| 97 | writel(0x00002032, &s3c_qos->s3cqos4); |
| 98 | writel(0x20960010, &s3c_qos->s3cqos5); |
| 99 | writel(0x20302030, &s3c_qos->s3cqos6); |
| 100 | writel(0x20AA2200, &s3c_qos->s3cqos7); |
| 101 | writel(0x00002032, &s3c_qos->s3cqos8); |
| 102 | |
| 103 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE; |
| 104 | writel(0x00820082, &s3c_qos->s3cqos0); |
| 105 | writel(0x20960020, &s3c_qos->s3cqos1); |
| 106 | writel(0x20302030, &s3c_qos->s3cqos2); |
| 107 | writel(0x20AA20DC, &s3c_qos->s3cqos3); |
| 108 | writel(0x00002032, &s3c_qos->s3cqos4); |
| 109 | writel(0x20960020, &s3c_qos->s3cqos5); |
| 110 | writel(0x20302030, &s3c_qos->s3cqos6); |
| 111 | writel(0x20AA20DC, &s3c_qos->s3cqos7); |
| 112 | writel(0x00002032, &s3c_qos->s3cqos8); |
| 113 | |
| 114 | s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE; |
| 115 | writel(0x80918099, &s3c_qos->s3cqos0); |
| 116 | writel(0x20410010, &s3c_qos->s3cqos1); |
| 117 | writel(0x200A2023, &s3c_qos->s3cqos2); |
| 118 | writel(0x20502001, &s3c_qos->s3cqos3); |
| 119 | writel(0x00002032, &s3c_qos->s3cqos4); |
| 120 | writel(0x20410FFF, &s3c_qos->s3cqos5); |
| 121 | writel(0x200A2023, &s3c_qos->s3cqos6); |
| 122 | writel(0x20502001, &s3c_qos->s3cqos7); |
| 123 | writel(0x20142032, &s3c_qos->s3cqos8); |
| 124 | |
| 125 | /* DBSC -QoS */ |
| 126 | /* DBSC0 - Read */ |
| 127 | for (i = DBSC3_00; i < DBSC3_NR; i++) { |
| 128 | qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i]; |
| 129 | writel(0x00000002, &qos_addr->dblgcnt); |
| 130 | writel(0x00002096, &qos_addr->dbtmval0); |
| 131 | writel(0x00002064, &qos_addr->dbtmval1); |
| 132 | writel(0x00002032, &qos_addr->dbtmval2); |
| 133 | writel(0x00001FB0, &qos_addr->dbtmval3); |
| 134 | writel(0x00000001, &qos_addr->dbrqctr); |
| 135 | writel(0x0000204B, &qos_addr->dbthres0); |
| 136 | writel(0x0000204B, &qos_addr->dbthres1); |
| 137 | writel(0x00001FC4, &qos_addr->dbthres2); |
| 138 | writel(0x00000001, &qos_addr->dblgqon); |
| 139 | } |
| 140 | |
| 141 | /* DBSC0 - Write */ |
| 142 | for (i = DBSC3_00; i < DBSC3_NR; i++) { |
| 143 | qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i]; |
| 144 | writel(0x00000002, &qos_addr->dblgcnt); |
| 145 | writel(0x00002096, &qos_addr->dbtmval0); |
| 146 | writel(0x0000206E, &qos_addr->dbtmval1); |
| 147 | writel(0x00002050, &qos_addr->dbtmval2); |
| 148 | writel(0x0000203A, &qos_addr->dbtmval3); |
| 149 | writel(0x00000001, &qos_addr->dbrqctr); |
| 150 | writel(0x0000205A, &qos_addr->dbthres0); |
| 151 | writel(0x0000205A, &qos_addr->dbthres1); |
| 152 | writel(0x0000203C, &qos_addr->dbthres2); |
| 153 | writel(0x00000001, &qos_addr->dblgqon); |
| 154 | } |
| 155 | |
| 156 | /* MXI -QoS */ |
| 157 | /* Transaction Control (MXI) */ |
| 158 | mxi = (struct rcar_mxi *)MXI_BASE; |
| 159 | writel(0x00000100, &mxi->mxaxirtcr); |
| 160 | writel(0xFF530100, &mxi->mxaxiwtcr); |
| 161 | writel(0x00000100, &mxi->mxs3crtcr); |
| 162 | writel(0xFF530100, &mxi->mxs3cwtcr); |
| 163 | writel(0x004000C0, &mxi->mxsaar0); |
| 164 | writel(0x02000800, &mxi->mxsaar1); |
| 165 | |
| 166 | /* QoS Control (MXI) */ |
| 167 | mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE; |
| 168 | writel(0x0000000C, &mxi_qos->du0); |
| 169 | |
| 170 | /* AXI -QoS */ |
| 171 | /* Transaction Control (MXI) */ |
| 172 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE; |
| 173 | writel(0x00000102, &axi_qos->qosconf); |
| 174 | writel(0x0000205F, &axi_qos->qosctset0); |
| 175 | writel(0x00000001, &axi_qos->qosreqctr); |
| 176 | writel(0x00000001, &axi_qos->qosqon); |
| 177 | |
| 178 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE; |
| 179 | writel(0x00000100, &axi_qos->qosconf); |
| 180 | writel(0x00002053, &axi_qos->qosctset0); |
| 181 | writel(0x00000001, &axi_qos->qosreqctr); |
| 182 | writel(0x00000001, &axi_qos->qosqon); |
| 183 | writel(0x00000005, &axi_qos->qosin); |
| 184 | |
| 185 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE; |
| 186 | writel(0x00000100, &axi_qos->qosconf); |
| 187 | writel(0x00002029, &axi_qos->qosctset0); |
| 188 | writel(0x00000001, &axi_qos->qosreqctr); |
| 189 | writel(0x00000001, &axi_qos->qosqon); |
| 190 | writel(0x00000005, &axi_qos->qosin); |
| 191 | |
| 192 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE; |
| 193 | writel(0x00000102, &axi_qos->qosconf); |
| 194 | writel(0x0000205F, &axi_qos->qosctset0); |
| 195 | writel(0x00000001, &axi_qos->qosreqctr); |
| 196 | writel(0x00000001, &axi_qos->qosqon); |
| 197 | writel(0x00000005, &axi_qos->qosin); |
| 198 | |
| 199 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE; |
| 200 | writel(0x00000100, &axi_qos->qosconf); |
| 201 | writel(0x00002053, &axi_qos->qosctset0); |
| 202 | writel(0x00000001, &axi_qos->qosreqctr); |
| 203 | writel(0x00000001, &axi_qos->qosqon); |
| 204 | writel(0x00000005, &axi_qos->qosin); |
| 205 | |
| 206 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE; |
| 207 | writel(0x00000100, &axi_qos->qosconf); |
| 208 | writel(0x000020A6, &axi_qos->qosctset0); |
| 209 | writel(0x00000001, &axi_qos->qosreqctr); |
| 210 | writel(0x00000001, &axi_qos->qosqon); |
| 211 | writel(0x00000005, &axi_qos->qosin); |
| 212 | |
| 213 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE; |
| 214 | writel(0x00000100, &axi_qos->qosconf); |
| 215 | writel(0x000020A6, &axi_qos->qosctset0); |
| 216 | writel(0x00000001, &axi_qos->qosreqctr); |
| 217 | writel(0x00000001, &axi_qos->qosqon); |
| 218 | writel(0x00000005, &axi_qos->qosin); |
| 219 | |
| 220 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE; |
| 221 | writel(0x00000102, &axi_qos->qosconf); |
| 222 | writel(0x0000205F, &axi_qos->qosctset0); |
| 223 | writel(0x00000001, &axi_qos->qosreqctr); |
| 224 | writel(0x00000001, &axi_qos->qosqon); |
| 225 | |
| 226 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE; |
| 227 | writel(0x00000102, &axi_qos->qosconf); |
| 228 | writel(0x0000205F, &axi_qos->qosctset0); |
| 229 | writel(0x00000001, &axi_qos->qosreqctr); |
| 230 | writel(0x00000001, &axi_qos->qosqon); |
| 231 | |
| 232 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE; |
| 233 | writel(0x00000100, &axi_qos->qosconf); |
| 234 | writel(0x0000214C, &axi_qos->qosctset0); |
| 235 | writel(0x00000001, &axi_qos->qosreqctr); |
| 236 | writel(0x00000001, &axi_qos->qosqon); |
| 237 | writel(0x00000005, &axi_qos->qosin); |
| 238 | |
| 239 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE; |
| 240 | writel(0x00000101, &axi_qos->qosconf); |
| 241 | writel(0x00002008, &axi_qos->qosctset0); |
| 242 | writel(0x00000010, &axi_qos->qosreqctr); |
| 243 | writel(0x00000001, &axi_qos->qosqon); |
| 244 | |
| 245 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE; |
| 246 | writel(0x00000101, &axi_qos->qosconf); |
| 247 | writel(0x00002008, &axi_qos->qosctset0); |
| 248 | writel(0x00000010, &axi_qos->qosreqctr); |
| 249 | writel(0x00000001, &axi_qos->qosqon); |
| 250 | |
| 251 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE; |
| 252 | writel(0x00000101, &axi_qos->qosconf); |
| 253 | writel(0x00002008, &axi_qos->qosctset0); |
| 254 | writel(0x00000010, &axi_qos->qosreqctr); |
| 255 | writel(0x00000001, &axi_qos->qosqon); |
| 256 | |
| 257 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE; |
| 258 | writel(0x00000101, &axi_qos->qosconf); |
| 259 | writel(0x00002008, &axi_qos->qosctset0); |
| 260 | writel(0x00000010, &axi_qos->qosreqctr); |
| 261 | writel(0x00000001, &axi_qos->qosqon); |
| 262 | |
| 263 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE; |
| 264 | writel(0x00000102, &axi_qos->qosconf); |
| 265 | writel(0x0000205F, &axi_qos->qosctset0); |
| 266 | writel(0x00000001, &axi_qos->qosreqctr); |
| 267 | writel(0x00000001, &axi_qos->qosqon); |
| 268 | |
| 269 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE; |
| 270 | writel(0x00000000, &axi_qos->qosconf); |
| 271 | writel(0x0000214C, &axi_qos->qosctset0); |
| 272 | writel(0x00000001, &axi_qos->qosreqctr); |
| 273 | writel(0x00000001, &axi_qos->qosqon); |
| 274 | |
| 275 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE; |
| 276 | writel(0x00000000, &axi_qos->qosconf); |
| 277 | writel(0x0000214C, &axi_qos->qosctset0); |
| 278 | writel(0x00000001, &axi_qos->qosreqctr); |
| 279 | writel(0x00000001, &axi_qos->qosqon); |
| 280 | writel(0x00000005, &axi_qos->qosin); |
| 281 | |
| 282 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE; |
| 283 | writel(0x00000000, &axi_qos->qosconf); |
| 284 | writel(0x0000214C, &axi_qos->qosctset0); |
| 285 | writel(0x00000001, &axi_qos->qosreqctr); |
| 286 | writel(0x00000001, &axi_qos->qosqon); |
| 287 | writel(0x00000005, &axi_qos->qosin); |
| 288 | |
| 289 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE; |
| 290 | writel(0x00000000, &axi_qos->qosconf); |
| 291 | writel(0x0000214C, &axi_qos->qosctset0); |
| 292 | writel(0x00000001, &axi_qos->qosreqctr); |
| 293 | writel(0x00000001, &axi_qos->qosqon); |
| 294 | writel(0x00000005, &axi_qos->qosin); |
| 295 | |
| 296 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE; |
| 297 | writel(0x00000100, &axi_qos->qosconf); |
| 298 | writel(0x000020A6, &axi_qos->qosctset0); |
| 299 | writel(0x00000001, &axi_qos->qosreqctr); |
| 300 | writel(0x00000001, &axi_qos->qosqon); |
| 301 | writel(0x00000005, &axi_qos->qosin); |
| 302 | |
| 303 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_ADM_BASE; |
| 304 | writel(0x00000100, &axi_qos->qosconf); |
| 305 | writel(0x0000214C, &axi_qos->qosctset0); |
| 306 | writel(0x00000001, &axi_qos->qosreqctr); |
| 307 | writel(0x00000001, &axi_qos->qosqon); |
| 308 | writel(0x00000005, &axi_qos->qosin); |
| 309 | |
| 310 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_ADS_BASE; |
| 311 | writel(0x00000101, &axi_qos->qosconf); |
| 312 | writel(0x0000214C, &axi_qos->qosctset0); |
| 313 | writel(0x00000020, &axi_qos->qosreqctr); |
| 314 | writel(0x00000001, &axi_qos->qosqon); |
| 315 | writel(0x00000005, &axi_qos->qosin); |
| 316 | |
| 317 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX_BASE; |
| 318 | writel(0x00002041, &axi_qos->qosctset1); |
| 319 | writel(0x00002023, &axi_qos->qosctset2); |
| 320 | writel(0x0000200A, &axi_qos->qosctset3); |
| 321 | writel(0x00002050, &axi_qos->qosthres0); |
| 322 | writel(0x00002032, &axi_qos->qosthres1); |
| 323 | writel(0x00002014, &axi_qos->qosthres2); |
| 324 | |
| 325 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_AXI64TO128W_BASE; |
| 326 | writel(0x00000102, &axi_qos->qosconf); |
| 327 | writel(0x0000205F, &axi_qos->qosctset0); |
| 328 | writel(0x00000001, &axi_qos->qosreqctr); |
| 329 | writel(0x00000001, &axi_qos->qosqon); |
| 330 | |
| 331 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVBW_BASE; |
| 332 | writel(0x00000100, &axi_qos->qosconf); |
| 333 | writel(0x00002053, &axi_qos->qosctset0); |
| 334 | writel(0x00000001, &axi_qos->qosreqctr); |
| 335 | writel(0x00000001, &axi_qos->qosqon); |
| 336 | writel(0x00000005, &axi_qos->qosin); |
| 337 | |
| 338 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50W_BASE; |
| 339 | writel(0x00000100, &axi_qos->qosconf); |
| 340 | writel(0x00002029, &axi_qos->qosctset0); |
| 341 | writel(0x00000001, &axi_qos->qosreqctr); |
| 342 | writel(0x00000001, &axi_qos->qosqon); |
| 343 | writel(0x00000005, &axi_qos->qosin); |
| 344 | |
| 345 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCIW_BASE; |
| 346 | writel(0x00000102, &axi_qos->qosconf); |
| 347 | writel(0x0000205F, &axi_qos->qosctset0); |
| 348 | writel(0x00000001, &axi_qos->qosreqctr); |
| 349 | writel(0x00000001, &axi_qos->qosqon); |
| 350 | writel(0x00000005, &axi_qos->qosin); |
| 351 | |
| 352 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCSW_BASE; |
| 353 | writel(0x00000100, &axi_qos->qosconf); |
| 354 | writel(0x00002053, &axi_qos->qosctset0); |
| 355 | writel(0x00000001, &axi_qos->qosreqctr); |
| 356 | writel(0x00000001, &axi_qos->qosqon); |
| 357 | writel(0x00000005, &axi_qos->qosin); |
| 358 | |
| 359 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2DW_BASE; |
| 360 | writel(0x00000100, &axi_qos->qosconf); |
| 361 | writel(0x000020A6, &axi_qos->qosctset0); |
| 362 | writel(0x00000001, &axi_qos->qosreqctr); |
| 363 | writel(0x00000001, &axi_qos->qosqon); |
| 364 | writel(0x00000005, &axi_qos->qosin); |
| 365 | |
| 366 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0W_BASE; |
| 367 | writel(0x00000102, &axi_qos->qosconf); |
| 368 | writel(0x0000205F, &axi_qos->qosctset0); |
| 369 | writel(0x00000001, &axi_qos->qosreqctr); |
| 370 | writel(0x00000001, &axi_qos->qosqon); |
| 371 | |
| 372 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1W_BASE; |
| 373 | writel(0x00000102, &axi_qos->qosconf); |
| 374 | writel(0x0000205F, &axi_qos->qosctset0); |
| 375 | writel(0x00000001, &axi_qos->qosreqctr); |
| 376 | writel(0x00000001, &axi_qos->qosqon); |
| 377 | |
| 378 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2W_BASE; |
| 379 | writel(0x00000102, &axi_qos->qosconf); |
| 380 | writel(0x0000205F, &axi_qos->qosctset0); |
| 381 | writel(0x00000001, &axi_qos->qosreqctr); |
| 382 | writel(0x00000001, &axi_qos->qosqon); |
| 383 | |
| 384 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBSW_BASE; |
| 385 | writel(0x00000100, &axi_qos->qosconf); |
| 386 | writel(0x0000214C, &axi_qos->qosctset0); |
| 387 | writel(0x00000001, &axi_qos->qosreqctr); |
| 388 | writel(0x00000001, &axi_qos->qosqon); |
| 389 | writel(0x00000005, &axi_qos->qosin); |
| 390 | |
| 391 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTXBW_BASE; |
| 392 | writel(0x00000102, &axi_qos->qosconf); |
| 393 | writel(0x0000205F, &axi_qos->qosctset0); |
| 394 | writel(0x00000001, &axi_qos->qosreqctr); |
| 395 | writel(0x00000001, &axi_qos->qosqon); |
| 396 | |
| 397 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0W_BASE; |
| 398 | writel(0x00000000, &axi_qos->qosconf); |
| 399 | writel(0x0000214C, &axi_qos->qosctset0); |
| 400 | writel(0x00000001, &axi_qos->qosreqctr); |
| 401 | writel(0x00000001, &axi_qos->qosqon); |
| 402 | writel(0x00000005, &axi_qos->qosin); |
| 403 | |
| 404 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1W_BASE; |
| 405 | writel(0x00000000, &axi_qos->qosconf); |
| 406 | writel(0x0000214C, &axi_qos->qosctset0); |
| 407 | writel(0x00000001, &axi_qos->qosreqctr); |
| 408 | writel(0x00000001, &axi_qos->qosqon); |
| 409 | writel(0x00000005, &axi_qos->qosin); |
| 410 | |
| 411 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0W_BASE; |
| 412 | writel(0x00000000, &axi_qos->qosconf); |
| 413 | writel(0x0000214C, &axi_qos->qosctset0); |
| 414 | writel(0x00000001, &axi_qos->qosreqctr); |
| 415 | writel(0x00000001, &axi_qos->qosqon); |
| 416 | writel(0x00000005, &axi_qos->qosin); |
| 417 | |
| 418 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1W_BASE; |
| 419 | writel(0x00000000, &axi_qos->qosconf); |
| 420 | writel(0x0000214C, &axi_qos->qosctset0); |
| 421 | writel(0x00000001, &axi_qos->qosreqctr); |
| 422 | writel(0x00000001, &axi_qos->qosqon); |
| 423 | writel(0x00000005, &axi_qos->qosin); |
| 424 | |
| 425 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRABW_BASE; |
| 426 | writel(0x00000100, &axi_qos->qosconf); |
| 427 | writel(0x000020A6, &axi_qos->qosctset0); |
| 428 | writel(0x00000001, &axi_qos->qosreqctr); |
| 429 | writel(0x00000001, &axi_qos->qosqon); |
| 430 | writel(0x00000005, &axi_qos->qosin); |
| 431 | |
| 432 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_ADMW_BASE; |
| 433 | writel(0x00000100, &axi_qos->qosconf); |
| 434 | writel(0x0000214C, &axi_qos->qosctset0); |
| 435 | writel(0x00000001, &axi_qos->qosreqctr); |
| 436 | writel(0x00000001, &axi_qos->qosqon); |
| 437 | writel(0x00000005, &axi_qos->qosin); |
| 438 | |
| 439 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_ADSW_BASE; |
| 440 | writel(0x00000101, &axi_qos->qosconf); |
| 441 | writel(0x0000214C, &axi_qos->qosctset0); |
| 442 | writel(0x00000020, &axi_qos->qosreqctr); |
| 443 | writel(0x00000001, &axi_qos->qosqon); |
| 444 | writel(0x00000005, &axi_qos->qosin); |
| 445 | |
| 446 | axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYXW_BASE; |
| 447 | writel(0x00002041, &axi_qos->qosctset1); |
| 448 | writel(0x00002023, &axi_qos->qosctset2); |
| 449 | writel(0x0000200A, &axi_qos->qosctset3); |
| 450 | writel(0x00002050, &axi_qos->qosthres0); |
| 451 | writel(0x00002032, &axi_qos->qosthres1); |
| 452 | writel(0x00002014, &axi_qos->qosthres2); |
| 453 | |
| 454 | /* QoS Register (SYS-AXI256) */ |
| 455 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE; |
| 456 | writel(0x00000102, &axi_qos->qosconf); |
| 457 | writel(0x0000205F, &axi_qos->qosctset0); |
| 458 | writel(0x00000001, &axi_qos->qosreqctr); |
| 459 | writel(0x00000001, &axi_qos->qosqon); |
| 460 | |
| 461 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI_BASE; |
| 462 | writel(0x00000102, &axi_qos->qosconf); |
| 463 | writel(0x0000205F, &axi_qos->qosctset0); |
| 464 | writel(0x00000001, &axi_qos->qosreqctr); |
| 465 | writel(0x00000001, &axi_qos->qosqon); |
| 466 | |
| 467 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE; |
| 468 | writel(0x00000102, &axi_qos->qosconf); |
| 469 | writel(0x0000205F, &axi_qos->qosctset0); |
| 470 | writel(0x00000001, &axi_qos->qosreqctr); |
| 471 | writel(0x00000001, &axi_qos->qosqon); |
| 472 | |
| 473 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_IMP0_BASE; |
| 474 | writel(0x00000100, &axi_qos->qosconf); |
| 475 | writel(0x0000211B, &axi_qos->qosctset0); |
| 476 | writel(0x00000001, &axi_qos->qosreqctr); |
| 477 | writel(0x00000001, &axi_qos->qosqon); |
| 478 | writel(0x00000005, &axi_qos->qosin); |
| 479 | |
| 480 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SY2_BASE; |
| 481 | writel(0x00002041, &axi_qos->qosctset1); |
| 482 | writel(0x00002023, &axi_qos->qosctset2); |
| 483 | writel(0x0000200A, &axi_qos->qosctset3); |
| 484 | writel(0x00002050, &axi_qos->qosthres0); |
| 485 | writel(0x00002032, &axi_qos->qosthres1); |
| 486 | writel(0x00002014, &axi_qos->qosthres2); |
| 487 | |
| 488 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256W_AXI128TO256_BASE; |
| 489 | writel(0x00000102, &axi_qos->qosconf); |
| 490 | writel(0x0000205F, &axi_qos->qosctset0); |
| 491 | writel(0x00000001, &axi_qos->qosreqctr); |
| 492 | writel(0x00000001, &axi_qos->qosqon); |
| 493 | |
| 494 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXMW_BASE; |
| 495 | writel(0x00000102, &axi_qos->qosconf); |
| 496 | writel(0x0000205F, &axi_qos->qosctset0); |
| 497 | writel(0x00000001, &axi_qos->qosreqctr); |
| 498 | writel(0x00000001, &axi_qos->qosqon); |
| 499 | |
| 500 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXIW_BASE; |
| 501 | writel(0x00000102, &axi_qos->qosconf); |
| 502 | writel(0x0000205F, &axi_qos->qosctset0); |
| 503 | writel(0x00000001, &axi_qos->qosreqctr); |
| 504 | writel(0x00000001, &axi_qos->qosqon); |
| 505 | |
| 506 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_IMP0W_BASE; |
| 507 | writel(0x00000100, &axi_qos->qosconf); |
| 508 | writel(0x00002029, &axi_qos->qosctset0); |
| 509 | writel(0x00000001, &axi_qos->qosreqctr); |
| 510 | writel(0x00000001, &axi_qos->qosqon); |
| 511 | writel(0x00000005, &axi_qos->qosin); |
| 512 | |
| 513 | axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SY2W_BASE; |
| 514 | writel(0x00002041, &axi_qos->qosctset1); |
| 515 | writel(0x00002023, &axi_qos->qosctset2); |
| 516 | writel(0x0000200A, &axi_qos->qosctset3); |
| 517 | writel(0x00002050, &axi_qos->qosthres0); |
| 518 | writel(0x00002032, &axi_qos->qosthres1); |
| 519 | writel(0x00002014, &axi_qos->qosthres2); |
| 520 | |
| 521 | /* QoS Register (RT-AXI) */ |
| 522 | axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE; |
| 523 | writel(0x00000000, &axi_qos->qosconf); |
| 524 | writel(0x00002055, &axi_qos->qosctset0); |
| 525 | writel(0x00000000, &axi_qos->qosreqctr); |
| 526 | writel(0x00000000, &axi_qos->qosqon); |
| 527 | |
| 528 | axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE; |
| 529 | writel(0x00000000, &axi_qos->qosconf); |
| 530 | writel(0x00002055, &axi_qos->qosctset0); |
| 531 | writel(0x00000000, &axi_qos->qosreqctr); |
| 532 | writel(0x00000000, &axi_qos->qosqon); |
| 533 | |
| 534 | axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE; |
| 535 | writel(0x00000000, &axi_qos->qosconf); |
| 536 | writel(0x00002001, &axi_qos->qosctset0); |
| 537 | writel(0x00000000, &axi_qos->qosreqctr); |
| 538 | writel(0x00000000, &axi_qos->qosqon); |
| 539 | |
| 540 | axi_qos = (struct rcar_axi_qos *)RT_AXI_RT_BASE; |
| 541 | writel(0x00002001, &axi_qos->qosctset1); |
| 542 | writel(0x00002001, &axi_qos->qosctset2); |
| 543 | writel(0x00002001, &axi_qos->qosctset3); |
| 544 | writel(0x00000000, &axi_qos->qosthres0); |
| 545 | writel(0x00000000, &axi_qos->qosthres1); |
| 546 | writel(0x00000000, &axi_qos->qosthres2); |
| 547 | |
| 548 | axi_qos = (struct rcar_axi_qos *)RT_AXI_SHXW_BASE; |
| 549 | writel(0x00000000, &axi_qos->qosconf); |
| 550 | writel(0x00002055, &axi_qos->qosctset0); |
| 551 | writel(0x00000000, &axi_qos->qosreqctr); |
| 552 | writel(0x00000000, &axi_qos->qosqon); |
| 553 | |
| 554 | axi_qos = (struct rcar_axi_qos *)RT_AXI_DBGW_BASE; |
| 555 | writel(0x00000000, &axi_qos->qosconf); |
| 556 | writel(0x00002055, &axi_qos->qosctset0); |
| 557 | writel(0x00000000, &axi_qos->qosreqctr); |
| 558 | writel(0x00000000, &axi_qos->qosqon); |
| 559 | |
| 560 | axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128W_BASE; |
| 561 | writel(0x00000000, &axi_qos->qosconf); |
| 562 | writel(0x00002001, &axi_qos->qosctset0); |
| 563 | writel(0x00000000, &axi_qos->qosreqctr); |
| 564 | writel(0x00000000, &axi_qos->qosqon); |
| 565 | |
| 566 | axi_qos = (struct rcar_axi_qos *)RT_AXI_RTW_BASE; |
| 567 | writel(0x00002001, &axi_qos->qosctset1); |
| 568 | writel(0x00002001, &axi_qos->qosctset2); |
| 569 | writel(0x00002001, &axi_qos->qosctset3); |
| 570 | writel(0x00000000, &axi_qos->qosthres0); |
| 571 | writel(0x00000000, &axi_qos->qosthres1); |
| 572 | writel(0x00000000, &axi_qos->qosthres2); |
| 573 | |
| 574 | /* QoS Register (CCI-AXI) */ |
| 575 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE; |
| 576 | writel(0x00000101, &axi_qos->qosconf); |
| 577 | writel(0x00002008, &axi_qos->qosctset0); |
| 578 | writel(0x00002041, &axi_qos->qosctset1); |
| 579 | writel(0x00002023, &axi_qos->qosctset2); |
| 580 | writel(0x0000200A, &axi_qos->qosctset3); |
| 581 | writel(0x00000010, &axi_qos->qosreqctr); |
| 582 | writel(0x00002050, &axi_qos->qosthres0); |
| 583 | writel(0x00002032, &axi_qos->qosthres1); |
| 584 | writel(0x00002014, &axi_qos->qosthres2); |
| 585 | writel(0x00000001, &axi_qos->qosqon); |
| 586 | |
| 587 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE; |
| 588 | writel(0x00000102, &axi_qos->qosconf); |
| 589 | writel(0x0000205F, &axi_qos->qosctset0); |
| 590 | writel(0x00002041, &axi_qos->qosctset1); |
| 591 | writel(0x00002023, &axi_qos->qosctset2); |
| 592 | writel(0x0000200A, &axi_qos->qosctset3); |
| 593 | writel(0x00000001, &axi_qos->qosreqctr); |
| 594 | writel(0x00002050, &axi_qos->qosthres0); |
| 595 | writel(0x00002032, &axi_qos->qosthres1); |
| 596 | writel(0x00002014, &axi_qos->qosthres2); |
| 597 | writel(0x00000001, &axi_qos->qosqon); |
| 598 | |
| 599 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE; |
| 600 | writel(0x00000101, &axi_qos->qosconf); |
| 601 | writel(0x00002008, &axi_qos->qosctset0); |
| 602 | writel(0x00002041, &axi_qos->qosctset1); |
| 603 | writel(0x00002023, &axi_qos->qosctset2); |
| 604 | writel(0x0000000A, &axi_qos->qosctset3); |
| 605 | writel(0x00000010, &axi_qos->qosreqctr); |
| 606 | writel(0x00002050, &axi_qos->qosthres0); |
| 607 | writel(0x00002032, &axi_qos->qosthres1); |
| 608 | writel(0x00002018, &axi_qos->qosthres2); |
| 609 | writel(0x00000001, &axi_qos->qosqon); |
| 610 | |
| 611 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE; |
| 612 | writel(0x00000101, &axi_qos->qosconf); |
| 613 | writel(0x00002008, &axi_qos->qosctset0); |
| 614 | writel(0x00002041, &axi_qos->qosctset1); |
| 615 | writel(0x00002023, &axi_qos->qosctset2); |
| 616 | writel(0x0000200A, &axi_qos->qosctset3); |
| 617 | writel(0x00000010, &axi_qos->qosreqctr); |
| 618 | writel(0x00002050, &axi_qos->qosthres0); |
| 619 | writel(0x00002032, &axi_qos->qosthres1); |
| 620 | writel(0x00002014, &axi_qos->qosthres2); |
| 621 | writel(0x00000001, &axi_qos->qosqon); |
| 622 | |
| 623 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE; |
| 624 | writel(0x00000101, &axi_qos->qosconf); |
| 625 | writel(0x00002008, &axi_qos->qosctset0); |
| 626 | writel(0x00002041, &axi_qos->qosctset1); |
| 627 | writel(0x00002023, &axi_qos->qosctset2); |
| 628 | writel(0x0000200A, &axi_qos->qosctset3); |
| 629 | writel(0x00000010, &axi_qos->qosreqctr); |
| 630 | writel(0x00002050, &axi_qos->qosthres0); |
| 631 | writel(0x00002032, &axi_qos->qosthres1); |
| 632 | writel(0x00002014, &axi_qos->qosthres2); |
| 633 | writel(0x00000001, &axi_qos->qosqon); |
| 634 | |
| 635 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE; |
| 636 | writel(0x00000102, &axi_qos->qosconf); |
| 637 | writel(0x0000205F, &axi_qos->qosctset0); |
| 638 | writel(0x00002041, &axi_qos->qosctset1); |
| 639 | writel(0x00002023, &axi_qos->qosctset2); |
| 640 | writel(0x0000200A, &axi_qos->qosctset3); |
| 641 | writel(0x00000001, &axi_qos->qosreqctr); |
| 642 | writel(0x00002050, &axi_qos->qosthres0); |
| 643 | writel(0x00002032, &axi_qos->qosthres1); |
| 644 | writel(0x00002014, &axi_qos->qosthres2); |
| 645 | writel(0x00000001, &axi_qos->qosqon); |
| 646 | |
| 647 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE; |
| 648 | writel(0x00000101, &axi_qos->qosconf); |
| 649 | writel(0x00002008, &axi_qos->qosctset0); |
| 650 | writel(0x00002041, &axi_qos->qosctset1); |
| 651 | writel(0x00002023, &axi_qos->qosctset2); |
| 652 | writel(0x0000200A, &axi_qos->qosctset3); |
| 653 | writel(0x00000001, &axi_qos->qosreqctr); |
| 654 | writel(0x00002050, &axi_qos->qosthres0); |
| 655 | writel(0x00002032, &axi_qos->qosthres1); |
| 656 | writel(0x00002014, &axi_qos->qosthres2); |
| 657 | writel(0x00000001, &axi_qos->qosqon); |
| 658 | |
| 659 | axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE; |
| 660 | writel(0x00000101, &axi_qos->qosconf); |
| 661 | writel(0x00002008, &axi_qos->qosctset0); |
| 662 | writel(0x00002041, &axi_qos->qosctset1); |
| 663 | writel(0x00002023, &axi_qos->qosctset2); |
| 664 | writel(0x0000200A, &axi_qos->qosctset3); |
| 665 | writel(0x00000010, &axi_qos->qosreqctr); |
| 666 | writel(0x00002050, &axi_qos->qosthres0); |
| 667 | writel(0x00002032, &axi_qos->qosthres1); |
| 668 | writel(0x00002014, &axi_qos->qosthres2); |
| 669 | writel(0x00000001, &axi_qos->qosqon); |
| 670 | |
| 671 | /* QoS Register (Media-AXI) */ |
| 672 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE; |
| 673 | writel(0x00000102, &axi_qos->qosconf); |
| 674 | writel(0x000020DC, &axi_qos->qosctset0); |
| 675 | writel(0x00002096, &axi_qos->qosctset1); |
| 676 | writel(0x00002030, &axi_qos->qosctset2); |
| 677 | writel(0x00002030, &axi_qos->qosctset3); |
| 678 | writel(0x00000020, &axi_qos->qosreqctr); |
| 679 | writel(0x000020AA, &axi_qos->qosthres0); |
| 680 | writel(0x00002032, &axi_qos->qosthres1); |
| 681 | writel(0x00000001, &axi_qos->qosthres2); |
| 682 | |
| 683 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE; |
| 684 | writel(0x00000102, &axi_qos->qosconf); |
| 685 | writel(0x000020DC, &axi_qos->qosctset0); |
| 686 | writel(0x00002096, &axi_qos->qosctset1); |
| 687 | writel(0x00002030, &axi_qos->qosctset2); |
| 688 | writel(0x00002030, &axi_qos->qosctset3); |
| 689 | writel(0x00000020, &axi_qos->qosreqctr); |
| 690 | writel(0x000020AA, &axi_qos->qosthres0); |
| 691 | writel(0x00002032, &axi_qos->qosthres1); |
| 692 | writel(0x00000001, &axi_qos->qosthres2); |
| 693 | |
| 694 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE; |
| 695 | writel(0x00000001, &axi_qos->qosconf); |
| 696 | writel(0x00002018, &axi_qos->qosctset0); |
| 697 | writel(0x00000020, &axi_qos->qosreqctr); |
| 698 | writel(0x00002006, &axi_qos->qosthres0); |
| 699 | writel(0x00002001, &axi_qos->qosthres1); |
| 700 | writel(0x00000001, &axi_qos->qosthres2); |
| 701 | writel(0x00000001, &axi_qos->qosqon); |
| 702 | |
| 703 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE; |
| 704 | writel(0x00000100, &axi_qos->qosconf); |
| 705 | writel(0x00002259, &axi_qos->qosctset0); |
| 706 | writel(0x00000001, &axi_qos->qosreqctr); |
| 707 | writel(0x00002050, &axi_qos->qosthres0); |
| 708 | writel(0x00002032, &axi_qos->qosthres1); |
| 709 | writel(0x00002014, &axi_qos->qosthres2); |
| 710 | writel(0x00000001, &axi_qos->qosqon); |
| 711 | |
| 712 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCTU0R_BASE; |
| 713 | writel(0x00000100, &axi_qos->qosconf); |
| 714 | writel(0x00002053, &axi_qos->qosctset0); |
| 715 | writel(0x00000001, &axi_qos->qosreqctr); |
| 716 | writel(0x00002050, &axi_qos->qosthres0); |
| 717 | writel(0x00002032, &axi_qos->qosthres1); |
| 718 | writel(0x00002014, &axi_qos->qosthres2); |
| 719 | writel(0x00000001, &axi_qos->qosqon); |
| 720 | |
| 721 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCTU0W_BASE; |
| 722 | writel(0x00000100, &axi_qos->qosconf); |
| 723 | writel(0x00002053, &axi_qos->qosctset0); |
| 724 | writel(0x00000001, &axi_qos->qosreqctr); |
| 725 | writel(0x00002050, &axi_qos->qosthres0); |
| 726 | writel(0x00002032, &axi_qos->qosthres1); |
| 727 | writel(0x00002014, &axi_qos->qosthres2); |
| 728 | writel(0x00000001, &axi_qos->qosqon); |
| 729 | |
| 730 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VDCTU0R_BASE; |
| 731 | writel(0x00000100, &axi_qos->qosconf); |
| 732 | writel(0x00002053, &axi_qos->qosctset0); |
| 733 | writel(0x00000001, &axi_qos->qosreqctr); |
| 734 | writel(0x00002050, &axi_qos->qosthres0); |
| 735 | writel(0x00002032, &axi_qos->qosthres1); |
| 736 | writel(0x00002014, &axi_qos->qosthres2); |
| 737 | writel(0x00000001, &axi_qos->qosqon); |
| 738 | |
| 739 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VDCTU0W_BASE; |
| 740 | writel(0x00000100, &axi_qos->qosconf); |
| 741 | writel(0x00002053, &axi_qos->qosctset0); |
| 742 | writel(0x00000001, &axi_qos->qosreqctr); |
| 743 | writel(0x00002050, &axi_qos->qosthres0); |
| 744 | writel(0x00002032, &axi_qos->qosthres1); |
| 745 | writel(0x00002014, &axi_qos->qosthres2); |
| 746 | writel(0x00000001, &axi_qos->qosqon); |
| 747 | |
| 748 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VDCTU1R_BASE; |
| 749 | writel(0x00000100, &axi_qos->qosconf); |
| 750 | writel(0x00002053, &axi_qos->qosctset0); |
| 751 | writel(0x00000001, &axi_qos->qosreqctr); |
| 752 | writel(0x00002050, &axi_qos->qosthres0); |
| 753 | writel(0x00002032, &axi_qos->qosthres1); |
| 754 | writel(0x00002014, &axi_qos->qosthres2); |
| 755 | writel(0x00000001, &axi_qos->qosqon); |
| 756 | |
| 757 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VDCTU1W_BASE; |
| 758 | writel(0x00000100, &axi_qos->qosconf); |
| 759 | writel(0x00002053, &axi_qos->qosctset0); |
| 760 | writel(0x00000001, &axi_qos->qosreqctr); |
| 761 | writel(0x00002050, &axi_qos->qosthres0); |
| 762 | writel(0x00002032, &axi_qos->qosthres1); |
| 763 | writel(0x00002014, &axi_qos->qosthres2); |
| 764 | writel(0x00000001, &axi_qos->qosqon); |
| 765 | |
| 766 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE; |
| 767 | writel(0x00000101, &axi_qos->qosconf); |
| 768 | writel(0x00002046, &axi_qos->qosctset0); |
| 769 | writel(0x00000020, &axi_qos->qosreqctr); |
| 770 | writel(0x00002050, &axi_qos->qosthres0); |
| 771 | writel(0x00002032, &axi_qos->qosthres1); |
| 772 | writel(0x00002014, &axi_qos->qosthres2); |
| 773 | writel(0x00000001, &axi_qos->qosqon); |
| 774 | |
| 775 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN1W_BASE; |
| 776 | writel(0x00000101, &axi_qos->qosconf); |
| 777 | writel(0x00002046, &axi_qos->qosctset0); |
| 778 | writel(0x00000020, &axi_qos->qosreqctr); |
| 779 | writel(0x00002050, &axi_qos->qosthres0); |
| 780 | writel(0x00002032, &axi_qos->qosthres1); |
| 781 | writel(0x00002014, &axi_qos->qosthres2); |
| 782 | writel(0x00000001, &axi_qos->qosqon); |
| 783 | |
| 784 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_RDRW_BASE; |
| 785 | writel(0x00000101, &axi_qos->qosconf); |
| 786 | writel(0x000020D0, &axi_qos->qosctset0); |
| 787 | writel(0x00000020, &axi_qos->qosreqctr); |
| 788 | writel(0x00002050, &axi_qos->qosthres0); |
| 789 | writel(0x00002032, &axi_qos->qosthres1); |
| 790 | writel(0x00002014, &axi_qos->qosthres2); |
| 791 | writel(0x00000001, &axi_qos->qosqon); |
| 792 | |
| 793 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS01R_BASE; |
| 794 | writel(0x00000101, &axi_qos->qosconf); |
| 795 | writel(0x00002034, &axi_qos->qosctset0); |
| 796 | writel(0x0000000C, &axi_qos->qosreqctr); |
| 797 | writel(0x00002050, &axi_qos->qosthres0); |
| 798 | writel(0x00002032, &axi_qos->qosthres1); |
| 799 | writel(0x00002014, &axi_qos->qosthres2); |
| 800 | writel(0x00000001, &axi_qos->qosqon); |
| 801 | |
| 802 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS01W_BASE; |
| 803 | writel(0x00000101, &axi_qos->qosconf); |
| 804 | writel(0x0000200D, &axi_qos->qosctset0); |
| 805 | writel(0x000000C0, &axi_qos->qosreqctr); |
| 806 | writel(0x00002050, &axi_qos->qosthres0); |
| 807 | writel(0x00002032, &axi_qos->qosthres1); |
| 808 | writel(0x00002014, &axi_qos->qosthres2); |
| 809 | writel(0x00000001, &axi_qos->qosqon); |
| 810 | |
| 811 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS23R_BASE; |
| 812 | writel(0x00000101, &axi_qos->qosconf); |
| 813 | writel(0x00002034, &axi_qos->qosctset0); |
| 814 | writel(0x0000000C, &axi_qos->qosreqctr); |
| 815 | writel(0x00002050, &axi_qos->qosthres0); |
| 816 | writel(0x00002032, &axi_qos->qosthres1); |
| 817 | writel(0x00002014, &axi_qos->qosthres2); |
| 818 | writel(0x00000001, &axi_qos->qosqon); |
| 819 | |
| 820 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS23W_BASE; |
| 821 | writel(0x00000101, &axi_qos->qosconf); |
| 822 | writel(0x0000200D, &axi_qos->qosctset0); |
| 823 | writel(0x000000C0, &axi_qos->qosreqctr); |
| 824 | writel(0x00002050, &axi_qos->qosthres0); |
| 825 | writel(0x00002032, &axi_qos->qosthres1); |
| 826 | writel(0x00002014, &axi_qos->qosthres2); |
| 827 | writel(0x00000001, &axi_qos->qosqon); |
| 828 | |
| 829 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS45R_BASE; |
| 830 | writel(0x00000101, &axi_qos->qosconf); |
| 831 | writel(0x00002034, &axi_qos->qosctset0); |
| 832 | writel(0x0000000C, &axi_qos->qosreqctr); |
| 833 | writel(0x00002050, &axi_qos->qosthres0); |
| 834 | writel(0x00002032, &axi_qos->qosthres1); |
| 835 | writel(0x00002014, &axi_qos->qosthres2); |
| 836 | writel(0x00000001, &axi_qos->qosqon); |
| 837 | |
| 838 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMS45W_BASE; |
| 839 | writel(0x00000101, &axi_qos->qosconf); |
| 840 | writel(0x0000200D, &axi_qos->qosctset0); |
| 841 | writel(0x000000C0, &axi_qos->qosreqctr); |
| 842 | writel(0x00002050, &axi_qos->qosthres0); |
| 843 | writel(0x00002032, &axi_qos->qosthres1); |
| 844 | writel(0x00002014, &axi_qos->qosthres2); |
| 845 | writel(0x00000001, &axi_qos->qosqon); |
| 846 | |
| 847 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE; |
| 848 | writel(0x00000100, &axi_qos->qosconf); |
| 849 | writel(0x00002069, &axi_qos->qosctset0); |
| 850 | writel(0x00000001, &axi_qos->qosreqctr); |
| 851 | writel(0x00002050, &axi_qos->qosthres0); |
| 852 | writel(0x00002032, &axi_qos->qosthres1); |
| 853 | writel(0x00002014, &axi_qos->qosthres2); |
| 854 | writel(0x00000001, &axi_qos->qosqon); |
| 855 | |
| 856 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE; |
| 857 | writel(0x00000100, &axi_qos->qosconf); |
| 858 | writel(0x00002069, &axi_qos->qosctset0); |
| 859 | writel(0x00000001, &axi_qos->qosreqctr); |
| 860 | writel(0x00002050, &axi_qos->qosthres0); |
| 861 | writel(0x00002032, &axi_qos->qosthres1); |
| 862 | writel(0x00002014, &axi_qos->qosthres2); |
| 863 | writel(0x00000001, &axi_qos->qosqon); |
| 864 | |
| 865 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE4R_BASE; |
| 866 | writel(0x00000100, &axi_qos->qosconf); |
| 867 | writel(0x0000204C, &axi_qos->qosctset0); |
| 868 | writel(0x00000001, &axi_qos->qosreqctr); |
| 869 | writel(0x00002050, &axi_qos->qosthres0); |
| 870 | writel(0x00002032, &axi_qos->qosthres1); |
| 871 | writel(0x00002014, &axi_qos->qosthres2); |
| 872 | writel(0x00000001, &axi_qos->qosqon); |
| 873 | |
| 874 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE4W_BASE; |
| 875 | writel(0x00000100, &axi_qos->qosconf); |
| 876 | writel(0x00002200, &axi_qos->qosctset0); |
| 877 | writel(0x00000001, &axi_qos->qosreqctr); |
| 878 | writel(0x00002050, &axi_qos->qosthres0); |
| 879 | writel(0x00002032, &axi_qos->qosthres1); |
| 880 | writel(0x00002014, &axi_qos->qosthres2); |
| 881 | writel(0x00000001, &axi_qos->qosqon); |
| 882 | |
| 883 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC4R_BASE; |
| 884 | writel(0x00000100, &axi_qos->qosconf); |
| 885 | writel(0x00002455, &axi_qos->qosctset0); |
| 886 | writel(0x00000001, &axi_qos->qosreqctr); |
| 887 | writel(0x00002050, &axi_qos->qosthres0); |
| 888 | writel(0x00002032, &axi_qos->qosthres1); |
| 889 | writel(0x00002014, &axi_qos->qosthres2); |
| 890 | writel(0x00000001, &axi_qos->qosqon); |
| 891 | |
| 892 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC4W_BASE; |
| 893 | writel(0x00000100, &axi_qos->qosconf); |
| 894 | writel(0x00002455, &axi_qos->qosctset0); |
| 895 | writel(0x00000001, &axi_qos->qosreqctr); |
| 896 | writel(0x00002050, &axi_qos->qosthres0); |
| 897 | writel(0x00002032, &axi_qos->qosthres1); |
| 898 | writel(0x00002014, &axi_qos->qosthres2); |
| 899 | writel(0x00000001, &axi_qos->qosqon); |
| 900 | |
| 901 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE; |
| 902 | writel(0x00000101, &axi_qos->qosconf); |
| 903 | writel(0x00002034, &axi_qos->qosctset0); |
| 904 | writel(0x00000008, &axi_qos->qosreqctr); |
| 905 | writel(0x00002050, &axi_qos->qosthres0); |
| 906 | writel(0x00002032, &axi_qos->qosthres1); |
| 907 | writel(0x00002014, &axi_qos->qosthres2); |
| 908 | writel(0x00000001, &axi_qos->qosqon); |
| 909 | |
| 910 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE; |
| 911 | writel(0x00000101, &axi_qos->qosconf); |
| 912 | writel(0x000020D3, &axi_qos->qosctset0); |
| 913 | writel(0x00000008, &axi_qos->qosreqctr); |
| 914 | writel(0x00002050, &axi_qos->qosthres0); |
| 915 | writel(0x00002032, &axi_qos->qosthres1); |
| 916 | writel(0x00002014, &axi_qos->qosthres2); |
| 917 | writel(0x00000001, &axi_qos->qosqon); |
| 918 | |
| 919 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE; |
| 920 | writel(0x00000101, &axi_qos->qosconf); |
| 921 | writel(0x00002034, &axi_qos->qosctset0); |
| 922 | writel(0x00000008, &axi_qos->qosreqctr); |
| 923 | writel(0x00002050, &axi_qos->qosthres0); |
| 924 | writel(0x00002032, &axi_qos->qosthres1); |
| 925 | writel(0x00002014, &axi_qos->qosthres2); |
| 926 | writel(0x00000001, &axi_qos->qosqon); |
| 927 | |
| 928 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE; |
| 929 | writel(0x00000101, &axi_qos->qosconf); |
| 930 | writel(0x000020D3, &axi_qos->qosctset0); |
| 931 | writel(0x00000008, &axi_qos->qosreqctr); |
| 932 | writel(0x00002050, &axi_qos->qosthres0); |
| 933 | writel(0x00002032, &axi_qos->qosthres1); |
| 934 | writel(0x00002014, &axi_qos->qosthres2); |
| 935 | writel(0x00000001, &axi_qos->qosqon); |
| 936 | |
| 937 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE; |
| 938 | writel(0x00000101, &axi_qos->qosconf); |
| 939 | writel(0x0000201A, &axi_qos->qosctset0); |
| 940 | writel(0x00000018, &axi_qos->qosreqctr); |
| 941 | writel(0x00002050, &axi_qos->qosthres0); |
| 942 | writel(0x00002032, &axi_qos->qosthres1); |
| 943 | writel(0x00002014, &axi_qos->qosthres2); |
| 944 | writel(0x00000001, &axi_qos->qosqon); |
| 945 | |
| 946 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE; |
| 947 | writel(0x00000101, &axi_qos->qosconf); |
| 948 | writel(0x00002006, &axi_qos->qosctset0); |
| 949 | writel(0x00000018, &axi_qos->qosreqctr); |
| 950 | writel(0x00002050, &axi_qos->qosthres0); |
| 951 | writel(0x00002032, &axi_qos->qosthres1); |
| 952 | writel(0x00002014, &axi_qos->qosthres2); |
| 953 | writel(0x00000001, &axi_qos->qosqon); |
| 954 | |
| 955 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0R_BASE; |
| 956 | writel(0x00000100, &axi_qos->qosconf); |
| 957 | writel(0x0000201A, &axi_qos->qosctset0); |
| 958 | writel(0x00000001, &axi_qos->qosreqctr); |
| 959 | writel(0x00002050, &axi_qos->qosthres0); |
| 960 | writel(0x00002032, &axi_qos->qosthres1); |
| 961 | writel(0x00002014, &axi_qos->qosthres2); |
| 962 | writel(0x00000001, &axi_qos->qosqon); |
| 963 | |
| 964 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP0W_BASE; |
| 965 | writel(0x00000100, &axi_qos->qosconf); |
| 966 | writel(0x00002042, &axi_qos->qosctset0); |
| 967 | writel(0x00000001, &axi_qos->qosreqctr); |
| 968 | writel(0x00002050, &axi_qos->qosthres0); |
| 969 | writel(0x00002032, &axi_qos->qosthres1); |
| 970 | writel(0x00002014, &axi_qos->qosthres2); |
| 971 | writel(0x00000001, &axi_qos->qosqon); |
| 972 | |
| 973 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE0R_BASE; |
| 974 | writel(0x00000100, &axi_qos->qosconf); |
| 975 | writel(0x0000204C, &axi_qos->qosctset0); |
| 976 | writel(0x00000001, &axi_qos->qosreqctr); |
| 977 | writel(0x00002050, &axi_qos->qosthres0); |
| 978 | writel(0x00002032, &axi_qos->qosthres1); |
| 979 | writel(0x00002014, &axi_qos->qosthres2); |
| 980 | writel(0x00000001, &axi_qos->qosqon); |
| 981 | |
| 982 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE0W_BASE; |
| 983 | writel(0x00000100, &axi_qos->qosconf); |
| 984 | writel(0x00002200, &axi_qos->qosctset0); |
| 985 | writel(0x00000001, &axi_qos->qosreqctr); |
| 986 | writel(0x00002050, &axi_qos->qosthres0); |
| 987 | writel(0x00002032, &axi_qos->qosthres1); |
| 988 | writel(0x00002014, &axi_qos->qosthres2); |
| 989 | writel(0x00000001, &axi_qos->qosqon); |
| 990 | |
| 991 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC0R_BASE; |
| 992 | writel(0x00000100, &axi_qos->qosconf); |
| 993 | writel(0x00002455, &axi_qos->qosctset0); |
| 994 | writel(0x00000001, &axi_qos->qosreqctr); |
| 995 | writel(0x00002050, &axi_qos->qosthres0); |
| 996 | writel(0x00002032, &axi_qos->qosthres1); |
| 997 | writel(0x00002014, &axi_qos->qosthres2); |
| 998 | writel(0x00000001, &axi_qos->qosqon); |
| 999 | |
| 1000 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC0W_BASE; |
| 1001 | writel(0x00000100, &axi_qos->qosconf); |
| 1002 | writel(0x00002455, &axi_qos->qosctset0); |
| 1003 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1004 | writel(0x00002050, &axi_qos->qosthres0); |
| 1005 | writel(0x00002032, &axi_qos->qosthres1); |
| 1006 | writel(0x00002014, &axi_qos->qosthres2); |
| 1007 | writel(0x00000001, &axi_qos->qosqon); |
| 1008 | |
| 1009 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE1R_BASE; |
| 1010 | writel(0x00000100, &axi_qos->qosconf); |
| 1011 | writel(0x0000204C, &axi_qos->qosctset0); |
| 1012 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1013 | writel(0x00002050, &axi_qos->qosthres0); |
| 1014 | writel(0x00002032, &axi_qos->qosthres1); |
| 1015 | writel(0x00002014, &axi_qos->qosthres2); |
| 1016 | writel(0x00000001, &axi_qos->qosqon); |
| 1017 | |
| 1018 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE1W_BASE; |
| 1019 | writel(0x00000100, &axi_qos->qosconf); |
| 1020 | writel(0x00002200, &axi_qos->qosctset0); |
| 1021 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1022 | writel(0x00002050, &axi_qos->qosthres0); |
| 1023 | writel(0x00002032, &axi_qos->qosthres1); |
| 1024 | writel(0x00002014, &axi_qos->qosthres2); |
| 1025 | writel(0x00000001, &axi_qos->qosqon); |
| 1026 | |
| 1027 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC1R_BASE; |
| 1028 | writel(0x00000100, &axi_qos->qosconf); |
| 1029 | writel(0x00002455, &axi_qos->qosctset0); |
| 1030 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1031 | writel(0x00002050, &axi_qos->qosthres0); |
| 1032 | writel(0x00002032, &axi_qos->qosthres1); |
| 1033 | writel(0x00002014, &axi_qos->qosthres2); |
| 1034 | writel(0x00000001, &axi_qos->qosqon); |
| 1035 | |
| 1036 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC1W_BASE; |
| 1037 | writel(0x00000100, &axi_qos->qosconf); |
| 1038 | writel(0x00002455, &axi_qos->qosctset0); |
| 1039 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1040 | writel(0x00002050, &axi_qos->qosthres0); |
| 1041 | writel(0x00002032, &axi_qos->qosthres1); |
| 1042 | writel(0x00002014, &axi_qos->qosthres2); |
| 1043 | writel(0x00000001, &axi_qos->qosqon); |
| 1044 | |
| 1045 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE2R_BASE; |
| 1046 | writel(0x00000100, &axi_qos->qosconf); |
| 1047 | writel(0x0000204C, &axi_qos->qosctset0); |
| 1048 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1049 | writel(0x00002050, &axi_qos->qosthres0); |
| 1050 | writel(0x00002032, &axi_qos->qosthres1); |
| 1051 | writel(0x00002014, &axi_qos->qosthres2); |
| 1052 | writel(0x00000001, &axi_qos->qosqon); |
| 1053 | |
| 1054 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE2W_BASE; |
| 1055 | writel(0x00000100, &axi_qos->qosconf); |
| 1056 | writel(0x00002200, &axi_qos->qosctset0); |
| 1057 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1058 | writel(0x00002050, &axi_qos->qosthres0); |
| 1059 | writel(0x00002032, &axi_qos->qosthres1); |
| 1060 | writel(0x00002014, &axi_qos->qosthres2); |
| 1061 | writel(0x00000001, &axi_qos->qosqon); |
| 1062 | |
| 1063 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC2R_BASE; |
| 1064 | writel(0x00000100, &axi_qos->qosconf); |
| 1065 | writel(0x00002455, &axi_qos->qosctset0); |
| 1066 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1067 | writel(0x00002050, &axi_qos->qosthres0); |
| 1068 | writel(0x00002032, &axi_qos->qosthres1); |
| 1069 | writel(0x00002014, &axi_qos->qosthres2); |
| 1070 | writel(0x00000001, &axi_qos->qosqon); |
| 1071 | |
| 1072 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC2W_BASE; |
| 1073 | writel(0x00000100, &axi_qos->qosconf); |
| 1074 | writel(0x00002455, &axi_qos->qosctset0); |
| 1075 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1076 | writel(0x00002050, &axi_qos->qosthres0); |
| 1077 | writel(0x00002032, &axi_qos->qosthres1); |
| 1078 | writel(0x00002014, &axi_qos->qosthres2); |
| 1079 | writel(0x00000001, &axi_qos->qosqon); |
| 1080 | |
| 1081 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE3R_BASE; |
| 1082 | writel(0x00000100, &axi_qos->qosconf); |
| 1083 | writel(0x0000204C, &axi_qos->qosctset0); |
| 1084 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1085 | writel(0x00002050, &axi_qos->qosthres0); |
| 1086 | writel(0x00002032, &axi_qos->qosthres1); |
| 1087 | writel(0x00002014, &axi_qos->qosthres2); |
| 1088 | writel(0x00000001, &axi_qos->qosqon); |
| 1089 | |
| 1090 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTCE3W_BASE; |
| 1091 | writel(0x00000100, &axi_qos->qosconf); |
| 1092 | writel(0x00002200, &axi_qos->qosctset0); |
| 1093 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1094 | writel(0x00002050, &axi_qos->qosthres0); |
| 1095 | writel(0x00002032, &axi_qos->qosthres1); |
| 1096 | writel(0x00002014, &axi_qos->qosthres2); |
| 1097 | writel(0x00000001, &axi_qos->qosqon); |
| 1098 | |
| 1099 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC3R_BASE; |
| 1100 | writel(0x00000100, &axi_qos->qosconf); |
| 1101 | writel(0x00002455, &axi_qos->qosctset0); |
| 1102 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1103 | writel(0x00002050, &axi_qos->qosthres0); |
| 1104 | writel(0x00002032, &axi_qos->qosthres1); |
| 1105 | writel(0x00002014, &axi_qos->qosthres2); |
| 1106 | writel(0x00000001, &axi_qos->qosqon); |
| 1107 | |
| 1108 | axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_ROTVLC3W_BASE; |
| 1109 | writel(0x00000100, &axi_qos->qosconf); |
| 1110 | writel(0x00002455, &axi_qos->qosctset0); |
| 1111 | writel(0x00000001, &axi_qos->qosreqctr); |
| 1112 | writel(0x00002050, &axi_qos->qosthres0); |
| 1113 | writel(0x00002032, &axi_qos->qosthres1); |
| 1114 | writel(0x00002014, &axi_qos->qosthres2); |
| 1115 | writel(0x00000001, &axi_qos->qosqon); |
| 1116 | |
| 1117 | /* DMS Register(SYS-AXI) */ |
| 1118 | writel(0x00000000, SYS_AXI_AVBDMSCR); |
| 1119 | writel(0x00000000, SYS_AXI_AX2MDMSCR); |
| 1120 | writel(0x00000000, SYS_AXI_CC50DMSCR); |
| 1121 | writel(0x00000000, SYS_AXI_CCIDMSCR); |
| 1122 | writel(0x00000000, SYS_AXI_CSDMSCR); |
| 1123 | writel(0x00000000, SYS_AXI_G2DDMSCR); |
| 1124 | writel(0x00000000, SYS_AXI_IMP1DMSCR); |
| 1125 | writel(0x00000000, SYS_AXI_LBSMDMSCR); |
| 1126 | writel(0x00000000, SYS_AXI_MMUDSDMSCR); |
| 1127 | writel(0x00000000, SYS_AXI_MMUMXDMSCR); |
| 1128 | writel(0x00000000, SYS_AXI_MMUS0DMSCR); |
| 1129 | writel(0x00000000, SYS_AXI_MMUS1DMSCR); |
| 1130 | writel(0x00000000, SYS_AXI_RTMXDMSCR); |
| 1131 | writel(0x00000000, SYS_AXI_SDM0DMSCR); |
| 1132 | writel(0x00000000, SYS_AXI_SDM1DMSCR); |
| 1133 | writel(0x00000000, SYS_AXI_SDS0DMSCR); |
| 1134 | writel(0x00000000, SYS_AXI_SDS1DMSCR); |
| 1135 | writel(0x00000000, SYS_AXI_TRABDMSCR); |
| 1136 | writel(0x00000000, SYS_AXI_X128TO64SLVDMSCR); |
| 1137 | writel(0x00000000, SYS_AXI_X64TO128SLVDMSCR); |
| 1138 | writel(0x00000000, SYS_AXI_AVBSLVDMSCR); |
| 1139 | writel(0x00000000, SYS_AXI_AX2SLVDMSCR); |
| 1140 | writel(0x00000000, SYS_AXI_GICSLVDMSCR); |
| 1141 | writel(0x00000000, SYS_AXI_IMPSLVDMSCR); |
| 1142 | writel(0x00000000, SYS_AXI_IMPSLVDMSCR); |
| 1143 | writel(0x00000000, SYS_AXI_IMX0SLVDMSCR); |
| 1144 | writel(0x00000000, SYS_AXI_IMX1SLVDMSCR); |
| 1145 | writel(0x00000000, SYS_AXI_IMX2SLVDMSCR); |
| 1146 | writel(0x00000000, SYS_AXI_LBSSLVDMSCR); |
| 1147 | writel(0x00000000, SYS_AXI_MXTSLVDMSCR); |
| 1148 | writel(0x00000000, SYS_AXI_SYAPBSLVDMSCR); |
| 1149 | writel(0x00000000, SYS_AXI_QSAPBSLVDMSCR); |
| 1150 | writel(0x00000000, SYS_AXI_RTXSLVDMSCR); |
| 1151 | writel(0x00000000, SYS_AXI_SAPC1SLVDMSCR); |
| 1152 | writel(0x00000000, SYS_AXI_SAPC2SLVDMSCR); |
| 1153 | writel(0x00000000, SYS_AXI_SAPC3SLVDMSCR); |
| 1154 | writel(0x00000000, SYS_AXI_SAPC65SLVDMSCR); |
| 1155 | writel(0x00000000, SYS_AXI_SAPC8SLVDMSCR); |
| 1156 | writel(0x00000000, SYS_AXI_SDAP0SLVDMSCR); |
| 1157 | writel(0x00000000, SYS_AXI_SGXSLV1SLVDMSCR); |
| 1158 | writel(0x00000000, SYS_AXI_STBSLVDMSCR); |
| 1159 | writel(0x00000000, SYS_AXI_STMSLVDMSCR); |
| 1160 | writel(0x00000000, SYS_AXI_SYXXDEFAULTSLAVESLVDMSCR); |
| 1161 | writel(0x00000000, SYS_AXI_TSPL0SLVDMSCR); |
| 1162 | writel(0x00000000, SYS_AXI_TSPL1SLVDMSCR); |
| 1163 | writel(0x00000000, SYS_AXI_TSPL2SLVDMSCR); |
| 1164 | writel(0x00000000, SYS_AXI_UTLBDSSLVDMSCR); |
| 1165 | writel(0x00000000, SYS_AXI_UTLBS0SLVDMSCR); |
| 1166 | writel(0x00000000, SYS_AXI_UTLBS1SLVDMSCR); |
| 1167 | writel(0x00000000, SYS_AXI_ROT0DMSCR); |
| 1168 | writel(0x00000000, SYS_AXI_ROT1DMSCR); |
| 1169 | writel(0x00000000, SYS_AXI_ROT2DMSCR); |
| 1170 | writel(0x00000000, SYS_AXI_ROT3DMSCR); |
| 1171 | writel(0x00000000, SYS_AXI_ROT4DMSCR); |
| 1172 | writel(0x00000000, SYS_AXI_IMUX3SLVDMSCR); |
| 1173 | writel(0x00000000, SYS_AXI_STBR0SLVDMSCR); |
| 1174 | writel(0x00000000, SYS_AXI_STBR0PSLVDMSCR); |
| 1175 | writel(0x00000000, SYS_AXI_STBR0XSLVDMSCR); |
| 1176 | writel(0x00000000, SYS_AXI_STBR1SLVDMSCR); |
| 1177 | writel(0x00000000, SYS_AXI_STBR1PSLVDMSCR); |
| 1178 | writel(0x00000000, SYS_AXI_STBR1XSLVDMSCR); |
| 1179 | writel(0x00000000, SYS_AXI_STBR2SLVDMSCR); |
| 1180 | writel(0x00000000, SYS_AXI_STBR2PSLVDMSCR); |
| 1181 | writel(0x00000000, SYS_AXI_STBR2XSLVDMSCR); |
| 1182 | writel(0x00000000, SYS_AXI_STBR3SLVDMSCR); |
| 1183 | writel(0x00000000, SYS_AXI_STBR3PSLVDMSCR); |
| 1184 | writel(0x00000000, SYS_AXI_STBR3XSLVDMSCR); |
| 1185 | writel(0x00000000, SYS_AXI_STBR4SLVDMSCR); |
| 1186 | writel(0x00000000, SYS_AXI_STBR4PSLVDMSCR); |
| 1187 | writel(0x00000000, SYS_AXI_STBR4XSLVDMSCR); |
| 1188 | writel(0x00000000, SYS_AXI_ADM_DMSCR); |
| 1189 | writel(0x00000000, SYS_AXI_ADS_DMSCR); |
| 1190 | |
| 1191 | /* DMS Register(RT-AXI) */ |
| 1192 | writel(0x00000000, DM_AXI_DMAXICONF); |
| 1193 | writel(0x00000019, DM_AXI_DMAPBCONF); |
| 1194 | writel(0x00000000, DM_AXI_DMADMCONF); |
| 1195 | writel(0x00000000, DM_AXI_DMSDM0CONF); |
| 1196 | writel(0x00000000, DM_AXI_DMSDM1CONF); |
| 1197 | writel(0x00000004, DM_AXI_DMQSPAPSLVCONF); |
| 1198 | writel(0x00000004, DM_AXI_RAPD4SLVCONF); |
| 1199 | writel(0x00000004, DM_AXI_SAPD4SLVCONF); |
| 1200 | writel(0x00000004, DM_AXI_SAPD5SLVCONF); |
| 1201 | writel(0x00000004, DM_AXI_SAPD6SLVCONF); |
| 1202 | writel(0x00000004, DM_AXI_SAPD65DSLVCONF); |
| 1203 | writel(0x00000004, DM_AXI_SDAP0SLVCONF); |
| 1204 | writel(0x00000004, DM_AXI_MAPD2SLVCONF); |
| 1205 | writel(0x00000004, DM_AXI_MAPD3SLVCONF); |
| 1206 | writel(0x00000000, DM_AXI_DMXXDEFAULTSLAVESLVCONF); |
| 1207 | writel(0x00000100, DM_AXI_DMADMRQOSCONF); |
| 1208 | writel(0x0000214C, DM_AXI_DMADMRQOSCTSET0); |
| 1209 | writel(0x00000001, DM_AXI_DMADMRQOSREQCTR); |
| 1210 | writel(0x00000001, DM_AXI_DMADMRQOSQON); |
| 1211 | writel(0x00000005, DM_AXI_DMADMRQOSIN); |
| 1212 | writel(0x00000000, DM_AXI_DMADMRQOSSTAT); |
| 1213 | writel(0x00000000, DM_AXI_DMSDM0RQOSCONF); |
| 1214 | writel(0x0000214C, DM_AXI_DMSDM0RQOSCTSET0); |
| 1215 | writel(0x00000001, DM_AXI_DMSDM0RQOSREQCTR); |
| 1216 | writel(0x00000001, DM_AXI_DMSDM0RQOSQON); |
| 1217 | writel(0x00000005, DM_AXI_DMSDM0RQOSIN); |
| 1218 | writel(0x00000000, DM_AXI_DMSDM0RQOSSTAT); |
| 1219 | writel(0x00000000, DM_AXI_DMSDM1RQOSCONF); |
| 1220 | writel(0x0000214C, DM_AXI_DMSDM1RQOSCTSET0); |
| 1221 | writel(0x00000001, DM_AXI_DMSDM1RQOSREQCTR); |
| 1222 | writel(0x00000001, DM_AXI_DMSDM1RQOSQON); |
| 1223 | writel(0x00000005, DM_AXI_DMSDM1RQOSIN); |
| 1224 | writel(0x00000000, DM_AXI_DMSDM1RQOSSTAT); |
| 1225 | writel(0x00002041, DM_AXI_DMRQOSCTSET1); |
| 1226 | writel(0x00002023, DM_AXI_DMRQOSCTSET2); |
| 1227 | writel(0x0000200A, DM_AXI_DMRQOSCTSET3); |
| 1228 | writel(0x00002050, DM_AXI_DMRQOSTHRES0); |
| 1229 | writel(0x00002032, DM_AXI_DMRQOSTHRES1); |
| 1230 | writel(0x00002014, DM_AXI_DMRQOSTHRES2); |
| 1231 | writel(0x00000100, DM_AXI_DMADMWQOSCONF); |
| 1232 | writel(0x0000214C, DM_AXI_DMADMWQOSCTSET0); |
| 1233 | writel(0x00000001, DM_AXI_DMADMWQOSREQCTR); |
| 1234 | writel(0x00000001, DM_AXI_DMADMWQOSQON); |
| 1235 | writel(0x00000005, DM_AXI_DMADMWQOSIN); |
| 1236 | writel(0x00000000, DM_AXI_DMADMWQOSSTAT); |
| 1237 | writel(0x00000000, DM_AXI_DMSDM0WQOSCONF); |
| 1238 | writel(0x0000214C, DM_AXI_DMSDM0WQOSCTSET0); |
| 1239 | writel(0x00000001, DM_AXI_DMSDM0WQOSREQCTR); |
| 1240 | writel(0x00000001, DM_AXI_DMSDM0WQOSQON); |
| 1241 | writel(0x00000005, DM_AXI_DMSDM0WQOSIN); |
| 1242 | writel(0x00000000, DM_AXI_DMSDM0WQOSSTAT); |
| 1243 | writel(0x00000000, DM_AXI_DMSDM1WQOSCONF); |
| 1244 | writel(0x0000214C, DM_AXI_DMSDM1WQOSCTSET0); |
| 1245 | writel(0x00000001, DM_AXI_DMSDM1WQOSREQCTR); |
| 1246 | writel(0x00000001, DM_AXI_DMSDM1WQOSQON); |
| 1247 | writel(0x00000005, DM_AXI_DMSDM1WQOSIN); |
| 1248 | writel(0x00000000, DM_AXI_DMSDM1WQOSSTAT); |
| 1249 | writel(0x00002041, DM_AXI_DMWQOSCTSET1); |
| 1250 | writel(0x00002023, DM_AXI_DMWQOSCTSET2); |
| 1251 | writel(0x0000200A, DM_AXI_DMWQOSCTSET3); |
| 1252 | writel(0x00002050, DM_AXI_DMWQOSTHRES0); |
| 1253 | writel(0x00002032, DM_AXI_DMWQOSTHRES1); |
| 1254 | writel(0x00002014, DM_AXI_DMWQOSTHRES2); |
| 1255 | writel(0x00000000, DM_AXI_RDMDMSCR); |
| 1256 | writel(0x00000000, DM_AXI_SDM0DMSCR); |
| 1257 | writel(0x00000000, DM_AXI_SDM1DMSCR); |
| 1258 | writel(0x00000000, DM_AXI_DMQSPAPSLVDMSCR); |
| 1259 | writel(0x00000000, DM_AXI_RAPD4SLVDMSCR); |
| 1260 | writel(0x00000000, DM_AXI_SAPD4SLVDMSCR); |
| 1261 | writel(0x00000000, DM_AXI_SAPD5SLVDMSCR); |
| 1262 | writel(0x00000000, DM_AXI_SAPD6SLVDMSCR); |
| 1263 | writel(0x00000000, DM_AXI_SAPD65DSLVDMSCR); |
| 1264 | writel(0x00000000, DM_AXI_SDAP0SLVDMSCR); |
| 1265 | writel(0x00000000, DM_AXI_MAPD2SLVDMSCR); |
| 1266 | writel(0x00000000, DM_AXI_MAPD3SLVDMSCR); |
| 1267 | writel(0x00000000, DM_AXI_DMXXDEFAULTSLAVESLVDMSCR); |
| 1268 | writel(0x00000001, DM_AXI_DMXREGDMSENN); |
| 1269 | |
| 1270 | /* DMS Register(SYS-AXI256) */ |
| 1271 | writel(0x00000000, SYS_AXI256_SYXDMSCR); |
| 1272 | writel(0x00000000, SYS_AXI256_MXIDMSCR); |
| 1273 | writel(0x00000000, SYS_AXI256_X128TO256SLVDMSCR); |
| 1274 | writel(0x00000000, SYS_AXI256_X256TO128SLVDMSCR); |
| 1275 | writel(0x00000000, SYS_AXI256_SYXSLVDMSCR); |
| 1276 | writel(0x00000000, SYS_AXI256_CCXSLVDMSCR); |
| 1277 | writel(0x00000000, SYS_AXI256_S3CSLVDMSCR); |
| 1278 | |
| 1279 | /* DMS Register(MXT) */ |
| 1280 | writel(0x00000000, MXT_SYXDMSCR); |
| 1281 | writel(0x00000000, MXT_IMRSLVDMSCR); |
| 1282 | writel(0x00000000, MXT_VINSLVDMSCR); |
| 1283 | writel(0x00000000, MXT_VPC1SLVDMSCR); |
| 1284 | writel(0x00000000, MXT_VSPD0SLVDMSCR); |
| 1285 | writel(0x00000000, MXT_VSPD1SLVDMSCR); |
| 1286 | writel(0x00000000, MXT_MAP1SLVDMSCR); |
| 1287 | writel(0x00000000, MXT_MAP2SLVDMSCR); |
| 1288 | writel(0x00000000, MXT_MAP2BSLVDMSCR); |
| 1289 | |
| 1290 | /* DMS Register(MXI) */ |
| 1291 | writel(0x00000002, MXI_JPURDMSCR); |
| 1292 | writel(0x00000002, MXI_JPUWDMSCR); |
| 1293 | writel(0x00000002, MXI_VCTU0RDMSCR); |
| 1294 | writel(0x00000002, MXI_VCTU0WDMSCR); |
| 1295 | writel(0x00000002, MXI_VDCTU0RDMSCR); |
| 1296 | writel(0x00000002, MXI_VDCTU0WDMSCR); |
| 1297 | writel(0x00000002, MXI_VDCTU1RDMSCR); |
| 1298 | writel(0x00000002, MXI_VDCTU1WDMSCR); |
| 1299 | writel(0x00000002, MXI_VIN0WDMSCR); |
| 1300 | writel(0x00000002, MXI_VIN1WDMSCR); |
| 1301 | writel(0x00000002, MXI_RDRWDMSCR); |
| 1302 | writel(0x00000002, MXI_IMS01RDMSCR); |
| 1303 | writel(0x00000002, MXI_IMS01WDMSCR); |
| 1304 | writel(0x00000002, MXI_IMS23RDMSCR); |
| 1305 | writel(0x00000002, MXI_IMS23WDMSCR); |
| 1306 | writel(0x00000002, MXI_IMS45RDMSCR); |
| 1307 | writel(0x00000002, MXI_IMS45WDMSCR); |
| 1308 | writel(0x00000002, MXI_IMRRDMSCR); |
| 1309 | writel(0x00000002, MXI_IMRWDMSCR); |
| 1310 | writel(0x00000002, MXI_ROTCE4RDMSCR); |
| 1311 | writel(0x00000002, MXI_ROTCE4WDMSCR); |
| 1312 | writel(0x00000002, MXI_ROTVLC4RDMSCR); |
| 1313 | writel(0x00000002, MXI_ROTVLC4WDMSCR); |
| 1314 | writel(0x00000002, MXI_VSPD0RDMSCR); |
| 1315 | writel(0x00000002, MXI_VSPD0WDMSCR); |
| 1316 | writel(0x00000002, MXI_VSPD1RDMSCR); |
| 1317 | writel(0x00000002, MXI_VSPD1WDMSCR); |
| 1318 | writel(0x00000002, MXI_DU0RDMSCR); |
| 1319 | writel(0x00000002, MXI_DU0WDMSCR); |
| 1320 | writel(0x00000002, MXI_VSP0RDMSCR); |
| 1321 | writel(0x00000002, MXI_VSP0WDMSCR); |
| 1322 | writel(0x00000002, MXI_ROTCE0RDMSCR); |
| 1323 | writel(0x00000002, MXI_ROTCE0WDMSCR); |
| 1324 | writel(0x00000002, MXI_ROTVLC0RDMSCR); |
| 1325 | writel(0x00000002, MXI_ROTVLC0WDMSCR); |
| 1326 | writel(0x00000002, MXI_ROTCE1RDMSCR); |
| 1327 | writel(0x00000002, MXI_ROTCE1WDMSCR); |
| 1328 | writel(0x00000002, MXI_ROTVLC1RDMSCR); |
| 1329 | writel(0x00000002, MXI_ROTVLC1WDMSCR); |
| 1330 | writel(0x00000002, MXI_ROTCE2RDMSCR); |
| 1331 | writel(0x00000002, MXI_ROTCE2WDMSCR); |
| 1332 | writel(0x00000002, MXI_ROTVLC2RDMSCR); |
| 1333 | writel(0x00000002, MXI_ROTVLC2WDMSCR); |
| 1334 | writel(0x00000002, MXI_ROTCE3RDMSCR); |
| 1335 | writel(0x00000002, MXI_ROTCE3WDMSCR); |
| 1336 | writel(0x00000002, MXI_ROTVLC3RDMSCR); |
| 1337 | writel(0x00000002, MXI_ROTVLC3WDMSCR); |
| 1338 | |
| 1339 | /* DMS Register(CCI-AXI) */ |
| 1340 | writel(0x00000000, CCI_AXI_MMUS0DMSCR); |
| 1341 | writel(0x00000000, CCI_AXI_SYX2DMSCR); |
| 1342 | writel(0x00000000, CCI_AXI_MMURDMSCR); |
| 1343 | writel(0x00000000, CCI_AXI_MMUDSDMSCR); |
| 1344 | writel(0x00000000, CCI_AXI_MMUMDMSCR); |
| 1345 | writel(0x00000000, CCI_AXI_MXIDMSCR); |
| 1346 | writel(0x00000000, CCI_AXI_MMUS1DMSCR); |
| 1347 | writel(0x00000000, CCI_AXI_MMUMPDMSCR); |
| 1348 | writel(0x00000000, CCI_AXI_DVMDMSCR); |
| 1349 | writel(0x00000000, CCI_AXI_CCISLVDMSCR); |
| 1350 | |
| 1351 | /* CC-AXI Function Register */ |
| 1352 | writel(0x00000011, CCI_AXI_IPMMUIDVMCR); |
| 1353 | writel(0x00000011, CCI_AXI_IPMMURDVMCR); |
| 1354 | writel(0x00000011, CCI_AXI_IPMMUS0DVMCR); |
| 1355 | writel(0x00000011, CCI_AXI_IPMMUS1DVMCR); |
| 1356 | writel(0x00000011, CCI_AXI_IPMMUMPDVMCR); |
| 1357 | writel(0x00000011, CCI_AXI_IPMMUDSDVMCR); |
| 1358 | writel(0x0000F700, CCI_AXI_AX2ADDRMASK); |
| 1359 | |
| 1360 | } |
| 1361 | #else /* CONFIG_RMOBILE_EXTRAM_BOOT */ |
| 1362 | void qos_init(void) |
| 1363 | { |
| 1364 | } |
| 1365 | #endif /* CONFIG_RMOBILE_EXTRAM_BOOT */ |
projects / thirdparty / u-boot.git / blame