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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
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2 | /* |
3 | * Copyright (C) 2011 Samsung Electronics | |
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4 | */ |
5 | ||
6 | #include <common.h> | |
9b4a205f | 7 | #include <init.h> |
90526e9f | 8 | #include <net.h> |
903fd795 | 9 | #include <asm/gpio.h> |
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10 | #include <asm/io.h> |
11 | #include <netdev.h> | |
12 | #include <asm/arch/cpu.h> | |
e21185ba | 13 | #include <asm/arch/mmc.h> |
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14 | #include <asm/arch/periph.h> |
15 | #include <asm/arch/pinmux.h> | |
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16 | #include <asm/arch/sromc.h> |
17 | ||
18 | DECLARE_GLOBAL_DATA_PTR; | |
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19 | |
20 | static void smc9115_pre_init(void) | |
21 | { | |
22 | u32 smc_bw_conf, smc_bc_conf; | |
23 | ||
24 | /* gpio configuration GPK0CON */ | |
f6ae1ca0 | 25 | gpio_cfg_pin(EXYNOS4_GPIO_Y00 + CONFIG_ENV_SROM_BANK, S5P_GPIO_FUNC(2)); |
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26 | |
27 | /* Ethernet needs bus width of 16 bits */ | |
28 | smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK); | |
29 | smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F) | |
30 | | SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F) | |
31 | | SROMC_BC_TAH(0x0F) | SROMC_BC_TACP(0x0F) | |
32 | | SROMC_BC_PMC(0x0F); | |
33 | ||
34 | /* Select and configure the SROMC bank */ | |
35 | s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf); | |
36 | } | |
37 | ||
38 | int board_init(void) | |
39 | { | |
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40 | smc9115_pre_init(); |
41 | ||
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42 | gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); |
43 | return 0; | |
44 | } | |
45 | ||
46 | int dram_init(void) | |
47 | { | |
48 | gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) | |
49 | + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) | |
50 | + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) | |
51 | + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE); | |
52 | ||
53 | return 0; | |
54 | } | |
55 | ||
76b00aca | 56 | int dram_init_banksize(void) |
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57 | { |
58 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; | |
6b949ba8 | 59 | gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, |
9436a0c9 | 60 | PHYS_SDRAM_1_SIZE); |
e21185ba | 61 | gd->bd->bi_dram[1].start = PHYS_SDRAM_2; |
6b949ba8 | 62 | gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, |
9436a0c9 | 63 | PHYS_SDRAM_2_SIZE); |
e21185ba | 64 | gd->bd->bi_dram[2].start = PHYS_SDRAM_3; |
6b949ba8 | 65 | gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, |
9436a0c9 | 66 | PHYS_SDRAM_3_SIZE); |
e21185ba | 67 | gd->bd->bi_dram[3].start = PHYS_SDRAM_4; |
6b949ba8 | 68 | gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, |
9436a0c9 | 69 | PHYS_SDRAM_4_SIZE); |
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70 | |
71 | return 0; | |
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72 | } |
73 | ||
74 | int board_eth_init(bd_t *bis) | |
75 | { | |
76 | int rc = 0; | |
77 | #ifdef CONFIG_SMC911X | |
78 | rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); | |
79 | #endif | |
80 | return rc; | |
81 | } | |
82 | ||
83 | #ifdef CONFIG_DISPLAY_BOARDINFO | |
84 | int checkboard(void) | |
85 | { | |
86 | printf("\nBoard: SMDKV310\n"); | |
87 | return 0; | |
88 | } | |
89 | #endif | |
90 | ||
4aa2ba3a | 91 | #ifdef CONFIG_MMC |
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92 | int board_mmc_init(bd_t *bis) |
93 | { | |
94 | int i, err; | |
95 | ||
96 | /* | |
97 | * MMC2 SD card GPIO: | |
98 | * | |
99 | * GPK2[0] SD_2_CLK(2) | |
100 | * GPK2[1] SD_2_CMD(2) | |
101 | * GPK2[2] SD_2_CDn | |
102 | * GPK2[3:6] SD_2_DATA[0:3](2) | |
103 | */ | |
f6ae1ca0 | 104 | for (i = EXYNOS4_GPIO_K20; i < EXYNOS4_GPIO_K27; i++) { |
e21185ba | 105 | /* GPK2[0:6] special function 2 */ |
f6ae1ca0 | 106 | gpio_cfg_pin(i, S5P_GPIO_FUNC(0x2)); |
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107 | |
108 | /* GPK2[0:6] drv 4x */ | |
f6ae1ca0 | 109 | gpio_set_drv(i, S5P_GPIO_DRV_4X); |
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110 | |
111 | /* GPK2[0:1] pull disable */ | |
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112 | if (i == EXYNOS4_GPIO_K20 || i == EXYNOS4_GPIO_K21) { |
113 | gpio_set_pull(i, S5P_GPIO_PULL_NONE); | |
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114 | continue; |
115 | } | |
116 | ||
117 | /* GPK2[2:6] pull up */ | |
f6ae1ca0 | 118 | gpio_set_pull(i, S5P_GPIO_PULL_UP); |
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119 | } |
120 | err = s5p_mmc_init(2, 4); | |
121 | return err; | |
122 | } | |
123 | #endif | |
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124 | |
125 | static int board_uart_init(void) | |
126 | { | |
127 | int err; | |
128 | ||
129 | err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE); | |
130 | if (err) { | |
131 | debug("UART0 not configured\n"); | |
132 | return err; | |
133 | } | |
134 | ||
135 | err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE); | |
136 | if (err) { | |
137 | debug("UART1 not configured\n"); | |
138 | return err; | |
139 | } | |
140 | ||
141 | err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE); | |
142 | if (err) { | |
143 | debug("UART2 not configured\n"); | |
144 | return err; | |
145 | } | |
146 | ||
147 | err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); | |
148 | if (err) { | |
149 | debug("UART3 not configured\n"); | |
150 | return err; | |
151 | } | |
152 | ||
153 | return 0; | |
154 | } | |
155 | ||
156 | #ifdef CONFIG_BOARD_EARLY_INIT_F | |
157 | int board_early_init_f(void) | |
158 | { | |
159 | int err; | |
160 | err = board_uart_init(); | |
161 | if (err) { | |
162 | debug("UART init failed\n"); | |
163 | return err; | |
164 | } | |
165 | return err; | |
166 | } | |
167 | #endif |