]>
Commit | Line | Data |
---|---|---|
43bd194c SG |
1 | /* |
2 | * Copyright (c) 2011 The Chromium OS Authors. | |
1a459660 | 3 | * SPDX-License-Identifier: GPL-2.0+ |
43bd194c SG |
4 | */ |
5 | ||
6 | #include <common.h> | |
86bf601d | 7 | #include <cros_ec.h> |
e2d8a714 | 8 | #include <dm.h> |
d99a6874 | 9 | #include <os.h> |
909bd6d9 | 10 | #include <asm/test.h> |
7d95f2a3 | 11 | #include <asm/u-boot-sandbox.h> |
d99a6874 | 12 | |
43bd194c SG |
13 | /* |
14 | * Pointer to initial global data area | |
15 | * | |
16 | * Here we initialize it. | |
17 | */ | |
18 | gd_t *gd; | |
19 | ||
e2d8a714 SG |
20 | /* Add a simple GPIO device */ |
21 | U_BOOT_DEVICE(gpio_sandbox) = { | |
22 | .name = "gpio_sandbox", | |
23 | }; | |
24 | ||
43bd194c SG |
25 | void flush_cache(unsigned long start, unsigned long size) |
26 | { | |
27 | } | |
28 | ||
9961a0b6 | 29 | #ifndef CONFIG_TIMER |
909bd6d9 JH |
30 | /* system timer offset in ms */ |
31 | static unsigned long sandbox_timer_offset; | |
32 | ||
33 | void sandbox_timer_add_offset(unsigned long offset) | |
34 | { | |
35 | sandbox_timer_offset += offset; | |
36 | } | |
37 | ||
28c860b2 | 38 | unsigned long timer_read_counter(void) |
6994ccf8 | 39 | { |
909bd6d9 | 40 | return os_get_nsec() / 1000 + sandbox_timer_offset * 1000; |
43bd194c | 41 | } |
9961a0b6 | 42 | #endif |
43bd194c | 43 | |
43bd194c SG |
44 | int dram_init(void) |
45 | { | |
a733b06b | 46 | gd->ram_size = CONFIG_SYS_SDRAM_SIZE; |
43bd194c SG |
47 | return 0; |
48 | } | |
86bf601d | 49 | |
86bf601d SG |
50 | #ifdef CONFIG_BOARD_LATE_INIT |
51 | int board_late_init(void) | |
52 | { | |
53 | if (cros_ec_get_error()) { | |
54 | /* Force console on */ | |
55 | gd->flags &= ~GD_FLG_SILENT; | |
56 | ||
57 | printf("cros-ec communications failure %d\n", | |
58 | cros_ec_get_error()); | |
59 | puts("\nPlease reset with Power+Refresh\n\n"); | |
60 | panic("Cannot init cros-ec device"); | |
61 | return -1; | |
62 | } | |
63 | return 0; | |
64 | } | |
65 | #endif |