projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| b79316f2 SR |
1 | /* |
| 2 | * Copyright (C) 2005 | |
| 3 | * Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com | |
| 4 | * | |
| 5 | * See file CREDITS for list of people who contributed to this | |
| 6 | * project. | |
| 7 | * | |
| 8 | * This program is free software; you can redistribute it and/or | |
| 9 | * modify it under the terms of the GNU General Public License as | |
| 10 | * published by the Free Software Foundation; either version 2 of | |
| 11 | * the License, or (at your option) any later version. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, | |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | * GNU General Public License for more details. | |
| 17 | * | |
| 18 | * You should have received a copy of the GNU General Public License | |
| 19 | * along with this program; if not, write to the Free Software | |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 21 | * MA 02111-1307 USA | |
| 22 | */ | |
| 23 | ||
| 24 | #include <ppc_asm.tmpl> | |
| cf6eb6da | 25 | #include <asm/mmu.h> |
| b79316f2 | 26 | #include <config.h> |
| 550650dd | 27 | #include <asm/ppc4xx.h> |
| b79316f2 | 28 | |
| b79316f2 SR |
29 | /************************************************************************** |
| 30 | * TLB TABLE | |
| 31 | * | |
| 32 | * This table is used by the cpu boot code to setup the initial tlb | |
| 33 | * entries. Rather than make broad assumptions in the cpu source tree, | |
| 34 | * this table lets each board set things up however they like. | |
| 35 | * | |
| 36 | * Pointer to the table is returned in r1 | |
| 37 | * | |
| 38 | *************************************************************************/ | |
| 39 | ||
| 40 | .section .bootpg,"ax" | |
| 41 | .globl tlbtab | |
| 42 | ||
| 43 | tlbtab: | |
| 44 | tlbtab_start | |
| cf6eb6da SR |
45 | tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG) |
| 46 | tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) | |
| 47 | tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_RWX | SA_IG) | |
| 48 | tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG ) | |
| 49 | tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_RWX | SA_IG ) | |
| 50 | tlbentry( CONFIG_SYS_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_RWX | SA_IG ) | |
| 51 | tlbentry( CONFIG_SYS_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_RWX | SA_IG ) | |
| 52 | tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG ) | |
| 53 | tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG ) | |
| b79316f2 | 54 | tlbtab_end |