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058d2316 BB |
1 | /* |
2 | * Copyright (C) 2013 Freescale Semiconductor, Inc. | |
3 | * Copyright (C) 2015 ECA Sinters | |
4 | * | |
5 | * Author: Fabio Estevam <fabio.estevam@freescale.com> | |
6 | * Modified by: Boris Brezillon <boris.brezillon@free-electrons.com> | |
7 | * | |
8 | * SPDX-License-Identifier: GPL-2.0+ | |
9 | */ | |
10 | ||
11 | #include <asm/arch/clock.h> | |
12 | #include <asm/arch/imx-regs.h> | |
13 | #include <asm/arch/iomux.h> | |
14 | #include <asm/arch/mx6-pins.h> | |
1221ce45 | 15 | #include <linux/errno.h> |
058d2316 BB |
16 | #include <asm/gpio.h> |
17 | #include <asm/imx-common/iomux-v3.h> | |
18 | #include <asm/imx-common/boot_mode.h> | |
19 | #include <malloc.h> | |
20 | #include <mmc.h> | |
21 | #include <fsl_esdhc.h> | |
22 | #include <miiphy.h> | |
23 | #include <netdev.h> | |
24 | #include <asm/arch/mxc_hdmi.h> | |
25 | #include <asm/arch/crm_regs.h> | |
26 | #include <linux/fb.h> | |
27 | #include <ipu_pixfmt.h> | |
28 | #include <asm/io.h> | |
29 | #include <asm/arch/sys_proto.h> | |
30 | #include <micrel.h> | |
31 | #include <asm/imx-common/mxc_i2c.h> | |
32 | #include <i2c.h> | |
33 | ||
34 | #include "../common/mx6.h" | |
35 | ||
36 | DECLARE_GLOBAL_DATA_PTR; | |
37 | ||
38 | int dram_init(void) | |
39 | { | |
40 | gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); | |
41 | ||
42 | return 0; | |
43 | } | |
44 | ||
45 | int board_early_init_f(void) | |
46 | { | |
47 | seco_mx6_setup_uart_iomux(); | |
48 | ||
49 | return 0; | |
50 | } | |
51 | ||
52 | int board_phy_config(struct phy_device *phydev) | |
53 | { | |
54 | seco_mx6_rgmii_rework(phydev); | |
55 | if (phydev->drv->config) | |
56 | phydev->drv->config(phydev); | |
57 | ||
58 | return 0; | |
59 | } | |
60 | ||
61 | int board_eth_init(bd_t *bis) | |
62 | { | |
63 | uint32_t base = IMX_FEC_BASE; | |
64 | struct mii_dev *bus = NULL; | |
65 | struct phy_device *phydev = NULL; | |
66 | int ret = 0; | |
67 | ||
68 | seco_mx6_setup_enet_iomux(); | |
69 | ||
70 | #ifdef CONFIG_FEC_MXC | |
71 | bus = fec_get_miibus(base, -1); | |
72 | if (!bus) | |
73 | return -ENOMEM; | |
74 | ||
75 | /* scan phy 4,5,6,7 */ | |
76 | phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); | |
77 | if (!phydev) { | |
78 | free(bus); | |
79 | return -ENOMEM; | |
80 | } | |
81 | ||
82 | printf("using phy at %d\n", phydev->addr); | |
83 | ret = fec_probe(bis, -1, base, bus, phydev); | |
84 | if (ret) { | |
85 | free(phydev); | |
86 | free(bus); | |
87 | printf("FEC MXC: %s:failed\n", __func__); | |
88 | } | |
89 | #endif | |
90 | ||
91 | return ret; | |
92 | } | |
93 | ||
22bd6b4f JC |
94 | #define USDHC4_CD_GPIO IMX_GPIO_NR(2, 6) |
95 | ||
058d2316 | 96 | static struct fsl_esdhc_cfg usdhc_cfg[2] = { |
dd8bd015 JC |
97 | {USDHC3_BASE_ADDR, 0, 4}, |
98 | {USDHC4_BASE_ADDR, 0, 4}, | |
058d2316 BB |
99 | }; |
100 | ||
22bd6b4f JC |
101 | int board_mmc_getcd(struct mmc *mmc) |
102 | { | |
103 | struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; | |
104 | int ret = 0; | |
105 | ||
106 | switch (cfg->esdhc_base) { | |
107 | case USDHC3_BASE_ADDR: | |
108 | ret = 1; /* Assume eMMC is always present */ | |
109 | break; | |
110 | case USDHC4_BASE_ADDR: | |
111 | ret = !gpio_get_value(USDHC4_CD_GPIO); | |
112 | break; | |
113 | } | |
114 | ||
115 | return ret; | |
116 | } | |
117 | ||
058d2316 BB |
118 | int board_mmc_init(bd_t *bis) |
119 | { | |
120 | u32 index = 0; | |
121 | int ret; | |
122 | ||
123 | /* | |
124 | * Following map is done: | |
a187559e | 125 | * (U-Boot device node) (Physical Port) |
058d2316 BB |
126 | * mmc0 eMMC on Board |
127 | * mmc1 Ext SD | |
128 | */ | |
129 | for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { | |
130 | switch (index) { | |
131 | case 0: | |
132 | seco_mx6_setup_usdhc_iomux(3); | |
133 | usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); | |
058d2316 BB |
134 | break; |
135 | case 1: | |
136 | seco_mx6_setup_usdhc_iomux(4); | |
137 | usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); | |
058d2316 BB |
138 | break; |
139 | ||
140 | default: | |
141 | printf("Warning: %d exceed maximum number of SD ports %d\n", | |
142 | index + 1, CONFIG_SYS_FSL_USDHC_NUM); | |
143 | return -EINVAL; | |
144 | } | |
145 | ||
146 | ret = fsl_esdhc_initialize(bis, &usdhc_cfg[index]); | |
147 | if (ret) | |
148 | return ret; | |
149 | } | |
150 | ||
151 | return 0; | |
152 | } | |
153 | ||
154 | int board_init(void) | |
155 | { | |
156 | /* address of boot parameters */ | |
157 | gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; | |
158 | ||
159 | imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D4__GPIO2_IO04 | | |
160 | MUX_PAD_CTRL(NO_PAD_CTRL)); | |
161 | ||
162 | gpio_direction_output(IMX_GPIO_NR(2, 4), 0); | |
163 | ||
164 | /* Set Low */ | |
165 | gpio_set_value(IMX_GPIO_NR(2, 4), 0); | |
166 | udelay(1000); | |
167 | ||
168 | /* Set High */ | |
169 | gpio_set_value(IMX_GPIO_NR(2, 4), 1); | |
170 | ||
171 | return 0; | |
172 | } | |
173 | ||
174 | int checkboard(void) | |
175 | { | |
176 | puts("Board: SECO uQ7\n"); | |
177 | ||
178 | return 0; | |
179 | } |