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5d108ac8 SP |
1 | /* |
2 | * (C) Copyright 2008 | |
3 | * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. | |
4 | * | |
5 | * Copyright 2004 Freescale Semiconductor. | |
6 | * (C) Copyright 2002,2003, Motorola Inc. | |
7 | * Xianghua Xiao, (X.Xiao@motorola.com) | |
8 | * | |
9 | * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com> | |
10 | * | |
11 | * See file CREDITS for list of people who contributed to this | |
12 | * project. | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or | |
15 | * modify it under the terms of the GNU General Public License as | |
16 | * published by the Free Software Foundation; either version 2 of | |
17 | * the License, or (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, write to the Free Software | |
26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
27 | * MA 02111-1307 USA | |
28 | */ | |
29 | ||
30 | #include <common.h> | |
31 | #include <pci.h> | |
32 | #include <asm/processor.h> | |
33 | #include <asm/immap_85xx.h> | |
34 | #include <ioports.h> | |
35 | #include <flash.h> | |
e18575d5 SP |
36 | #include <libfdt.h> |
37 | #include <fdt_support.h> | |
e1eb0e25 | 38 | #include <asm/io.h> |
5d108ac8 | 39 | |
59abd15b | 40 | #include "upm_table.h" |
3e79b588 | 41 | |
5d108ac8 SP |
42 | DECLARE_GLOBAL_DATA_PTR; |
43 | ||
44 | extern flash_info_t flash_info[]; /* FLASH chips info */ | |
45 | ||
46 | void local_bus_init (void); | |
47 | ulong flash_get_size (ulong base, int banknum); | |
48 | ||
49 | int checkboard (void) | |
50 | { | |
5e1882df | 51 | volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); |
3e79b588 | 52 | |
5e1882df SP |
53 | char *src; |
54 | int f; | |
5d108ac8 SP |
55 | char *s = getenv("serial#"); |
56 | ||
57 | puts("Board: Socrates"); | |
58 | if (s != NULL) { | |
59 | puts(", serial# "); | |
60 | puts(s); | |
61 | } | |
62 | putc('\n'); | |
63 | ||
64 | #ifdef CONFIG_PCI | |
e1eb0e25 AF |
65 | /* Check the PCI_clk sel bit */ |
66 | if (in_be32(&gur->porpllsr) & (1<<15)) { | |
5e1882df SP |
67 | src = "SYSCLK"; |
68 | f = CONFIG_SYS_CLK_FREQ; | |
69 | } else { | |
70 | src = "PCI_CLK"; | |
71 | f = CONFIG_PCI_CLK_FREQ; | |
72 | } | |
73 | printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src); | |
5d108ac8 SP |
74 | #else |
75 | printf ("PCI1: disabled\n"); | |
76 | #endif | |
77 | ||
78 | /* | |
79 | * Initialize local bus. | |
80 | */ | |
81 | local_bus_init (); | |
5d108ac8 SP |
82 | return 0; |
83 | } | |
84 | ||
85 | int misc_init_r (void) | |
86 | { | |
87 | volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR); | |
88 | ||
89 | /* | |
90 | * Adjust flash start and offset to detected values | |
91 | */ | |
92 | gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; | |
93 | gd->bd->bi_flashoffset = 0; | |
94 | ||
95 | /* | |
96 | * Check if boot FLASH isn't max size | |
97 | */ | |
98 | if (gd->bd->bi_flashsize < (0 - CFG_FLASH0)) { | |
99 | memctl->or0 = gd->bd->bi_flashstart | (CFG_OR0_PRELIM & 0x00007fff); | |
100 | memctl->br0 = gd->bd->bi_flashstart | (CFG_BR0_PRELIM & 0x00007fff); | |
101 | ||
102 | /* | |
103 | * Re-check to get correct base address | |
104 | */ | |
105 | flash_get_size(gd->bd->bi_flashstart, CFG_MAX_FLASH_BANKS - 1); | |
106 | } | |
107 | ||
108 | /* | |
109 | * Check if only one FLASH bank is available | |
110 | */ | |
111 | if (gd->bd->bi_flashsize != CFG_MAX_FLASH_BANKS * (0 - CFG_FLASH0)) { | |
112 | memctl->or1 = 0; | |
113 | memctl->br1 = 0; | |
114 | ||
115 | /* | |
116 | * Re-do flash protection upon new addresses | |
117 | */ | |
118 | flash_protect (FLAG_PROTECT_CLEAR, | |
119 | gd->bd->bi_flashstart, 0xffffffff, | |
120 | &flash_info[CFG_MAX_FLASH_BANKS - 1]); | |
121 | ||
122 | /* Monitor protection ON by default */ | |
123 | flash_protect (FLAG_PROTECT_SET, | |
124 | CFG_MONITOR_BASE, CFG_MONITOR_BASE + monitor_flash_len - 1, | |
125 | &flash_info[CFG_MAX_FLASH_BANKS - 1]); | |
126 | ||
127 | /* Environment protection ON by default */ | |
128 | flash_protect (FLAG_PROTECT_SET, | |
129 | CFG_ENV_ADDR, | |
130 | CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, | |
131 | &flash_info[CFG_MAX_FLASH_BANKS - 1]); | |
132 | ||
133 | /* Redundant environment protection ON by default */ | |
134 | flash_protect (FLAG_PROTECT_SET, | |
135 | CFG_ENV_ADDR_REDUND, | |
136 | CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1, | |
137 | &flash_info[CFG_MAX_FLASH_BANKS - 1]); | |
138 | } | |
139 | ||
140 | return 0; | |
141 | } | |
142 | ||
143 | /* | |
144 | * Initialize Local Bus | |
145 | */ | |
146 | void local_bus_init (void) | |
147 | { | |
5d108ac8 SP |
148 | volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); |
149 | volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR); | |
3e79b588 DZ |
150 | sys_info_t sysinfo; |
151 | uint clkdiv; | |
152 | uint lbc_mhz; | |
153 | uint lcrr = CFG_LBC_LCRR; | |
154 | ||
155 | get_sys_info (&sysinfo); | |
156 | clkdiv = lbc->lcrr & 0x0f; | |
157 | lbc_mhz = sysinfo.freqSystemBus / 1000000 / clkdiv; | |
158 | ||
159 | /* Disable PLL bypass for Local Bus Clock >= 66 MHz */ | |
160 | if (lbc_mhz >= 66) | |
161 | lcrr &= ~LCRR_DBYP; /* DLL Enabled */ | |
162 | else | |
163 | lcrr |= LCRR_DBYP; /* DLL Bypass */ | |
164 | ||
165 | out_be32 (&lbc->lcrr, lcrr); | |
166 | asm ("sync;isync;msync"); | |
5d108ac8 | 167 | |
3e79b588 DZ |
168 | out_be32 (&lbc->ltesr, 0xffffffff); /* Clear LBC error interrupts */ |
169 | out_be32 (&lbc->lteir, 0xffffffff); /* Enable LBC error interrupts */ | |
170 | out_be32 (&ecm->eedr, 0xffffffff); /* Clear ecm errors */ | |
171 | out_be32 (&ecm->eeer, 0xffffffff); /* Enable ecm errors */ | |
5d108ac8 | 172 | |
3e79b588 DZ |
173 | /* Init UPMA for FPGA access */ |
174 | out_be32 (&lbc->mamr, 0x44440); /* Use a customer-supplied value */ | |
175 | upmconfig (UPMA, (uint *)UPMTableA, sizeof(UPMTableA)/sizeof(int)); | |
5d108ac8 SP |
176 | } |
177 | ||
178 | #if defined(CONFIG_PCI) | |
179 | /* | |
180 | * Initialize PCI Devices, report devices found. | |
181 | */ | |
182 | ||
183 | #ifndef CONFIG_PCI_PNP | |
184 | static struct pci_config_table pci_mpc85xxads_config_table[] = { | |
185 | {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, | |
186 | PCI_IDSEL_NUMBER, PCI_ANY_ID, | |
187 | pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, | |
188 | PCI_ENET0_MEMADDR, | |
189 | PCI_COMMAND_MEMORY | | |
190 | PCI_COMMAND_MASTER}}, | |
191 | {} | |
192 | }; | |
193 | #endif | |
194 | ||
195 | ||
196 | static struct pci_controller hose = { | |
197 | #ifndef CONFIG_PCI_PNP | |
198 | config_table:pci_mpc85xxads_config_table, | |
199 | #endif | |
200 | }; | |
201 | ||
202 | #endif /* CONFIG_PCI */ | |
203 | ||
204 | ||
205 | void pci_init_board (void) | |
206 | { | |
207 | #ifdef CONFIG_PCI | |
208 | pci_mpc85xx_init (&hose); | |
209 | #endif /* CONFIG_PCI */ | |
210 | } | |
211 | ||
212 | #ifdef CONFIG_BOARD_EARLY_INIT_R | |
213 | int board_early_init_r (void) | |
214 | { | |
3e79b588 DZ |
215 | volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); |
216 | ||
217 | /* set and reset the GPIO pin 2 which will reset the W83782G chip */ | |
218 | out_8((unsigned char*)&gur->gpoutdr, 0x3F ); | |
219 | out_be32((unsigned int*)&gur->gpiocr, 0x200 ); /* enable GPOut */ | |
220 | udelay(200); | |
221 | out_8( (unsigned char*)&gur->gpoutdr, 0x1F ); | |
222 | ||
5d108ac8 SP |
223 | return (0); |
224 | } | |
225 | #endif /* CONFIG_BOARD_EARLY_INIT_R */ | |
e18575d5 SP |
226 | |
227 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) | |
228 | void | |
229 | ft_board_setup(void *blob, bd_t *bd) | |
230 | { | |
3e79b588 DZ |
231 | u32 val[12]; |
232 | int rc, i = 0; | |
e18575d5 SP |
233 | |
234 | ft_cpu_setup(blob, bd); | |
235 | ||
3e79b588 DZ |
236 | /* Fixup NOR FLASH mapping */ |
237 | val[i++] = 0; /* chip select number */ | |
238 | val[i++] = 0; /* always 0 */ | |
239 | val[i++] = gd->bd->bi_flashstart; | |
240 | val[i++] = gd->bd->bi_flashsize; | |
e18575d5 | 241 | |
3e79b588 DZ |
242 | /* Fixup FPGA mapping */ |
243 | val[i++] = 3; /* chip select number */ | |
244 | val[i++] = 0; /* always 0 */ | |
245 | val[i++] = CFG_FPGA_BASE; | |
246 | val[i++] = CFG_FPGA_SIZE; | |
a23cddde | 247 | |
3e79b588 DZ |
248 | rc = fdt_find_and_setprop(blob, "/localbus", "ranges", |
249 | val, i * sizeof(u32), 1); | |
a23cddde | 250 | if (rc) |
3e79b588 | 251 | printf("Unable to update localbus ranges, err=%s\n", |
a23cddde | 252 | fdt_strerror(rc)); |
e18575d5 SP |
253 | } |
254 | #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ |