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84dee301 MP |
1 | /* |
2 | * Copyright (C) ST-Ericsson SA 2009 | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
19 | #include <config.h> | |
20 | #include <common.h> | |
21 | #include <malloc.h> | |
22 | #include <i2c.h> | |
23 | #include <mmc.h> | |
24 | #include <asm/types.h> | |
25 | #include <asm/io.h> | |
26 | #include <asm/errno.h> | |
27 | #include <asm/arch/db8500_pincfg.h> | |
b95f9ec7 MP |
28 | #include <asm/arch/prcmu.h> |
29 | #include <asm/arch/hardware.h> | |
84dee301 MP |
30 | |
31 | #include "db8500_pins.h" | |
32 | ||
33 | /* | |
34 | * Get a global data pointer | |
35 | */ | |
36 | DECLARE_GLOBAL_DATA_PTR; | |
37 | ||
38 | /* | |
39 | * Memory controller register | |
40 | */ | |
41 | #define DMC_BASE_ADDR 0x80156000 | |
42 | #define DMC_CTL_97 (DMC_BASE_ADDR + 0x184) | |
43 | ||
44 | /* | |
45 | * GPIO pin config common for MOP500/HREF boards | |
46 | */ | |
47 | unsigned long gpio_cfg_common[] = { | |
48 | /* I2C */ | |
49 | GPIO147_I2C0_SCL, | |
50 | GPIO148_I2C0_SDA, | |
51 | GPIO16_I2C1_SCL, | |
52 | GPIO17_I2C1_SDA, | |
53 | GPIO10_I2C2_SDA, | |
54 | GPIO11_I2C2_SCL, | |
55 | GPIO229_I2C3_SDA, | |
56 | GPIO230_I2C3_SCL, | |
57 | ||
58 | /* SSP0, to AB8500 */ | |
59 | GPIO143_SSP0_CLK, | |
60 | GPIO144_SSP0_FRM, | |
61 | GPIO145_SSP0_RXD | PIN_PULL_DOWN, | |
62 | GPIO146_SSP0_TXD, | |
63 | ||
64 | /* MMC0 (MicroSD card) */ | |
65 | GPIO18_MC0_CMDDIR | PIN_OUTPUT_HIGH, | |
66 | GPIO19_MC0_DAT0DIR | PIN_OUTPUT_HIGH, | |
67 | GPIO20_MC0_DAT2DIR | PIN_OUTPUT_HIGH, | |
68 | GPIO21_MC0_DAT31DIR | PIN_OUTPUT_HIGH, | |
69 | GPIO22_MC0_FBCLK | PIN_INPUT_NOPULL, | |
70 | GPIO23_MC0_CLK | PIN_OUTPUT_LOW, | |
71 | GPIO24_MC0_CMD | PIN_INPUT_PULLUP, | |
72 | GPIO25_MC0_DAT0 | PIN_INPUT_PULLUP, | |
73 | GPIO26_MC0_DAT1 | PIN_INPUT_PULLUP, | |
74 | GPIO27_MC0_DAT2 | PIN_INPUT_PULLUP, | |
75 | GPIO28_MC0_DAT3 | PIN_INPUT_PULLUP, | |
76 | ||
77 | /* MMC4 (On-board eMMC) */ | |
78 | GPIO197_MC4_DAT3 | PIN_INPUT_PULLUP, | |
79 | GPIO198_MC4_DAT2 | PIN_INPUT_PULLUP, | |
80 | GPIO199_MC4_DAT1 | PIN_INPUT_PULLUP, | |
81 | GPIO200_MC4_DAT0 | PIN_INPUT_PULLUP, | |
82 | GPIO201_MC4_CMD | PIN_INPUT_PULLUP, | |
83 | GPIO202_MC4_FBCLK | PIN_INPUT_NOPULL, | |
84 | GPIO203_MC4_CLK | PIN_OUTPUT_LOW, | |
85 | GPIO204_MC4_DAT7 | PIN_INPUT_PULLUP, | |
86 | GPIO205_MC4_DAT6 | PIN_INPUT_PULLUP, | |
87 | GPIO206_MC4_DAT5 | PIN_INPUT_PULLUP, | |
88 | GPIO207_MC4_DAT4 | PIN_INPUT_PULLUP, | |
89 | ||
90 | /* UART2, console */ | |
91 | GPIO29_U2_RXD | PIN_INPUT_PULLUP, | |
92 | GPIO30_U2_TXD | PIN_OUTPUT_HIGH, | |
93 | GPIO31_U2_CTSn | PIN_INPUT_PULLUP, | |
94 | GPIO32_U2_RTSn | PIN_OUTPUT_HIGH, | |
95 | ||
96 | /* | |
97 | * USB, pin 256-267 USB, Is probably already setup correctly from | |
98 | * BootROM/boot stages, but we don't trust that and set it up anyway | |
99 | */ | |
100 | GPIO256_USB_NXT, | |
101 | GPIO257_USB_STP, | |
102 | GPIO258_USB_XCLK, | |
103 | GPIO259_USB_DIR, | |
104 | GPIO260_USB_DAT7, | |
105 | GPIO261_USB_DAT6, | |
106 | GPIO262_USB_DAT5, | |
107 | GPIO263_USB_DAT4, | |
108 | GPIO264_USB_DAT3, | |
109 | GPIO265_USB_DAT2, | |
110 | GPIO266_USB_DAT1, | |
111 | GPIO267_USB_DAT0, | |
112 | }; | |
113 | ||
114 | unsigned long gpio_cfg_snowball[] = { | |
115 | /* MMC0 (MicroSD card) */ | |
116 | GPIO217_GPIO | PIN_OUTPUT_HIGH, /* MMC_EN */ | |
117 | GPIO218_GPIO | PIN_INPUT_NOPULL, /* MMC_CD */ | |
118 | GPIO228_GPIO | PIN_OUTPUT_HIGH, /* SD_SEL */ | |
119 | ||
120 | /* eMMC */ | |
121 | GPIO167_GPIO | PIN_OUTPUT_HIGH, /* RSTn_MLC */ | |
122 | ||
123 | /* LAN */ | |
124 | GPIO131_SM_ADQ8, | |
125 | GPIO132_SM_ADQ9, | |
126 | GPIO133_SM_ADQ10, | |
127 | GPIO134_SM_ADQ11, | |
128 | GPIO135_SM_ADQ12, | |
129 | GPIO136_SM_ADQ13, | |
130 | GPIO137_SM_ADQ14, | |
131 | GPIO138_SM_ADQ15, | |
132 | ||
133 | /* RSTn_LAN */ | |
134 | GPIO141_GPIO | PIN_OUTPUT_HIGH, | |
135 | }; | |
136 | ||
137 | /* | |
138 | * Miscellaneous platform dependent initialisations | |
139 | */ | |
140 | ||
141 | int board_init(void) | |
142 | { | |
143 | /* | |
144 | * Setup board (bd) and board-info (bi). | |
145 | * bi_arch_number: Unique id for this board. It will passed in r1 to | |
146 | * Linux startup code and is the machine_id. | |
147 | * bi_boot_params: Where this board expects params. | |
148 | */ | |
149 | gd->bd->bi_arch_number = MACH_TYPE_SNOWBALL; | |
150 | gd->bd->bi_boot_params = 0x00000100; | |
151 | ||
152 | /* Configure GPIO pins needed by U-boot */ | |
153 | db8500_gpio_config_pins(gpio_cfg_common, ARRAY_SIZE(gpio_cfg_common)); | |
154 | ||
155 | db8500_gpio_config_pins(gpio_cfg_snowball, | |
156 | ARRAY_SIZE(gpio_cfg_snowball)); | |
157 | ||
158 | return 0; | |
159 | } | |
160 | ||
161 | int dram_init(void) | |
162 | { | |
163 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; | |
164 | gd->ram_size = gd->bd->bi_dram[0].size = | |
165 | get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE); | |
166 | ||
167 | return 0; | |
168 | } | |
b95f9ec7 MP |
169 | |
170 | static int raise_ab8500_gpio16(void) | |
171 | { | |
172 | int ret; | |
173 | ||
174 | /* selection */ | |
175 | ret = ab8500_read(AB8500_MISC, AB8500_GPIO_SEL2_REG); | |
176 | if (ret < 0) | |
177 | goto out; | |
178 | ||
179 | ret |= 0x80; | |
180 | ret = ab8500_write(AB8500_MISC, AB8500_GPIO_SEL2_REG, ret); | |
181 | if (ret < 0) | |
182 | goto out; | |
183 | ||
184 | /* direction */ | |
185 | ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR2_REG); | |
186 | if (ret < 0) | |
187 | goto out; | |
188 | ||
189 | ret |= 0x80; | |
190 | ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR2_REG, ret); | |
191 | if (ret < 0) | |
192 | goto out; | |
193 | ||
194 | /* out */ | |
195 | ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT2_REG); | |
196 | if (ret < 0) | |
197 | goto out; | |
198 | ||
199 | ret |= 0x80; | |
200 | ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT2_REG, ret); | |
201 | ||
202 | out: | |
203 | return ret; | |
204 | } | |
205 | ||
206 | static int raise_ab8500_gpio26(void) | |
207 | { | |
208 | int ret; | |
209 | ||
210 | /* selection */ | |
211 | ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR4_REG); | |
212 | if (ret < 0) | |
213 | goto out; | |
214 | ||
215 | ret |= 0x2; | |
216 | ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR4_REG, ret); | |
217 | if (ret < 0) | |
218 | goto out; | |
219 | ||
220 | /* out */ | |
221 | ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT4_REG); | |
222 | if (ret < 0) | |
223 | goto out; | |
224 | ||
225 | ret |= 0x2; | |
226 | ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT4_REG, ret); | |
227 | ||
228 | out: | |
229 | return ret; | |
230 | } | |
231 | ||
232 | int board_late_init(void) | |
233 | { | |
234 | /* enable 3V3 for LAN controller */ | |
235 | if (raise_ab8500_gpio26() >= 0) { | |
236 | /* Turn on FSMC device */ | |
237 | writel(0x1, 0x8000f000); | |
238 | writel(0x1, 0x8000f008); | |
239 | ||
240 | /* setup FSMC for LAN controler */ | |
241 | writel(0x305b, 0x80000000); | |
242 | ||
243 | /* run at the highest possible speed */ | |
244 | writel(0x01010210, 0x80000004); | |
245 | } else | |
246 | printf("error: can't raise GPIO26\n"); | |
247 | ||
248 | /* enable 3v6 for GBF chip */ | |
249 | if ((raise_ab8500_gpio16() < 0)) | |
250 | printf("error: cant' raise GPIO16\n"); | |
251 | ||
252 | return 0; | |
253 | } |