[people/ms/u-boot.git] / board / ti / beagle / beagle.c

/*
 * (C) Copyright 2004-2011
 * Texas Instruments, <www.ti.com>
 *
 * Author :
 *	Sunil Kumar <sunilsaini05@gmail.com>
 *	Shashi Ranjan <shashiranjanmca05@gmail.com>
 *
 * Derived from Beagle Board and 3430 SDP code by
 *	Richard Woodruff <r-woodruff2@ti.com>
 *	Syed Mohammed Khasim <khasim@ti.com>
 *
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */
#include <common.h>
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
#endif
#include <twl4030.h>
#include <linux/mtd/nand.h>
#include <asm/io.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-types.h>
#ifdef CONFIG_USB_EHCI
#include <usb.h>
#include <asm/arch/clocks.h>
#include <asm/arch/clocks_omap3.h>
#include <asm/arch/ehci_omap3.h>
/* from drivers/usb/host/ehci-core.h */
extern struct ehci_hccr *hccr;
extern volatile struct ehci_hcor *hcor;
#endif
#include "beagle.h"
#include <command.h>

#define pr_debug(fmt, args...) debug(fmt, ##args)

#define TWL4030_I2C_BUS			0
#define EXPANSION_EEPROM_I2C_BUS	1
#define EXPANSION_EEPROM_I2C_ADDRESS	0x50

#define TINCANTOOLS_ZIPPY		0x01000100
#define TINCANTOOLS_ZIPPY2		0x02000100
#define TINCANTOOLS_TRAINER		0x04000100
#define TINCANTOOLS_SHOWDOG		0x03000100
#define KBADC_BEAGLEFPGA		0x01000600
#define LW_BEAGLETOUCH			0x01000700
#define BRAINMUX_LCDOG			0x01000800
#define BRAINMUX_LCDOGTOUCH		0x02000800
#define BBTOYS_WIFI			0x01000B00
#define BBTOYS_VGA			0x02000B00
#define BBTOYS_LCD			0x03000B00
#define BCT_BRETTL3			0x01000F00
#define BEAGLE_NO_EEPROM		0xffffffff

DECLARE_GLOBAL_DATA_PTR;

static struct {
	unsigned int device_vendor;
	unsigned char revision;
	unsigned char content;
	char fab_revision[8];
	char env_var[16];
	char env_setting[64];
} expansion_config;

/*
 * Routine: board_init
 * Description: Early hardware init.
 */
int board_init(void)
{
	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	/* board id for Linux */
	gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
	/* boot param addr */
	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);

#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
	status_led_set (STATUS_LED_BOOT, STATUS_LED_ON);
#endif

	return 0;
}

/*
 * Routine: get_board_revision
 * Description: Detect if we are running on a Beagle revision Ax/Bx,
 *		C1/2/3, C4 or xM. This can be done by reading
 *		the level of GPIO173, GPIO172 and GPIO171. This should
 *		result in
 *		GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
 *		GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
 *		GPIO173, GPIO172, GPIO171: 1 0 1 => C4
 *		GPIO173, GPIO172, GPIO171: 0 0 0 => xM
 */
int get_board_revision(void)
{
	int revision;

	if (!gpio_request(171, "") &&
	    !gpio_request(172, "") &&
	    !gpio_request(173, "")) {

		gpio_direction_input(171);
		gpio_direction_input(172);
		gpio_direction_input(173);

		revision = gpio_get_value(173) << 2 |
			   gpio_get_value(172) << 1 |
			   gpio_get_value(171);
	} else {
		printf("Error: unable to acquire board revision GPIOs\n");
		revision = -1;
	}

	return revision;
}

#ifdef CONFIG_SPL_BUILD
/*
 * Routine: get_board_mem_timings
 * Description: If we use SPL then there is no x-loader nor config header
 * so we have to setup the DDR timings ourself on both banks.
 */
void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
		u32 *mr)
{
	int pop_mfr, pop_id;

	/*
	 * We need to identify what PoP memory is on the board so that
	 * we know what timings to use.  If we can't identify it then
	 * we know it's an xM.  To map the ID values please see nand_ids.c
	 */
	identify_nand_chip(&pop_mfr, &pop_id);

	*mr = MICRON_V_MR_165;
	switch (get_board_revision()) {
	case REVISION_C4:
		if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
			/* 512MB DDR */
			*mcfg = NUMONYX_V_MCFG_165(512 << 20);
			*ctrla = NUMONYX_V_ACTIMA_165;
			*ctrlb = NUMONYX_V_ACTIMB_165;
			*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
			break;
		} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
			/* Beagleboard Rev C5, 256MB DDR */
			*mcfg = MICRON_V_MCFG_200(256 << 20);
			*ctrla = MICRON_V_ACTIMA_200;
			*ctrlb = MICRON_V_ACTIMB_200;
			*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
			break;
		}
	case REVISION_XM_A:
	case REVISION_XM_B:
	case REVISION_XM_C:
		if (pop_mfr == 0) {
			/* 256MB DDR */
			*mcfg = MICRON_V_MCFG_200(256 << 20);
			*ctrla = MICRON_V_ACTIMA_200;
			*ctrlb = MICRON_V_ACTIMB_200;
			*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
		} else {
			/* 512MB DDR */
			*mcfg = NUMONYX_V_MCFG_165(512 << 20);
			*ctrla = NUMONYX_V_ACTIMA_165;
			*ctrlb = NUMONYX_V_ACTIMB_165;
			*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
		}
		break;
	default:
		/* Assume 128MB and Micron/165MHz timings to be safe */
		*mcfg = MICRON_V_MCFG_165(128 << 20);
		*ctrla = MICRON_V_ACTIMA_165;
		*ctrlb = MICRON_V_ACTIMB_165;
		*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	}
}
#endif

/*
 * Routine: get_expansion_id
 * Description: This function checks for expansion board by checking I2C
 *		bus 1 for the availability of an AT24C01B serial EEPROM.
 *		returns the device_vendor field from the EEPROM
 */
unsigned int get_expansion_id(void)
{
	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);

	/* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
		i2c_set_bus_num(TWL4030_I2C_BUS);
		return BEAGLE_NO_EEPROM;
	}

	/* read configuration data */
	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
		 sizeof(expansion_config));

	i2c_set_bus_num(TWL4030_I2C_BUS);

	return expansion_config.device_vendor;
}

/*
 * Configure DSS to display background color on DVID
 * Configure VENC to display color bar on S-Video
 */
void beagle_display_init(void)
{
	omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
	switch (get_board_revision()) {
	case REVISION_AXBX:
	case REVISION_CX:
	case REVISION_C4:
		omap3_dss_panel_config(&dvid_cfg);
		break;
	case REVISION_XM_A:
	case REVISION_XM_B:
	case REVISION_XM_C:
	default:
		omap3_dss_panel_config(&dvid_cfg_xm);
		break;
	}
}

/*
 * Routine: misc_init_r
 * Description: Configure board specific parts
 */
int misc_init_r(void)
{
	struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
	struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
	struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;

	/* Enable i2c2 pullup resisters */
	writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1);

	switch (get_board_revision()) {
	case REVISION_AXBX:
		printf("Beagle Rev Ax/Bx\n");
		setenv("beaglerev", "AxBx");
		break;
	case REVISION_CX:
		printf("Beagle Rev C1/C2/C3\n");
		setenv("beaglerev", "Cx");
		MUX_BEAGLE_C();
		break;
	case REVISION_C4:
		printf("Beagle Rev C4\n");
		setenv("beaglerev", "C4");
		MUX_BEAGLE_C();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		break;
	case REVISION_XM_A:
		printf("Beagle xM Rev A\n");
		setenv("beaglerev", "xMA");
		MUX_BEAGLE_XM();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		break;
	case REVISION_XM_B:
		printf("Beagle xM Rev B\n");
		setenv("beaglerev", "xMB");
		MUX_BEAGLE_XM();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		break;
	case REVISION_XM_C:
		printf("Beagle xM Rev C\n");
		setenv("beaglerev", "xMC");
		MUX_BEAGLE_XM();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		break;
	default:
		printf("Beagle unknown 0x%02x\n", get_board_revision());
		MUX_BEAGLE_XM();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
	}

	switch (get_expansion_id()) {
	case TINCANTOOLS_ZIPPY:
		printf("Recognized Tincantools Zippy board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_TINCANTOOLS_ZIPPY();
		setenv("buddy", "zippy");
		break;
	case TINCANTOOLS_ZIPPY2:
		printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_TINCANTOOLS_ZIPPY();
		setenv("buddy", "zippy2");
		break;
	case TINCANTOOLS_TRAINER:
		printf("Recognized Tincantools Trainer board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_TINCANTOOLS_ZIPPY();
		MUX_TINCANTOOLS_TRAINER();
		setenv("buddy", "trainer");
		break;
	case TINCANTOOLS_SHOWDOG:
		printf("Recognized Tincantools Showdow board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		/* Place holder for DSS2 definition for showdog lcd */
		setenv("defaultdisplay", "showdoglcd");
		setenv("buddy", "showdog");
		break;
	case KBADC_BEAGLEFPGA:
		printf("Recognized KBADC Beagle FPGA board\n");
		MUX_KBADC_BEAGLEFPGA();
		setenv("buddy", "beaglefpga");
		break;
	case LW_BEAGLETOUCH:
		printf("Recognized Liquidware BeagleTouch board\n");
		setenv("buddy", "beagletouch");
		break;
	case BRAINMUX_LCDOG:
		printf("Recognized Brainmux LCDog board\n");
		setenv("buddy", "lcdog");
		break;
	case BRAINMUX_LCDOGTOUCH:
		printf("Recognized Brainmux LCDog Touch board\n");
		setenv("buddy", "lcdogtouch");
		break;
	case BBTOYS_WIFI:
		printf("Recognized BeagleBoardToys WiFi board\n");
		MUX_BBTOYS_WIFI()
		setenv("buddy", "bbtoys-wifi");
		break;;
	case BBTOYS_VGA:
		printf("Recognized BeagleBoardToys VGA board\n");
		break;;
	case BBTOYS_LCD:
		printf("Recognized BeagleBoardToys LCD board\n");
		break;;
	case BCT_BRETTL3:
	    printf("Recognized bct electronic GmbH brettl3 board\n");
	    break;
	case BEAGLE_NO_EEPROM:
		printf("No EEPROM on expansion board\n");
		setenv("buddy", "none");
		break;
	default:
		printf("Unrecognized expansion board: %x\n",
			expansion_config.device_vendor);
		setenv("buddy", "unknown");
	}

	if (expansion_config.content == 1)
		setenv(expansion_config.env_var, expansion_config.env_setting);

	twl4030_power_init();
	switch (get_board_revision()) {
	case REVISION_XM_A:
	case REVISION_XM_B:
		twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
		break;
	default:
		twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
		break;
	}

	/* Set GPIO states before they are made outputs */
	writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
		&gpio6_base->setdataout);
	writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
		GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);

	/* Configure GPIOs to output */
	writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
	writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
		GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);

	dieid_num_r();
	beagle_display_init();
	omap3_dss_enable();

	return 0;
}

/*
 * Routine: set_muxconf_regs
 * Description: Setting up the configuration Mux registers specific to the
 *		hardware. Many pins need to be moved from protect to primary
 *		mode.
 */
void set_muxconf_regs(void)
{
	MUX_BEAGLE();
}

#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
	omap_mmc_init(0);
	return 0;
}
#endif

#ifdef CONFIG_USB_EHCI

#define GPIO_PHY_RESET 147

/* Reset is needed otherwise the kernel-driver will throw an error. */
int ehci_hcd_stop(void)
{
	pr_debug("Resetting OMAP3 EHCI\n");
	gpio_set_value(GPIO_PHY_RESET, 0);
	writel(OMAP_UHH_SYSCONFIG_SOFTRESET, OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
	/* disable USB clocks */
	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
	sr32(&prcm_base->iclken_usbhost, 0, 1, 0);
	sr32(&prcm_base->fclken_usbhost, 0, 2, 0);
	sr32(&prcm_base->iclken3_core, 2, 1, 0);
	sr32(&prcm_base->fclken3_core, 2, 1, 0);
	return 0;
}

/* Call usb_stop() before starting the kernel */
void show_boot_progress(int val)
{
	if(val == 15)
		usb_stop();
}

/*
 * Initialize the OMAP3 EHCI controller and PHY on the BeagleBoard.
 * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37.
 * See there for additional Copyrights.
 */
int ehci_hcd_init(void)
{
	pr_debug("Initializing OMAP3 ECHI\n");

	/* Put the PHY in RESET */
	gpio_request(GPIO_PHY_RESET, "");
	gpio_direction_output(GPIO_PHY_RESET, 0);
	gpio_set_value(GPIO_PHY_RESET, 0);

	/* Hold the PHY in RESET for enough time till DIR is high */
	/* Refer: ISSUE1 */
	udelay(10);

	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
	/* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
	sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
	/*
	 * Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
	 * and USBHOST_120M_FCLK (USBHOST_FCLK2)
	 */
	sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
	/* Enable USBTTL_ICLK */
	sr32(&prcm_base->iclken3_core, 2, 1, 1);
	/* Enable USBTTL_FCLK */
	sr32(&prcm_base->fclken3_core, 2, 1, 1);
	pr_debug("USB clocks enabled\n");

	/* perform TLL soft reset, and wait until reset is complete */
	writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
		OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
	/* Wait for TLL reset to complete */
	while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS)
			& OMAP_USBTLL_SYSSTATUS_RESETDONE));
	pr_debug("TLL reset done\n");

	writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
		OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
		OMAP_USBTLL_SYSCONFIG_CACTIVITY,
		OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);

	/* Put UHH in NoIdle/NoStandby mode */
	writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP
		| OMAP_UHH_SYSCONFIG_SIDLEMODE
		| OMAP_UHH_SYSCONFIG_CACTIVITY
		| OMAP_UHH_SYSCONFIG_MIDLEMODE,
		OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);

	/* setup burst configurations */
	writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
		| OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
		| OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN,
		OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG);

	/*
	 * Refer ISSUE1:
	 * Hold the PHY in RESET for enough time till
	 * PHY is settled and ready
	 */
	udelay(10);
	gpio_set_value(GPIO_PHY_RESET, 1);

	hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE);
	hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10);

	pr_debug("OMAP3 EHCI init done\n");
	return 0;
}

#endif /* CONFIG_USB_EHCI */

#ifndef CONFIG_SPL_BUILD
/*
 * This command returns the status of the user button on beagle xM
 * Input - none
 * Returns - 	1 if button is held down
 *		0 if button is not held down
 */
int do_userbutton(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	int     button = 0;
	int	gpio;

	/*
	 * pass address parameter as argv[0] (aka command name),
	 * and all remaining args
	 */
	switch (get_board_revision()) {
	case REVISION_AXBX:
	case REVISION_CX:
	case REVISION_C4:
		gpio = 7;
		break;
	case REVISION_XM_A:
	case REVISION_XM_B:
	case REVISION_XM_C:
	default:
		gpio = 4;
		break;
	}
	gpio_request(gpio, "");
	gpio_direction_input(gpio);
	printf("The user button is currently ");
	if (gpio_get_value(gpio))
	{
		button = 1;
		printf("PRESSED.\n");
	}
	else
	{
		button = 0;
		printf("NOT pressed.\n");
	}

	return !button;
}

/* -------------------------------------------------------------------- */

U_BOOT_CMD(
	userbutton, CONFIG_SYS_MAXARGS, 1,	do_userbutton,
	"Return the status of the BeagleBoard USER button",
	""
);
#endif
Commit	Line	Data
f904cdbb	1	/*
75c57a35	2	* (C) Copyright 2004-2011
f904cdbb DB	3	* Texas Instruments, <www.ti.com>
	4	*
	5	* Author :
	6	* Sunil Kumar <sunilsaini05@gmail.com>
	7	* Shashi Ranjan <shashiranjanmca05@gmail.com>
	8	*
	9	* Derived from Beagle Board and 3430 SDP code by
	10	* Richard Woodruff <r-woodruff2@ti.com>
	11	* Syed Mohammed Khasim <khasim@ti.com>
	12	*
	13	*
	14	* See file CREDITS for list of people who contributed to this
	15	* project.
	16	*
	17	* This program is free software; you can redistribute it and/or
	18	* modify it under the terms of the GNU General Public License as
	19	* published by the Free Software Foundation; either version 2 of
	20	* the License, or (at your option) any later version.
	21	*
	22	* This program is distributed in the hope that it will be useful,
	23	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	24	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	25	* GNU General Public License for more details.
	26	*
	27	* You should have received a copy of the GNU General Public License
	28	* along with this program; if not, write to the Free Software
	29	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	30	* MA 02111-1307 USA
	31	*/
	32	#include <common.h>
70d8c944 JK	33	#ifdef CONFIG_STATUS_LED
	34	#include <status_led.h>
	35	#endif
2c155130	36	#include <twl4030.h>
75c57a35	37	#include <linux/mtd/nand.h>
f904cdbb	38	#include <asm/io.h>
0cd31144	39	#include <asm/arch/mmc_host_def.h>
f904cdbb	40	#include <asm/arch/mux.h>
75c57a35	41	#include <asm/arch/mem.h>
f904cdbb	42	#include <asm/arch/sys_proto.h>
84c3b631	43	#include <asm/gpio.h>
f904cdbb	44	#include <asm/mach-types.h>
d90859a6 AH	45	#ifdef CONFIG_USB_EHCI
	46	#include <usb.h>
	47	#include <asm/arch/clocks.h>
	48	#include <asm/arch/clocks_omap3.h>
	49	#include <asm/arch/ehci_omap3.h>
	50	/* from drivers/usb/host/ehci-core.h */
	51	extern struct ehci_hccr *hccr;
	52	extern volatile struct ehci_hcor *hcor;
	53	#endif
f904cdbb	54	#include "beagle.h"
f835ea71	55	#include <command.h>
f904cdbb	56
d90859a6 AH	57	#define pr_debug(fmt, args...) debug(fmt, ##args)
d90859a6 AH	58
ca5f80ae KK	59	#define TWL4030_I2C_BUS 0
	60	#define EXPANSION_EEPROM_I2C_BUS 1
	61	#define EXPANSION_EEPROM_I2C_ADDRESS 0x50
	62
	63	#define TINCANTOOLS_ZIPPY 0x01000100
	64	#define TINCANTOOLS_ZIPPY2 0x02000100
	65	#define TINCANTOOLS_TRAINER 0x04000100
	66	#define TINCANTOOLS_SHOWDOG 0x03000100
	67	#define KBADC_BEAGLEFPGA 0x01000600
ee8485fd KK	68	#define LW_BEAGLETOUCH 0x01000700
	69	#define BRAINMUX_LCDOG 0x01000800
	70	#define BRAINMUX_LCDOGTOUCH 0x02000800
	71	#define BBTOYS_WIFI 0x01000B00
	72	#define BBTOYS_VGA 0x02000B00
	73	#define BBTOYS_LCD 0x03000B00
6cce5504	74	#define BCT_BRETTL3 0x01000F00
ca5f80ae KK	75	#define BEAGLE_NO_EEPROM 0xffffffff
ca5f80ae KK	76
29565326 JR	77	DECLARE_GLOBAL_DATA_PTR;
29565326 JR	78
ca5f80ae KK	79	static struct {
	80	unsigned int device_vendor;
	81	unsigned char revision;
	82	unsigned char content;
	83	char fab_revision[8];
	84	char env_var[16];
	85	char env_setting[64];
	86	} expansion_config;
	87
58911517	88	/*
f904cdbb DB	89	* Routine: board_init
f904cdbb DB	90	* Description: Early hardware init.
58911517	91	*/
f904cdbb DB	92	int board_init(void)
f904cdbb DB	93	{
f904cdbb DB	94	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	95	/* board id for Linux */
	96	gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
	97	/* boot param addr */
	98	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
	99
70d8c944 JK	100	#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
	101	status_led_set (STATUS_LED_BOOT, STATUS_LED_ON);
	102	#endif
	103
f904cdbb DB	104	return 0;
	105	}
	106
58911517	107	/*
06b95bd5 SS	108	* Routine: get_board_revision
06b95bd5 SS	109	* Description: Detect if we are running on a Beagle revision Ax/Bx,
08cbba2a	110	* C1/2/3, C4 or xM. This can be done by reading
06b95bd5 SS	111	* the level of GPIO173, GPIO172 and GPIO171. This should
	112	* result in
	113	* GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
	114	* GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
	115	* GPIO173, GPIO172, GPIO171: 1 0 1 => C4
08cbba2a	116	* GPIO173, GPIO172, GPIO171: 0 0 0 => xM
58911517	117	*/
06b95bd5	118	int get_board_revision(void)
f956fd03	119	{
06b95bd5	120	int revision;
f956fd03	121
84c3b631 SP	122	if (!gpio_request(171, "") &&
	123	!gpio_request(172, "") &&
	124	!gpio_request(173, "")) {
718763c4	125
84c3b631 SP	126	gpio_direction_input(171);
	127	gpio_direction_input(172);
	128	gpio_direction_input(173);
718763c4	129
84c3b631 SP	130	revision = gpio_get_value(173) << 2 \|
	131	gpio_get_value(172) << 1 \|
	132	gpio_get_value(171);
06b95bd5 SS	133	} else {
	134	printf("Error: unable to acquire board revision GPIOs\n");
	135	revision = -1;
718763c4	136	}
f956fd03	137
06b95bd5	138	return revision;
f956fd03 DB	139	}
f956fd03 DB	140
75c57a35 TR	141	#ifdef CONFIG_SPL_BUILD
	142	/*
	143	* Routine: get_board_mem_timings
	144	* Description: If we use SPL then there is no x-loader nor config header
	145	* so we have to setup the DDR timings ourself on both banks.
	146	*/
	147	void get_board_mem_timings(u32 mcfg, u32 ctrla, u32 ctrlb, u32 rfr_ctrl,
	148	u32 *mr)
	149	{
	150	int pop_mfr, pop_id;
	151
	152	/*
	153	* We need to identify what PoP memory is on the board so that
	154	* we know what timings to use. If we can't identify it then
	155	* we know it's an xM. To map the ID values please see nand_ids.c
	156	*/
	157	identify_nand_chip(&pop_mfr, &pop_id);
	158
	159	*mr = MICRON_V_MR_165;
	160	switch (get_board_revision()) {
	161	case REVISION_C4:
	162	if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
	163	/* 512MB DDR */
	164	*mcfg = NUMONYX_V_MCFG_165(512 << 20);
	165	*ctrla = NUMONYX_V_ACTIMA_165;
	166	*ctrlb = NUMONYX_V_ACTIMB_165;
	167	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	168	break;
	169	} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
	170	/* Beagleboard Rev C5, 256MB DDR */
	171	*mcfg = MICRON_V_MCFG_200(256 << 20);
	172	*ctrla = MICRON_V_ACTIMA_200;
	173	*ctrlb = MICRON_V_ACTIMB_200;
	174	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
	175	break;
	176	}
	177	case REVISION_XM_A:
	178	case REVISION_XM_B:
	179	case REVISION_XM_C:
	180	if (pop_mfr == 0) {
	181	/* 256MB DDR */
	182	*mcfg = MICRON_V_MCFG_200(256 << 20);
	183	*ctrla = MICRON_V_ACTIMA_200;
	184	*ctrlb = MICRON_V_ACTIMB_200;
	185	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
	186	} else {
	187	/* 512MB DDR */
	188	*mcfg = NUMONYX_V_MCFG_165(512 << 20);
	189	*ctrla = NUMONYX_V_ACTIMA_165;
	190	*ctrlb = NUMONYX_V_ACTIMB_165;
	191	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	192	}
	193	break;
	194	default:
	195	/* Assume 128MB and Micron/165MHz timings to be safe */
	196	*mcfg = MICRON_V_MCFG_165(128 << 20);
	197	*ctrla = MICRON_V_ACTIMA_165;
	198	*ctrlb = MICRON_V_ACTIMB_165;
	199	*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	200	}
	201	}
	202	#endif
	203
ca5f80ae KK	204	/*
	205	* Routine: get_expansion_id
	206	* Description: This function checks for expansion board by checking I2C
	207	* bus 1 for the availability of an AT24C01B serial EEPROM.
	208	* returns the device_vendor field from the EEPROM
	209	*/
	210	unsigned int get_expansion_id(void)
	211	{
	212	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
	213
	214	/* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
	215	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
	216	i2c_set_bus_num(TWL4030_I2C_BUS);
	217	return BEAGLE_NO_EEPROM;
	218	}
	219
	220	/* read configuration data */
	221	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
	222	sizeof(expansion_config));
	223
	224	i2c_set_bus_num(TWL4030_I2C_BUS);
	225
	226	return expansion_config.device_vendor;
	227	}
	228
3f16ab91 JK	229	/*
	230	* Configure DSS to display background color on DVID
	231	* Configure VENC to display color bar on S-Video
	232	*/
	233	void beagle_display_init(void)
	234	{
	235	omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
	236	switch (get_board_revision()) {
	237	case REVISION_AXBX:
	238	case REVISION_CX:
	239	case REVISION_C4:
	240	omap3_dss_panel_config(&dvid_cfg);
	241	break;
	242	case REVISION_XM_A:
	243	case REVISION_XM_B:
	244	case REVISION_XM_C:
	245	default:
	246	omap3_dss_panel_config(&dvid_cfg_xm);
	247	break;
	248	}
	249	}
	250
58911517	251	/*
f904cdbb DB	252	* Routine: misc_init_r
f904cdbb DB	253	* Description: Configure board specific parts
58911517	254	*/
f904cdbb DB	255	int misc_init_r(void)
f904cdbb DB	256	{
97a099ea DB	257	struct gpio gpio5_base = (struct gpio )OMAP34XX_GPIO5_BASE;
97a099ea DB	258	struct gpio gpio6_base = (struct gpio )OMAP34XX_GPIO6_BASE;
f14a522a	259	struct control_prog_io prog_io_base = (struct control_prog_io )OMAP34XX_CTRL_BASE;
d4e53f06 SK	260
	261	/* Enable i2c2 pullup resisters */
	262	writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1);
f904cdbb	263
06b95bd5 SS	264	switch (get_board_revision()) {
	265	case REVISION_AXBX:
	266	printf("Beagle Rev Ax/Bx\n");
	267	setenv("beaglerev", "AxBx");
06b95bd5 SS	268	break;
	269	case REVISION_CX:
	270	printf("Beagle Rev C1/C2/C3\n");
	271	setenv("beaglerev", "Cx");
06b95bd5 SS	272	MUX_BEAGLE_C();
	273	break;
	274	case REVISION_C4:
	275	printf("Beagle Rev C4\n");
08cbba2a	276	setenv("beaglerev", "C4");
06b95bd5 SS	277	MUX_BEAGLE_C();
06b95bd5 SS	278	/* Set VAUX2 to 1.8V for EHCI PHY */
08cbba2a SS	279	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	280	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	281	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	282	TWL4030_PM_RECEIVER_DEV_GRP_P1);
	283	break;
f6e593bb	284	case REVISION_XM_A:
08cbba2a SS	285	printf("Beagle xM Rev A\n");
08cbba2a SS	286	setenv("beaglerev", "xMA");
f6e593bb KK	287	MUX_BEAGLE_XM();
	288	/* Set VAUX2 to 1.8V for EHCI PHY */
	289	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	290	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	291	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	292	TWL4030_PM_RECEIVER_DEV_GRP_P1);
	293	break;
	294	case REVISION_XM_B:
	295	printf("Beagle xM Rev B\n");
	296	setenv("beaglerev", "xMB");
08cbba2a SS	297	MUX_BEAGLE_XM();
08cbba2a SS	298	/* Set VAUX2 to 1.8V for EHCI PHY */
1ffcb346 KK	299	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	300	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	301	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	302	TWL4030_PM_RECEIVER_DEV_GRP_P1);
	303	break;
	304	case REVISION_XM_C:
	305	printf("Beagle xM Rev C\n");
	306	setenv("beaglerev", "xMC");
	307	MUX_BEAGLE_XM();
	308	/* Set VAUX2 to 1.8V for EHCI PHY */
06b95bd5 SS	309	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	310	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	311	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	312	TWL4030_PM_RECEIVER_DEV_GRP_P1);
	313	break;
	314	default:
	315	printf("Beagle unknown 0x%02x\n", get_board_revision());
f6e593bb KK	316	MUX_BEAGLE_XM();
	317	/* Set VAUX2 to 1.8V for EHCI PHY */
	318	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	319	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	320	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	321	TWL4030_PM_RECEIVER_DEV_GRP_P1);
06b95bd5 SS	322	}
06b95bd5 SS	323
ca5f80ae KK	324	switch (get_expansion_id()) {
	325	case TINCANTOOLS_ZIPPY:
	326	printf("Recognized Tincantools Zippy board (rev %d %s)\n",
	327	expansion_config.revision,
	328	expansion_config.fab_revision);
	329	MUX_TINCANTOOLS_ZIPPY();
	330	setenv("buddy", "zippy");
	331	break;
	332	case TINCANTOOLS_ZIPPY2:
	333	printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
	334	expansion_config.revision,
	335	expansion_config.fab_revision);
	336	MUX_TINCANTOOLS_ZIPPY();
	337	setenv("buddy", "zippy2");
	338	break;
	339	case TINCANTOOLS_TRAINER:
	340	printf("Recognized Tincantools Trainer board (rev %d %s)\n",
	341	expansion_config.revision,
	342	expansion_config.fab_revision);
	343	MUX_TINCANTOOLS_ZIPPY();
	344	MUX_TINCANTOOLS_TRAINER();
	345	setenv("buddy", "trainer");
	346	break;
	347	case TINCANTOOLS_SHOWDOG:
	348	printf("Recognized Tincantools Showdow board (rev %d %s)\n",
	349	expansion_config.revision,
	350	expansion_config.fab_revision);
	351	/* Place holder for DSS2 definition for showdog lcd */
	352	setenv("defaultdisplay", "showdoglcd");
	353	setenv("buddy", "showdog");
	354	break;
	355	case KBADC_BEAGLEFPGA:
	356	printf("Recognized KBADC Beagle FPGA board\n");
	357	MUX_KBADC_BEAGLEFPGA();
	358	setenv("buddy", "beaglefpga");
	359	break;
ee8485fd KK	360	case LW_BEAGLETOUCH:
	361	printf("Recognized Liquidware BeagleTouch board\n");
	362	setenv("buddy", "beagletouch");
	363	break;
	364	case BRAINMUX_LCDOG:
	365	printf("Recognized Brainmux LCDog board\n");
	366	setenv("buddy", "lcdog");
	367	break;
	368	case BRAINMUX_LCDOGTOUCH:
	369	printf("Recognized Brainmux LCDog Touch board\n");
	370	setenv("buddy", "lcdogtouch");
	371	break;
	372	case BBTOYS_WIFI:
	373	printf("Recognized BeagleBoardToys WiFi board\n");
	374	MUX_BBTOYS_WIFI()
	375	setenv("buddy", "bbtoys-wifi");
	376	break;;
	377	case BBTOYS_VGA:
	378	printf("Recognized BeagleBoardToys VGA board\n");
	379	break;;
	380	case BBTOYS_LCD:
	381	printf("Recognized BeagleBoardToys LCD board\n");
	382	break;;
6cce5504 PM	383	case BCT_BRETTL3:
	384	printf("Recognized bct electronic GmbH brettl3 board\n");
	385	break;
ca5f80ae KK	386	case BEAGLE_NO_EEPROM:
	387	printf("No EEPROM on expansion board\n");
	388	setenv("buddy", "none");
	389	break;
	390	default:
	391	printf("Unrecognized expansion board: %x\n",
	392	expansion_config.device_vendor);
	393	setenv("buddy", "unknown");
	394	}
	395
	396	if (expansion_config.content == 1)
	397	setenv(expansion_config.env_var, expansion_config.env_setting);
	398
2c155130	399	twl4030_power_init();
38a77c3a CS	400	switch (get_board_revision()) {
	401	case REVISION_XM_A:
	402	case REVISION_XM_B:
	403	twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
	404	break;
	405	default:
	406	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON \| TWL4030_LED_LEDEN_LEDBON);
	407	break;
	408	}
f904cdbb	409
52d82e40	410	/* Set GPIO states before they are made outputs */
f904cdbb DB	411	writel(GPIO23 \| GPIO10 \| GPIO8 \| GPIO2 \| GPIO1,
	412	&gpio6_base->setdataout);
	413	writel(GPIO31 \| GPIO30 \| GPIO29 \| GPIO28 \| GPIO22 \| GPIO21 \|
	414	GPIO15 \| GPIO14 \| GPIO13 \| GPIO12, &gpio5_base->setdataout);
	415
52d82e40 BF	416	/* Configure GPIOs to output */
	417	writel(~(GPIO23 \| GPIO10 \| GPIO8 \| GPIO2 \| GPIO1), &gpio6_base->oe);
	418	writel(~(GPIO31 \| GPIO30 \| GPIO29 \| GPIO28 \| GPIO22 \| GPIO21 \|
	419	GPIO15 \| GPIO14 \| GPIO13 \| GPIO12), &gpio5_base->oe);
	420
e6a6a704	421	dieid_num_r();
3f16ab91 JK	422	beagle_display_init();
3f16ab91 JK	423	omap3_dss_enable();
e6a6a704	424
f904cdbb DB	425	return 0;
	426	}
	427
58911517	428	/*
f904cdbb DB	429	* Routine: set_muxconf_regs
	430	* Description: Setting up the configuration Mux registers specific to the
	431	* hardware. Many pins need to be moved from protect to primary
	432	* mode.
58911517	433	*/
f904cdbb DB	434	void set_muxconf_regs(void)
	435	{
	436	MUX_BEAGLE();
	437	}
0cd31144	438
75c57a35	439	#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
0cd31144 SS	440	int board_mmc_init(bd_t *bis)
	441	{
	442	omap_mmc_init(0);
	443	return 0;
	444	}
	445	#endif
d90859a6 AH	446
	447	#ifdef CONFIG_USB_EHCI
	448
	449	#define GPIO_PHY_RESET 147
	450
	451	/* Reset is needed otherwise the kernel-driver will throw an error. */
	452	int ehci_hcd_stop(void)
	453	{
	454	pr_debug("Resetting OMAP3 EHCI\n");
84c3b631	455	gpio_set_value(GPIO_PHY_RESET, 0);
d90859a6	456	writel(OMAP_UHH_SYSCONFIG_SOFTRESET, OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
f44047df KK	457	/* disable USB clocks */
	458	struct prcm prcm_base = (struct prcm )PRCM_BASE;
	459	sr32(&prcm_base->iclken_usbhost, 0, 1, 0);
	460	sr32(&prcm_base->fclken_usbhost, 0, 2, 0);
	461	sr32(&prcm_base->iclken3_core, 2, 1, 0);
	462	sr32(&prcm_base->fclken3_core, 2, 1, 0);
d90859a6 AH	463	return 0;
	464	}
	465
	466	/* Call usb_stop() before starting the kernel */
	467	void show_boot_progress(int val)
	468	{
	469	if(val == 15)
	470	usb_stop();
	471	}
	472
	473	/*
	474	* Initialize the OMAP3 EHCI controller and PHY on the BeagleBoard.
	475	* Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37.
	476	* See there for additional Copyrights.
	477	*/
	478	int ehci_hcd_init(void)
	479	{
	480	pr_debug("Initializing OMAP3 ECHI\n");
	481
	482	/* Put the PHY in RESET */
84c3b631 SP	483	gpio_request(GPIO_PHY_RESET, "");
	484	gpio_direction_output(GPIO_PHY_RESET, 0);
	485	gpio_set_value(GPIO_PHY_RESET, 0);
d90859a6 AH	486
	487	/* Hold the PHY in RESET for enough time till DIR is high */
	488	/* Refer: ISSUE1 */
	489	udelay(10);
	490
	491	struct prcm prcm_base = (struct prcm )PRCM_BASE;
	492	/* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
	493	sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
	494	/*
	495	* Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
	496	* and USBHOST_120M_FCLK (USBHOST_FCLK2)
	497	*/
	498	sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
	499	/* Enable USBTTL_ICLK */
	500	sr32(&prcm_base->iclken3_core, 2, 1, 1);
	501	/* Enable USBTTL_FCLK */
	502	sr32(&prcm_base->fclken3_core, 2, 1, 1);
	503	pr_debug("USB clocks enabled\n");
	504
	505	/* perform TLL soft reset, and wait until reset is complete */
	506	writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
	507	OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
	508	/* Wait for TLL reset to complete */
	509	while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS)
	510	& OMAP_USBTLL_SYSSTATUS_RESETDONE));
	511	pr_debug("TLL reset done\n");
	512
	513	writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP \|
	514	OMAP_USBTLL_SYSCONFIG_SIDLEMODE \|
	515	OMAP_USBTLL_SYSCONFIG_CACTIVITY,
	516	OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
	517
	518	/* Put UHH in NoIdle/NoStandby mode */
	519	writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP
	520	\| OMAP_UHH_SYSCONFIG_SIDLEMODE
	521	\| OMAP_UHH_SYSCONFIG_CACTIVITY
	522	\| OMAP_UHH_SYSCONFIG_MIDLEMODE,
	523	OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
	524
	525	/* setup burst configurations */
	526	writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
	527	\| OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
	528	\| OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN,
	529	OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG);
	530
	531	/*
	532	* Refer ISSUE1:
	533	* Hold the PHY in RESET for enough time till
	534	* PHY is settled and ready
	535	*/
	536	udelay(10);
84c3b631	537	gpio_set_value(GPIO_PHY_RESET, 1);
d90859a6 AH	538
	539	hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE);
	540	hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10);
	541
	542	pr_debug("OMAP3 EHCI init done\n");
	543	return 0;
	544	}
	545
	546	#endif /* CONFIG_USB_EHCI */
f835ea71	547
75c57a35	548	#ifndef CONFIG_SPL_BUILD
f835ea71 JK	549	/*
	550	* This command returns the status of the user button on beagle xM
	551	* Input - none
	552	* Returns - 1 if button is held down
	553	* 0 if button is not held down
	554	*/
513e6fd3	555	int do_userbutton(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
f835ea71 JK	556	{
	557	int button = 0;
	558	int gpio;
	559
	560	/*
	561	* pass address parameter as argv[0] (aka command name),
	562	* and all remaining args
	563	*/
	564	switch (get_board_revision()) {
	565	case REVISION_AXBX:
	566	case REVISION_CX:
	567	case REVISION_C4:
	568	gpio = 7;
	569	break;
	570	case REVISION_XM_A:
	571	case REVISION_XM_B:
	572	case REVISION_XM_C:
	573	default:
	574	gpio = 4;
	575	break;
	576	}
84c3b631 SP	577	gpio_request(gpio, "");
84c3b631 SP	578	gpio_direction_input(gpio);
f835ea71	579	printf("The user button is currently ");
84c3b631	580	if (gpio_get_value(gpio))
f835ea71 JK	581	{
	582	button = 1;
	583	printf("PRESSED.\n");
	584	}
	585	else
	586	{
	587	button = 0;
	588	printf("NOT pressed.\n");
	589	}
	590
f835ea71 JK	591	return !button;
	592	}
	593
	594	/* -------------------------------------------------------------------- */
	595
	596	U_BOOT_CMD(
	597	userbutton, CONFIG_SYS_MAXARGS, 1, do_userbutton,
	598	"Return the status of the BeagleBoard USER button",
	599	""
	600	);
75c57a35	601	#endif