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f904cdbb 1/*
75c57a35 2 * (C) Copyright 2004-2011
f904cdbb
DB
3 * Texas Instruments, <www.ti.com>
4 *
5 * Author :
6 * Sunil Kumar <sunilsaini05@gmail.com>
7 * Shashi Ranjan <shashiranjanmca05@gmail.com>
8 *
9 * Derived from Beagle Board and 3430 SDP code by
10 * Richard Woodruff <r-woodruff2@ti.com>
11 * Syed Mohammed Khasim <khasim@ti.com>
12 *
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 */
32#include <common.h>
70d8c944
JK
33#ifdef CONFIG_STATUS_LED
34#include <status_led.h>
35#endif
2c155130 36#include <twl4030.h>
75c57a35 37#include <linux/mtd/nand.h>
f904cdbb 38#include <asm/io.h>
0cd31144 39#include <asm/arch/mmc_host_def.h>
f904cdbb 40#include <asm/arch/mux.h>
75c57a35 41#include <asm/arch/mem.h>
f904cdbb 42#include <asm/arch/sys_proto.h>
84c3b631 43#include <asm/gpio.h>
f904cdbb
DB
44#include <asm/mach-types.h>
45#include "beagle.h"
f835ea71 46#include <command.h>
f904cdbb 47
43b62393
G
48#ifdef CONFIG_USB_EHCI
49#include <usb.h>
50#include <asm/ehci-omap.h>
51#endif
52
ca5f80ae
KK
53#define TWL4030_I2C_BUS 0
54#define EXPANSION_EEPROM_I2C_BUS 1
55#define EXPANSION_EEPROM_I2C_ADDRESS 0x50
56
57#define TINCANTOOLS_ZIPPY 0x01000100
58#define TINCANTOOLS_ZIPPY2 0x02000100
59#define TINCANTOOLS_TRAINER 0x04000100
60#define TINCANTOOLS_SHOWDOG 0x03000100
61#define KBADC_BEAGLEFPGA 0x01000600
ee8485fd
KK
62#define LW_BEAGLETOUCH 0x01000700
63#define BRAINMUX_LCDOG 0x01000800
64#define BRAINMUX_LCDOGTOUCH 0x02000800
65#define BBTOYS_WIFI 0x01000B00
66#define BBTOYS_VGA 0x02000B00
67#define BBTOYS_LCD 0x03000B00
6cce5504 68#define BCT_BRETTL3 0x01000F00
ef88e609 69#define BCT_BRETTL4 0x02000F00
ca5f80ae
KK
70#define BEAGLE_NO_EEPROM 0xffffffff
71
29565326
JR
72DECLARE_GLOBAL_DATA_PTR;
73
ca5f80ae
KK
74static struct {
75 unsigned int device_vendor;
76 unsigned char revision;
77 unsigned char content;
78 char fab_revision[8];
79 char env_var[16];
80 char env_setting[64];
81} expansion_config;
82
58911517 83/*
f904cdbb
DB
84 * Routine: board_init
85 * Description: Early hardware init.
58911517 86 */
f904cdbb
DB
87int board_init(void)
88{
f904cdbb
DB
89 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
90 /* board id for Linux */
91 gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
92 /* boot param addr */
93 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
94
70d8c944
JK
95#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
96 status_led_set (STATUS_LED_BOOT, STATUS_LED_ON);
97#endif
98
f904cdbb
DB
99 return 0;
100}
101
58911517 102/*
06b95bd5
SS
103 * Routine: get_board_revision
104 * Description: Detect if we are running on a Beagle revision Ax/Bx,
08cbba2a 105 * C1/2/3, C4 or xM. This can be done by reading
06b95bd5
SS
106 * the level of GPIO173, GPIO172 and GPIO171. This should
107 * result in
108 * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
109 * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
110 * GPIO173, GPIO172, GPIO171: 1 0 1 => C4
08cbba2a 111 * GPIO173, GPIO172, GPIO171: 0 0 0 => xM
58911517 112 */
fff1a572 113static int get_board_revision(void)
f956fd03 114{
06b95bd5 115 int revision;
f956fd03 116
84c3b631
SP
117 if (!gpio_request(171, "") &&
118 !gpio_request(172, "") &&
119 !gpio_request(173, "")) {
718763c4 120
84c3b631
SP
121 gpio_direction_input(171);
122 gpio_direction_input(172);
123 gpio_direction_input(173);
718763c4 124
84c3b631
SP
125 revision = gpio_get_value(173) << 2 |
126 gpio_get_value(172) << 1 |
127 gpio_get_value(171);
06b95bd5
SS
128 } else {
129 printf("Error: unable to acquire board revision GPIOs\n");
130 revision = -1;
718763c4 131 }
f956fd03 132
06b95bd5 133 return revision;
f956fd03
DB
134}
135
75c57a35
TR
136#ifdef CONFIG_SPL_BUILD
137/*
138 * Routine: get_board_mem_timings
139 * Description: If we use SPL then there is no x-loader nor config header
140 * so we have to setup the DDR timings ourself on both banks.
141 */
142void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
143 u32 *mr)
144{
145 int pop_mfr, pop_id;
146
147 /*
148 * We need to identify what PoP memory is on the board so that
149 * we know what timings to use. If we can't identify it then
150 * we know it's an xM. To map the ID values please see nand_ids.c
151 */
152 identify_nand_chip(&pop_mfr, &pop_id);
153
154 *mr = MICRON_V_MR_165;
155 switch (get_board_revision()) {
156 case REVISION_C4:
157 if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
158 /* 512MB DDR */
159 *mcfg = NUMONYX_V_MCFG_165(512 << 20);
160 *ctrla = NUMONYX_V_ACTIMA_165;
161 *ctrlb = NUMONYX_V_ACTIMB_165;
162 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
163 break;
223b8aa4 164 } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
165 /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
166 *mcfg = MICRON_V_MCFG_165(128 << 20);
167 *ctrla = MICRON_V_ACTIMA_165;
168 *ctrlb = MICRON_V_ACTIMB_165;
169 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
170 break;
75c57a35
TR
171 } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
172 /* Beagleboard Rev C5, 256MB DDR */
173 *mcfg = MICRON_V_MCFG_200(256 << 20);
174 *ctrla = MICRON_V_ACTIMA_200;
175 *ctrlb = MICRON_V_ACTIMB_200;
176 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
177 break;
178 }
179 case REVISION_XM_A:
180 case REVISION_XM_B:
181 case REVISION_XM_C:
182 if (pop_mfr == 0) {
183 /* 256MB DDR */
184 *mcfg = MICRON_V_MCFG_200(256 << 20);
185 *ctrla = MICRON_V_ACTIMA_200;
186 *ctrlb = MICRON_V_ACTIMB_200;
187 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
188 } else {
189 /* 512MB DDR */
190 *mcfg = NUMONYX_V_MCFG_165(512 << 20);
191 *ctrla = NUMONYX_V_ACTIMA_165;
192 *ctrlb = NUMONYX_V_ACTIMB_165;
193 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
194 }
195 break;
196 default:
197 /* Assume 128MB and Micron/165MHz timings to be safe */
198 *mcfg = MICRON_V_MCFG_165(128 << 20);
199 *ctrla = MICRON_V_ACTIMA_165;
200 *ctrlb = MICRON_V_ACTIMB_165;
201 *rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
202 }
203}
204#endif
205
ca5f80ae
KK
206/*
207 * Routine: get_expansion_id
208 * Description: This function checks for expansion board by checking I2C
209 * bus 1 for the availability of an AT24C01B serial EEPROM.
210 * returns the device_vendor field from the EEPROM
211 */
fff1a572 212static unsigned int get_expansion_id(void)
ca5f80ae
KK
213{
214 i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
215
216 /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
217 if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
218 i2c_set_bus_num(TWL4030_I2C_BUS);
219 return BEAGLE_NO_EEPROM;
220 }
221
222 /* read configuration data */
223 i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
224 sizeof(expansion_config));
225
226 i2c_set_bus_num(TWL4030_I2C_BUS);
227
228 return expansion_config.device_vendor;
229}
230
2c30c184 231#ifdef CONFIG_VIDEO_OMAP3
3f16ab91
JK
232/*
233 * Configure DSS to display background color on DVID
234 * Configure VENC to display color bar on S-Video
235 */
fff1a572 236static void beagle_display_init(void)
3f16ab91
JK
237{
238 omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
239 switch (get_board_revision()) {
240 case REVISION_AXBX:
241 case REVISION_CX:
242 case REVISION_C4:
243 omap3_dss_panel_config(&dvid_cfg);
244 break;
245 case REVISION_XM_A:
246 case REVISION_XM_B:
247 case REVISION_XM_C:
248 default:
249 omap3_dss_panel_config(&dvid_cfg_xm);
250 break;
251 }
252}
253
4258aa62
PM
254/*
255 * Enable DVI power
256 */
3fbc6931
AG
257static void beagle_dvi_pup(void)
258{
4258aa62
PM
259 uchar val;
260
261 switch (get_board_revision()) {
262 case REVISION_AXBX:
263 case REVISION_CX:
264 case REVISION_C4:
265 case REVISION_XM_A:
266 gpio_request(170, "");
267 gpio_direction_output(170, 0);
268 gpio_set_value(170, 1);
269 break;
270 case REVISION_XM_B:
271 case REVISION_XM_C:
272 default:
273 #define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3)
274 #define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6)
275
276 i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
277 val |= 4;
278 i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
279
280 i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
281 val |= 4;
282 i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
283 break;
284 }
285}
2c30c184 286#endif
4258aa62 287
58911517 288/*
f904cdbb
DB
289 * Routine: misc_init_r
290 * Description: Configure board specific parts
58911517 291 */
f904cdbb
DB
292int misc_init_r(void)
293{
97a099ea
DB
294 struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
295 struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
f14a522a 296 struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;
d4e53f06
SK
297
298 /* Enable i2c2 pullup resisters */
299 writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1);
f904cdbb 300
06b95bd5
SS
301 switch (get_board_revision()) {
302 case REVISION_AXBX:
303 printf("Beagle Rev Ax/Bx\n");
304 setenv("beaglerev", "AxBx");
06b95bd5
SS
305 break;
306 case REVISION_CX:
307 printf("Beagle Rev C1/C2/C3\n");
308 setenv("beaglerev", "Cx");
06b95bd5
SS
309 MUX_BEAGLE_C();
310 break;
311 case REVISION_C4:
312 printf("Beagle Rev C4\n");
08cbba2a 313 setenv("beaglerev", "C4");
06b95bd5
SS
314 MUX_BEAGLE_C();
315 /* Set VAUX2 to 1.8V for EHCI PHY */
08cbba2a
SS
316 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
317 TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
318 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
319 TWL4030_PM_RECEIVER_DEV_GRP_P1);
320 break;
f6e593bb 321 case REVISION_XM_A:
08cbba2a
SS
322 printf("Beagle xM Rev A\n");
323 setenv("beaglerev", "xMA");
f6e593bb
KK
324 MUX_BEAGLE_XM();
325 /* Set VAUX2 to 1.8V for EHCI PHY */
326 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
327 TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
328 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
329 TWL4030_PM_RECEIVER_DEV_GRP_P1);
330 break;
331 case REVISION_XM_B:
332 printf("Beagle xM Rev B\n");
333 setenv("beaglerev", "xMB");
08cbba2a
SS
334 MUX_BEAGLE_XM();
335 /* Set VAUX2 to 1.8V for EHCI PHY */
1ffcb346
KK
336 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
337 TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
338 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
339 TWL4030_PM_RECEIVER_DEV_GRP_P1);
340 break;
341 case REVISION_XM_C:
342 printf("Beagle xM Rev C\n");
343 setenv("beaglerev", "xMC");
344 MUX_BEAGLE_XM();
345 /* Set VAUX2 to 1.8V for EHCI PHY */
06b95bd5
SS
346 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
347 TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
348 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
349 TWL4030_PM_RECEIVER_DEV_GRP_P1);
350 break;
351 default:
352 printf("Beagle unknown 0x%02x\n", get_board_revision());
f6e593bb
KK
353 MUX_BEAGLE_XM();
354 /* Set VAUX2 to 1.8V for EHCI PHY */
355 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
356 TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
357 TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
358 TWL4030_PM_RECEIVER_DEV_GRP_P1);
06b95bd5
SS
359 }
360
ca5f80ae
KK
361 switch (get_expansion_id()) {
362 case TINCANTOOLS_ZIPPY:
363 printf("Recognized Tincantools Zippy board (rev %d %s)\n",
364 expansion_config.revision,
365 expansion_config.fab_revision);
366 MUX_TINCANTOOLS_ZIPPY();
367 setenv("buddy", "zippy");
368 break;
369 case TINCANTOOLS_ZIPPY2:
370 printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
371 expansion_config.revision,
372 expansion_config.fab_revision);
373 MUX_TINCANTOOLS_ZIPPY();
374 setenv("buddy", "zippy2");
375 break;
376 case TINCANTOOLS_TRAINER:
377 printf("Recognized Tincantools Trainer board (rev %d %s)\n",
378 expansion_config.revision,
379 expansion_config.fab_revision);
380 MUX_TINCANTOOLS_ZIPPY();
381 MUX_TINCANTOOLS_TRAINER();
382 setenv("buddy", "trainer");
383 break;
384 case TINCANTOOLS_SHOWDOG:
385 printf("Recognized Tincantools Showdow board (rev %d %s)\n",
386 expansion_config.revision,
387 expansion_config.fab_revision);
388 /* Place holder for DSS2 definition for showdog lcd */
389 setenv("defaultdisplay", "showdoglcd");
390 setenv("buddy", "showdog");
391 break;
392 case KBADC_BEAGLEFPGA:
393 printf("Recognized KBADC Beagle FPGA board\n");
394 MUX_KBADC_BEAGLEFPGA();
395 setenv("buddy", "beaglefpga");
396 break;
ee8485fd
KK
397 case LW_BEAGLETOUCH:
398 printf("Recognized Liquidware BeagleTouch board\n");
399 setenv("buddy", "beagletouch");
400 break;
401 case BRAINMUX_LCDOG:
402 printf("Recognized Brainmux LCDog board\n");
403 setenv("buddy", "lcdog");
404 break;
405 case BRAINMUX_LCDOGTOUCH:
406 printf("Recognized Brainmux LCDog Touch board\n");
407 setenv("buddy", "lcdogtouch");
408 break;
409 case BBTOYS_WIFI:
410 printf("Recognized BeagleBoardToys WiFi board\n");
411 MUX_BBTOYS_WIFI()
412 setenv("buddy", "bbtoys-wifi");
413 break;;
414 case BBTOYS_VGA:
415 printf("Recognized BeagleBoardToys VGA board\n");
416 break;;
417 case BBTOYS_LCD:
418 printf("Recognized BeagleBoardToys LCD board\n");
419 break;;
6cce5504 420 case BCT_BRETTL3:
ef88e609
PM
421 printf("Recognized bct electronic GmbH brettl3 board\n");
422 break;
423 case BCT_BRETTL4:
424 printf("Recognized bct electronic GmbH brettl4 board\n");
425 break;
ca5f80ae
KK
426 case BEAGLE_NO_EEPROM:
427 printf("No EEPROM on expansion board\n");
428 setenv("buddy", "none");
429 break;
430 default:
431 printf("Unrecognized expansion board: %x\n",
432 expansion_config.device_vendor);
433 setenv("buddy", "unknown");
434 }
435
436 if (expansion_config.content == 1)
437 setenv(expansion_config.env_var, expansion_config.env_setting);
438
2c155130 439 twl4030_power_init();
38a77c3a
CS
440 switch (get_board_revision()) {
441 case REVISION_XM_A:
442 case REVISION_XM_B:
443 twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
444 break;
445 default:
446 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
447 break;
448 }
f904cdbb 449
52d82e40 450 /* Set GPIO states before they are made outputs */
f904cdbb
DB
451 writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
452 &gpio6_base->setdataout);
453 writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
454 GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
455
52d82e40
BF
456 /* Configure GPIOs to output */
457 writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
458 writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
459 GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
460
e6a6a704 461 dieid_num_r();
4258aa62 462
2c30c184 463#ifdef CONFIG_VIDEO_OMAP3
4258aa62 464 beagle_dvi_pup();
3f16ab91
JK
465 beagle_display_init();
466 omap3_dss_enable();
2c30c184 467#endif
e6a6a704 468
f904cdbb
DB
469 return 0;
470}
471
58911517 472/*
f904cdbb
DB
473 * Routine: set_muxconf_regs
474 * Description: Setting up the configuration Mux registers specific to the
475 * hardware. Many pins need to be moved from protect to primary
476 * mode.
58911517 477 */
f904cdbb
DB
478void set_muxconf_regs(void)
479{
480 MUX_BEAGLE();
481}
0cd31144 482
75c57a35 483#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
0cd31144
SS
484int board_mmc_init(bd_t *bis)
485{
bbbc1ae9 486 omap_mmc_init(0, 0, 0);
0cd31144
SS
487 return 0;
488}
489#endif
d90859a6 490
7ac2fe2d 491#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
d90859a6
AH
492/* Call usb_stop() before starting the kernel */
493void show_boot_progress(int val)
494{
578ac1e9 495 if (val == BOOTSTAGE_ID_RUN_OS)
d90859a6
AH
496 usb_stop();
497}
43b62393
G
498
499static struct omap_usbhs_board_data usbhs_bdata = {
500 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
501 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
502 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
503};
504
676ae068 505int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
43b62393 506{
676ae068 507 return omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
43b62393
G
508}
509
676ae068 510int ehci_hcd_stop(int index)
43b62393
G
511{
512 return omap_ehci_hcd_stop();
513}
514
d90859a6 515#endif /* CONFIG_USB_EHCI */