[people/ms/u-boot.git] / board / ti / beagle / beagle.c

/*
 * (C) Copyright 2004-2011
 * Texas Instruments, <www.ti.com>
 *
 * Author :
 *	Sunil Kumar <sunilsaini05@gmail.com>
 *	Shashi Ranjan <shashiranjanmca05@gmail.com>
 *
 * Derived from Beagle Board and 3430 SDP code by
 *	Richard Woodruff <r-woodruff2@ti.com>
 *	Syed Mohammed Khasim <khasim@ti.com>
 *
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#include <common.h>
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
#endif
#include <twl4030.h>
#include <linux/mtd/nand.h>
#include <asm/io.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/mux.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <asm/gpio.h>
#include <asm/mach-types.h>
#include <asm/omap_musb.h>
#include <asm/errno.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/musb.h>
#include "beagle.h"
#include <command.h>

#ifdef CONFIG_USB_EHCI
#include <usb.h>
#include <asm/ehci-omap.h>
#endif

#define TWL4030_I2C_BUS			0
#define EXPANSION_EEPROM_I2C_BUS	1
#define EXPANSION_EEPROM_I2C_ADDRESS	0x50

#define TINCANTOOLS_ZIPPY		0x01000100
#define TINCANTOOLS_ZIPPY2		0x02000100
#define TINCANTOOLS_TRAINER		0x04000100
#define TINCANTOOLS_SHOWDOG		0x03000100
#define KBADC_BEAGLEFPGA		0x01000600
#define LW_BEAGLETOUCH			0x01000700
#define BRAINMUX_LCDOG			0x01000800
#define BRAINMUX_LCDOGTOUCH		0x02000800
#define BBTOYS_WIFI			0x01000B00
#define BBTOYS_VGA			0x02000B00
#define BBTOYS_LCD			0x03000B00
#define BCT_BRETTL3			0x01000F00
#define BCT_BRETTL4			0x02000F00
#define LSR_COM6L_ADPT			0x01001300
#define BEAGLE_NO_EEPROM		0xffffffff

DECLARE_GLOBAL_DATA_PTR;

static struct {
	unsigned int device_vendor;
	unsigned char revision;
	unsigned char content;
	char fab_revision[8];
	char env_var[16];
	char env_setting[64];
} expansion_config;

/*
 * Routine: board_init
 * Description: Early hardware init.
 */
int board_init(void)
{
	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	/* board id for Linux */
	gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
	/* boot param addr */
	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);

#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
	status_led_set (STATUS_LED_BOOT, STATUS_LED_ON);
#endif

	return 0;
}

/*
 * Routine: get_board_revision
 * Description: Detect if we are running on a Beagle revision Ax/Bx,
 *		C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading
 *		the level of GPIO173, GPIO172 and GPIO171. This should
 *		result in
 *		GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
 *		GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
 *		GPIO173, GPIO172, GPIO171: 1 0 1 => C4
 *		GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx
 *		GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx
 */
static int get_board_revision(void)
{
	int revision;

	if (!gpio_request(171, "") &&
	    !gpio_request(172, "") &&
	    !gpio_request(173, "")) {

		gpio_direction_input(171);
		gpio_direction_input(172);
		gpio_direction_input(173);

		revision = gpio_get_value(173) << 2 |
			   gpio_get_value(172) << 1 |
			   gpio_get_value(171);
	} else {
		printf("Error: unable to acquire board revision GPIOs\n");
		revision = -1;
	}

	return revision;
}

#ifdef CONFIG_SPL_BUILD
/*
 * Routine: get_board_mem_timings
 * Description: If we use SPL then there is no x-loader nor config header
 * so we have to setup the DDR timings ourself on both banks.
 */
void get_board_mem_timings(struct board_sdrc_timings *timings)
{
	int pop_mfr, pop_id;

	/*
	 * We need to identify what PoP memory is on the board so that
	 * we know what timings to use.  If we can't identify it then
	 * we know it's an xM.  To map the ID values please see nand_ids.c
	 */
	identify_nand_chip(&pop_mfr, &pop_id);

	timings->mr = MICRON_V_MR_165;
	switch (get_board_revision()) {
	case REVISION_C4:
		if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
			/* 512MB DDR */
			timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
			timings->ctrla = NUMONYX_V_ACTIMA_165;
			timings->ctrlb = NUMONYX_V_ACTIMB_165;
			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
			break;
		} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
			/* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
			timings->mcfg = MICRON_V_MCFG_165(128 << 20);
			timings->ctrla = MICRON_V_ACTIMA_165;
			timings->ctrlb = MICRON_V_ACTIMB_165;
			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
			break;
		} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
			/* Beagleboard Rev C5, 256MB DDR */
			timings->mcfg = MICRON_V_MCFG_200(256 << 20);
			timings->ctrla = MICRON_V_ACTIMA_200;
			timings->ctrlb = MICRON_V_ACTIMB_200;
			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
			break;
		}
	case REVISION_XM_AB:
	case REVISION_XM_C:
		if (pop_mfr == 0) {
			/* 256MB DDR */
			timings->mcfg = MICRON_V_MCFG_200(256 << 20);
			timings->ctrla = MICRON_V_ACTIMA_200;
			timings->ctrlb = MICRON_V_ACTIMB_200;
			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
		} else {
			/* 512MB DDR */
			timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
			timings->ctrla = NUMONYX_V_ACTIMA_165;
			timings->ctrlb = NUMONYX_V_ACTIMB_165;
			timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
		}
		break;
	default:
		/* Assume 128MB and Micron/165MHz timings to be safe */
		timings->mcfg = MICRON_V_MCFG_165(128 << 20);
		timings->ctrla = MICRON_V_ACTIMA_165;
		timings->ctrlb = MICRON_V_ACTIMB_165;
		timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
	}
}
#endif

/*
 * Routine: get_expansion_id
 * Description: This function checks for expansion board by checking I2C
 *		bus 1 for the availability of an AT24C01B serial EEPROM.
 *		returns the device_vendor field from the EEPROM
 */
static unsigned int get_expansion_id(void)
{
	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);

	/* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
		i2c_set_bus_num(TWL4030_I2C_BUS);
		return BEAGLE_NO_EEPROM;
	}

	/* read configuration data */
	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
		 sizeof(expansion_config));

	/* retry reading configuration data with 16bit addressing */
	if ((expansion_config.device_vendor == 0xFFFFFF00) ||
	    (expansion_config.device_vendor == 0xFFFFFFFF)) {
		printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n");
		i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config,
			 sizeof(expansion_config));
	}

	i2c_set_bus_num(TWL4030_I2C_BUS);

	return expansion_config.device_vendor;
}

#ifdef CONFIG_VIDEO_OMAP3
/*
 * Configure DSS to display background color on DVID
 * Configure VENC to display color bar on S-Video
 */
static void beagle_display_init(void)
{
	omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
	switch (get_board_revision()) {
	case REVISION_AXBX:
	case REVISION_CX:
	case REVISION_C4:
		omap3_dss_panel_config(&dvid_cfg);
		break;
	case REVISION_XM_AB:
	case REVISION_XM_C:
	default:
		omap3_dss_panel_config(&dvid_cfg_xm);
		break;
	}
}

/*
 * Enable DVI power
 */
static void beagle_dvi_pup(void)
{
	uchar val;

	switch (get_board_revision()) {
	case REVISION_AXBX:
	case REVISION_CX:
	case REVISION_C4:
		gpio_request(170, "");
		gpio_direction_output(170, 0);
		gpio_set_value(170, 1);
		break;
	case REVISION_XM_AB:
	case REVISION_XM_C:
	default:
		#define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3)
		#define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6)

		i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
		val |= 4;
		i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);

		i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
		val |= 4;
		i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
		break;
	}
}
#endif

#ifdef CONFIG_USB_MUSB_OMAP2PLUS
static struct musb_hdrc_config musb_config = {
	.multipoint     = 1,
	.dyn_fifo       = 1,
	.num_eps        = 16,
	.ram_bits       = 12,
};

static struct omap_musb_board_data musb_board_data = {
	.interface_type	= MUSB_INTERFACE_ULPI,
};

static struct musb_hdrc_platform_data musb_plat = {
#if defined(CONFIG_MUSB_HOST)
	.mode           = MUSB_HOST,
#elif defined(CONFIG_MUSB_GADGET)
	.mode		= MUSB_PERIPHERAL,
#else
#error "Please define either CONFIG_MUSB_HOST or CONFIG_MUSB_GADGET"
#endif
	.config         = &musb_config,
	.power          = 100,
	.platform_ops	= &omap2430_ops,
	.board_data	= &musb_board_data,
};
#endif

/*
 * Routine: misc_init_r
 * Description: Configure board specific parts
 */
int misc_init_r(void)
{
	struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
	struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
	struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE;

	/* Enable i2c2 pullup resisters */
	writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1);

	switch (get_board_revision()) {
	case REVISION_AXBX:
		printf("Beagle Rev Ax/Bx\n");
		setenv("beaglerev", "AxBx");
		break;
	case REVISION_CX:
		printf("Beagle Rev C1/C2/C3\n");
		setenv("beaglerev", "Cx");
		MUX_BEAGLE_C();
		break;
	case REVISION_C4:
		printf("Beagle Rev C4\n");
		setenv("beaglerev", "C4");
		MUX_BEAGLE_C();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		break;
	case REVISION_XM_AB:
		printf("Beagle xM Rev A/B\n");
		setenv("beaglerev", "xMAB");
		MUX_BEAGLE_XM();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		break;
	case REVISION_XM_C:
		printf("Beagle xM Rev C\n");
		setenv("beaglerev", "xMC");
		MUX_BEAGLE_XM();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
		break;
	default:
		printf("Beagle unknown 0x%02x\n", get_board_revision());
		MUX_BEAGLE_XM();
		/* Set VAUX2 to 1.8V for EHCI PHY */
		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
					TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
					TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
					TWL4030_PM_RECEIVER_DEV_GRP_P1);
	}

	switch (get_expansion_id()) {
	case TINCANTOOLS_ZIPPY:
		printf("Recognized Tincantools Zippy board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_TINCANTOOLS_ZIPPY();
		setenv("buddy", "zippy");
		break;
	case TINCANTOOLS_ZIPPY2:
		printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_TINCANTOOLS_ZIPPY();
		setenv("buddy", "zippy2");
		break;
	case TINCANTOOLS_TRAINER:
		printf("Recognized Tincantools Trainer board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		MUX_TINCANTOOLS_ZIPPY();
		MUX_TINCANTOOLS_TRAINER();
		setenv("buddy", "trainer");
		break;
	case TINCANTOOLS_SHOWDOG:
		printf("Recognized Tincantools Showdow board (rev %d %s)\n",
			expansion_config.revision,
			expansion_config.fab_revision);
		/* Place holder for DSS2 definition for showdog lcd */
		setenv("defaultdisplay", "showdoglcd");
		setenv("buddy", "showdog");
		break;
	case KBADC_BEAGLEFPGA:
		printf("Recognized KBADC Beagle FPGA board\n");
		MUX_KBADC_BEAGLEFPGA();
		setenv("buddy", "beaglefpga");
		break;
	case LW_BEAGLETOUCH:
		printf("Recognized Liquidware BeagleTouch board\n");
		setenv("buddy", "beagletouch");
		break;
	case BRAINMUX_LCDOG:
		printf("Recognized Brainmux LCDog board\n");
		setenv("buddy", "lcdog");
		break;
	case BRAINMUX_LCDOGTOUCH:
		printf("Recognized Brainmux LCDog Touch board\n");
		setenv("buddy", "lcdogtouch");
		break;
	case BBTOYS_WIFI:
		printf("Recognized BeagleBoardToys WiFi board\n");
		MUX_BBTOYS_WIFI()
		setenv("buddy", "bbtoys-wifi");
		break;;
	case BBTOYS_VGA:
		printf("Recognized BeagleBoardToys VGA board\n");
		break;;
	case BBTOYS_LCD:
		printf("Recognized BeagleBoardToys LCD board\n");
		break;;
	case BCT_BRETTL3:
		printf("Recognized bct electronic GmbH brettl3 board\n");
		break;
	case BCT_BRETTL4:
		printf("Recognized bct electronic GmbH brettl4 board\n");
		break;
	case LSR_COM6L_ADPT:
		printf("Recognized LSR COM6L Adapter Board\n");
		MUX_BBTOYS_WIFI()
		setenv("buddy", "lsr-com6l-adpt");
		break;
	case BEAGLE_NO_EEPROM:
		printf("No EEPROM on expansion board\n");
		setenv("buddy", "none");
		break;
	default:
		printf("Unrecognized expansion board: %x\n",
			expansion_config.device_vendor);
		setenv("buddy", "unknown");
	}

	if (expansion_config.content == 1)
		setenv(expansion_config.env_var, expansion_config.env_setting);

	twl4030_power_init();
	switch (get_board_revision()) {
	case REVISION_XM_AB:
		twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
		break;
	default:
		twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
		break;
	}

	/* Set GPIO states before they are made outputs */
	writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1,
		&gpio6_base->setdataout);
	writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
		GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);

	/* Configure GPIOs to output */
	writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
	writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
		GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);

	dieid_num_r();

#ifdef CONFIG_VIDEO_OMAP3
	beagle_dvi_pup();
	beagle_display_init();
	omap3_dss_enable();
#endif

#ifdef CONFIG_USB_MUSB_OMAP2PLUS
	musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
#endif

	return 0;
}

/*
 * Routine: set_muxconf_regs
 * Description: Setting up the configuration Mux registers specific to the
 *		hardware. Many pins need to be moved from protect to primary
 *		mode.
 */
void set_muxconf_regs(void)
{
	MUX_BEAGLE();
}

#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
	return omap_mmc_init(0, 0, 0, -1, -1);
}
#endif

#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
/* Call usb_stop() before starting the kernel */
void show_boot_progress(int val)
{
	if (val == BOOTSTAGE_ID_RUN_OS)
		usb_stop();
}

static struct omap_usbhs_board_data usbhs_bdata = {
	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
};

int ehci_hcd_init(int index, enum usb_init_type init,
		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
}

int ehci_hcd_stop(int index)
{
	return omap_ehci_hcd_stop();
}

#endif /* CONFIG_USB_EHCI */

#if defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)
int board_eth_init(bd_t *bis)
{
	return usb_eth_initialize(bis);
}
#endif
Commit	Line	Data
f904cdbb	1	/*
75c57a35	2	* (C) Copyright 2004-2011
f904cdbb DB	3	* Texas Instruments, <www.ti.com>
	4	*
	5	* Author :
	6	* Sunil Kumar <sunilsaini05@gmail.com>
	7	* Shashi Ranjan <shashiranjanmca05@gmail.com>
	8	*
	9	* Derived from Beagle Board and 3430 SDP code by
	10	* Richard Woodruff <r-woodruff2@ti.com>
	11	* Syed Mohammed Khasim <khasim@ti.com>
	12	*
	13	*
1a459660	14	* SPDX-License-Identifier: GPL-2.0+
f904cdbb DB	15	*/
f904cdbb DB	16	#include <common.h>
70d8c944 JK	17	#ifdef CONFIG_STATUS_LED
	18	#include <status_led.h>
	19	#endif
2c155130	20	#include <twl4030.h>
75c57a35	21	#include <linux/mtd/nand.h>
f904cdbb	22	#include <asm/io.h>
0cd31144	23	#include <asm/arch/mmc_host_def.h>
f904cdbb	24	#include <asm/arch/mux.h>
75c57a35	25	#include <asm/arch/mem.h>
f904cdbb	26	#include <asm/arch/sys_proto.h>
84c3b631	27	#include <asm/gpio.h>
f904cdbb	28	#include <asm/mach-types.h>
c642b151 IY	29	#include <asm/omap_musb.h>
	30	#include <asm/errno.h>
	31	#include <linux/usb/ch9.h>
	32	#include <linux/usb/gadget.h>
	33	#include <linux/usb/musb.h>
f904cdbb	34	#include "beagle.h"
f835ea71	35	#include <command.h>
f904cdbb	36
43b62393 G	37	#ifdef CONFIG_USB_EHCI
	38	#include <usb.h>
	39	#include <asm/ehci-omap.h>
	40	#endif
	41
ca5f80ae KK	42	#define TWL4030_I2C_BUS 0
	43	#define EXPANSION_EEPROM_I2C_BUS 1
	44	#define EXPANSION_EEPROM_I2C_ADDRESS 0x50
	45
	46	#define TINCANTOOLS_ZIPPY 0x01000100
	47	#define TINCANTOOLS_ZIPPY2 0x02000100
	48	#define TINCANTOOLS_TRAINER 0x04000100
	49	#define TINCANTOOLS_SHOWDOG 0x03000100
	50	#define KBADC_BEAGLEFPGA 0x01000600
ee8485fd KK	51	#define LW_BEAGLETOUCH 0x01000700
	52	#define BRAINMUX_LCDOG 0x01000800
	53	#define BRAINMUX_LCDOGTOUCH 0x02000800
	54	#define BBTOYS_WIFI 0x01000B00
	55	#define BBTOYS_VGA 0x02000B00
	56	#define BBTOYS_LCD 0x03000B00
6cce5504	57	#define BCT_BRETTL3 0x01000F00
ef88e609	58	#define BCT_BRETTL4 0x02000F00
8a1f2dc0	59	#define LSR_COM6L_ADPT 0x01001300
ca5f80ae KK	60	#define BEAGLE_NO_EEPROM 0xffffffff
ca5f80ae KK	61
29565326 JR	62	DECLARE_GLOBAL_DATA_PTR;
29565326 JR	63
ca5f80ae KK	64	static struct {
	65	unsigned int device_vendor;
	66	unsigned char revision;
	67	unsigned char content;
	68	char fab_revision[8];
	69	char env_var[16];
	70	char env_setting[64];
	71	} expansion_config;
	72
58911517	73	/*
f904cdbb DB	74	* Routine: board_init
f904cdbb DB	75	* Description: Early hardware init.
58911517	76	*/
f904cdbb DB	77	int board_init(void)
f904cdbb DB	78	{
f904cdbb DB	79	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
	80	/* board id for Linux */
	81	gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
	82	/* boot param addr */
	83	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
	84
70d8c944 JK	85	#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
	86	status_led_set (STATUS_LED_BOOT, STATUS_LED_ON);
	87	#endif
	88
f904cdbb DB	89	return 0;
	90	}
	91
58911517	92	/*
06b95bd5 SS	93	* Routine: get_board_revision
06b95bd5 SS	94	* Description: Detect if we are running on a Beagle revision Ax/Bx,
8ce4e5f9	95	* C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading
06b95bd5 SS	96	* the level of GPIO173, GPIO172 and GPIO171. This should
	97	* result in
	98	* GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
	99	* GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
	100	* GPIO173, GPIO172, GPIO171: 1 0 1 => C4
8ce4e5f9 TR	101	* GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx
8ce4e5f9 TR	102	* GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx
58911517	103	*/
fff1a572	104	static int get_board_revision(void)
f956fd03	105	{
06b95bd5	106	int revision;
f956fd03	107
84c3b631 SP	108	if (!gpio_request(171, "") &&
	109	!gpio_request(172, "") &&
	110	!gpio_request(173, "")) {
718763c4	111
84c3b631 SP	112	gpio_direction_input(171);
	113	gpio_direction_input(172);
	114	gpio_direction_input(173);
718763c4	115
84c3b631 SP	116	revision = gpio_get_value(173) << 2 \|
	117	gpio_get_value(172) << 1 \|
	118	gpio_get_value(171);
06b95bd5 SS	119	} else {
	120	printf("Error: unable to acquire board revision GPIOs\n");
	121	revision = -1;
718763c4	122	}
f956fd03	123
06b95bd5	124	return revision;
f956fd03 DB	125	}
f956fd03 DB	126
75c57a35 TR	127	#ifdef CONFIG_SPL_BUILD
	128	/*
	129	* Routine: get_board_mem_timings
	130	* Description: If we use SPL then there is no x-loader nor config header
	131	* so we have to setup the DDR timings ourself on both banks.
	132	*/
8c4445d2	133	void get_board_mem_timings(struct board_sdrc_timings *timings)
75c57a35 TR	134	{
	135	int pop_mfr, pop_id;
	136
	137	/*
	138	* We need to identify what PoP memory is on the board so that
	139	* we know what timings to use. If we can't identify it then
	140	* we know it's an xM. To map the ID values please see nand_ids.c
	141	*/
	142	identify_nand_chip(&pop_mfr, &pop_id);
	143
8c4445d2	144	timings->mr = MICRON_V_MR_165;
75c57a35 TR	145	switch (get_board_revision()) {
	146	case REVISION_C4:
	147	if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) {
	148	/* 512MB DDR */
8c4445d2 PB	149	timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
	150	timings->ctrla = NUMONYX_V_ACTIMA_165;
	151	timings->ctrlb = NUMONYX_V_ACTIMB_165;
	152	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
75c57a35	153	break;
223b8aa4	154	} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) {
223b8aa4	155	/* Beagleboard Rev C4, 512MB Nand/256MB DDR*/
8c4445d2 PB	156	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
	157	timings->ctrla = MICRON_V_ACTIMA_165;
	158	timings->ctrlb = MICRON_V_ACTIMB_165;
	159	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
223b8aa4	160	break;
75c57a35 TR	161	} else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) {
75c57a35 TR	162	/* Beagleboard Rev C5, 256MB DDR */
8c4445d2 PB	163	timings->mcfg = MICRON_V_MCFG_200(256 << 20);
	164	timings->ctrla = MICRON_V_ACTIMA_200;
	165	timings->ctrlb = MICRON_V_ACTIMB_200;
	166	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
75c57a35 TR	167	break;
75c57a35 TR	168	}
af4d896f	169	case REVISION_XM_AB:
75c57a35 TR	170	case REVISION_XM_C:
	171	if (pop_mfr == 0) {
	172	/* 256MB DDR */
8c4445d2 PB	173	timings->mcfg = MICRON_V_MCFG_200(256 << 20);
	174	timings->ctrla = MICRON_V_ACTIMA_200;
	175	timings->ctrlb = MICRON_V_ACTIMB_200;
	176	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
75c57a35 TR	177	} else {
75c57a35 TR	178	/* 512MB DDR */
8c4445d2 PB	179	timings->mcfg = NUMONYX_V_MCFG_165(512 << 20);
	180	timings->ctrla = NUMONYX_V_ACTIMA_165;
	181	timings->ctrlb = NUMONYX_V_ACTIMB_165;
	182	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
75c57a35 TR	183	}
	184	break;
	185	default:
	186	/* Assume 128MB and Micron/165MHz timings to be safe */
8c4445d2 PB	187	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
	188	timings->ctrla = MICRON_V_ACTIMA_165;
	189	timings->ctrlb = MICRON_V_ACTIMB_165;
	190	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
75c57a35 TR	191	}
	192	}
	193	#endif
	194
ca5f80ae KK	195	/*
	196	* Routine: get_expansion_id
	197	* Description: This function checks for expansion board by checking I2C
	198	* bus 1 for the availability of an AT24C01B serial EEPROM.
	199	* returns the device_vendor field from the EEPROM
	200	*/
fff1a572	201	static unsigned int get_expansion_id(void)
ca5f80ae KK	202	{
	203	i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
	204
	205	/* return BEAGLE_NO_EEPROM if eeprom doesn't respond */
	206	if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
	207	i2c_set_bus_num(TWL4030_I2C_BUS);
	208	return BEAGLE_NO_EEPROM;
	209	}
	210
	211	/* read configuration data */
	212	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
	213	sizeof(expansion_config));
	214
ff229ecf	215	/* retry reading configuration data with 16bit addressing */
	216	if ((expansion_config.device_vendor == 0xFFFFFF00) \|\|
	217	(expansion_config.device_vendor == 0xFFFFFFFF)) {
	218	printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n");
	219	i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config,
	220	sizeof(expansion_config));
	221	}
	222
ca5f80ae KK	223	i2c_set_bus_num(TWL4030_I2C_BUS);
	224
	225	return expansion_config.device_vendor;
	226	}
	227
2c30c184	228	#ifdef CONFIG_VIDEO_OMAP3
3f16ab91 JK	229	/*
	230	* Configure DSS to display background color on DVID
	231	* Configure VENC to display color bar on S-Video
	232	*/
fff1a572	233	static void beagle_display_init(void)
3f16ab91 JK	234	{
	235	omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH);
	236	switch (get_board_revision()) {
	237	case REVISION_AXBX:
	238	case REVISION_CX:
	239	case REVISION_C4:
	240	omap3_dss_panel_config(&dvid_cfg);
	241	break;
af4d896f	242	case REVISION_XM_AB:
3f16ab91 JK	243	case REVISION_XM_C:
	244	default:
	245	omap3_dss_panel_config(&dvid_cfg_xm);
	246	break;
	247	}
	248	}
	249
4258aa62 PM	250	/*
	251	* Enable DVI power
	252	*/
3fbc6931 AG	253	static void beagle_dvi_pup(void)
3fbc6931 AG	254	{
4258aa62 PM	255	uchar val;
	256
	257	switch (get_board_revision()) {
	258	case REVISION_AXBX:
	259	case REVISION_CX:
	260	case REVISION_C4:
4258aa62 PM	261	gpio_request(170, "");
	262	gpio_direction_output(170, 0);
	263	gpio_set_value(170, 1);
	264	break;
af4d896f	265	case REVISION_XM_AB:
4258aa62 PM	266	case REVISION_XM_C:
	267	default:
	268	#define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3)
	269	#define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6)
	270
	271	i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
	272	val \|= 4;
	273	i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1);
	274
	275	i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
	276	val \|= 4;
	277	i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1);
	278	break;
	279	}
	280	}
2c30c184	281	#endif
4258aa62	282
c642b151 IY	283	#ifdef CONFIG_USB_MUSB_OMAP2PLUS
	284	static struct musb_hdrc_config musb_config = {
	285	.multipoint = 1,
	286	.dyn_fifo = 1,
	287	.num_eps = 16,
	288	.ram_bits = 12,
	289	};
	290
	291	static struct omap_musb_board_data musb_board_data = {
	292	.interface_type = MUSB_INTERFACE_ULPI,
	293	};
	294
	295	static struct musb_hdrc_platform_data musb_plat = {
	296	#if defined(CONFIG_MUSB_HOST)
	297	.mode = MUSB_HOST,
	298	#elif defined(CONFIG_MUSB_GADGET)
	299	.mode = MUSB_PERIPHERAL,
	300	#else
	301	#error "Please define either CONFIG_MUSB_HOST or CONFIG_MUSB_GADGET"
	302	#endif
	303	.config = &musb_config,
	304	.power = 100,
	305	.platform_ops = &omap2430_ops,
	306	.board_data = &musb_board_data,
	307	};
	308	#endif
	309
58911517	310	/*
f904cdbb DB	311	* Routine: misc_init_r
f904cdbb DB	312	* Description: Configure board specific parts
58911517	313	*/
f904cdbb DB	314	int misc_init_r(void)
f904cdbb DB	315	{
97a099ea DB	316	struct gpio gpio5_base = (struct gpio )OMAP34XX_GPIO5_BASE;
97a099ea DB	317	struct gpio gpio6_base = (struct gpio )OMAP34XX_GPIO6_BASE;
f14a522a	318	struct control_prog_io prog_io_base = (struct control_prog_io )OMAP34XX_CTRL_BASE;
d4e53f06 SK	319
	320	/* Enable i2c2 pullup resisters */
	321	writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1);
f904cdbb	322
06b95bd5 SS	323	switch (get_board_revision()) {
	324	case REVISION_AXBX:
	325	printf("Beagle Rev Ax/Bx\n");
	326	setenv("beaglerev", "AxBx");
06b95bd5 SS	327	break;
	328	case REVISION_CX:
	329	printf("Beagle Rev C1/C2/C3\n");
	330	setenv("beaglerev", "Cx");
06b95bd5 SS	331	MUX_BEAGLE_C();
	332	break;
	333	case REVISION_C4:
	334	printf("Beagle Rev C4\n");
08cbba2a	335	setenv("beaglerev", "C4");
06b95bd5 SS	336	MUX_BEAGLE_C();
06b95bd5 SS	337	/* Set VAUX2 to 1.8V for EHCI PHY */
08cbba2a SS	338	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	339	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	340	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	341	TWL4030_PM_RECEIVER_DEV_GRP_P1);
	342	break;
af4d896f NM	343	case REVISION_XM_AB:
	344	printf("Beagle xM Rev A/B\n");
	345	setenv("beaglerev", "xMAB");
08cbba2a SS	346	MUX_BEAGLE_XM();
08cbba2a SS	347	/* Set VAUX2 to 1.8V for EHCI PHY */
1ffcb346 KK	348	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	349	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	350	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	351	TWL4030_PM_RECEIVER_DEV_GRP_P1);
	352	break;
	353	case REVISION_XM_C:
	354	printf("Beagle xM Rev C\n");
	355	setenv("beaglerev", "xMC");
	356	MUX_BEAGLE_XM();
	357	/* Set VAUX2 to 1.8V for EHCI PHY */
06b95bd5 SS	358	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	359	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	360	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	361	TWL4030_PM_RECEIVER_DEV_GRP_P1);
	362	break;
	363	default:
	364	printf("Beagle unknown 0x%02x\n", get_board_revision());
f6e593bb KK	365	MUX_BEAGLE_XM();
	366	/* Set VAUX2 to 1.8V for EHCI PHY */
	367	twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED,
	368	TWL4030_PM_RECEIVER_VAUX2_VSEL_18,
	369	TWL4030_PM_RECEIVER_VAUX2_DEV_GRP,
	370	TWL4030_PM_RECEIVER_DEV_GRP_P1);
06b95bd5 SS	371	}
06b95bd5 SS	372
ca5f80ae KK	373	switch (get_expansion_id()) {
	374	case TINCANTOOLS_ZIPPY:
	375	printf("Recognized Tincantools Zippy board (rev %d %s)\n",
	376	expansion_config.revision,
	377	expansion_config.fab_revision);
	378	MUX_TINCANTOOLS_ZIPPY();
	379	setenv("buddy", "zippy");
	380	break;
	381	case TINCANTOOLS_ZIPPY2:
	382	printf("Recognized Tincantools Zippy2 board (rev %d %s)\n",
	383	expansion_config.revision,
	384	expansion_config.fab_revision);
	385	MUX_TINCANTOOLS_ZIPPY();
	386	setenv("buddy", "zippy2");
	387	break;
	388	case TINCANTOOLS_TRAINER:
	389	printf("Recognized Tincantools Trainer board (rev %d %s)\n",
	390	expansion_config.revision,
	391	expansion_config.fab_revision);
	392	MUX_TINCANTOOLS_ZIPPY();
	393	MUX_TINCANTOOLS_TRAINER();
	394	setenv("buddy", "trainer");
	395	break;
	396	case TINCANTOOLS_SHOWDOG:
	397	printf("Recognized Tincantools Showdow board (rev %d %s)\n",
	398	expansion_config.revision,
	399	expansion_config.fab_revision);
	400	/* Place holder for DSS2 definition for showdog lcd */
	401	setenv("defaultdisplay", "showdoglcd");
	402	setenv("buddy", "showdog");
	403	break;
	404	case KBADC_BEAGLEFPGA:
	405	printf("Recognized KBADC Beagle FPGA board\n");
	406	MUX_KBADC_BEAGLEFPGA();
	407	setenv("buddy", "beaglefpga");
	408	break;
ee8485fd KK	409	case LW_BEAGLETOUCH:
	410	printf("Recognized Liquidware BeagleTouch board\n");
	411	setenv("buddy", "beagletouch");
	412	break;
	413	case BRAINMUX_LCDOG:
	414	printf("Recognized Brainmux LCDog board\n");
	415	setenv("buddy", "lcdog");
	416	break;
	417	case BRAINMUX_LCDOGTOUCH:
	418	printf("Recognized Brainmux LCDog Touch board\n");
	419	setenv("buddy", "lcdogtouch");
	420	break;
	421	case BBTOYS_WIFI:
	422	printf("Recognized BeagleBoardToys WiFi board\n");
	423	MUX_BBTOYS_WIFI()
	424	setenv("buddy", "bbtoys-wifi");
	425	break;;
	426	case BBTOYS_VGA:
	427	printf("Recognized BeagleBoardToys VGA board\n");
	428	break;;
	429	case BBTOYS_LCD:
	430	printf("Recognized BeagleBoardToys LCD board\n");
	431	break;;
6cce5504	432	case BCT_BRETTL3:
ef88e609 PM	433	printf("Recognized bct electronic GmbH brettl3 board\n");
	434	break;
	435	case BCT_BRETTL4:
	436	printf("Recognized bct electronic GmbH brettl4 board\n");
	437	break;
8a1f2dc0	438	case LSR_COM6L_ADPT:
	439	printf("Recognized LSR COM6L Adapter Board\n");
	440	MUX_BBTOYS_WIFI()
	441	setenv("buddy", "lsr-com6l-adpt");
	442	break;
ca5f80ae KK	443	case BEAGLE_NO_EEPROM:
	444	printf("No EEPROM on expansion board\n");
	445	setenv("buddy", "none");
	446	break;
	447	default:
	448	printf("Unrecognized expansion board: %x\n",
	449	expansion_config.device_vendor);
	450	setenv("buddy", "unknown");
	451	}
	452
	453	if (expansion_config.content == 1)
	454	setenv(expansion_config.env_var, expansion_config.env_setting);
	455
2c155130	456	twl4030_power_init();
38a77c3a	457	switch (get_board_revision()) {
af4d896f	458	case REVISION_XM_AB:
38a77c3a CS	459	twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
	460	break;
	461	default:
	462	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON \| TWL4030_LED_LEDEN_LEDBON);
	463	break;
	464	}
f904cdbb	465
52d82e40	466	/* Set GPIO states before they are made outputs */
f904cdbb DB	467	writel(GPIO23 \| GPIO10 \| GPIO8 \| GPIO2 \| GPIO1,
	468	&gpio6_base->setdataout);
	469	writel(GPIO31 \| GPIO30 \| GPIO29 \| GPIO28 \| GPIO22 \| GPIO21 \|
	470	GPIO15 \| GPIO14 \| GPIO13 \| GPIO12, &gpio5_base->setdataout);
	471
52d82e40 BF	472	/* Configure GPIOs to output */
	473	writel(~(GPIO23 \| GPIO10 \| GPIO8 \| GPIO2 \| GPIO1), &gpio6_base->oe);
	474	writel(~(GPIO31 \| GPIO30 \| GPIO29 \| GPIO28 \| GPIO22 \| GPIO21 \|
	475	GPIO15 \| GPIO14 \| GPIO13 \| GPIO12), &gpio5_base->oe);
	476
e6a6a704	477	dieid_num_r();
4258aa62	478
2c30c184	479	#ifdef CONFIG_VIDEO_OMAP3
4258aa62	480	beagle_dvi_pup();
3f16ab91 JK	481	beagle_display_init();
3f16ab91 JK	482	omap3_dss_enable();
2c30c184	483	#endif
e6a6a704	484
c642b151 IY	485	#ifdef CONFIG_USB_MUSB_OMAP2PLUS
	486	musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
	487	#endif
	488
f904cdbb DB	489	return 0;
	490	}
	491
58911517	492	/*
f904cdbb DB	493	* Routine: set_muxconf_regs
	494	* Description: Setting up the configuration Mux registers specific to the
	495	* hardware. Many pins need to be moved from protect to primary
	496	* mode.
58911517	497	*/
f904cdbb DB	498	void set_muxconf_regs(void)
	499	{
	500	MUX_BEAGLE();
	501	}
0cd31144	502
75c57a35	503	#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
0cd31144 SS	504	int board_mmc_init(bd_t *bis)
0cd31144 SS	505	{
e3913f56	506	return omap_mmc_init(0, 0, 0, -1, -1);
0cd31144 SS	507	}
0cd31144 SS	508	#endif
d90859a6	509
7ac2fe2d	510	#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
d90859a6 AH	511	/* Call usb_stop() before starting the kernel */
	512	void show_boot_progress(int val)
	513	{
578ac1e9	514	if (val == BOOTSTAGE_ID_RUN_OS)
d90859a6 AH	515	usb_stop();
d90859a6 AH	516	}
43b62393 G	517
	518	static struct omap_usbhs_board_data usbhs_bdata = {
	519	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
	520	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
	521	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
	522	};
	523
127efc4f TK	524	int ehci_hcd_init(int index, enum usb_init_type init,
127efc4f TK	525	struct ehci_hccr hccr, struct ehci_hcor hcor)
43b62393	526	{
16297cfb	527	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
43b62393 G	528	}
43b62393 G	529
676ae068	530	int ehci_hcd_stop(int index)
43b62393 G	531	{
	532	return omap_ehci_hcd_stop();
	533	}
	534
d90859a6	535	#endif /* CONFIG_USB_EHCI */
c642b151 IY	536
	537	#if defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)
	538	int board_eth_init(bd_t *bis)
	539	{
	540	return usb_eth_initialize(bis);
	541	}
	542	#endif