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Commit | Line | Data |
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f904cdbb | 1 | /* |
75c57a35 | 2 | * (C) Copyright 2004-2011 |
f904cdbb DB |
3 | * Texas Instruments, <www.ti.com> |
4 | * | |
5 | * Author : | |
6 | * Sunil Kumar <sunilsaini05@gmail.com> | |
7 | * Shashi Ranjan <shashiranjanmca05@gmail.com> | |
8 | * | |
9 | * Derived from Beagle Board and 3430 SDP code by | |
10 | * Richard Woodruff <r-woodruff2@ti.com> | |
11 | * Syed Mohammed Khasim <khasim@ti.com> | |
12 | * | |
13 | * | |
1a459660 | 14 | * SPDX-License-Identifier: GPL-2.0+ |
f904cdbb DB |
15 | */ |
16 | #include <common.h> | |
70d8c944 JK |
17 | #ifdef CONFIG_STATUS_LED |
18 | #include <status_led.h> | |
19 | #endif | |
2c155130 | 20 | #include <twl4030.h> |
75c57a35 | 21 | #include <linux/mtd/nand.h> |
f904cdbb | 22 | #include <asm/io.h> |
0cd31144 | 23 | #include <asm/arch/mmc_host_def.h> |
f904cdbb | 24 | #include <asm/arch/mux.h> |
75c57a35 | 25 | #include <asm/arch/mem.h> |
f904cdbb | 26 | #include <asm/arch/sys_proto.h> |
84c3b631 | 27 | #include <asm/gpio.h> |
f904cdbb | 28 | #include <asm/mach-types.h> |
c642b151 IY |
29 | #include <asm/omap_musb.h> |
30 | #include <asm/errno.h> | |
31 | #include <linux/usb/ch9.h> | |
32 | #include <linux/usb/gadget.h> | |
33 | #include <linux/usb/musb.h> | |
f904cdbb | 34 | #include "beagle.h" |
f835ea71 | 35 | #include <command.h> |
f904cdbb | 36 | |
43b62393 G |
37 | #ifdef CONFIG_USB_EHCI |
38 | #include <usb.h> | |
39 | #include <asm/ehci-omap.h> | |
40 | #endif | |
41 | ||
ca5f80ae KK |
42 | #define TWL4030_I2C_BUS 0 |
43 | #define EXPANSION_EEPROM_I2C_BUS 1 | |
44 | #define EXPANSION_EEPROM_I2C_ADDRESS 0x50 | |
45 | ||
46 | #define TINCANTOOLS_ZIPPY 0x01000100 | |
47 | #define TINCANTOOLS_ZIPPY2 0x02000100 | |
48 | #define TINCANTOOLS_TRAINER 0x04000100 | |
49 | #define TINCANTOOLS_SHOWDOG 0x03000100 | |
50 | #define KBADC_BEAGLEFPGA 0x01000600 | |
ee8485fd KK |
51 | #define LW_BEAGLETOUCH 0x01000700 |
52 | #define BRAINMUX_LCDOG 0x01000800 | |
53 | #define BRAINMUX_LCDOGTOUCH 0x02000800 | |
54 | #define BBTOYS_WIFI 0x01000B00 | |
55 | #define BBTOYS_VGA 0x02000B00 | |
56 | #define BBTOYS_LCD 0x03000B00 | |
6cce5504 | 57 | #define BCT_BRETTL3 0x01000F00 |
ef88e609 | 58 | #define BCT_BRETTL4 0x02000F00 |
8a1f2dc0 | 59 | #define LSR_COM6L_ADPT 0x01001300 |
ca5f80ae KK |
60 | #define BEAGLE_NO_EEPROM 0xffffffff |
61 | ||
29565326 JR |
62 | DECLARE_GLOBAL_DATA_PTR; |
63 | ||
ca5f80ae KK |
64 | static struct { |
65 | unsigned int device_vendor; | |
66 | unsigned char revision; | |
67 | unsigned char content; | |
68 | char fab_revision[8]; | |
69 | char env_var[16]; | |
70 | char env_setting[64]; | |
71 | } expansion_config; | |
72 | ||
58911517 | 73 | /* |
f904cdbb DB |
74 | * Routine: board_init |
75 | * Description: Early hardware init. | |
58911517 | 76 | */ |
f904cdbb DB |
77 | int board_init(void) |
78 | { | |
f904cdbb DB |
79 | gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ |
80 | /* board id for Linux */ | |
81 | gd->bd->bi_arch_number = MACH_TYPE_OMAP3_BEAGLE; | |
82 | /* boot param addr */ | |
83 | gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); | |
84 | ||
70d8c944 JK |
85 | #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) |
86 | status_led_set (STATUS_LED_BOOT, STATUS_LED_ON); | |
87 | #endif | |
88 | ||
f904cdbb DB |
89 | return 0; |
90 | } | |
91 | ||
58911517 | 92 | /* |
06b95bd5 SS |
93 | * Routine: get_board_revision |
94 | * Description: Detect if we are running on a Beagle revision Ax/Bx, | |
8ce4e5f9 | 95 | * C1/2/3, C4, xM Ax/Bx or xM Cx. This can be done by reading |
06b95bd5 SS |
96 | * the level of GPIO173, GPIO172 and GPIO171. This should |
97 | * result in | |
98 | * GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx | |
99 | * GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3 | |
100 | * GPIO173, GPIO172, GPIO171: 1 0 1 => C4 | |
8ce4e5f9 TR |
101 | * GPIO173, GPIO172, GPIO171: 0 1 0 => xM Cx |
102 | * GPIO173, GPIO172, GPIO171: 0 0 0 => xM Ax/Bx | |
58911517 | 103 | */ |
fff1a572 | 104 | static int get_board_revision(void) |
f956fd03 | 105 | { |
06b95bd5 | 106 | int revision; |
f956fd03 | 107 | |
84c3b631 SP |
108 | if (!gpio_request(171, "") && |
109 | !gpio_request(172, "") && | |
110 | !gpio_request(173, "")) { | |
718763c4 | 111 | |
84c3b631 SP |
112 | gpio_direction_input(171); |
113 | gpio_direction_input(172); | |
114 | gpio_direction_input(173); | |
718763c4 | 115 | |
84c3b631 SP |
116 | revision = gpio_get_value(173) << 2 | |
117 | gpio_get_value(172) << 1 | | |
118 | gpio_get_value(171); | |
06b95bd5 SS |
119 | } else { |
120 | printf("Error: unable to acquire board revision GPIOs\n"); | |
121 | revision = -1; | |
718763c4 | 122 | } |
f956fd03 | 123 | |
06b95bd5 | 124 | return revision; |
f956fd03 DB |
125 | } |
126 | ||
75c57a35 TR |
127 | #ifdef CONFIG_SPL_BUILD |
128 | /* | |
129 | * Routine: get_board_mem_timings | |
130 | * Description: If we use SPL then there is no x-loader nor config header | |
131 | * so we have to setup the DDR timings ourself on both banks. | |
132 | */ | |
8c4445d2 | 133 | void get_board_mem_timings(struct board_sdrc_timings *timings) |
75c57a35 TR |
134 | { |
135 | int pop_mfr, pop_id; | |
136 | ||
137 | /* | |
138 | * We need to identify what PoP memory is on the board so that | |
139 | * we know what timings to use. If we can't identify it then | |
140 | * we know it's an xM. To map the ID values please see nand_ids.c | |
141 | */ | |
142 | identify_nand_chip(&pop_mfr, &pop_id); | |
143 | ||
8c4445d2 | 144 | timings->mr = MICRON_V_MR_165; |
75c57a35 TR |
145 | switch (get_board_revision()) { |
146 | case REVISION_C4: | |
147 | if (pop_mfr == NAND_MFR_STMICRO && pop_id == 0xba) { | |
148 | /* 512MB DDR */ | |
8c4445d2 PB |
149 | timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); |
150 | timings->ctrla = NUMONYX_V_ACTIMA_165; | |
151 | timings->ctrlb = NUMONYX_V_ACTIMB_165; | |
152 | timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; | |
75c57a35 | 153 | break; |
223b8aa4 | 154 | } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xba) { |
155 | /* Beagleboard Rev C4, 512MB Nand/256MB DDR*/ | |
8c4445d2 PB |
156 | timings->mcfg = MICRON_V_MCFG_165(128 << 20); |
157 | timings->ctrla = MICRON_V_ACTIMA_165; | |
158 | timings->ctrlb = MICRON_V_ACTIMB_165; | |
159 | timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; | |
223b8aa4 | 160 | break; |
75c57a35 TR |
161 | } else if (pop_mfr == NAND_MFR_MICRON && pop_id == 0xbc) { |
162 | /* Beagleboard Rev C5, 256MB DDR */ | |
8c4445d2 PB |
163 | timings->mcfg = MICRON_V_MCFG_200(256 << 20); |
164 | timings->ctrla = MICRON_V_ACTIMA_200; | |
165 | timings->ctrlb = MICRON_V_ACTIMB_200; | |
166 | timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; | |
75c57a35 TR |
167 | break; |
168 | } | |
af4d896f | 169 | case REVISION_XM_AB: |
75c57a35 TR |
170 | case REVISION_XM_C: |
171 | if (pop_mfr == 0) { | |
172 | /* 256MB DDR */ | |
8c4445d2 PB |
173 | timings->mcfg = MICRON_V_MCFG_200(256 << 20); |
174 | timings->ctrla = MICRON_V_ACTIMA_200; | |
175 | timings->ctrlb = MICRON_V_ACTIMB_200; | |
176 | timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz; | |
75c57a35 TR |
177 | } else { |
178 | /* 512MB DDR */ | |
8c4445d2 PB |
179 | timings->mcfg = NUMONYX_V_MCFG_165(512 << 20); |
180 | timings->ctrla = NUMONYX_V_ACTIMA_165; | |
181 | timings->ctrlb = NUMONYX_V_ACTIMB_165; | |
182 | timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; | |
75c57a35 TR |
183 | } |
184 | break; | |
185 | default: | |
186 | /* Assume 128MB and Micron/165MHz timings to be safe */ | |
8c4445d2 PB |
187 | timings->mcfg = MICRON_V_MCFG_165(128 << 20); |
188 | timings->ctrla = MICRON_V_ACTIMA_165; | |
189 | timings->ctrlb = MICRON_V_ACTIMB_165; | |
190 | timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz; | |
75c57a35 TR |
191 | } |
192 | } | |
193 | #endif | |
194 | ||
ca5f80ae KK |
195 | /* |
196 | * Routine: get_expansion_id | |
197 | * Description: This function checks for expansion board by checking I2C | |
198 | * bus 1 for the availability of an AT24C01B serial EEPROM. | |
199 | * returns the device_vendor field from the EEPROM | |
200 | */ | |
fff1a572 | 201 | static unsigned int get_expansion_id(void) |
ca5f80ae KK |
202 | { |
203 | i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS); | |
204 | ||
205 | /* return BEAGLE_NO_EEPROM if eeprom doesn't respond */ | |
206 | if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) { | |
207 | i2c_set_bus_num(TWL4030_I2C_BUS); | |
208 | return BEAGLE_NO_EEPROM; | |
209 | } | |
210 | ||
211 | /* read configuration data */ | |
212 | i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config, | |
213 | sizeof(expansion_config)); | |
214 | ||
ff229ecf | 215 | /* retry reading configuration data with 16bit addressing */ |
216 | if ((expansion_config.device_vendor == 0xFFFFFF00) || | |
217 | (expansion_config.device_vendor == 0xFFFFFFFF)) { | |
218 | printf("EEPROM is blank or 8bit addressing failed: retrying with 16bit:\n"); | |
219 | i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 2, (u8 *)&expansion_config, | |
220 | sizeof(expansion_config)); | |
221 | } | |
222 | ||
ca5f80ae KK |
223 | i2c_set_bus_num(TWL4030_I2C_BUS); |
224 | ||
225 | return expansion_config.device_vendor; | |
226 | } | |
227 | ||
2c30c184 | 228 | #ifdef CONFIG_VIDEO_OMAP3 |
3f16ab91 JK |
229 | /* |
230 | * Configure DSS to display background color on DVID | |
231 | * Configure VENC to display color bar on S-Video | |
232 | */ | |
fff1a572 | 233 | static void beagle_display_init(void) |
3f16ab91 JK |
234 | { |
235 | omap3_dss_venc_config(&venc_config_std_tv, VENC_HEIGHT, VENC_WIDTH); | |
236 | switch (get_board_revision()) { | |
237 | case REVISION_AXBX: | |
238 | case REVISION_CX: | |
239 | case REVISION_C4: | |
240 | omap3_dss_panel_config(&dvid_cfg); | |
241 | break; | |
af4d896f | 242 | case REVISION_XM_AB: |
3f16ab91 JK |
243 | case REVISION_XM_C: |
244 | default: | |
245 | omap3_dss_panel_config(&dvid_cfg_xm); | |
246 | break; | |
247 | } | |
248 | } | |
249 | ||
4258aa62 PM |
250 | /* |
251 | * Enable DVI power | |
252 | */ | |
3fbc6931 AG |
253 | static void beagle_dvi_pup(void) |
254 | { | |
4258aa62 PM |
255 | uchar val; |
256 | ||
257 | switch (get_board_revision()) { | |
258 | case REVISION_AXBX: | |
259 | case REVISION_CX: | |
260 | case REVISION_C4: | |
4258aa62 PM |
261 | gpio_request(170, ""); |
262 | gpio_direction_output(170, 0); | |
263 | gpio_set_value(170, 1); | |
264 | break; | |
af4d896f | 265 | case REVISION_XM_AB: |
4258aa62 PM |
266 | case REVISION_XM_C: |
267 | default: | |
268 | #define GPIODATADIR1 (TWL4030_BASEADD_GPIO+3) | |
269 | #define GPIODATAOUT1 (TWL4030_BASEADD_GPIO+6) | |
270 | ||
271 | i2c_read(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); | |
272 | val |= 4; | |
273 | i2c_write(TWL4030_CHIP_GPIO, GPIODATADIR1, 1, &val, 1); | |
274 | ||
275 | i2c_read(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); | |
276 | val |= 4; | |
277 | i2c_write(TWL4030_CHIP_GPIO, GPIODATAOUT1, 1, &val, 1); | |
278 | break; | |
279 | } | |
280 | } | |
2c30c184 | 281 | #endif |
4258aa62 | 282 | |
c642b151 IY |
283 | #ifdef CONFIG_USB_MUSB_OMAP2PLUS |
284 | static struct musb_hdrc_config musb_config = { | |
285 | .multipoint = 1, | |
286 | .dyn_fifo = 1, | |
287 | .num_eps = 16, | |
288 | .ram_bits = 12, | |
289 | }; | |
290 | ||
291 | static struct omap_musb_board_data musb_board_data = { | |
292 | .interface_type = MUSB_INTERFACE_ULPI, | |
293 | }; | |
294 | ||
295 | static struct musb_hdrc_platform_data musb_plat = { | |
296 | #if defined(CONFIG_MUSB_HOST) | |
297 | .mode = MUSB_HOST, | |
298 | #elif defined(CONFIG_MUSB_GADGET) | |
299 | .mode = MUSB_PERIPHERAL, | |
300 | #else | |
301 | #error "Please define either CONFIG_MUSB_HOST or CONFIG_MUSB_GADGET" | |
302 | #endif | |
303 | .config = &musb_config, | |
304 | .power = 100, | |
305 | .platform_ops = &omap2430_ops, | |
306 | .board_data = &musb_board_data, | |
307 | }; | |
308 | #endif | |
309 | ||
58911517 | 310 | /* |
f904cdbb DB |
311 | * Routine: misc_init_r |
312 | * Description: Configure board specific parts | |
58911517 | 313 | */ |
f904cdbb DB |
314 | int misc_init_r(void) |
315 | { | |
97a099ea DB |
316 | struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE; |
317 | struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE; | |
f14a522a | 318 | struct control_prog_io *prog_io_base = (struct control_prog_io *)OMAP34XX_CTRL_BASE; |
548a64d8 | 319 | bool generate_fake_mac = false; |
d4e53f06 SK |
320 | |
321 | /* Enable i2c2 pullup resisters */ | |
322 | writel(~(PRG_I2C2_PULLUPRESX), &prog_io_base->io1); | |
f904cdbb | 323 | |
06b95bd5 SS |
324 | switch (get_board_revision()) { |
325 | case REVISION_AXBX: | |
326 | printf("Beagle Rev Ax/Bx\n"); | |
327 | setenv("beaglerev", "AxBx"); | |
06b95bd5 SS |
328 | break; |
329 | case REVISION_CX: | |
330 | printf("Beagle Rev C1/C2/C3\n"); | |
331 | setenv("beaglerev", "Cx"); | |
06b95bd5 SS |
332 | MUX_BEAGLE_C(); |
333 | break; | |
334 | case REVISION_C4: | |
335 | printf("Beagle Rev C4\n"); | |
08cbba2a | 336 | setenv("beaglerev", "C4"); |
06b95bd5 SS |
337 | MUX_BEAGLE_C(); |
338 | /* Set VAUX2 to 1.8V for EHCI PHY */ | |
08cbba2a SS |
339 | twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, |
340 | TWL4030_PM_RECEIVER_VAUX2_VSEL_18, | |
341 | TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, | |
342 | TWL4030_PM_RECEIVER_DEV_GRP_P1); | |
343 | break; | |
af4d896f NM |
344 | case REVISION_XM_AB: |
345 | printf("Beagle xM Rev A/B\n"); | |
346 | setenv("beaglerev", "xMAB"); | |
08cbba2a SS |
347 | MUX_BEAGLE_XM(); |
348 | /* Set VAUX2 to 1.8V for EHCI PHY */ | |
1ffcb346 KK |
349 | twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, |
350 | TWL4030_PM_RECEIVER_VAUX2_VSEL_18, | |
351 | TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, | |
352 | TWL4030_PM_RECEIVER_DEV_GRP_P1); | |
548a64d8 | 353 | generate_fake_mac = true; |
1ffcb346 KK |
354 | break; |
355 | case REVISION_XM_C: | |
356 | printf("Beagle xM Rev C\n"); | |
357 | setenv("beaglerev", "xMC"); | |
358 | MUX_BEAGLE_XM(); | |
359 | /* Set VAUX2 to 1.8V for EHCI PHY */ | |
06b95bd5 SS |
360 | twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, |
361 | TWL4030_PM_RECEIVER_VAUX2_VSEL_18, | |
362 | TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, | |
363 | TWL4030_PM_RECEIVER_DEV_GRP_P1); | |
548a64d8 | 364 | generate_fake_mac = true; |
06b95bd5 SS |
365 | break; |
366 | default: | |
367 | printf("Beagle unknown 0x%02x\n", get_board_revision()); | |
f6e593bb KK |
368 | MUX_BEAGLE_XM(); |
369 | /* Set VAUX2 to 1.8V for EHCI PHY */ | |
370 | twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX2_DEDICATED, | |
371 | TWL4030_PM_RECEIVER_VAUX2_VSEL_18, | |
372 | TWL4030_PM_RECEIVER_VAUX2_DEV_GRP, | |
373 | TWL4030_PM_RECEIVER_DEV_GRP_P1); | |
548a64d8 | 374 | generate_fake_mac = true; |
06b95bd5 SS |
375 | } |
376 | ||
ca5f80ae KK |
377 | switch (get_expansion_id()) { |
378 | case TINCANTOOLS_ZIPPY: | |
379 | printf("Recognized Tincantools Zippy board (rev %d %s)\n", | |
380 | expansion_config.revision, | |
381 | expansion_config.fab_revision); | |
382 | MUX_TINCANTOOLS_ZIPPY(); | |
383 | setenv("buddy", "zippy"); | |
384 | break; | |
385 | case TINCANTOOLS_ZIPPY2: | |
386 | printf("Recognized Tincantools Zippy2 board (rev %d %s)\n", | |
387 | expansion_config.revision, | |
388 | expansion_config.fab_revision); | |
389 | MUX_TINCANTOOLS_ZIPPY(); | |
390 | setenv("buddy", "zippy2"); | |
391 | break; | |
392 | case TINCANTOOLS_TRAINER: | |
393 | printf("Recognized Tincantools Trainer board (rev %d %s)\n", | |
394 | expansion_config.revision, | |
395 | expansion_config.fab_revision); | |
396 | MUX_TINCANTOOLS_ZIPPY(); | |
397 | MUX_TINCANTOOLS_TRAINER(); | |
398 | setenv("buddy", "trainer"); | |
399 | break; | |
400 | case TINCANTOOLS_SHOWDOG: | |
401 | printf("Recognized Tincantools Showdow board (rev %d %s)\n", | |
402 | expansion_config.revision, | |
403 | expansion_config.fab_revision); | |
404 | /* Place holder for DSS2 definition for showdog lcd */ | |
405 | setenv("defaultdisplay", "showdoglcd"); | |
406 | setenv("buddy", "showdog"); | |
407 | break; | |
408 | case KBADC_BEAGLEFPGA: | |
409 | printf("Recognized KBADC Beagle FPGA board\n"); | |
410 | MUX_KBADC_BEAGLEFPGA(); | |
411 | setenv("buddy", "beaglefpga"); | |
412 | break; | |
ee8485fd KK |
413 | case LW_BEAGLETOUCH: |
414 | printf("Recognized Liquidware BeagleTouch board\n"); | |
415 | setenv("buddy", "beagletouch"); | |
416 | break; | |
417 | case BRAINMUX_LCDOG: | |
418 | printf("Recognized Brainmux LCDog board\n"); | |
419 | setenv("buddy", "lcdog"); | |
420 | break; | |
421 | case BRAINMUX_LCDOGTOUCH: | |
422 | printf("Recognized Brainmux LCDog Touch board\n"); | |
423 | setenv("buddy", "lcdogtouch"); | |
424 | break; | |
425 | case BBTOYS_WIFI: | |
426 | printf("Recognized BeagleBoardToys WiFi board\n"); | |
427 | MUX_BBTOYS_WIFI() | |
428 | setenv("buddy", "bbtoys-wifi"); | |
429 | break;; | |
430 | case BBTOYS_VGA: | |
431 | printf("Recognized BeagleBoardToys VGA board\n"); | |
432 | break;; | |
433 | case BBTOYS_LCD: | |
434 | printf("Recognized BeagleBoardToys LCD board\n"); | |
435 | break;; | |
6cce5504 | 436 | case BCT_BRETTL3: |
ef88e609 PM |
437 | printf("Recognized bct electronic GmbH brettl3 board\n"); |
438 | break; | |
439 | case BCT_BRETTL4: | |
440 | printf("Recognized bct electronic GmbH brettl4 board\n"); | |
441 | break; | |
8a1f2dc0 | 442 | case LSR_COM6L_ADPT: |
443 | printf("Recognized LSR COM6L Adapter Board\n"); | |
444 | MUX_BBTOYS_WIFI() | |
445 | setenv("buddy", "lsr-com6l-adpt"); | |
446 | break; | |
ca5f80ae KK |
447 | case BEAGLE_NO_EEPROM: |
448 | printf("No EEPROM on expansion board\n"); | |
449 | setenv("buddy", "none"); | |
450 | break; | |
451 | default: | |
452 | printf("Unrecognized expansion board: %x\n", | |
453 | expansion_config.device_vendor); | |
454 | setenv("buddy", "unknown"); | |
455 | } | |
456 | ||
457 | if (expansion_config.content == 1) | |
458 | setenv(expansion_config.env_var, expansion_config.env_setting); | |
459 | ||
2c155130 | 460 | twl4030_power_init(); |
38a77c3a | 461 | switch (get_board_revision()) { |
af4d896f | 462 | case REVISION_XM_AB: |
38a77c3a CS |
463 | twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); |
464 | break; | |
465 | default: | |
466 | twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON); | |
467 | break; | |
468 | } | |
f904cdbb | 469 | |
52d82e40 | 470 | /* Set GPIO states before they are made outputs */ |
f904cdbb DB |
471 | writel(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1, |
472 | &gpio6_base->setdataout); | |
473 | writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | | |
474 | GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout); | |
475 | ||
52d82e40 BF |
476 | /* Configure GPIOs to output */ |
477 | writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); | |
478 | writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 | | |
479 | GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe); | |
480 | ||
e6a6a704 | 481 | dieid_num_r(); |
4258aa62 | 482 | |
2c30c184 | 483 | #ifdef CONFIG_VIDEO_OMAP3 |
4258aa62 | 484 | beagle_dvi_pup(); |
3f16ab91 JK |
485 | beagle_display_init(); |
486 | omap3_dss_enable(); | |
2c30c184 | 487 | #endif |
e6a6a704 | 488 | |
c642b151 IY |
489 | #ifdef CONFIG_USB_MUSB_OMAP2PLUS |
490 | musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE); | |
491 | #endif | |
492 | ||
548a64d8 NM |
493 | if (generate_fake_mac) { |
494 | u32 id[4]; | |
495 | ||
496 | get_dieid(id); | |
497 | usb_fake_mac_from_die_id(id); | |
498 | } | |
499 | ||
f904cdbb DB |
500 | return 0; |
501 | } | |
502 | ||
58911517 | 503 | /* |
f904cdbb DB |
504 | * Routine: set_muxconf_regs |
505 | * Description: Setting up the configuration Mux registers specific to the | |
506 | * hardware. Many pins need to be moved from protect to primary | |
507 | * mode. | |
58911517 | 508 | */ |
f904cdbb DB |
509 | void set_muxconf_regs(void) |
510 | { | |
511 | MUX_BEAGLE(); | |
512 | } | |
0cd31144 | 513 | |
75c57a35 | 514 | #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD) |
0cd31144 SS |
515 | int board_mmc_init(bd_t *bis) |
516 | { | |
e3913f56 | 517 | return omap_mmc_init(0, 0, 0, -1, -1); |
0cd31144 SS |
518 | } |
519 | #endif | |
d90859a6 | 520 | |
7ac2fe2d | 521 | #if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD) |
d90859a6 AH |
522 | /* Call usb_stop() before starting the kernel */ |
523 | void show_boot_progress(int val) | |
524 | { | |
578ac1e9 | 525 | if (val == BOOTSTAGE_ID_RUN_OS) |
d90859a6 AH |
526 | usb_stop(); |
527 | } | |
43b62393 G |
528 | |
529 | static struct omap_usbhs_board_data usbhs_bdata = { | |
530 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, | |
531 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | |
532 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED | |
533 | }; | |
534 | ||
127efc4f TK |
535 | int ehci_hcd_init(int index, enum usb_init_type init, |
536 | struct ehci_hccr **hccr, struct ehci_hcor **hcor) | |
43b62393 | 537 | { |
16297cfb | 538 | return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor); |
43b62393 G |
539 | } |
540 | ||
676ae068 | 541 | int ehci_hcd_stop(int index) |
43b62393 G |
542 | { |
543 | return omap_ehci_hcd_stop(); | |
544 | } | |
545 | ||
d90859a6 | 546 | #endif /* CONFIG_USB_EHCI */ |
c642b151 IY |
547 | |
548 | #if defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET) | |
549 | int board_eth_init(bd_t *bis) | |
550 | { | |
551 | return usb_eth_initialize(bis); | |
552 | } | |
553 | #endif |