[people/ms/u-boot.git] / board / ti / omap5912osk / omap5912osk.c

/*
 * (C) Copyright 2002
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <mgroeger@sysgo.de>
 *
 * (C) Copyright 2002
 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
 *
 * (C) Copyright 2003
 * Texas Instruments, <www.ti.com>
 * Kshitij Gupta <Kshitij@ti.com>
 *
 * (C) Copyright 2004
 * Texas Instruments, <www.ti.com>
 * Rishi Bhattacharya <rishi@ti.com>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <netdev.h>
#if defined(CONFIG_OMAP1610)
#include <./configs/omap1510.h>
#endif

DECLARE_GLOBAL_DATA_PTR;

void flash__init (void);
void ether__init (void);
void set_muxconf_regs (void);
void peripheral_power_enable (void);

#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)

static inline void delay (unsigned long loops)
{
	__asm__ volatile ("1:\n"
		"subs %0, %1, #1\n"
		"bne 1b":"=r" (loops):"0" (loops));
}

/*
 * Miscellaneous platform dependent initialisations
 */

int board_init (void)
{
	gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK;

	/* adress of boot parameters */
	gd->bd->bi_boot_params = 0x10000100;

	/* Configure MUX settings */
	set_muxconf_regs ();
	peripheral_power_enable ();

/* this speeds up your boot a quite a bit.  However to make it
 *  work, you need make sure your kernel startup flush bug is fixed.
 *  ... rkw ...
 */
	icache_enable ();

	flash__init ();
	ether__init ();
	return 0;
}


int misc_init_r (void)
{
	/* currently empty */
	return (0);
}

/******************************
 Routine:
 Description:
******************************/
void flash__init (void)
{
#define EMIFS_GlB_Config_REG 0xfffecc0c
	unsigned int regval;
	regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
	/* Turn off write protection for flash devices. */
	regval = regval | 0x0001;
	*((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
}
/*************************************************************
 Routine:ether__init
 Description: take the Ethernet controller out of reset and wait
			   for the EEPROM load to complete.
*************************************************************/
void ether__init (void)
{
#define ETH_CONTROL_REG 0x0480000b
	int i;

	*((volatile unsigned short *) 0xfffece08) = 0x03FF;
	*((volatile unsigned short *) 0xfffb3824) = 0x8000;
	*((volatile unsigned short *) 0xfffb3830) = 0x0000;
	*((volatile unsigned short *) 0xfffb3834) = 0x0009;
	*((volatile unsigned short *) 0xfffb3838) = 0x0009;
	*((volatile unsigned short *) 0xfffb3818) = 0x0002;
	*((volatile unsigned short *) 0xfffb382C) = 0x0048;
	*((volatile unsigned short *) 0xfffb3824) = 0x8603;
	udelay (3);
	for (i=0;i<2000;i++);
	*((volatile unsigned short *) 0xfffb381C) = 0x6610;
	udelay (30);
	for (i=0;i<10000;i++);

	*((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
	udelay (3);


}

/******************************
 Routine:
 Description:
******************************/
int dram_init (void)
{
	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;

	return 0;
}

/******************************************************
 Routine: set_muxconf_regs
 Description: Setting up the configuration Mux registers
			  specific to the hardware
*******************************************************/
void set_muxconf_regs (void)
{
	volatile unsigned int *MuxConfReg;
	/* set each registers to its reset value; */
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
	/* setup for UART1 */
	*MuxConfReg &= ~(0x02000000);	/* bit 25 */
	/* setup for UART2 */
	*MuxConfReg &= ~(0x01000000);	/* bit 24 */
	/* Disable Uwire CS Hi-Z */
	*MuxConfReg |= 0x08000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
	/*setup mux for UART3 */
	*MuxConfReg |= 0x00000001;	/* bit3, 1, 0 (mux0 5,5,26) */
	*MuxConfReg &= ~0x0000003e;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
	/* Disable Uwire CS Hi-Z */
	*MuxConfReg |= 0x00001200;	/*bit 9 for CS0 12 for CS3 */
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
	/*  Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the  */
	/*  hardware will actually use TX and RTS based on bit 25 in  */
	/*  FUNC_MUX_CTRL_0.  I told you this thing was screwy!	 */
	*MuxConfReg |= 0x00201000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
	/* setup for UART2 */
	/*  Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the  */
	/*  hardware will actually use TX and RTS based on bit 24 in  */
	/*  FUNC_MUX_CTRL_0. */
	*MuxConfReg |= 0x09000000;
	MuxConfReg =
	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_D);
	*MuxConfReg |= 0x00000020;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
	*MuxConfReg = 0x00000000;
	/* mux setup for SD/MMC driver */
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
	*MuxConfReg &= 0xFFFE0FFF;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
	/* bit 13 for MMC2 XOR_CLK */
	*MuxConfReg &= ~(0x00002000);
	/* bit 29 for UART 1 */
	*MuxConfReg &= ~(0x00002000);
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
	/* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
	*MuxConfReg |= 0x000C0000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
	*MuxConfReg &= ~(0x00000070);
	*MuxConfReg &= ~(0x00000008);
	*MuxConfReg |= 0x00000003;
	*MuxConfReg |= 0x00000180;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
	/* bit 17, software controls VBUS */
	*MuxConfReg &= ~(0x00020000);
	/* Enable USB 48 and 12M clocks */
	*MuxConfReg |= 0x00000200;
	*MuxConfReg &= ~(0x00000180);
	/*2.75V for MMCSDIO1 */
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
	*MuxConfReg = 0x00001FE7;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
	*MuxConfReg = 0x00000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
	*MuxConfReg = 0x00000000;
	/* Turn on UART2 48 MHZ clock */
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
	*MuxConfReg |= 0x40000000;
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
	/* setup for USB VBus detection OMAP161x */
	*MuxConfReg |= 0x00040000;	/* bit 18 */
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
	/* PullUps for SD/MMC driver */
	*MuxConfReg |= ~(0xFFFE0FFF);
	MuxConfReg =
		(volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
	*MuxConfReg = COMP_MODE_ENABLE;
}

/******************************************************
 Routine: peripheral_power_enable
 Description: Enable the power for UART1
*******************************************************/
void peripheral_power_enable (void)
{
#define UART1_48MHZ_ENABLE	((unsigned short)0x0200)
#define SW_CLOCK_REQUEST	((volatile unsigned short *)0xFFFE0834)

	*SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
}

/*
 * Check Board Identity
 */
int checkboard(void)
{
	char buf[64];
	int i = getenv_f("serial#", buf, sizeof(buf));

	puts("Board: OSK5912");

	if (i > 0) {
		puts(", serial# ");
		puts(buf);
	}
	putc('\n');

	return (0);
}

#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
{
	int rc = 0;
#ifdef CONFIG_LAN91C96
	rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
#endif
	return rc;
}
#endif
Commit	Line	Data
1eaeb58e WD	1	/*
	2	* (C) Copyright 2002
	3	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	4	* Marius Groeger <mgroeger@sysgo.de>
	5	*
	6	* (C) Copyright 2002
	7	* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
	8	*
	9	* (C) Copyright 2003
	10	* Texas Instruments, <www.ti.com>
	11	* Kshitij Gupta <Kshitij@ti.com>
	12	*
	13	* (C) Copyright 2004
	14	* Texas Instruments, <www.ti.com>
	15	* Rishi Bhattacharya <rishi@ti.com>
	16	*
	17	* See file CREDITS for list of people who contributed to this
	18	* project.
	19	*
	20	* This program is free software; you can redistribute it and/or
	21	* modify it under the terms of the GNU General Public License as
	22	* published by the Free Software Foundation; either version 2 of
	23	* the License, or (at your option) any later version.
	24	*
	25	* This program is distributed in the hope that it will be useful,
	26	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	27	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	28	* GNU General Public License for more details.
	29	*
	30	* You should have received a copy of the GNU General Public License
	31	* along with this program; if not, write to the Free Software
	32	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	33	* MA 02111-1307 USA
	34	*/
	35
	36	#include <common.h>
1ab70f6f	37	#include <netdev.h>
1eaeb58e WD	38	#if defined(CONFIG_OMAP1610)
	39	#include <./configs/omap1510.h>
	40	#endif
	41
d87080b7 WD	42	DECLARE_GLOBAL_DATA_PTR;
d87080b7 WD	43
1eaeb58e WD	44	void flash__init (void);
	45	void ether__init (void);
	46	void set_muxconf_regs (void);
	47	void peripheral_power_enable (void);
	48
	49	#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
	50
	51	static inline void delay (unsigned long loops)
	52	{
	53	__asm__ volatile ("1:\n"
	54	"subs %0, %1, #1\n"
	55	"bne 1b":"=r" (loops):"0" (loops));
	56	}
	57
	58	/*
	59	* Miscellaneous platform dependent initialisations
	60	*/
	61
	62	int board_init (void)
	63	{
731215eb	64	gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK;
1eaeb58e WD	65
	66	/* adress of boot parameters */
	67	gd->bd->bi_boot_params = 0x10000100;
	68
	69	/* Configure MUX settings */
	70	set_muxconf_regs ();
	71	peripheral_power_enable ();
	72
	73	/* this speeds up your boot a quite a bit. However to make it
	74	* work, you need make sure your kernel startup flush bug is fixed.
	75	* ... rkw ...
	76	*/
	77	icache_enable ();
	78
	79	flash__init ();
	80	ether__init ();
	81	return 0;
	82	}
	83
	84
	85	int misc_init_r (void)
	86	{
	87	/* currently empty */
	88	return (0);
	89	}
	90
	91	/******************************
	92	Routine:
	93	Description:
	94	******************************/
	95	void flash__init (void)
	96	{
	97	#define EMIFS_GlB_Config_REG 0xfffecc0c
	98	unsigned int regval;
	99	regval = ((volatile unsigned int ) EMIFS_GlB_Config_REG);
	100	/* Turn off write protection for flash devices. */
	101	regval = regval \| 0x0001;
	102	((volatile unsigned int ) EMIFS_GlB_Config_REG) = regval;
	103	}
	104	/*************************************************************
	105	Routine:ether__init
	106	Description: take the Ethernet controller out of reset and wait
	107	for the EEPROM load to complete.
	108	*************************************************************/
	109	void ether__init (void)
	110	{
	111	#define ETH_CONTROL_REG 0x0480000b
	112	int i;
	113
	114	((volatile unsigned short ) 0xfffece08) = 0x03FF;
	115	((volatile unsigned short ) 0xfffb3824) = 0x8000;
	116	((volatile unsigned short ) 0xfffb3830) = 0x0000;
	117	((volatile unsigned short ) 0xfffb3834) = 0x0009;
	118	((volatile unsigned short ) 0xfffb3838) = 0x0009;
	119	((volatile unsigned short ) 0xfffb3818) = 0x0002;
	120	((volatile unsigned short ) 0xfffb382C) = 0x0048;
	121	((volatile unsigned short ) 0xfffb3824) = 0x8603;
	122	udelay (3);
	123	for (i=0;i<2000;i++);
	124	((volatile unsigned short ) 0xfffb381C) = 0x6610;
	125	udelay (30);
	126	for (i=0;i<10000;i++);
	127
	128	((volatile unsigned char ) ETH_CONTROL_REG) &= ~0x01;
129	udelay (3);
130
131
132	}
133
134	/******************************
135	Routine:
136	Description:
137	******************************/
138	int dram_init (void)
139	{
1eaeb58e WD	140	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
	141	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
	142
	143	return 0;
	144	}
	145
	146	/******************************************************
	147	Routine: set_muxconf_regs
	148	Description: Setting up the configuration Mux registers
	149	specific to the hardware
	150	*******************************************************/
	151	void set_muxconf_regs (void)
	152	{
	153	volatile unsigned int *MuxConfReg;
	154	/* set each registers to its reset value; */
	155	MuxConfReg =
	156	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
	157	/* setup for UART1 */
	158	MuxConfReg &= ~(0x02000000); / bit 25 */
	159	/* setup for UART2 */
	160	MuxConfReg &= ~(0x01000000); / bit 24 */
	161	/* Disable Uwire CS Hi-Z */
	162	*MuxConfReg \|= 0x08000000;
	163	MuxConfReg =
	164	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
	165	*MuxConfReg = 0x00000000;
	166	MuxConfReg =
	167	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
	168	*MuxConfReg = 0x00000000;
	169	MuxConfReg =
	170	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
	171	*MuxConfReg = 0x00000000;
	172	MuxConfReg =
	173	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
	174	/setup mux for UART3 /
	175	MuxConfReg \|= 0x00000001; / bit3, 1, 0 (mux0 5,5,26) */
	176	*MuxConfReg &= ~0x0000003e;
	177	MuxConfReg =
	178	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
	179	*MuxConfReg = 0x00000000;
	180	MuxConfReg =
	181	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
	182	/* Disable Uwire CS Hi-Z */
	183	MuxConfReg \|= 0x00001200; /bit 9 for CS0 12 for CS3 */
	184	MuxConfReg =
	185	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
	186	/* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
	187	/* hardware will actually use TX and RTS based on bit 25 in */
	188	/* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
	189	*MuxConfReg \|= 0x00201000;
	190	MuxConfReg =
	191	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
	192	*MuxConfReg = 0x00000000;
	193	MuxConfReg =
	194	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
	195	*MuxConfReg = 0x00000000;
	196	MuxConfReg =
	197	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
	198	/* setup for UART2 */
	199	/* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
	200	/* hardware will actually use TX and RTS based on bit 24 in */
	201	/* FUNC_MUX_CTRL_0. */
	202	*MuxConfReg \|= 0x09000000;
	203	MuxConfReg =
204	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_D);
205	*MuxConfReg \|= 0x00000020;
206	MuxConfReg =
207	(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
208	*MuxConfReg = 0x00000000;
209	MuxConfReg =
210	(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
211	*MuxConfReg = 0x00000000;
212	/* mux setup for SD/MMC driver */
213	MuxConfReg =
214	(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
215	*MuxConfReg &= 0xFFFE0FFF;
216	MuxConfReg =
217	(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
218	*MuxConfReg = 0x00000000;
219	MuxConfReg =
220	(volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
221	/* bit 13 for MMC2 XOR_CLK */
222	*MuxConfReg &= ~(0x00002000);
223	/* bit 29 for UART 1 */
224	*MuxConfReg &= ~(0x00002000);
225	MuxConfReg =
226	(volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
227	/* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
228	*MuxConfReg \|= 0x000C0000;
229	MuxConfReg =
230	(volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
231	*MuxConfReg &= ~(0x00000070);
232	*MuxConfReg &= ~(0x00000008);
233	*MuxConfReg \|= 0x00000003;
234	*MuxConfReg \|= 0x00000180;
235	MuxConfReg =
236	(volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
237	/* bit 17, software controls VBUS */
238	*MuxConfReg &= ~(0x00020000);
239	/* Enable USB 48 and 12M clocks */
240	*MuxConfReg \|= 0x00000200;
241	*MuxConfReg &= ~(0x00000180);
242	/2.75V for MMCSDIO1 /
243	MuxConfReg =
244	(volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
245	*MuxConfReg = 0x00001FE7;
246	MuxConfReg =
247	(volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
248	*MuxConfReg = 0x00000000;
249	MuxConfReg =
250	(volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
251	*MuxConfReg = 0x00000000;
252	MuxConfReg =
253	(volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
254	*MuxConfReg = 0x00000000;
255	MuxConfReg =
256	(volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
257	*MuxConfReg = 0x00000000;
258	MuxConfReg =
259	(volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
260	*MuxConfReg = 0x00000000;
261	MuxConfReg =
262	(volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
263	*MuxConfReg = 0x00000000;
264	/* Turn on UART2 48 MHZ clock */
265	MuxConfReg =
266	(volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
267	*MuxConfReg \|= 0x40000000;
268	MuxConfReg =
269	(volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
270	/* setup for USB VBus detection OMAP161x */
271	MuxConfReg \|= 0x00040000; / bit 18 */
272	MuxConfReg =
273	(volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
274	/* PullUps for SD/MMC driver */
275	*MuxConfReg \|= ~(0xFFFE0FFF);
276	MuxConfReg =
277	(volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
278	*MuxConfReg = COMP_MODE_ENABLE;
279	}
280
281	/******************************************************
282	Routine: peripheral_power_enable
283	Description: Enable the power for UART1
284	*******************************************************/
285	void peripheral_power_enable (void)
286	{
287	#define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
288	#define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
289
290	*SW_CLOCK_REQUEST \|= UART1_48MHZ_ENABLE;
291	}
6080a0eb SR	292
	293	/*
	294	* Check Board Identity
	295	*/
	296	int checkboard(void)
	297	{
f0c0b3a9 WD	298	char buf[64];
f0c0b3a9 WD	299	int i = getenv_f("serial#", buf, sizeof(buf));
6080a0eb SR	300
	301	puts("Board: OSK5912");
	302
f0c0b3a9	303	if (i > 0) {
6080a0eb	304	puts(", serial# ");
f0c0b3a9	305	puts(buf);
6080a0eb SR	306	}
	307	putc('\n');
	308
	309	return (0);
	310	}
1ab70f6f BW	311
	312	#ifdef CONFIG_CMD_NET
	313	int board_eth_init(bd_t *bis)
	314	{
	315	int rc = 0;
	316	#ifdef CONFIG_LAN91C96
	317	rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);
	318	#endif
	319	return rc;
	320	}
	321	#endif