]>
Commit | Line | Data |
---|---|---|
c609719b WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. | |
4 | * | |
5 | * (C) Copyright 2002 | |
6 | * Gregory E. Allen, gallen@arlut.utexas.edu | |
7 | * Matthew E. Karger, karger@arlut.utexas.edu | |
8 | * Applied Research Laboratories, The University of Texas at Austin | |
9 | * | |
1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
c609719b WD |
11 | */ |
12 | ||
13 | #include <common.h> | |
14 | #include <mpc824x.h> | |
15 | #include <asm/processor.h> | |
16 | #include <asm/io.h> | |
7a8e9bed | 17 | #include <asm/mmu.h> |
c609719b | 18 | #include <pci.h> |
10efa024 | 19 | #include <netdev.h> |
c609719b WD |
20 | |
21 | #define SAVE_SZ 32 | |
22 | ||
23 | ||
24 | int checkboard(void) | |
25 | { | |
26 | ulong busfreq = get_bus_freq(0); | |
27 | char buf[32]; | |
28 | ||
29 | printf("Board: UTX8245 Local Bus at %s MHz\n", strmhz(buf, busfreq)); | |
30 | return 0; | |
31 | } | |
32 | ||
33 | ||
9973e3c6 | 34 | phys_size_t initdram(int board_type) |
c609719b | 35 | { |
c83bf6a2 WD |
36 | long size; |
37 | long new_bank0_end; | |
498b8db7 | 38 | long new_bank1_end; |
c83bf6a2 WD |
39 | long mear1; |
40 | long emear1; | |
7a8e9bed | 41 | |
6d0f6bcf | 42 | size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE); |
c83bf6a2 | 43 | |
498b8db7 WD |
44 | new_bank0_end = size/2 - 1; |
45 | new_bank1_end = size - 1; | |
c83bf6a2 WD |
46 | mear1 = mpc824x_mpc107_getreg(MEAR1); |
47 | emear1 = mpc824x_mpc107_getreg(EMEAR1); | |
498b8db7 WD |
48 | |
49 | mear1 = (mear1 & 0xFFFF0000) | | |
50 | ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) | | |
51 | ((new_bank1_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT << 8); | |
52 | emear1 = (emear1 & 0xFFFF0000) | | |
53 | ((new_bank0_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) | | |
54 | ((new_bank1_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT << 8); | |
e35745bb | 55 | |
c83bf6a2 WD |
56 | mpc824x_mpc107_setreg(MEAR1, mear1); |
57 | mpc824x_mpc107_setreg(EMEAR1, emear1); | |
58 | ||
59 | return (size); | |
c609719b WD |
60 | } |
61 | ||
62 | ||
63 | /* | |
64 | * Initialize PCI Devices, report devices found. | |
65 | */ | |
66 | ||
67 | static struct pci_config_table pci_utx8245_config_table[] = { | |
68 | #ifndef CONFIG_PCI_PNP | |
7a8e9bed | 69 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0C, PCI_ANY_ID, |
c609719b WD |
70 | pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, |
71 | PCI_ENET0_MEMADDR, | |
72 | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, | |
7a8e9bed | 73 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0B, PCI_ANY_ID, |
c609719b WD |
74 | pci_cfgfunc_config_device, { PCI_FIREWIRE_IOADDR, |
75 | PCI_FIREWIRE_MEMADDR, | |
76 | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, | |
77 | #endif /*CONFIG_PCI_PNP*/ | |
78 | { } | |
79 | }; | |
80 | ||
81 | ||
82 | static void pci_utx8245_fixup_irq(struct pci_controller *hose, pci_dev_t dev) | |
83 | { | |
84 | if (PCI_DEV(dev) == 11) | |
85 | /* assign serial interrupt line 9 (int25) to FireWire */ | |
86 | pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 25); | |
87 | ||
88 | else if (PCI_DEV(dev) == 12) | |
89 | /* assign serial interrupt line 8 (int24) to Ethernet */ | |
90 | pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 24); | |
7a8e9bed WD |
91 | |
92 | else if (PCI_DEV(dev) == 14) | |
93 | /* assign serial interrupt line 0 (int16) to PMC slot 0 */ | |
94 | pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 16); | |
95 | ||
96 | else if (PCI_DEV(dev) == 15) | |
97 | /* assign serial interrupt line 1 (int17) to PMC slot 1 */ | |
98 | pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 17); | |
c609719b WD |
99 | } |
100 | ||
101 | static struct pci_controller utx8245_hose = { | |
102 | #ifndef CONFIG_PCI_PNP | |
103 | config_table: pci_utx8245_config_table, | |
104 | fixup_irq: pci_utx8245_fixup_irq, | |
105 | write_byte: pci_hose_write_config_byte | |
106 | #endif /*CONFIG_PCI_PNP*/ | |
107 | }; | |
108 | ||
ad10dd9a | 109 | void pci_init_board (void) |
c609719b WD |
110 | { |
111 | pci_mpc824x_init(&utx8245_hose); | |
112 | ||
113 | icache_enable(); | |
114 | } | |
10efa024 BW |
115 | |
116 | int board_eth_init(bd_t *bis) | |
117 | { | |
118 | return pci_eth_init(bis); | |
119 | } |