]>
Commit | Line | Data |
---|---|---|
c609719b WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Rob Taylor, Flying Pig Systems. robt@flyingpig.com. | |
4 | * | |
5 | * (C) Copyright 2002 | |
6 | * Gregory E. Allen, gallen@arlut.utexas.edu | |
7 | * Matthew E. Karger, karger@arlut.utexas.edu | |
8 | * Applied Research Laboratories, The University of Texas at Austin | |
9 | * | |
10 | * See file CREDITS for list of people who contributed to this | |
11 | * project. | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License as | |
15 | * published by the Free Software Foundation; either version 2 of | |
16 | * the License, or (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
26 | * MA 02111-1307 USA | |
27 | */ | |
28 | ||
29 | #include <common.h> | |
30 | #include <mpc824x.h> | |
31 | #include <asm/processor.h> | |
32 | #include <asm/io.h> | |
7a8e9bed | 33 | #include <asm/mmu.h> |
c609719b | 34 | #include <pci.h> |
10efa024 | 35 | #include <netdev.h> |
c609719b WD |
36 | |
37 | #define SAVE_SZ 32 | |
38 | ||
39 | ||
40 | int checkboard(void) | |
41 | { | |
42 | ulong busfreq = get_bus_freq(0); | |
43 | char buf[32]; | |
44 | ||
45 | printf("Board: UTX8245 Local Bus at %s MHz\n", strmhz(buf, busfreq)); | |
46 | return 0; | |
47 | } | |
48 | ||
49 | ||
9973e3c6 | 50 | phys_size_t initdram(int board_type) |
c609719b | 51 | { |
c83bf6a2 WD |
52 | long size; |
53 | long new_bank0_end; | |
498b8db7 | 54 | long new_bank1_end; |
c83bf6a2 WD |
55 | long mear1; |
56 | long emear1; | |
7a8e9bed | 57 | |
6d0f6bcf | 58 | size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE); |
c83bf6a2 | 59 | |
498b8db7 WD |
60 | new_bank0_end = size/2 - 1; |
61 | new_bank1_end = size - 1; | |
c83bf6a2 WD |
62 | mear1 = mpc824x_mpc107_getreg(MEAR1); |
63 | emear1 = mpc824x_mpc107_getreg(EMEAR1); | |
498b8db7 WD |
64 | |
65 | mear1 = (mear1 & 0xFFFF0000) | | |
66 | ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) | | |
67 | ((new_bank1_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT << 8); | |
68 | emear1 = (emear1 & 0xFFFF0000) | | |
69 | ((new_bank0_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) | | |
70 | ((new_bank1_end & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT << 8); | |
e35745bb | 71 | |
c83bf6a2 WD |
72 | mpc824x_mpc107_setreg(MEAR1, mear1); |
73 | mpc824x_mpc107_setreg(EMEAR1, emear1); | |
74 | ||
75 | return (size); | |
c609719b WD |
76 | } |
77 | ||
78 | ||
79 | /* | |
80 | * Initialize PCI Devices, report devices found. | |
81 | */ | |
82 | ||
83 | static struct pci_config_table pci_utx8245_config_table[] = { | |
84 | #ifndef CONFIG_PCI_PNP | |
7a8e9bed | 85 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0C, PCI_ANY_ID, |
c609719b WD |
86 | pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, |
87 | PCI_ENET0_MEMADDR, | |
88 | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, | |
7a8e9bed | 89 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0B, PCI_ANY_ID, |
c609719b WD |
90 | pci_cfgfunc_config_device, { PCI_FIREWIRE_IOADDR, |
91 | PCI_FIREWIRE_MEMADDR, | |
92 | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, | |
93 | #endif /*CONFIG_PCI_PNP*/ | |
94 | { } | |
95 | }; | |
96 | ||
97 | ||
98 | static void pci_utx8245_fixup_irq(struct pci_controller *hose, pci_dev_t dev) | |
99 | { | |
100 | if (PCI_DEV(dev) == 11) | |
101 | /* assign serial interrupt line 9 (int25) to FireWire */ | |
102 | pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 25); | |
103 | ||
104 | else if (PCI_DEV(dev) == 12) | |
105 | /* assign serial interrupt line 8 (int24) to Ethernet */ | |
106 | pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 24); | |
7a8e9bed WD |
107 | |
108 | else if (PCI_DEV(dev) == 14) | |
109 | /* assign serial interrupt line 0 (int16) to PMC slot 0 */ | |
110 | pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 16); | |
111 | ||
112 | else if (PCI_DEV(dev) == 15) | |
113 | /* assign serial interrupt line 1 (int17) to PMC slot 1 */ | |
114 | pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 17); | |
c609719b WD |
115 | } |
116 | ||
117 | static struct pci_controller utx8245_hose = { | |
118 | #ifndef CONFIG_PCI_PNP | |
119 | config_table: pci_utx8245_config_table, | |
120 | fixup_irq: pci_utx8245_fixup_irq, | |
121 | write_byte: pci_hose_write_config_byte | |
122 | #endif /*CONFIG_PCI_PNP*/ | |
123 | }; | |
124 | ||
ad10dd9a | 125 | void pci_init_board (void) |
c609719b WD |
126 | { |
127 | pci_mpc824x_init(&utx8245_hose); | |
128 | ||
129 | icache_enable(); | |
130 | } | |
10efa024 BW |
131 | |
132 | int board_eth_init(bd_t *bis) | |
133 | { | |
134 | return pci_eth_init(bis); | |
135 | } |