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Commit | Line | Data |
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5da6f806 PT |
1 | /* |
2 | * Copyright 2009 Extreme Engineering Solutions, Inc. | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
5da6f806 PT |
5 | */ |
6 | ||
7 | #include <common.h> | |
8 | #include <asm/processor.h> | |
5614e71b | 9 | #include <fsl_ddr_sdram.h> |
5da6f806 PT |
10 | #include <asm/mmu.h> |
11 | #include <asm/io.h> | |
12 | #include <fdt_support.h> | |
13 | #include <pca953x.h> | |
92af6549 | 14 | #include "../common/fsl_8xxx_misc.h" |
5da6f806 PT |
15 | |
16 | #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_PCI) | |
17 | extern void ft_board_pci_setup(void *blob, bd_t *bd); | |
18 | #endif | |
19 | ||
5da6f806 PT |
20 | /* |
21 | * Print out which flash was booted from and if booting from the 2nd flash, | |
22 | * swap flash chip selects to maintain consistent flash numbering/addresses. | |
23 | */ | |
24 | static void flash_cs_fixup(void) | |
25 | { | |
5da6f806 PT |
26 | int flash_sel; |
27 | ||
28 | /* | |
29 | * Print boot dev and swap flash flash chip selects if booted from 2nd | |
30 | * flash. Swapping chip selects presents user with a common memory | |
31 | * map regardless of which flash was booted from. | |
32 | */ | |
33 | flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & | |
34 | CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS)); | |
eddf52b5 | 35 | printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1); |
5da6f806 PT |
36 | |
37 | if (flash_sel) { | |
f51cdaf1 BB |
38 | set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); |
39 | set_lbc_or(0, CONFIG_SYS_OR1_PRELIM); | |
5da6f806 | 40 | |
f51cdaf1 BB |
41 | set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); |
42 | set_lbc_or(1, CONFIG_SYS_OR0_PRELIM); | |
5da6f806 PT |
43 | } |
44 | } | |
45 | ||
46 | int board_early_init_r(void) | |
47 | { | |
48 | /* Initialize PCA9557 devices */ | |
49 | pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); | |
50 | pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0); | |
51 | pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR2, 0xff, 0); | |
52 | pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR3, 0xff, 0); | |
53 | ||
54 | flash_cs_fixup(); | |
55 | ||
56 | return 0; | |
57 | } | |
58 | ||
38dba0c2 BB |
59 | phys_size_t initdram(int board_type) |
60 | { | |
61 | phys_size_t dram_size = fsl_ddr_sdram(); | |
62 | ||
63 | #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) | |
64 | /* Initialize and enable DDR ECC */ | |
65 | ddr_enable_ecc(dram_size); | |
66 | #endif | |
67 | ||
68 | return dram_size; | |
69 | } | |
70 | ||
5da6f806 | 71 | #if defined(CONFIG_OF_BOARD_SETUP) |
e895a4b0 | 72 | int ft_board_setup(void *blob, bd_t *bd) |
5da6f806 PT |
73 | { |
74 | #ifdef CONFIG_PCI | |
75 | ft_board_pci_setup(blob, bd); | |
76 | #endif | |
77 | ft_cpu_setup(blob, bd); | |
e895a4b0 SG |
78 | |
79 | return 0; | |
5da6f806 PT |
80 | } |
81 | #endif |