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1f03cbfa PT |
1 | /* |
2 | * Copyright 2008 Extreme Engineering Solutions, Inc. | |
3 | * Copyright 2004, 2007 Freescale Semiconductor, Inc. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
1f03cbfa PT |
6 | */ |
7 | ||
8 | #include <common.h> | |
9 | #include <command.h> | |
10 | #include <pci.h> | |
11 | #include <asm/processor.h> | |
12 | #include <asm/immap_85xx.h> | |
c8514622 | 13 | #include <asm/fsl_pci.h> |
1f03cbfa PT |
14 | #include <asm/io.h> |
15 | #include <asm/cache.h> | |
16 | #include <asm/mmu.h> | |
17 | #include <libfdt.h> | |
18 | #include <fdt_support.h> | |
19 | #include <pca953x.h> | |
20 | ||
21 | extern void ft_board_pci_setup(void *blob, bd_t *bd); | |
22 | ||
1f03cbfa PT |
23 | static void flash_cs_fixup(void) |
24 | { | |
1f03cbfa PT |
25 | int flash_sel; |
26 | ||
27 | /* | |
28 | * Print boot dev and swap flash flash chip selects if booted from 2nd | |
29 | * flash. Swapping chip selects presents user with a common memory | |
30 | * map regardless of which flash was booted from. | |
31 | */ | |
32 | flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) & | |
33 | CONFIG_SYS_PCA953X_FLASH_PASS_CS)); | |
eddf52b5 | 34 | printf("Flash: Executed from flash%d\n", flash_sel ? 2 : 1); |
1f03cbfa PT |
35 | |
36 | if (flash_sel) { | |
f51cdaf1 BB |
37 | set_lbc_br(0, CONFIG_SYS_BR1_PRELIM); |
38 | set_lbc_or(0, CONFIG_SYS_OR1_PRELIM); | |
1f03cbfa | 39 | |
f51cdaf1 BB |
40 | set_lbc_br(1, CONFIG_SYS_BR0_PRELIM); |
41 | set_lbc_or(1, CONFIG_SYS_OR0_PRELIM); | |
1f03cbfa PT |
42 | } |
43 | } | |
44 | ||
45 | int board_early_init_r(void) | |
46 | { | |
47 | /* Initialize PCA9557 devices */ | |
48 | pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); | |
49 | pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0); | |
50 | ||
51 | /* | |
52 | * Remap NOR flash region to caching-inhibited | |
53 | * so that flash can be erased/programmed properly. | |
54 | */ | |
55 | ||
56 | /* Flush d-cache and invalidate i-cache of any FLASH data */ | |
57 | flush_dcache(); | |
58 | invalidate_icache(); | |
59 | ||
60 | /* Invalidate existing TLB entry for NOR flash */ | |
61 | disable_tlb(0); | |
62 | set_tlb(1, (CONFIG_SYS_FLASH_BASE2 & 0xf0000000), | |
63 | (CONFIG_SYS_FLASH_BASE2 & 0xf0000000), | |
64 | MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, | |
65 | 0, 0, BOOKE_PAGESZ_256M, 1); | |
66 | ||
67 | flash_cs_fixup(); | |
68 | ||
69 | return 0; | |
70 | } | |
71 | ||
72 | #if defined(CONFIG_OF_BOARD_SETUP) | |
73 | void ft_board_setup(void *blob, bd_t *bd) | |
74 | { | |
75 | #ifdef CONFIG_PCI | |
76 | ft_board_pci_setup(blob, bd); | |
77 | #endif | |
78 | ft_cpu_setup(blob, bd); | |
79 | } | |
80 | #endif |