projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| cf0bcd7d MS |
2 | /* |
| 3 | * (c) Copyright 2015 Xilinx, Inc. All rights reserved. | |
| cf0bcd7d MS |
4 | */ |
| 5 | ||
| 6 | #include <asm/arch/psu_init_gpl.h> | |
| 7 | #include <xil_io.h> | |
| 8 | ||
| 9 | static unsigned long psu_pll_init_data(void) | |
| 10 | { | |
| 11 | psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4E2C62U); | |
| 12 | psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U); | |
| 13 | psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); | |
| 14 | psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); | |
| 15 | psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); | |
| 16 | mask_poll(0xFF5E0040, 0x00000002U); | |
| 17 | psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); | |
| 18 | psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000200U); | |
| 19 | psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U); | |
| 20 | psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U); | |
| 21 | psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); | |
| 22 | psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); | |
| 23 | psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); | |
| 24 | mask_poll(0xFF5E0040, 0x00000001U); | |
| 25 | psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); | |
| 26 | psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); | |
| 27 | psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); | |
| 28 | psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U); | |
| 29 | psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); | |
| 30 | psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); | |
| 31 | psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); | |
| 32 | mask_poll(0xFD1A0044, 0x00000001U); | |
| 33 | psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); | |
| 34 | psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); | |
| 35 | psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); | |
| 36 | psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U); | |
| 37 | psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); | |
| 38 | psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); | |
| 39 | psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); | |
| 40 | mask_poll(0xFD1A0044, 0x00000002U); | |
| 41 | psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); | |
| 42 | psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000200U); | |
| 43 | psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U); | |
| 44 | psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015900U); | |
| 45 | psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); | |
| 46 | psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); | |
| 47 | psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); | |
| 48 | mask_poll(0xFD1A0044, 0x00000004U); | |
| 49 | psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); | |
| 50 | psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U); | |
| 51 | psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x80008E69U); | |
| 52 | ||
| 53 | return 1; | |
| 54 | } | |
| 55 | ||
| 56 | static unsigned long psu_clock_init_data(void) | |
| 57 | { | |
| 58 | psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U); | |
| 59 | psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U); | |
| 60 | psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U); | |
| 61 | psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010500U); | |
| 62 | psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010502U); | |
| 63 | psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U); | |
| 64 | psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); | |
| 65 | psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U); | |
| 66 | psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U); | |
| 67 | psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U); | |
| 68 | psu_mask_write(0xFF5E0088, 0x013F3F07U, 0x01010F00U); | |
| 69 | psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); | |
| 70 | psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U); | |
| 71 | psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000602U); | |
| 72 | psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); | |
| 73 | psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); | |
| 74 | psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); | |
| 75 | psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); | |
| 76 | psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010A02U); | |
| 77 | psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01010F00U); | |
| 78 | psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010A02U); | |
| 79 | psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010A02U); | |
| 80 | psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U); | |
| 81 | psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); | |
| 82 | psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); | |
| 83 | psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U); | |
| 84 | psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010203U); | |
| 85 | psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01013C00U); | |
| 86 | psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01011303U); | |
| 87 | psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); | |
| 88 | psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); | |
| 89 | psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U); | |
| 90 | psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U); | |
| 91 | psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U); | |
| 92 | psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U); | |
| 93 | psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000302U); | |
| 94 | psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); | |
| 95 | psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); | |
| 96 | psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); | |
| 97 | psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); | |
| 98 | psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); | |
| 99 | psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); | |
| 100 | ||
| 101 | return 1; | |
| 102 | } | |
| 103 | ||
| 104 | static unsigned long psu_ddr_init_data(void) | |
| 105 | { | |
| 106 | psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); | |
| 107 | psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x41040010U); | |
| 108 | psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); | |
| 109 | psu_mask_write(0xFD070020, 0x000003F3U, 0x00000300U); | |
| 110 | psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U); | |
| 111 | psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); | |
| 112 | psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U); | |
| 113 | psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); | |
| 114 | psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); | |
| 115 | psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0082808BU); | |
| 116 | psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); | |
| 117 | psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); | |
| 118 | psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); | |
| 119 | psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU); | |
| 120 | psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U); | |
| 121 | psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U); | |
| 122 | psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U); | |
| 123 | psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x09300301U); | |
| 124 | psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U); | |
| 125 | psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U); | |
| 126 | psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U); | |
| 127 | psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U); | |
| 128 | psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); | |
| 129 | psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU); | |
| 130 | psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x11112412U); | |
| 131 | psu_mask_write(0xFD070104, 0x001F1F7FU, 0x0004041AU); | |
| 132 | psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060EU); | |
| 133 | psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU); | |
| 134 | psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030309U); | |
| 135 | psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U); | |
| 136 | psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U); | |
| 137 | psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U); | |
| 138 | psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040D06U); | |
| 139 | psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002020BU); | |
| 140 | psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x6F07010EU); | |
| 141 | psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); | |
| 142 | psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U); | |
| 143 | psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x02019707U); | |
| 144 | psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU); | |
| 145 | psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U); | |
| 146 | psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); | |
| 147 | psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); | |
| 148 | psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U); | |
| 149 | psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E2U); | |
| 150 | psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U); | |
| 151 | psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U); | |
| 152 | psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U); | |
| 153 | psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU); | |
| 154 | psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0A0AU); | |
| 155 | psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U); | |
| 156 | psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U); | |
| 157 | psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU); | |
| 158 | psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x080F0808U); | |
| 159 | psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F080808U); | |
| 160 | psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU); | |
| 161 | psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000808U); | |
| 162 | psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x08080808U); | |
| 163 | psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x08080808U); | |
| 164 | psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000008U); | |
| 165 | psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U); | |
| 166 | psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U); | |
| 167 | psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); | |
| 168 | psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); | |
| 169 | psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); | |
| 170 | psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); | |
| 171 | psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); | |
| 172 | psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); | |
| 173 | psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); | |
| 174 | psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); | |
| 175 | psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); | |
| 176 | psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); | |
| 177 | psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); | |
| 178 | psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); | |
| 179 | psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); | |
| 180 | psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); | |
| 181 | psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); | |
| 182 | psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); | |
| 183 | psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); | |
| 184 | psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); | |
| 185 | psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); | |
| 186 | psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); | |
| 187 | psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); | |
| 188 | psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); | |
| 189 | psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); | |
| 190 | psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); | |
| 191 | psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); | |
| 192 | psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); | |
| 193 | psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); | |
| 194 | psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); | |
| 195 | psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); | |
| 196 | psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); | |
| 197 | psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); | |
| 198 | psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); | |
| 199 | psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); | |
| 200 | psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); | |
| 201 | psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); | |
| 202 | psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); | |
| 203 | psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); | |
| 204 | psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); | |
| 205 | psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); | |
| 206 | psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); | |
| 207 | psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); | |
| 208 | psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); | |
| 209 | psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); | |
| 210 | psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); | |
| 211 | psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); | |
| 212 | psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); | |
| 213 | psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); | |
| 214 | psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); | |
| 215 | psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); | |
| 216 | psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000000U); | |
| 217 | psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U); | |
| 218 | psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10028U); | |
| 219 | psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); | |
| 220 | psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); | |
| 221 | psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x5E001810U); | |
| 222 | psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x41980B06U); | |
| 223 | psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U); | |
| 224 | psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU); | |
| 225 | psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06240F09U); | |
| 226 | psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28210008U); | |
| 227 | psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00070300U); | |
| 228 | psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U); | |
| 229 | psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B07U); | |
| 230 | psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00330F09U); | |
| 231 | psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU); | |
| 232 | psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); | |
| 233 | psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); | |
| 234 | psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); | |
| 235 | psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U); | |
| 236 | psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000830U); | |
| 237 | psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U); | |
| 238 | psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U); | |
| 239 | psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U); | |
| 240 | psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U); | |
| 241 | psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U); | |
| 242 | psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U); | |
| 243 | psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U); | |
| 244 | psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU); | |
| 245 | psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); | |
| 246 | psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU); | |
| 247 | psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U); | |
| 248 | psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U); | |
| 249 | psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U); | |
| 250 | psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); | |
| 251 | psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); | |
| 252 | psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U); | |
| 253 | psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U); | |
| 254 | psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); | |
| 255 | psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U); | |
| 256 | psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U); | |
| 257 | psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U); | |
| 258 | psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0B0U); | |
| 259 | psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U); | |
| 260 | psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); | |
| 261 | psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); | |
| 262 | psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); | |
| 263 | psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); | |
| 264 | psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); | |
| 265 | psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); | |
| 266 | psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); | |
| 267 | psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAA58U); | |
| 268 | psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000077DDU); | |
| 269 | psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); | |
| 270 | psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); | |
| 271 | psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU); | |
| 272 | psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); | |
| 273 | psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU); | |
| 274 | psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09095555U); | |
| 275 | psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); | |
| 276 | psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); | |
| 277 | psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU); | |
| 278 | psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09095555U); | |
| 279 | psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); | |
| 280 | psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); | |
| 281 | psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); | |
| 282 | psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU); | |
| 283 | psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09095555U); | |
| 284 | psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); | |
| 285 | psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); | |
| 286 | psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); | |
| 287 | psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU); | |
| 288 | psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09095555U); | |
| 289 | psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); | |
| 290 | psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U); | |
| 291 | psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU); | |
| 292 | psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B03CU); | |
| 293 | psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09095555U); | |
| 294 | psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); | |
| 295 | psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U); | |
| 296 | psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU); | |
| 297 | psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU); | |
| 298 | psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09095555U); | |
| 299 | psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); | |
| 300 | psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U); | |
| 301 | psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU); | |
| 302 | psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B03CU); | |
| 303 | psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09095555U); | |
| 304 | psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); | |
| 305 | psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U); | |
| 306 | psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU); | |
| 307 | psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU); | |
| 308 | psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09095555U); | |
| 309 | psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); | |
| 310 | psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U); | |
| 311 | psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U); | |
| 312 | psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B03CU); | |
| 313 | psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09095555U); | |
| 314 | psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); | |
| 315 | psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); | |
| 316 | psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); | |
| 317 | psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U); | |
| 318 | psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U); | |
| 319 | psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); | |
| 320 | psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); | |
| 321 | psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U); | |
| 322 | psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U); | |
| 323 | psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU); | |
| 324 | psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U); | |
| 325 | psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U); | |
| 326 | psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U); | |
| 327 | psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU); | |
| 328 | psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U); | |
| 329 | psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U); | |
| 330 | psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U); | |
| 331 | psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU); | |
| 332 | psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U); | |
| 333 | psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U); | |
| 334 | psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70800000U); | |
| 335 | psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); | |
| 336 | psu_mask_write(0xFD080004, 0xFFFFFFFFU, 0x00040073U); | |
| 337 | ||
| 338 | return 1; | |
| 339 | } | |
| 340 | ||
| 341 | static unsigned long psu_mio_init_data(void) | |
| 342 | { | |
| 343 | psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U); | |
| 344 | psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U); | |
| 345 | psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U); | |
| 346 | psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U); | |
| 347 | psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U); | |
| 348 | psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U); | |
| 349 | psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U); | |
| 350 | psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000002U); | |
| 351 | psu_mask_write(0xFF180020, 0x000000FEU, 0x00000002U); | |
| 352 | psu_mask_write(0xFF180024, 0x000000FEU, 0x00000002U); | |
| 353 | psu_mask_write(0xFF180028, 0x000000FEU, 0x00000002U); | |
| 354 | psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000002U); | |
| 355 | psu_mask_write(0xFF180030, 0x000000FEU, 0x00000002U); | |
| 356 | psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U); | |
| 357 | psu_mask_write(0xFF180038, 0x000000FEU, 0x00000040U); | |
| 358 | psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000040U); | |
| 359 | psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U); | |
| 360 | psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U); | |
| 361 | psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U); | |
| 362 | psu_mask_write(0xFF18004C, 0x000000FEU, 0x000000C0U); | |
| 363 | psu_mask_write(0xFF180050, 0x000000FEU, 0x000000C0U); | |
| 364 | psu_mask_write(0xFF180054, 0x000000FEU, 0x000000C0U); | |
| 365 | psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U); | |
| 366 | psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U); | |
| 367 | psu_mask_write(0xFF180060, 0x000000FEU, 0x00000020U); | |
| 368 | psu_mask_write(0xFF180064, 0x000000FEU, 0x00000020U); | |
| 369 | psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U); | |
| 370 | psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U); | |
| 371 | psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U); | |
| 372 | psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U); | |
| 373 | psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U); | |
| 374 | psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); | |
| 375 | psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U); | |
| 376 | psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U); | |
| 377 | psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U); | |
| 378 | psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000008U); | |
| 379 | psu_mask_write(0xFF180090, 0x000000FEU, 0x00000008U); | |
| 380 | psu_mask_write(0xFF180094, 0x000000FEU, 0x00000008U); | |
| 381 | psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U); | |
| 382 | psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U); | |
| 383 | psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U); | |
| 384 | psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U); | |
| 385 | psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U); | |
| 386 | psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000010U); | |
| 387 | psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000010U); | |
| 388 | psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U); | |
| 389 | psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U); | |
| 390 | psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U); | |
| 391 | psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U); | |
| 392 | psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U); | |
| 393 | psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U); | |
| 394 | psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U); | |
| 395 | psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U); | |
| 396 | psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U); | |
| 397 | psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U); | |
| 398 | psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U); | |
| 399 | psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U); | |
| 400 | psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U); | |
| 401 | psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U); | |
| 402 | psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U); | |
| 403 | psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U); | |
| 404 | psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U); | |
| 405 | psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U); | |
| 406 | psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U); | |
| 407 | psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U); | |
| 408 | psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U); | |
| 409 | psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U); | |
| 410 | psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U); | |
| 411 | psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U); | |
| 412 | psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U); | |
| 413 | psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U); | |
| 414 | psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U); | |
| 415 | psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U); | |
| 416 | psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U); | |
| 417 | psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U); | |
| 418 | psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U); | |
| 419 | psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U); | |
| 420 | psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U); | |
| 421 | psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x52240000U); | |
| 422 | psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B03000U); | |
| 423 | psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U); | |
| 424 | psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 425 | psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 426 | psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); | |
| 427 | psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 428 | psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 429 | psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); | |
| 430 | psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 431 | psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 432 | psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); | |
| 433 | psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 434 | psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 435 | psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); | |
| 436 | psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 437 | psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 438 | psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); | |
| 439 | psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 440 | psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); | |
| 441 | psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); | |
| 442 | psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); | |
| 443 | ||
| 444 | return 1; | |
| 445 | } | |
| 446 | ||
| 447 | static unsigned long psu_peripherals_init_data(void) | |
| 448 | { | |
| 449 | psu_mask_write(0xFF5E0238, 0x00100000U, 0x00000000U); | |
| 450 | psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); | |
| 451 | psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U); | |
| 452 | psu_mask_write(0xFF180390, 0x00000004U, 0x00000000U); | |
| 453 | psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000000U); | |
| 454 | psu_mask_write(0xFD1A0100, 0x0001807EU, 0x00000000U); | |
| 455 | psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U); | |
| 456 | psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U); | |
| 457 | psu_mask_write(0xFF180320, 0x33800000U, 0x02800000U); | |
| 458 | psu_mask_write(0xFF18031C, 0x7F800000U, 0x63800000U); | |
| 459 | psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U); | |
| 460 | psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U); | |
| 461 | psu_mask_write(0xFF5E0238, 0x00000100U, 0x00000000U); | |
| 462 | psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U); | |
| 463 | psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U); | |
| 464 | psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U); | |
| 465 | psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U); | |
| 466 | psu_mask_write(0xFF000034, 0x000000FFU, 0x00000005U); | |
| 467 | psu_mask_write(0xFF000018, 0x0000FFFFU, 0x0000008FU); | |
| 468 | psu_mask_write(0xFF000000, 0x000001FFU, 0x00000017U); | |
| 469 | psu_mask_write(0xFF000004, 0x000003FFU, 0x00000020U); | |
| 470 | psu_mask_write(0xFF010034, 0x000000FFU, 0x00000005U); | |
| 471 | psu_mask_write(0xFF010018, 0x0000FFFFU, 0x0000008FU); | |
| 472 | psu_mask_write(0xFF010000, 0x000001FFU, 0x00000017U); | |
| 473 | psu_mask_write(0xFF010004, 0x000003FFU, 0x00000020U); | |
| 474 | psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); | |
| 475 | psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); | |
| 476 | psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); | |
| 477 | psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); | |
| 478 | psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5E100U); | |
| 479 | psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); | |
| 480 | ||
| 481 | return 1; | |
| 482 | } | |
| 483 | ||
| 484 | static unsigned long psu_serdes_init_data(void) | |
| 485 | { | |
| 486 | psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U); | |
| 487 | psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U); | |
| 488 | psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U); | |
| 489 | psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000FU); | |
| 490 | psu_mask_write(0xFD402860, 0x00000088U, 0x00000008U); | |
| 491 | psu_mask_write(0xFD402864, 0x00000088U, 0x00000008U); | |
| 492 | psu_mask_write(0xFD402868, 0x00000080U, 0x00000080U); | |
| 493 | psu_mask_write(0xFD40286C, 0x00000082U, 0x00000002U); | |
| 494 | psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U); | |
| 495 | psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U); | |
| 496 | psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U); | |
| 497 | psu_mask_write(0xFD40E368, 0x000000FFU, 0x000000E0U); | |
| 498 | psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U); | |
| 499 | psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U); | |
| 500 | psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U); | |
| 501 | psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U); | |
| 502 | psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U); | |
| 503 | psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU); | |
| 504 | psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U); | |
| 505 | psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U); | |
| 506 | psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U); | |
| 507 | psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU); | |
| 508 | psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U); | |
| 509 | psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U); | |
| 510 | psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U); | |
| 511 | psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U); | |
| 512 | psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U); | |
| 513 | psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U); | |
| 514 | psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U); | |
| 515 | psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000C9U); | |
| 516 | psu_mask_write(0xFD40E374, 0x000000FFU, 0x000000D2U); | |
| 517 | psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000001U); | |
| 518 | psu_mask_write(0xFD40E37C, 0x000000B3U, 0x000000B0U); | |
| 519 | psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U); | |
| 520 | psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U); | |
| 521 | psu_mask_write(0xFD40E360, 0x00000040U, 0x00000040U); | |
| 522 | psu_mask_write(0xFD40D06C, 0x0000000FU, 0x0000000FU); | |
| 523 | psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x0000000BU); | |
| 524 | psu_mask_write(0xFD40CB00, 0x000000F0U, 0x000000F0U); | |
| 525 | psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U); | |
| 526 | psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); | |
| 527 | psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); | |
| 528 | psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); | |
| 529 | psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); | |
| 530 | psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); | |
| 531 | psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); | |
| 532 | psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U); | |
| 533 | psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU); | |
| 534 | psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU); | |
| 535 | psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U); | |
| 536 | psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU); | |
| 537 | psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U); | |
| 538 | psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU); | |
| 539 | psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U); | |
| 540 | psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU); | |
| 541 | psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U); | |
| 542 | psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U); | |
| 543 | psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U); | |
| 544 | psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U); | |
| 545 | psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); | |
| 546 | psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U); | |
| 547 | psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000007DU); | |
| 548 | psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000007DU); | |
| 549 | psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000001U); | |
| 550 | psu_mask_write(0xFD40D924, 0x000000FFU, 0x0000009CU); | |
| 551 | psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000039U); | |
| 552 | psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); | |
| 553 | psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000007DU); | |
| 554 | psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000064U); | |
| 555 | psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU); | |
| 556 | psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U); | |
| 557 | psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U); | |
| 558 | psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U); | |
| 559 | psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U); | |
| 560 | psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); | |
| 561 | psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); | |
| 562 | psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); | |
| 563 | psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); | |
| 564 | psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); | |
| 565 | psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); | |
| 566 | psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); | |
| 567 | psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); | |
| 568 | psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); | |
| 569 | psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); | |
| 570 | psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); | |
| 571 | psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); | |
| 572 | psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); | |
| 573 | psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); | |
| 574 | psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); | |
| 575 | psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); | |
| 576 | psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); | |
| 577 | psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); | |
| 578 | psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); | |
| 579 | psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); | |
| 580 | psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); | |
| 581 | psu_mask_write(0xFD401978, 0x00000080U, 0x00000080U); | |
| 582 | psu_mask_write(0xFD405978, 0x00000080U, 0x00000080U); | |
| 583 | psu_mask_write(0xFD409978, 0x00000080U, 0x00000080U); | |
| 584 | psu_mask_write(0xFD40D978, 0x00000080U, 0x00000080U); | |
| 585 | psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U); | |
| 586 | psu_mask_write(0xFD410014, 0x00000077U, 0x00000023U); | |
| 587 | psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U); | |
| 588 | psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U); | |
| 589 | psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U); | |
| 590 | psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U); | |
| 591 | psu_mask_write(0xFD40C1D8, 0x00000001U, 0x00000001U); | |
| 592 | psu_mask_write(0xFD40DC14, 0x000000FFU, 0x000000E6U); | |
| 593 | psu_mask_write(0xFD40DC40, 0x0000001FU, 0x0000000CU); | |
| 594 | psu_mask_write(0xFD40D94C, 0x00000020U, 0x00000020U); | |
| 595 | psu_mask_write(0xFD40D950, 0x00000007U, 0x00000006U); | |
| 596 | psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U); | |
| 597 | psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U); | |
| 598 | psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U); | |
| 599 | psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U); | |
| 600 | psu_mask_write(0xFD40C048, 0x000000FFU, 0x00000001U); | |
| 601 | ||
| 602 | return 1; | |
| 603 | } | |
| 604 | ||
| 605 | static unsigned long psu_resetout_init_data(void) | |
| 606 | { | |
| 607 | psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); | |
| 608 | psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U); | |
| 609 | psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U); | |
| 610 | psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U); | |
| 611 | psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); | |
| 612 | psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000003U); | |
| 613 | psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U); | |
| 614 | psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U); | |
| 615 | psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U); | |
| 616 | psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U); | |
| 617 | psu_mask_write(0xFE20C200, 0x00003FFFU, 0x00002457U); | |
| 618 | psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U); | |
| 619 | psu_mask_write(0xFE20C11C, 0x00000400U, 0x00000400U); | |
| 620 | psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); | |
| 621 | mask_poll(0xFD4063E4, 0x00000010U); | |
| 622 | mask_poll(0xFD40A3E4, 0x00000010U); | |
| 623 | mask_poll(0xFD40E3E4, 0x00000010U); | |
| 624 | psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184018U); | |
| 625 | psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081406U); | |
| 626 | psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U); | |
| 627 | psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U); | |
| 628 | ||
| 629 | return 1; | |
| 630 | } | |
| 631 | ||
| 632 | static unsigned long psu_resetin_init_data(void) | |
| 633 | { | |
| 634 | psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U); | |
| 635 | psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U); | |
| 636 | psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U); | |
| 637 | psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU); | |
| 638 | psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U); | |
| 639 | psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U); | |
| 640 | ||
| 641 | return 1; | |
| 642 | } | |
| 643 | ||
| 644 | static unsigned long psu_ddr_phybringup_data(void) | |
| 645 | { | |
| 646 | unsigned int regval = 0; | |
| 647 | ||
| 648 | while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) | |
| 649 | ; | |
| 650 | prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); | |
| 651 | ||
| 652 | while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) | |
| 653 | ; | |
| 654 | ||
| 655 | Xil_Out32(0xFD0701B0U, 0x00000001U); | |
| 656 | Xil_Out32(0xFD070320U, 0x00000001U); | |
| 657 | while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) | |
| 658 | ; | |
| 659 | prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); | |
| 660 | Xil_Out32(0xFD080004, 0x0004FE01); | |
| 661 | regval = Xil_In32(0xFD080030); | |
| 662 | while (regval != 0x80000FFF) | |
| 663 | regval = Xil_In32(0xFD080030); | |
| 664 | ||
| 665 | Xil_Out32(0xFD080200U, 0x100091C7U); | |
| 666 | Xil_Out32(0xFD080018U, 0x00F01EF2U); | |
| 667 | prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U); | |
| 668 | prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U); | |
| 669 | prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U); | |
| 670 | prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U); | |
| 671 | prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U); | |
| 672 | prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U); | |
| 673 | ||
| 674 | Xil_Out32(0xFD080004, 0x00060001); | |
| 675 | regval = Xil_In32(0xFD080030); | |
| 676 | while ((regval & 0x80004001) != 0x80004001) | |
| 677 | regval = Xil_In32(0xFD080030); | |
| 678 | ||
| 679 | prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U); | |
| 680 | prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U); | |
| 681 | prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U); | |
| 682 | prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U); | |
| 683 | prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U); | |
| 684 | prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U); | |
| 685 | ||
| 686 | Xil_Out32(0xFD080200U, 0x800091C7U); | |
| 687 | Xil_Out32(0xFD080018U, 0x00F12302U); | |
| 688 | ||
| 689 | Xil_Out32(0xFD080004, 0x0000C001); | |
| 690 | regval = Xil_In32(0xFD080030); | |
| 691 | while ((regval & 0x80000C01) != 0x80000C01) | |
| 692 | regval = Xil_In32(0xFD080030); | |
| 693 | ||
| 694 | Xil_Out32(0xFD070180U, 0x01000040U); | |
| 695 | Xil_Out32(0xFD070060U, 0x00000000U); | |
| 696 | prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); | |
| 697 | ||
| 698 | return 1; | |
| 699 | } | |
| 700 | ||
| 701 | static int serdes_fixcal_code(void) | |
| 702 | { | |
| 703 | int maskstatus = 1; | |
| 704 | unsigned int tmp_0_1, tmp_0_2, tmp_0_3, tmp_0_2_mod; | |
| 705 | ||
| 706 | Xil_Out32(0xFD40EC4C, 0x00000020); | |
| 707 | ||
| 708 | Xil_Out32(0xFD410010, 0x00000001); | |
| 709 | ||
| 710 | maskstatus = mask_poll(0xFD40EF14, 0x2); | |
| 711 | ||
| 712 | if (maskstatus == 0) { | |
| 713 | xil_printf("SERDES initialization timed out\n\r"); | |
| 714 | return maskstatus; | |
| 715 | } | |
| 716 | ||
| 717 | tmp_0_1 = mask_read(0xFD400B0C, 0x3F); | |
| 718 | ||
| 719 | tmp_0_2 = tmp_0_1 & (0x7); | |
| 720 | tmp_0_3 = tmp_0_1 & (0x38); | |
| 721 | ||
| 722 | Xil_Out32(0xFD410010, 0x00000000); | |
| 723 | Xil_Out32(0xFD410014, 0x00000000); | |
| 724 | ||
| 725 | tmp_0_2_mod = (tmp_0_2 << 1) | (0x1); | |
| 726 | tmp_0_2_mod = (tmp_0_2_mod << 4); | |
| 727 | ||
| 728 | tmp_0_3 = tmp_0_3 >> 3; | |
| 729 | Xil_Out32(0xFD40EC4C, tmp_0_3); | |
| 730 | ||
| 731 | Xil_Out32(0xFD40EC48, tmp_0_2_mod); | |
| 732 | return maskstatus; | |
| 733 | } | |
| 734 | ||
| 735 | static int serdes_enb_coarse_saturation(void) | |
| 736 | { | |
| 737 | Xil_Out32(0xFD402094, 0x00000010); | |
| 738 | Xil_Out32(0xFD406094, 0x00000010); | |
| 739 | Xil_Out32(0xFD40A094, 0x00000010); | |
| 740 | Xil_Out32(0xFD40E094, 0x00000010); | |
| 741 | return 1; | |
| 742 | } | |
| 743 | ||
| 744 | static int init_serdes(void) | |
| 745 | { | |
| 746 | int status = 1; | |
| 747 | ||
| 748 | status &= psu_resetin_init_data(); | |
| 749 | ||
| 750 | status &= serdes_fixcal_code(); | |
| 751 | status &= serdes_enb_coarse_saturation(); | |
| 752 | ||
| 753 | status &= psu_serdes_init_data(); | |
| 754 | status &= psu_resetout_init_data(); | |
| 755 | ||
| 756 | return status; | |
| 757 | } | |
| 758 | ||
| 759 | static void init_peripheral(void) | |
| 760 | { | |
| 761 | unsigned int regvalue; | |
| 762 | unsigned int tmp_regval; | |
| 763 | ||
| 764 | Xil_Out32(((0xFF5E0000U) + 0x00000230U), 0x00000000); | |
| 765 | Xil_Out32(((0xFF5E0000U) + 0x00000234U), 0x00000000); | |
| 766 | Xil_Out32(((0xFF5E0000U) + 0x00000238U), 0x00000000); | |
| 767 | ||
| 768 | regvalue = Xil_In32(((0xFF5E0000U) + 0x0000023CU)); | |
| 769 | regvalue &= 0x7; | |
| 770 | Xil_Out32(((0xFF5E0000U) + 0x0000023CU), regvalue); | |
| 771 | ||
| 772 | Xil_Out32(((0xFD1A0000U) + 0x00000100U), 0x00000000); | |
| 773 | ||
| 774 | tmp_regval = Xil_In32(0xFD690040); | |
| 775 | tmp_regval &= ~0x00000001; | |
| 776 | Xil_Out32(0xFD690040, tmp_regval); | |
| 777 | ||
| 778 | tmp_regval = Xil_In32(0xFD690030); | |
| 779 | tmp_regval &= ~0x00000001; | |
| 780 | Xil_Out32(0xFD690030, tmp_regval); | |
| 781 | } | |
| 782 | ||
| 783 | int psu_init(void) | |
| 784 | { | |
| 785 | int status = 1; | |
| 786 | ||
| 787 | status &= psu_mio_init_data(); | |
| 788 | status &= psu_pll_init_data(); | |
| 789 | status &= psu_clock_init_data(); | |
| 790 | ||
| 791 | status &= psu_ddr_init_data(); | |
| 792 | status &= psu_ddr_phybringup_data(); | |
| 793 | status &= psu_peripherals_init_data(); | |
| 794 | ||
| 795 | status &= init_serdes(); | |
| 796 | init_peripheral(); | |
| 797 | ||
| 798 | if (status == 0) | |
| 799 | return 1; | |
| 800 | return 0; | |
| 801 | } |