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Commit | Line | Data |
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8bde7f77 WD |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
8bde7f77 WD |
6 | */ |
7 | ||
8 | /* | |
9 | * Boot support | |
10 | */ | |
11 | #include <common.h> | |
12 | #include <command.h> | |
d88af4da | 13 | #include <linux/compiler.h> |
8bde7f77 | 14 | |
d87080b7 | 15 | DECLARE_GLOBAL_DATA_PTR; |
8bde7f77 | 16 | |
d88af4da MF |
17 | __maybe_unused |
18 | static void print_num(const char *name, ulong value) | |
19 | { | |
20 | printf("%-12s= 0x%08lX\n", name, value); | |
21 | } | |
8bde7f77 | 22 | |
5f3dfadc | 23 | __maybe_unused |
d88af4da MF |
24 | static void print_eth(int idx) |
25 | { | |
26 | char name[10], *val; | |
27 | if (idx) | |
28 | sprintf(name, "eth%iaddr", idx); | |
29 | else | |
30 | strcpy(name, "ethaddr"); | |
00caae6d | 31 | val = env_get(name); |
d88af4da MF |
32 | if (!val) |
33 | val = "(not set)"; | |
34 | printf("%-12s= %s\n", name, val); | |
35 | } | |
de2dff6f | 36 | |
05c3e68f | 37 | #ifndef CONFIG_DM_ETH |
9fc6a06a MS |
38 | __maybe_unused |
39 | static void print_eths(void) | |
40 | { | |
41 | struct eth_device *dev; | |
42 | int i = 0; | |
43 | ||
44 | do { | |
45 | dev = eth_get_dev_by_index(i); | |
46 | if (dev) { | |
47 | printf("eth%dname = %s\n", i, dev->name); | |
48 | print_eth(i); | |
49 | i++; | |
50 | } | |
51 | } while (dev); | |
52 | ||
53 | printf("current eth = %s\n", eth_get_name()); | |
00caae6d | 54 | printf("ip_addr = %s\n", env_get("ipaddr")); |
9fc6a06a | 55 | } |
05c3e68f | 56 | #endif |
9fc6a06a | 57 | |
d88af4da | 58 | __maybe_unused |
47708457 | 59 | static void print_lnum(const char *name, unsigned long long value) |
d88af4da MF |
60 | { |
61 | printf("%-12s= 0x%.8llX\n", name, value); | |
62 | } | |
63 | ||
64 | __maybe_unused | |
65 | static void print_mhz(const char *name, unsigned long hz) | |
66 | { | |
67 | char buf[32]; | |
68 | ||
69 | printf("%-12s= %6s MHz\n", name, strmhz(buf, hz)); | |
70 | } | |
8bde7f77 | 71 | |
171e5396 MF |
72 | |
73 | static inline void print_bi_boot_params(const bd_t *bd) | |
74 | { | |
75 | print_num("boot_params", (ulong)bd->bi_boot_params); | |
76 | } | |
77 | ||
12feb364 MF |
78 | static inline void print_bi_mem(const bd_t *bd) |
79 | { | |
80 | #if defined(CONFIG_SH) | |
81 | print_num("mem start ", (ulong)bd->bi_memstart); | |
82 | print_lnum("mem size ", (u64)bd->bi_memsize); | |
83 | #elif defined(CONFIG_ARC) | |
84 | print_num("mem start", (ulong)bd->bi_memstart); | |
85 | print_lnum("mem size", (u64)bd->bi_memsize); | |
12feb364 MF |
86 | #else |
87 | print_num("memstart", (ulong)bd->bi_memstart); | |
88 | print_lnum("memsize", (u64)bd->bi_memsize); | |
89 | #endif | |
90 | } | |
91 | ||
fd60e99f MF |
92 | static inline void print_bi_dram(const bd_t *bd) |
93 | { | |
94 | #ifdef CONFIG_NR_DRAM_BANKS | |
95 | int i; | |
96 | ||
97 | for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { | |
ddd917b8 SG |
98 | if (bd->bi_dram[i].size) { |
99 | print_num("DRAM bank", i); | |
100 | print_num("-> start", bd->bi_dram[i].start); | |
101 | print_num("-> size", bd->bi_dram[i].size); | |
102 | } | |
fd60e99f MF |
103 | } |
104 | #endif | |
105 | } | |
106 | ||
f80e5359 MF |
107 | static inline void print_bi_flash(const bd_t *bd) |
108 | { | |
109 | #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_SH) | |
110 | print_num("flash start ", (ulong)bd->bi_flashstart); | |
111 | print_num("flash size ", (ulong)bd->bi_flashsize); | |
112 | print_num("flash offset ", (ulong)bd->bi_flashoffset); | |
113 | ||
70cc0c34 | 114 | #elif defined(CONFIG_NIOS2) |
f80e5359 MF |
115 | print_num("flash start", (ulong)bd->bi_flashstart); |
116 | print_num("flash size", (ulong)bd->bi_flashsize); | |
117 | print_num("flash offset", (ulong)bd->bi_flashoffset); | |
118 | #else | |
119 | print_num("flashstart", (ulong)bd->bi_flashstart); | |
120 | print_num("flashsize", (ulong)bd->bi_flashsize); | |
121 | print_num("flashoffset", (ulong)bd->bi_flashoffset); | |
122 | #endif | |
123 | } | |
124 | ||
8752e260 MF |
125 | static inline void print_eth_ip_addr(void) |
126 | { | |
127 | #if defined(CONFIG_CMD_NET) | |
128 | print_eth(0); | |
129 | #if defined(CONFIG_HAS_ETH1) | |
130 | print_eth(1); | |
131 | #endif | |
132 | #if defined(CONFIG_HAS_ETH2) | |
133 | print_eth(2); | |
134 | #endif | |
135 | #if defined(CONFIG_HAS_ETH3) | |
136 | print_eth(3); | |
137 | #endif | |
138 | #if defined(CONFIG_HAS_ETH4) | |
139 | print_eth(4); | |
140 | #endif | |
141 | #if defined(CONFIG_HAS_ETH5) | |
142 | print_eth(5); | |
143 | #endif | |
00caae6d | 144 | printf("IP addr = %s\n", env_get("ipaddr")); |
8752e260 MF |
145 | #endif |
146 | } | |
147 | ||
4e3fa7d8 MF |
148 | static inline void print_baudrate(void) |
149 | { | |
150 | #if defined(CONFIG_PPC) | |
151 | printf("baudrate = %6u bps\n", gd->baudrate); | |
4e3fa7d8 MF |
152 | #else |
153 | printf("baudrate = %u bps\n", gd->baudrate); | |
154 | #endif | |
155 | } | |
156 | ||
b37483c4 | 157 | static inline void __maybe_unused print_std_bdinfo(const bd_t *bd) |
e3795084 MF |
158 | { |
159 | print_bi_boot_params(bd); | |
160 | print_bi_mem(bd); | |
161 | print_bi_flash(bd); | |
162 | print_eth_ip_addr(); | |
163 | print_baudrate(); | |
164 | } | |
165 | ||
c99ea790 | 166 | #if defined(CONFIG_PPC) |
e7939464 YS |
167 | void __weak board_detail(void) |
168 | { | |
7b07a20c | 169 | /* Please define board_detail() for your platform */ |
e7939464 | 170 | } |
8bde7f77 | 171 | |
5902e8f7 | 172 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8bde7f77 | 173 | { |
8bde7f77 | 174 | bd_t *bd = gd->bd; |
8bde7f77 WD |
175 | |
176 | #ifdef DEBUG | |
5902e8f7 ML |
177 | print_num("bd address", (ulong)bd); |
178 | #endif | |
12feb364 | 179 | print_bi_mem(bd); |
f80e5359 | 180 | print_bi_flash(bd); |
5902e8f7 ML |
181 | print_num("sramstart", bd->bi_sramstart); |
182 | print_num("sramsize", bd->bi_sramsize); | |
907208c4 | 183 | #if defined(CONFIG_8xx) || defined(CONFIG_E500) |
5902e8f7 ML |
184 | print_num("immr_base", bd->bi_immr_base); |
185 | #endif | |
186 | print_num("bootflags", bd->bi_bootflags); | |
9c4c5ae3 | 187 | #if defined(CONFIG_CPM2) |
0c277ef9 TT |
188 | print_mhz("vco", bd->bi_vco); |
189 | print_mhz("sccfreq", bd->bi_sccfreq); | |
190 | print_mhz("brgfreq", bd->bi_brgfreq); | |
8bde7f77 | 191 | #endif |
0c277ef9 | 192 | print_mhz("intfreq", bd->bi_intfreq); |
9c4c5ae3 | 193 | #if defined(CONFIG_CPM2) |
0c277ef9 | 194 | print_mhz("cpmfreq", bd->bi_cpmfreq); |
8bde7f77 | 195 | #endif |
0c277ef9 | 196 | print_mhz("busfreq", bd->bi_busfreq); |
03f5c550 | 197 | |
34e210f5 TT |
198 | #ifdef CONFIG_ENABLE_36BIT_PHYS |
199 | #ifdef CONFIG_PHYS_64BIT | |
200 | puts("addressing = 36-bit\n"); | |
201 | #else | |
202 | puts("addressing = 32-bit\n"); | |
203 | #endif | |
204 | #endif | |
205 | ||
8752e260 | 206 | print_eth_ip_addr(); |
4e3fa7d8 | 207 | print_baudrate(); |
5902e8f7 | 208 | print_num("relocaddr", gd->relocaddr); |
e7939464 | 209 | board_detail(); |
8bde7f77 WD |
210 | return 0; |
211 | } | |
212 | ||
c99ea790 | 213 | #elif defined(CONFIG_NIOS2) |
5c952cf0 | 214 | |
5902e8f7 | 215 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
5c952cf0 | 216 | { |
5c952cf0 WD |
217 | bd_t *bd = gd->bd; |
218 | ||
fd60e99f | 219 | print_bi_dram(bd); |
f80e5359 | 220 | print_bi_flash(bd); |
5c952cf0 | 221 | |
6d0f6bcf | 222 | #if defined(CONFIG_SYS_SRAM_BASE) |
5c952cf0 WD |
223 | print_num ("sram start", (ulong)bd->bi_sramstart); |
224 | print_num ("sram size", (ulong)bd->bi_sramsize); | |
225 | #endif | |
226 | ||
8752e260 | 227 | print_eth_ip_addr(); |
4e3fa7d8 | 228 | print_baudrate(); |
5c952cf0 WD |
229 | |
230 | return 0; | |
231 | } | |
c99ea790 RM |
232 | |
233 | #elif defined(CONFIG_MICROBLAZE) | |
cfc67116 | 234 | |
5902e8f7 | 235 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
cfc67116 | 236 | { |
cfc67116 | 237 | bd_t *bd = gd->bd; |
e945f6dc | 238 | |
fd60e99f | 239 | print_bi_dram(bd); |
f80e5359 | 240 | print_bi_flash(bd); |
6d0f6bcf | 241 | #if defined(CONFIG_SYS_SRAM_BASE) |
5902e8f7 ML |
242 | print_num("sram start ", (ulong)bd->bi_sramstart); |
243 | print_num("sram size ", (ulong)bd->bi_sramsize); | |
cfc67116 | 244 | #endif |
062f078c | 245 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
9fc6a06a | 246 | print_eths(); |
cfc67116 | 247 | #endif |
4e3fa7d8 | 248 | print_baudrate(); |
e945f6dc MS |
249 | print_num("relocaddr", gd->relocaddr); |
250 | print_num("reloc off", gd->reloc_off); | |
de86765b MS |
251 | print_num("fdt_blob", (ulong)gd->fdt_blob); |
252 | print_num("new_fdt", (ulong)gd->new_fdt); | |
253 | print_num("fdt_size", (ulong)gd->fdt_size); | |
e945f6dc | 254 | |
cfc67116 MS |
255 | return 0; |
256 | } | |
4a551709 | 257 | |
c99ea790 RM |
258 | #elif defined(CONFIG_M68K) |
259 | ||
5902e8f7 | 260 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8e585f02 | 261 | { |
8e585f02 | 262 | bd_t *bd = gd->bd; |
8ae158cd | 263 | |
12feb364 | 264 | print_bi_mem(bd); |
f80e5359 | 265 | print_bi_flash(bd); |
6d0f6bcf | 266 | #if defined(CONFIG_SYS_INIT_RAM_ADDR) |
5902e8f7 ML |
267 | print_num("sramstart", (ulong)bd->bi_sramstart); |
268 | print_num("sramsize", (ulong)bd->bi_sramsize); | |
8e585f02 | 269 | #endif |
6d0f6bcf | 270 | #if defined(CONFIG_SYS_MBAR) |
5902e8f7 | 271 | print_num("mbar", bd->bi_mbar_base); |
8e585f02 | 272 | #endif |
0c277ef9 TT |
273 | print_mhz("cpufreq", bd->bi_intfreq); |
274 | print_mhz("busfreq", bd->bi_busfreq); | |
8ae158cd | 275 | #ifdef CONFIG_PCI |
0c277ef9 | 276 | print_mhz("pcifreq", bd->bi_pcifreq); |
8ae158cd TL |
277 | #endif |
278 | #ifdef CONFIG_EXTRA_CLOCK | |
0c277ef9 TT |
279 | print_mhz("flbfreq", bd->bi_flbfreq); |
280 | print_mhz("inpfreq", bd->bi_inpfreq); | |
281 | print_mhz("vcofreq", bd->bi_vcofreq); | |
8ae158cd | 282 | #endif |
8752e260 | 283 | print_eth_ip_addr(); |
4e3fa7d8 | 284 | print_baudrate(); |
8e585f02 TL |
285 | |
286 | return 0; | |
287 | } | |
288 | ||
c99ea790 | 289 | #elif defined(CONFIG_MIPS) |
8bde7f77 | 290 | |
5902e8f7 | 291 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
8bde7f77 | 292 | { |
e3795084 | 293 | print_std_bdinfo(gd->bd); |
8cf7a418 TC |
294 | print_num("relocaddr", gd->relocaddr); |
295 | print_num("reloc off", gd->reloc_off); | |
8bde7f77 WD |
296 | |
297 | return 0; | |
298 | } | |
8bde7f77 | 299 | |
c99ea790 | 300 | #elif defined(CONFIG_ARM) |
8bde7f77 | 301 | |
0e350f81 JH |
302 | static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, |
303 | char * const argv[]) | |
8bde7f77 | 304 | { |
8bde7f77 WD |
305 | bd_t *bd = gd->bd; |
306 | ||
5902e8f7 | 307 | print_num("arch_number", bd->bi_arch_number); |
171e5396 | 308 | print_bi_boot_params(bd); |
fd60e99f | 309 | print_bi_dram(bd); |
8bde7f77 | 310 | |
e8149522 | 311 | #ifdef CONFIG_SYS_MEM_RESERVE_SECURE |
e61a7534 | 312 | if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) { |
e8149522 | 313 | print_num("Secure ram", |
e61a7534 | 314 | gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK); |
e8149522 YS |
315 | } |
316 | #endif | |
f2ccf7f7 YS |
317 | #ifdef CONFIG_RESV_RAM |
318 | if (gd->arch.resv_ram) | |
319 | print_num("Reserved ram", gd->arch.resv_ram); | |
320 | #endif | |
ff973800 | 321 | #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) |
9fc6a06a | 322 | print_eths(); |
a41dbbd9 | 323 | #endif |
4e3fa7d8 | 324 | print_baudrate(); |
e47f2db5 | 325 | #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) |
34fd5d25 | 326 | print_num("TLB addr", gd->arch.tlb_addr); |
f1d2b313 | 327 | #endif |
5902e8f7 ML |
328 | print_num("relocaddr", gd->relocaddr); |
329 | print_num("reloc off", gd->reloc_off); | |
330 | print_num("irq_sp", gd->irq_sp); /* irq stack pointer */ | |
331 | print_num("sp start ", gd->start_addr_sp); | |
c8fcd0f2 | 332 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
5902e8f7 | 333 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 334 | #endif |
8f5d4687 HM |
335 | /* |
336 | * TODO: Currently only support for davinci SOC's is added. | |
337 | * Remove this check once all the board implement this. | |
338 | */ | |
339 | #ifdef CONFIG_CLOCKS | |
340 | printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq); | |
341 | printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq); | |
342 | printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq); | |
7bb7d672 HS |
343 | #endif |
344 | #ifdef CONFIG_BOARD_TYPES | |
345 | printf("Board Type = %ld\n", gd->board_type); | |
8f5d4687 | 346 | #endif |
f1896c45 | 347 | #if CONFIG_VAL(SYS_MALLOC_F_LEN) |
7f7ddf2a | 348 | printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr, |
f1896c45 | 349 | CONFIG_VAL(SYS_MALLOC_F_LEN)); |
7f7ddf2a | 350 | #endif |
53539533 HS |
351 | if (gd->fdt_blob) |
352 | printf("fdt_blob = %p\n", gd->fdt_blob); | |
7f7ddf2a | 353 | |
8bde7f77 WD |
354 | return 0; |
355 | } | |
356 | ||
ebd0d062 NI |
357 | #elif defined(CONFIG_SH) |
358 | ||
5902e8f7 | 359 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
ebd0d062 NI |
360 | { |
361 | bd_t *bd = gd->bd; | |
12feb364 MF |
362 | |
363 | print_bi_mem(bd); | |
f80e5359 | 364 | print_bi_flash(bd); |
8752e260 | 365 | print_eth_ip_addr(); |
4e3fa7d8 | 366 | print_baudrate(); |
ebd0d062 NI |
367 | return 0; |
368 | } | |
369 | ||
a806ee6f GR |
370 | #elif defined(CONFIG_X86) |
371 | ||
5902e8f7 | 372 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
a806ee6f | 373 | { |
a806ee6f | 374 | bd_t *bd = gd->bd; |
a806ee6f | 375 | |
171e5396 | 376 | print_bi_boot_params(bd); |
5902e8f7 | 377 | |
fd60e99f | 378 | print_bi_dram(bd); |
a806ee6f GR |
379 | |
380 | #if defined(CONFIG_CMD_NET) | |
8752e260 | 381 | print_eth_ip_addr(); |
0c277ef9 | 382 | print_mhz("ethspeed", bd->bi_ethspeed); |
a806ee6f | 383 | #endif |
4e3fa7d8 | 384 | print_baudrate(); |
a806ee6f GR |
385 | |
386 | return 0; | |
387 | } | |
388 | ||
6fcc3be4 SG |
389 | #elif defined(CONFIG_SANDBOX) |
390 | ||
391 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
392 | { | |
6fcc3be4 SG |
393 | bd_t *bd = gd->bd; |
394 | ||
171e5396 | 395 | print_bi_boot_params(bd); |
fd60e99f | 396 | print_bi_dram(bd); |
8752e260 | 397 | print_eth_ip_addr(); |
6fcc3be4 | 398 | |
c8fcd0f2 | 399 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
6fcc3be4 | 400 | print_num("FB base ", gd->fb_base); |
c8fcd0f2 | 401 | #endif |
6fcc3be4 SG |
402 | return 0; |
403 | } | |
404 | ||
64d61461 ML |
405 | #elif defined(CONFIG_NDS32) |
406 | ||
407 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
408 | { | |
64d61461 ML |
409 | bd_t *bd = gd->bd; |
410 | ||
411 | print_num("arch_number", bd->bi_arch_number); | |
171e5396 | 412 | print_bi_boot_params(bd); |
fd60e99f | 413 | print_bi_dram(bd); |
8752e260 | 414 | print_eth_ip_addr(); |
4e3fa7d8 | 415 | print_baudrate(); |
64d61461 ML |
416 | |
417 | return 0; | |
418 | } | |
419 | ||
946f6f24 | 420 | #elif defined(CONFIG_ARC) |
bc5d5428 AB |
421 | |
422 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
423 | { | |
424 | bd_t *bd = gd->bd; | |
425 | ||
12feb364 | 426 | print_bi_mem(bd); |
8752e260 | 427 | print_eth_ip_addr(); |
4e3fa7d8 | 428 | print_baudrate(); |
bc5d5428 AB |
429 | |
430 | return 0; | |
431 | } | |
432 | ||
de5e5cea CZ |
433 | #elif defined(CONFIG_XTENSA) |
434 | ||
435 | int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
436 | { | |
437 | print_std_bdinfo(gd->bd); | |
438 | return 0; | |
439 | } | |
440 | ||
c99ea790 RM |
441 | #else |
442 | #error "a case for this architecture does not exist!" | |
443 | #endif | |
8bde7f77 | 444 | |
8bde7f77 WD |
445 | /* -------------------------------------------------------------------- */ |
446 | ||
0d498393 WD |
447 | U_BOOT_CMD( |
448 | bdinfo, 1, 1, do_bdinfo, | |
2fb2604d | 449 | "print Board Info structure", |
a89c33db | 450 | "" |
8bde7f77 | 451 | ); |