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83d290c5 1// SPDX-License-Identifier: GPL-2.0+
8bde7f77
WD
2/*
3 * (C) Copyright 2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8bde7f77
WD
5 */
6
7/*
8 * Boot support
9 */
10#include <common.h>
11#include <command.h>
d88af4da 12#include <linux/compiler.h>
8bde7f77 13
d87080b7 14DECLARE_GLOBAL_DATA_PTR;
8bde7f77 15
d88af4da
MF
16__maybe_unused
17static void print_num(const char *name, ulong value)
18{
95187bb7 19 printf("%-12s= 0x%0*lx\n", name, 2 * (int)sizeof(value), value);
d88af4da 20}
8bde7f77 21
5f3dfadc 22__maybe_unused
d88af4da
MF
23static void print_eth(int idx)
24{
25 char name[10], *val;
26 if (idx)
27 sprintf(name, "eth%iaddr", idx);
28 else
29 strcpy(name, "ethaddr");
00caae6d 30 val = env_get(name);
d88af4da
MF
31 if (!val)
32 val = "(not set)";
33 printf("%-12s= %s\n", name, val);
34}
de2dff6f 35
05c3e68f 36#ifndef CONFIG_DM_ETH
9fc6a06a
MS
37__maybe_unused
38static void print_eths(void)
39{
40 struct eth_device *dev;
41 int i = 0;
42
43 do {
44 dev = eth_get_dev_by_index(i);
45 if (dev) {
46 printf("eth%dname = %s\n", i, dev->name);
47 print_eth(i);
48 i++;
49 }
50 } while (dev);
51
52 printf("current eth = %s\n", eth_get_name());
00caae6d 53 printf("ip_addr = %s\n", env_get("ipaddr"));
9fc6a06a 54}
05c3e68f 55#endif
9fc6a06a 56
d88af4da 57__maybe_unused
47708457 58static void print_lnum(const char *name, unsigned long long value)
d88af4da
MF
59{
60 printf("%-12s= 0x%.8llX\n", name, value);
61}
62
63__maybe_unused
64static void print_mhz(const char *name, unsigned long hz)
65{
66 char buf[32];
67
68 printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
69}
8bde7f77 70
171e5396
MF
71
72static inline void print_bi_boot_params(const bd_t *bd)
73{
74 print_num("boot_params", (ulong)bd->bi_boot_params);
75}
76
12feb364
MF
77static inline void print_bi_mem(const bd_t *bd)
78{
79#if defined(CONFIG_SH)
80 print_num("mem start ", (ulong)bd->bi_memstart);
81 print_lnum("mem size ", (u64)bd->bi_memsize);
82#elif defined(CONFIG_ARC)
83 print_num("mem start", (ulong)bd->bi_memstart);
84 print_lnum("mem size", (u64)bd->bi_memsize);
12feb364
MF
85#else
86 print_num("memstart", (ulong)bd->bi_memstart);
87 print_lnum("memsize", (u64)bd->bi_memsize);
88#endif
89}
90
fd60e99f
MF
91static inline void print_bi_dram(const bd_t *bd)
92{
93#ifdef CONFIG_NR_DRAM_BANKS
94 int i;
95
96 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
ddd917b8
SG
97 if (bd->bi_dram[i].size) {
98 print_num("DRAM bank", i);
99 print_num("-> start", bd->bi_dram[i].start);
100 print_num("-> size", bd->bi_dram[i].size);
101 }
fd60e99f
MF
102 }
103#endif
104}
105
f80e5359
MF
106static inline void print_bi_flash(const bd_t *bd)
107{
108#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_SH)
109 print_num("flash start ", (ulong)bd->bi_flashstart);
110 print_num("flash size ", (ulong)bd->bi_flashsize);
111 print_num("flash offset ", (ulong)bd->bi_flashoffset);
112
70cc0c34 113#elif defined(CONFIG_NIOS2)
f80e5359
MF
114 print_num("flash start", (ulong)bd->bi_flashstart);
115 print_num("flash size", (ulong)bd->bi_flashsize);
116 print_num("flash offset", (ulong)bd->bi_flashoffset);
117#else
118 print_num("flashstart", (ulong)bd->bi_flashstart);
119 print_num("flashsize", (ulong)bd->bi_flashsize);
120 print_num("flashoffset", (ulong)bd->bi_flashoffset);
121#endif
122}
123
8752e260
MF
124static inline void print_eth_ip_addr(void)
125{
126#if defined(CONFIG_CMD_NET)
127 print_eth(0);
128#if defined(CONFIG_HAS_ETH1)
129 print_eth(1);
130#endif
131#if defined(CONFIG_HAS_ETH2)
132 print_eth(2);
133#endif
134#if defined(CONFIG_HAS_ETH3)
135 print_eth(3);
136#endif
137#if defined(CONFIG_HAS_ETH4)
138 print_eth(4);
139#endif
140#if defined(CONFIG_HAS_ETH5)
141 print_eth(5);
142#endif
00caae6d 143 printf("IP addr = %s\n", env_get("ipaddr"));
8752e260
MF
144#endif
145}
146
4e3fa7d8
MF
147static inline void print_baudrate(void)
148{
149#if defined(CONFIG_PPC)
150 printf("baudrate = %6u bps\n", gd->baudrate);
4e3fa7d8
MF
151#else
152 printf("baudrate = %u bps\n", gd->baudrate);
153#endif
154}
155
b37483c4 156static inline void __maybe_unused print_std_bdinfo(const bd_t *bd)
e3795084
MF
157{
158 print_bi_boot_params(bd);
159 print_bi_mem(bd);
160 print_bi_flash(bd);
161 print_eth_ip_addr();
162 print_baudrate();
163}
164
c99ea790 165#if defined(CONFIG_PPC)
e7939464
YS
166void __weak board_detail(void)
167{
7b07a20c 168 /* Please define board_detail() for your platform */
e7939464 169}
8bde7f77 170
5902e8f7 171int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 172{
8bde7f77 173 bd_t *bd = gd->bd;
8bde7f77
WD
174
175#ifdef DEBUG
5902e8f7
ML
176 print_num("bd address", (ulong)bd);
177#endif
12feb364 178 print_bi_mem(bd);
f80e5359 179 print_bi_flash(bd);
5902e8f7
ML
180 print_num("sramstart", bd->bi_sramstart);
181 print_num("sramsize", bd->bi_sramsize);
ee1e600c 182#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500)
5902e8f7
ML
183 print_num("immr_base", bd->bi_immr_base);
184#endif
185 print_num("bootflags", bd->bi_bootflags);
9c4c5ae3 186#if defined(CONFIG_CPM2)
0c277ef9
TT
187 print_mhz("vco", bd->bi_vco);
188 print_mhz("sccfreq", bd->bi_sccfreq);
189 print_mhz("brgfreq", bd->bi_brgfreq);
8bde7f77 190#endif
0c277ef9 191 print_mhz("intfreq", bd->bi_intfreq);
9c4c5ae3 192#if defined(CONFIG_CPM2)
0c277ef9 193 print_mhz("cpmfreq", bd->bi_cpmfreq);
8bde7f77 194#endif
0c277ef9 195 print_mhz("busfreq", bd->bi_busfreq);
03f5c550 196
34e210f5
TT
197#ifdef CONFIG_ENABLE_36BIT_PHYS
198#ifdef CONFIG_PHYS_64BIT
199 puts("addressing = 36-bit\n");
200#else
201 puts("addressing = 32-bit\n");
202#endif
203#endif
204
8752e260 205 print_eth_ip_addr();
4e3fa7d8 206 print_baudrate();
5902e8f7 207 print_num("relocaddr", gd->relocaddr);
e7939464 208 board_detail();
8bde7f77
WD
209 return 0;
210}
211
c99ea790 212#elif defined(CONFIG_NIOS2)
5c952cf0 213
5902e8f7 214int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
5c952cf0 215{
5c952cf0
WD
216 bd_t *bd = gd->bd;
217
fd60e99f 218 print_bi_dram(bd);
f80e5359 219 print_bi_flash(bd);
5c952cf0 220
6d0f6bcf 221#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
222 print_num ("sram start", (ulong)bd->bi_sramstart);
223 print_num ("sram size", (ulong)bd->bi_sramsize);
224#endif
225
8752e260 226 print_eth_ip_addr();
4e3fa7d8 227 print_baudrate();
5c952cf0
WD
228
229 return 0;
230}
c99ea790
RM
231
232#elif defined(CONFIG_MICROBLAZE)
cfc67116 233
5902e8f7 234int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
cfc67116 235{
cfc67116 236 bd_t *bd = gd->bd;
e945f6dc 237
fd60e99f 238 print_bi_dram(bd);
f80e5359 239 print_bi_flash(bd);
6d0f6bcf 240#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7
ML
241 print_num("sram start ", (ulong)bd->bi_sramstart);
242 print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116 243#endif
062f078c 244#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
9fc6a06a 245 print_eths();
cfc67116 246#endif
4e3fa7d8 247 print_baudrate();
e945f6dc
MS
248 print_num("relocaddr", gd->relocaddr);
249 print_num("reloc off", gd->reloc_off);
de86765b
MS
250 print_num("fdt_blob", (ulong)gd->fdt_blob);
251 print_num("new_fdt", (ulong)gd->new_fdt);
252 print_num("fdt_size", (ulong)gd->fdt_size);
e945f6dc 253
cfc67116
MS
254 return 0;
255}
4a551709 256
c99ea790
RM
257#elif defined(CONFIG_M68K)
258
5902e8f7 259int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8e585f02 260{
8e585f02 261 bd_t *bd = gd->bd;
8ae158cd 262
12feb364 263 print_bi_mem(bd);
f80e5359 264 print_bi_flash(bd);
6d0f6bcf 265#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7
ML
266 print_num("sramstart", (ulong)bd->bi_sramstart);
267 print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02 268#endif
6d0f6bcf 269#if defined(CONFIG_SYS_MBAR)
5902e8f7 270 print_num("mbar", bd->bi_mbar_base);
8e585f02 271#endif
0c277ef9
TT
272 print_mhz("cpufreq", bd->bi_intfreq);
273 print_mhz("busfreq", bd->bi_busfreq);
8ae158cd 274#ifdef CONFIG_PCI
0c277ef9 275 print_mhz("pcifreq", bd->bi_pcifreq);
8ae158cd
TL
276#endif
277#ifdef CONFIG_EXTRA_CLOCK
0c277ef9
TT
278 print_mhz("flbfreq", bd->bi_flbfreq);
279 print_mhz("inpfreq", bd->bi_inpfreq);
280 print_mhz("vcofreq", bd->bi_vcofreq);
8ae158cd 281#endif
8752e260 282 print_eth_ip_addr();
4e3fa7d8 283 print_baudrate();
8e585f02
TL
284
285 return 0;
286}
287
c99ea790 288#elif defined(CONFIG_MIPS)
8bde7f77 289
5902e8f7 290int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 291{
e3795084 292 print_std_bdinfo(gd->bd);
8cf7a418
TC
293 print_num("relocaddr", gd->relocaddr);
294 print_num("reloc off", gd->reloc_off);
8bde7f77
WD
295
296 return 0;
297}
8bde7f77 298
c99ea790 299#elif defined(CONFIG_ARM)
8bde7f77 300
0e350f81
JH
301static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
302 char * const argv[])
8bde7f77 303{
8bde7f77
WD
304 bd_t *bd = gd->bd;
305
5902e8f7 306 print_num("arch_number", bd->bi_arch_number);
171e5396 307 print_bi_boot_params(bd);
fd60e99f 308 print_bi_dram(bd);
8bde7f77 309
e8149522 310#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
e61a7534 311 if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) {
e8149522 312 print_num("Secure ram",
e61a7534 313 gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK);
e8149522
YS
314 }
315#endif
f2ccf7f7
YS
316#ifdef CONFIG_RESV_RAM
317 if (gd->arch.resv_ram)
318 print_num("Reserved ram", gd->arch.resv_ram);
319#endif
ff973800 320#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
9fc6a06a 321 print_eths();
a41dbbd9 322#endif
4e3fa7d8 323 print_baudrate();
10015025 324#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
34fd5d25 325 print_num("TLB addr", gd->arch.tlb_addr);
f1d2b313 326#endif
5902e8f7
ML
327 print_num("relocaddr", gd->relocaddr);
328 print_num("reloc off", gd->reloc_off);
329 print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
330 print_num("sp start ", gd->start_addr_sp);
5a760f61 331#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO)
5902e8f7 332 print_num("FB base ", gd->fb_base);
c8fcd0f2 333#endif
8f5d4687
HM
334 /*
335 * TODO: Currently only support for davinci SOC's is added.
336 * Remove this check once all the board implement this.
337 */
338#ifdef CONFIG_CLOCKS
339 printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
340 printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
341 printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
7bb7d672
HS
342#endif
343#ifdef CONFIG_BOARD_TYPES
344 printf("Board Type = %ld\n", gd->board_type);
8f5d4687 345#endif
f1896c45 346#if CONFIG_VAL(SYS_MALLOC_F_LEN)
7f7ddf2a 347 printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr,
f1896c45 348 CONFIG_VAL(SYS_MALLOC_F_LEN));
7f7ddf2a 349#endif
53539533 350 if (gd->fdt_blob)
95187bb7 351 print_num("fdt_blob", (ulong)gd->fdt_blob);
7f7ddf2a 352
8bde7f77
WD
353 return 0;
354}
355
ebd0d062
NI
356#elif defined(CONFIG_SH)
357
5902e8f7 358int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ebd0d062
NI
359{
360 bd_t *bd = gd->bd;
12feb364
MF
361
362 print_bi_mem(bd);
f80e5359 363 print_bi_flash(bd);
8752e260 364 print_eth_ip_addr();
4e3fa7d8 365 print_baudrate();
ebd0d062
NI
366 return 0;
367}
368
a806ee6f
GR
369#elif defined(CONFIG_X86)
370
5902e8f7 371int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
a806ee6f 372{
a806ee6f 373 bd_t *bd = gd->bd;
a806ee6f 374
171e5396 375 print_bi_boot_params(bd);
5902e8f7 376
fd60e99f 377 print_bi_dram(bd);
a806ee6f 378
ca92ad4f
HS
379 print_num("relocaddr", gd->relocaddr);
380 print_num("reloc off", gd->reloc_off);
a806ee6f 381#if defined(CONFIG_CMD_NET)
8752e260 382 print_eth_ip_addr();
0c277ef9 383 print_mhz("ethspeed", bd->bi_ethspeed);
a806ee6f 384#endif
4e3fa7d8 385 print_baudrate();
a806ee6f
GR
386
387 return 0;
388}
389
6fcc3be4
SG
390#elif defined(CONFIG_SANDBOX)
391
392int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
393{
6fcc3be4
SG
394 bd_t *bd = gd->bd;
395
171e5396 396 print_bi_boot_params(bd);
fd60e99f 397 print_bi_dram(bd);
8752e260 398 print_eth_ip_addr();
6fcc3be4 399
c8fcd0f2 400#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
6fcc3be4 401 print_num("FB base ", gd->fb_base);
c8fcd0f2 402#endif
6fcc3be4
SG
403 return 0;
404}
405
64d61461
ML
406#elif defined(CONFIG_NDS32)
407
408int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
409{
64d61461
ML
410 bd_t *bd = gd->bd;
411
412 print_num("arch_number", bd->bi_arch_number);
171e5396 413 print_bi_boot_params(bd);
fd60e99f 414 print_bi_dram(bd);
8752e260 415 print_eth_ip_addr();
4e3fa7d8 416 print_baudrate();
64d61461
ML
417
418 return 0;
419}
420
068feb9b
RC
421#elif defined(CONFIG_RISCV)
422
423int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
424{
425 bd_t *bd = gd->bd;
426
068feb9b
RC
427 print_bi_boot_params(bd);
428 print_bi_dram(bd);
058b77a9
BM
429 print_num("relocaddr", gd->relocaddr);
430 print_num("reloc off", gd->reloc_off);
068feb9b
RC
431 print_eth_ip_addr();
432 print_baudrate();
433
434 return 0;
435}
436
946f6f24 437#elif defined(CONFIG_ARC)
bc5d5428
AB
438
439int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
440{
441 bd_t *bd = gd->bd;
442
12feb364 443 print_bi_mem(bd);
8752e260 444 print_eth_ip_addr();
4e3fa7d8 445 print_baudrate();
bc5d5428
AB
446
447 return 0;
448}
449
de5e5cea
CZ
450#elif defined(CONFIG_XTENSA)
451
452int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
453{
454 print_std_bdinfo(gd->bd);
455 return 0;
456}
457
c99ea790
RM
458#else
459 #error "a case for this architecture does not exist!"
460#endif
8bde7f77 461
8bde7f77
WD
462/* -------------------------------------------------------------------- */
463
0d498393
WD
464U_BOOT_CMD(
465 bdinfo, 1, 1, do_bdinfo,
2fb2604d 466 "print Board Info structure",
a89c33db 467 ""
8bde7f77 468);