[thirdparty/u-boot.git] / cmd / fpga.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2000, 2001
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 */

/*
 *  FPGA support
 */
#include <common.h>
#include <command.h>
#include <fpga.h>
#include <fs.h>
#include <malloc.h>

/* Local defines */
enum {
	FPGA_NONE = -1,
	FPGA_INFO,
	FPGA_LOAD,
	FPGA_LOADB,
	FPGA_DUMP,
	FPGA_LOADMK,
	FPGA_LOADP,
	FPGA_LOADBP,
	FPGA_LOADFS,
	FPGA_LOADS,
};

/*
 * Map op to supported operations.  We don't use a table since we
 * would just have to relocate it from flash anyway.
 */
static int fpga_get_op(char *opstr)
{
	int op = FPGA_NONE;

	if (!strcmp("info", opstr))
		op = FPGA_INFO;
	else if (!strcmp("loadb", opstr))
		op = FPGA_LOADB;
	else if (!strcmp("load", opstr))
		op = FPGA_LOAD;
#if defined(CONFIG_CMD_FPGA_LOADP)
	else if (!strcmp("loadp", opstr))
		op = FPGA_LOADP;
#endif
#if defined(CONFIG_CMD_FPGA_LOADBP)
	else if (!strcmp("loadbp", opstr))
		op = FPGA_LOADBP;
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	else if (!strcmp("loadfs", opstr))
		op = FPGA_LOADFS;
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	else if (!strcmp("loadmk", opstr))
		op = FPGA_LOADMK;
#endif
	else if (!strcmp("dump", opstr))
		op = FPGA_DUMP;
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	else if (!strcmp("loads", opstr))
		op = FPGA_LOADS;
#endif

	return op;
}

/* ------------------------------------------------------------------------- */
/* command form:
 *   fpga <op> <device number> <data addr> <datasize>
 * where op is 'load', 'dump', or 'info'
 * If there is no device number field, the fpga environment variable is used.
 * If there is no data addr field, the fpgadata environment variable is used.
 * The info command requires no data address field.
 */
int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
	int op, dev = FPGA_INVALID_DEVICE;
	size_t data_size = 0;
	void *fpga_data = NULL;
	char *devstr = env_get("fpga");
	char *datastr = env_get("fpgadata");
	int rc = FPGA_FAIL;
	int wrong_parms = 0;
#if defined(CONFIG_FIT)
	const char *fit_uname = NULL;
	ulong fit_addr;
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	fpga_fs_info fpga_fsinfo;
	fpga_fsinfo.fstype = FS_TYPE_ANY;
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	struct fpga_secure_info fpga_sec_info;

	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
#endif

	if (devstr)
		dev = (int) simple_strtoul(devstr, NULL, 16);
	if (datastr)
		fpga_data = (void *)simple_strtoul(datastr, NULL, 16);

	if (argc > 9 || argc < 2) {
		debug("%s: Too many or too few args (%d)\n", __func__, argc);
		return CMD_RET_USAGE;
	}

	op = fpga_get_op(argv[1]);

	switch (op) {
	case FPGA_NONE:
		printf("Unknown fpga operation \"%s\"\n", argv[1]);
		return CMD_RET_USAGE;
#if defined(CONFIG_CMD_FPGA_LOADFS)
	case FPGA_LOADFS:
		if (argc < 9)
			return CMD_RET_USAGE;
		fpga_fsinfo.blocksize = (unsigned int)
					simple_strtoul(argv[5], NULL, 16);
		fpga_fsinfo.interface = argv[6];
		fpga_fsinfo.dev_part = argv[7];
		fpga_fsinfo.filename = argv[8];
		argc = 5;
		break;
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	case FPGA_LOADS:
		if (argc < 7)
			return CMD_RET_USAGE;
		if (argc == 8)
			fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
						     simple_strtoull(argv[7],
								     NULL, 16);
		fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16);
		fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16);
		argc = 5;
		break;
#endif
	default:
		break;
	}

	switch (argc) {
	case 5:		/* fpga <op> <dev> <data> <datasize> */
		data_size = simple_strtoul(argv[4], NULL, 16);

	case 4:		/* fpga <op> <dev> <data> */
#if defined(CONFIG_FIT)
		if (fit_parse_subimage(argv[3], (ulong)fpga_data,
				       &fit_addr, &fit_uname)) {
			fpga_data = (void *)fit_addr;
			debug("*  fpga: subimage '%s' from FIT image ",
			      fit_uname);
			debug("at 0x%08lx\n", fit_addr);
		} else
#endif
		{
			fpga_data = (void *)simple_strtoul(argv[3], NULL, 16);
			debug("*  fpga: cmdline image address = 0x%08lx\n",
			      (ulong)fpga_data);
		}
		debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);

	case 3:		/* fpga <op> <dev | data addr> */
		dev = (int)simple_strtoul(argv[2], NULL, 16);
		debug("%s: device = %d\n", __func__, dev);
	}

	if (dev == FPGA_INVALID_DEVICE) {
		puts("FPGA device not specified\n");
		op = FPGA_NONE;
	}

	switch (op) {
	case FPGA_NONE:
	case FPGA_INFO:
		break;
#if defined(CONFIG_CMD_FPGA_LOADFS)
	case FPGA_LOADFS:
		/* Blocksize can be zero */
		if (!fpga_fsinfo.interface || !fpga_fsinfo.dev_part ||
		    !fpga_fsinfo.filename)
			wrong_parms = 1;
		break;
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	case FPGA_LOADS:
		if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
		    fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
			puts("ERR: use <fpga load> for NonSecure bitstream\n");
			wrong_parms = 1;
		}

		if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
		    !fpga_sec_info.userkey_addr) {
			wrong_parms = 1;
			puts("ERR:User key not provided\n");
		}
		break;
#endif
	case FPGA_LOAD:
	case FPGA_LOADP:
	case FPGA_LOADB:
	case FPGA_LOADBP:
	case FPGA_DUMP:
		if (!fpga_data || !data_size)
			wrong_parms = 1;
		break;
#if defined(CONFIG_CMD_FPGA_LOADMK)
	case FPGA_LOADMK:
		if (!fpga_data)
			wrong_parms = 1;
		break;
#endif
	}

	if (wrong_parms) {
		puts("Wrong parameters for FPGA request\n");
		op = FPGA_NONE;
	}

	switch (op) {
	case FPGA_NONE:
		return CMD_RET_USAGE;

	case FPGA_INFO:
		rc = fpga_info(dev);
		break;

	case FPGA_LOAD:
		rc = fpga_load(dev, fpga_data, data_size, BIT_FULL);
		break;

#if defined(CONFIG_CMD_FPGA_LOADP)
	case FPGA_LOADP:
		rc = fpga_load(dev, fpga_data, data_size, BIT_PARTIAL);
		break;
#endif

	case FPGA_LOADB:
		rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_FULL);
		break;

#if defined(CONFIG_CMD_FPGA_LOADBP)
	case FPGA_LOADBP:
		rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_PARTIAL);
		break;
#endif

#if defined(CONFIG_CMD_FPGA_LOADFS)
	case FPGA_LOADFS:
		rc = fpga_fsload(dev, fpga_data, data_size, &fpga_fsinfo);
		break;
#endif

#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	case FPGA_LOADS:
		rc = fpga_loads(dev, fpga_data, data_size, &fpga_sec_info);
		break;
#endif

#if defined(CONFIG_CMD_FPGA_LOADMK)
	case FPGA_LOADMK:
		switch (genimg_get_format(fpga_data)) {
#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
		case IMAGE_FORMAT_LEGACY:
			{
				image_header_t *hdr =
						(image_header_t *)fpga_data;
				ulong data;
				uint8_t comp;

				comp = image_get_comp(hdr);
				if (comp == IH_COMP_GZIP) {
#if defined(CONFIG_GZIP)
					ulong image_buf = image_get_data(hdr);
					data = image_get_load(hdr);
					ulong image_size = ~0UL;

					if (gunzip((void *)data, ~0UL,
						   (void *)image_buf,
						   &image_size) != 0) {
						puts("GUNZIP: error\n");
						return 1;
					}
					data_size = image_size;
#else
					puts("Gunzip image is not supported\n");
					return 1;
#endif
				} else {
					data = (ulong)image_get_data(hdr);
					data_size = image_get_data_size(hdr);
				}
				rc = fpga_load(dev, (void *)data, data_size,
					       BIT_FULL);
			}
			break;
#endif
#if defined(CONFIG_FIT)
		case IMAGE_FORMAT_FIT:
			{
				const void *fit_hdr = (const void *)fpga_data;
				int noffset;
				const void *fit_data;

				if (fit_uname == NULL) {
					puts("No FIT subimage unit name\n");
					return 1;
				}

				if (!fit_check_format(fit_hdr)) {
					puts("Bad FIT image format\n");
					return 1;
				}

				/* get fpga component image node offset */
				noffset = fit_image_get_node(fit_hdr,
							     fit_uname);
				if (noffset < 0) {
					printf("Can't find '%s' FIT subimage\n",
					       fit_uname);
					return 1;
				}

				/* verify integrity */
				if (!fit_image_verify(fit_hdr, noffset)) {
					puts ("Bad Data Hash\n");
					return 1;
				}

				/* get fpga subimage data address and length */
				if (fit_image_get_data(fit_hdr, noffset,
						       &fit_data, &data_size)) {
					puts("Fpga subimage data not found\n");
					return 1;
				}

				rc = fpga_load(dev, fit_data, data_size,
					       BIT_FULL);
			}
			break;
#endif
		default:
			puts("** Unknown image type\n");
			rc = FPGA_FAIL;
			break;
		}
		break;
#endif

	case FPGA_DUMP:
		rc = fpga_dump(dev, fpga_data, data_size);
		break;

	default:
		printf("Unknown operation\n");
		return CMD_RET_USAGE;
	}
	return rc;
}

#if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
U_BOOT_CMD(fpga, 9, 1, do_fpga,
#else
U_BOOT_CMD(fpga, 6, 1, do_fpga,
#endif
	   "loadable FPGA image support",
	   "[operation type] [device number] [image address] [image size]\n"
	   "fpga operations:\n"
	   "  dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
	   "  info\t[dev]\t\t\tlist known device information\n"
	   "  load\t[dev] [address] [size]\tLoad device from memory buffer\n"
#if defined(CONFIG_CMD_FPGA_LOADP)
	   "  loadp\t[dev] [address] [size]\t"
	   "Load device from memory buffer with partial bitstream\n"
#endif
	   "  loadb\t[dev] [address] [size]\t"
	   "Load device from bitstream buffer (Xilinx only)\n"
#if defined(CONFIG_CMD_FPGA_LOADBP)
	   "  loadbp\t[dev] [address] [size]\t"
	   "Load device from bitstream buffer with partial bitstream"
	   "(Xilinx only)\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	   "Load device from filesystem (FAT by default) (Xilinx only)\n"
	   "  loadfs [dev] [address] [image size] [blocksize] <interface>\n"
	   "        [<dev[:part]>] <filename>\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	   "  loadmk [dev] [address]\tLoad device generated with mkimage"
#if defined(CONFIG_FIT)
	   "\n"
	   "\tFor loadmk operating on FIT format uImage address must include\n"
	   "\tsubimage unit name in the form of addr:<subimg_uname>"
#endif
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	   "Load encrypted bitstream (Xilinx only)\n"
	   "  loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
	   "        [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
	   "Loads the secure bistreams(authenticated/encrypted/both\n"
	   "authenticated and encrypted) of [size] from [address].\n"
	   "The auth-OCM/DDR flag specifies to perform authentication\n"
	   "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
	   "The enc flag specifies which key to be used for decryption\n"
	   "0-device key, 1-user key, 2-no encryption.\n"
	   "The optional Userkey address specifies from which address key\n"
	   "has to be used for decryption if user key is selected.\n"
	   "NOTE: the sceure bitstream has to be created using xilinx\n"
	   "bootgen tool only.\n"
#endif
);
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
4a9cbbe8 WD	2	/*
	3	* (C) Copyright 2000, 2001
	4	* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4a9cbbe8 WD	5	*/
	6
	7	/*
	8	* FPGA support
	9	*/
	10	#include <common.h>
	11	#include <command.h>
8bde7f77	12	#include <fpga.h>
1a897668	13	#include <fs.h>
c3d2b4b4	14	#include <malloc.h>
4a9cbbe8	15
4a9cbbe8	16	/* Local defines */
5cf22289 MS	17	enum {
	18	FPGA_NONE = -1,
	19	FPGA_INFO,
	20	FPGA_LOAD,
	21	FPGA_LOADB,
	22	FPGA_DUMP,
	23	FPGA_LOADMK,
	24	FPGA_LOADP,
	25	FPGA_LOADBP,
	26	FPGA_LOADFS,
cedd48e2	27	FPGA_LOADS,
5cf22289	28	};
4a9cbbe8	29
323fe38e MS	30	/*
	31	* Map op to supported operations. We don't use a table since we
	32	* would just have to relocate it from flash anyway.
	33	*/
	34	static int fpga_get_op(char *opstr)
	35	{
	36	int op = FPGA_NONE;
	37
	38	if (!strcmp("info", opstr))
	39	op = FPGA_INFO;
	40	else if (!strcmp("loadb", opstr))
	41	op = FPGA_LOADB;
	42	else if (!strcmp("load", opstr))
	43	op = FPGA_LOAD;
	44	#if defined(CONFIG_CMD_FPGA_LOADP)
	45	else if (!strcmp("loadp", opstr))
	46	op = FPGA_LOADP;
	47	#endif
	48	#if defined(CONFIG_CMD_FPGA_LOADBP)
	49	else if (!strcmp("loadbp", opstr))
	50	op = FPGA_LOADBP;
	51	#endif
	52	#if defined(CONFIG_CMD_FPGA_LOADFS)
	53	else if (!strcmp("loadfs", opstr))
	54	op = FPGA_LOADFS;
	55	#endif
	56	#if defined(CONFIG_CMD_FPGA_LOADMK)
	57	else if (!strcmp("loadmk", opstr))
	58	op = FPGA_LOADMK;
	59	#endif
	60	else if (!strcmp("dump", opstr))
	61	op = FPGA_DUMP;
	62	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	63	else if (!strcmp("loads", opstr))
	64	op = FPGA_LOADS;
	65	#endif
	66
	67	return op;
	68	}
	69
4a9cbbe8 WD	70	/* ------------------------------------------------------------------------- */
	71	/* command form:
	72	* fpga <op> <device number> <data addr> <datasize>
	73	* where op is 'load', 'dump', or 'info'
	74	* If there is no device number field, the fpga environment variable is used.
	75	* If there is no data addr field, the fpgadata environment variable is used.
	76	* The info command requires no data address field.
	77	*/
fc598412	78	int do_fpga(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
4a9cbbe8	79	{
d4ca31c4 WD	80	int op, dev = FPGA_INVALID_DEVICE;
	81	size_t data_size = 0;
	82	void *fpga_data = NULL;
00caae6d SG	83	char *devstr = env_get("fpga");
00caae6d SG	84	char *datastr = env_get("fpgadata");
d4ca31c4	85	int rc = FPGA_FAIL;
a790b5b2	86	int wrong_parms = 0;
fc598412	87	#if defined(CONFIG_FIT)
c28c4d19 MB	88	const char *fit_uname = NULL;
	89	ulong fit_addr;
	90	#endif
1a897668 SDPP	91	#if defined(CONFIG_CMD_FPGA_LOADFS)
	92	fpga_fs_info fpga_fsinfo;
	93	fpga_fsinfo.fstype = FS_TYPE_ANY;
	94	#endif
cedd48e2 SDPP	95	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	96	struct fpga_secure_info fpga_sec_info;
	97
	98	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
	99	#endif
d4ca31c4 WD	100
d4ca31c4 WD	101	if (devstr)
fc598412	102	dev = (int) simple_strtoul(devstr, NULL, 16);
d4ca31c4	103	if (datastr)
fc598412	104	fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
d4ca31c4	105
f5953610 SDPP	106	if (argc > 9 \|\| argc < 2) {
	107	debug("%s: Too many or too few args (%d)\n", __func__, argc);
	108	return CMD_RET_USAGE;
	109	}
	110
323fe38e	111	op = fpga_get_op(argv[1]);
f5953610 SDPP	112
f5953610 SDPP	113	switch (op) {
55010969 MS	114	case FPGA_NONE:
	115	printf("Unknown fpga operation \"%s\"\n", argv[1]);
	116	return CMD_RET_USAGE;
1a897668	117	#if defined(CONFIG_CMD_FPGA_LOADFS)
f5953610 SDPP	118	case FPGA_LOADFS:
	119	if (argc < 9)
	120	return CMD_RET_USAGE;
1a897668	121	fpga_fsinfo.blocksize = (unsigned int)
f5953610	122	simple_strtoul(argv[5], NULL, 16);
1a897668 SDPP	123	fpga_fsinfo.interface = argv[6];
	124	fpga_fsinfo.dev_part = argv[7];
	125	fpga_fsinfo.filename = argv[8];
f5953610 SDPP	126	argc = 5;
f5953610 SDPP	127	break;
cedd48e2 SDPP	128	#endif
	129	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	130	case FPGA_LOADS:
	131	if (argc < 7)
	132	return CMD_RET_USAGE;
	133	if (argc == 8)
	134	fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
	135	simple_strtoull(argv[7],
	136	NULL, 16);
	137	fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16);
	138	fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16);
	139	argc = 5;
	140	break;
1a897668	141	#endif
f5953610 SDPP	142	default:
	143	break;
	144	}
	145
	146	switch (argc) {
d4ca31c4	147	case 5: /* fpga <op> <dev> <data> <datasize> */
fc598412	148	data_size = simple_strtoul(argv[4], NULL, 16);
c28c4d19	149
d4ca31c4	150	case 4: /* fpga <op> <dev> <data> */
c28c4d19	151	#if defined(CONFIG_FIT)
fc598412 MS	152	if (fit_parse_subimage(argv[3], (ulong)fpga_data,
fc598412 MS	153	&fit_addr, &fit_uname)) {
c28c4d19	154	fpga_data = (void *)fit_addr;
fc598412 MS	155	debug("* fpga: subimage '%s' from FIT image ",
	156	fit_uname);
	157	debug("at 0x%08lx\n", fit_addr);
c28c4d19 MB	158	} else
	159	#endif
	160	{
fc598412	161	fpga_data = (void *)simple_strtoul(argv[3], NULL, 16);
06297db0	162	debug("* fpga: cmdline image address = 0x%08lx\n",
fc598412	163	(ulong)fpga_data);
c28c4d19	164	}
455ad585	165	debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
c28c4d19	166
d4ca31c4	167	case 3: /* fpga <op> <dev \| data addr> */
fc598412	168	dev = (int)simple_strtoul(argv[2], NULL, 16);
06297db0	169	debug("%s: device = %d\n", __func__, dev);
d4ca31c4 WD	170	}
d4ca31c4 WD	171
a790b5b2 SB	172	if (dev == FPGA_INVALID_DEVICE) {
	173	puts("FPGA device not specified\n");
	174	op = FPGA_NONE;
	175	}
	176
	177	switch (op) {
	178	case FPGA_NONE:
	179	case FPGA_INFO:
	180	break;
1a897668 SDPP	181	#if defined(CONFIG_CMD_FPGA_LOADFS)
	182	case FPGA_LOADFS:
	183	/* Blocksize can be zero */
	184	if (!fpga_fsinfo.interface \|\| !fpga_fsinfo.dev_part \|\|
	185	!fpga_fsinfo.filename)
	186	wrong_parms = 1;
cedd48e2 SDPP	187	break;
	188	#endif
	189	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	190	case FPGA_LOADS:
	191	if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
	192	fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
	193	puts("ERR: use <fpga load> for NonSecure bitstream\n");
	194	wrong_parms = 1;
	195	}
	196
	197	if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
	198	!fpga_sec_info.userkey_addr) {
	199	wrong_parms = 1;
	200	puts("ERR:User key not provided\n");
	201	}
	202	break;
1a897668	203	#endif
a790b5b2	204	case FPGA_LOAD:
67193864	205	case FPGA_LOADP:
a790b5b2	206	case FPGA_LOADB:
67193864	207	case FPGA_LOADBP:
a790b5b2 SB	208	case FPGA_DUMP:
	209	if (!fpga_data \|\| !data_size)
	210	wrong_parms = 1;
	211	break;
64e809af	212	#if defined(CONFIG_CMD_FPGA_LOADMK)
a790b5b2 SB	213	case FPGA_LOADMK:
	214	if (!fpga_data)
	215	wrong_parms = 1;
	216	break;
64e809af	217	#endif
a790b5b2 SB	218	}
	219
	220	if (wrong_parms) {
	221	puts("Wrong parameters for FPGA request\n");
	222	op = FPGA_NONE;
	223	}
	224
d4ca31c4 WD	225	switch (op) {
d4ca31c4 WD	226	case FPGA_NONE:
4c12eeb8	227	return CMD_RET_USAGE;
d4ca31c4 WD	228
d4ca31c4 WD	229	case FPGA_INFO:
fc598412	230	rc = fpga_info(dev);
d4ca31c4 WD	231	break;
	232
	233	case FPGA_LOAD:
7a78bd26	234	rc = fpga_load(dev, fpga_data, data_size, BIT_FULL);
d4ca31c4 WD	235	break;
d4ca31c4 WD	236
67193864 MS	237	#if defined(CONFIG_CMD_FPGA_LOADP)
	238	case FPGA_LOADP:
	239	rc = fpga_load(dev, fpga_data, data_size, BIT_PARTIAL);
	240	break;
	241	#endif
	242
30ce5ab0	243	case FPGA_LOADB:
7a78bd26	244	rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_FULL);
30ce5ab0 WD	245	break;
30ce5ab0 WD	246
67193864 MS	247	#if defined(CONFIG_CMD_FPGA_LOADBP)
	248	case FPGA_LOADBP:
	249	rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_PARTIAL);
	250	break;
	251	#endif
	252
1a897668 SDPP	253	#if defined(CONFIG_CMD_FPGA_LOADFS)
	254	case FPGA_LOADFS:
	255	rc = fpga_fsload(dev, fpga_data, data_size, &fpga_fsinfo);
	256	break;
	257	#endif
	258
cedd48e2 SDPP	259	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	260	case FPGA_LOADS:
	261	rc = fpga_loads(dev, fpga_data, data_size, &fpga_sec_info);
	262	break;
	263	#endif
	264
64e809af	265	#if defined(CONFIG_CMD_FPGA_LOADMK)
f0ff4692	266	case FPGA_LOADMK:
fc598412	267	switch (genimg_get_format(fpga_data)) {
21d29f7f	268	#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
d5934ad7 MB	269	case IMAGE_FORMAT_LEGACY:
d5934ad7 MB	270	{
fc598412 MS	271	image_header_t *hdr =
	272	(image_header_t *)fpga_data;
	273	ulong data;
32d7cdd3 MS	274	uint8_t comp;
	275
	276	comp = image_get_comp(hdr);
	277	if (comp == IH_COMP_GZIP) {
1b63aaa5	278	#if defined(CONFIG_GZIP)
32d7cdd3 MS	279	ulong image_buf = image_get_data(hdr);
	280	data = image_get_load(hdr);
	281	ulong image_size = ~0UL;
	282
	283	if (gunzip((void *)data, ~0UL,
	284	(void *)image_buf,
	285	&image_size) != 0) {
	286	puts("GUNZIP: error\n");
	287	return 1;
	288	}
	289	data_size = image_size;
1b63aaa5 MS	290	#else
	291	puts("Gunzip image is not supported\n");
	292	return 1;
	293	#endif
32d7cdd3 MS	294	} else {
	295	data = (ulong)image_get_data(hdr);
	296	data_size = image_get_data_size(hdr);
	297	}
7a78bd26 MS	298	rc = fpga_load(dev, (void *)data, data_size,
7a78bd26 MS	299	BIT_FULL);
f0ff4692	300	}
d5934ad7	301	break;
21d29f7f	302	#endif
d5934ad7 MB	303	#if defined(CONFIG_FIT)
d5934ad7 MB	304	case IMAGE_FORMAT_FIT:
c28c4d19 MB	305	{
	306	const void fit_hdr = (const void )fpga_data;
	307	int noffset;
e6a857da	308	const void *fit_data;
c28c4d19 MB	309
c28c4d19 MB	310	if (fit_uname == NULL) {
fc598412	311	puts("No FIT subimage unit name\n");
c28c4d19 MB	312	return 1;
	313	}
	314
fc598412 MS	315	if (!fit_check_format(fit_hdr)) {
fc598412 MS	316	puts("Bad FIT image format\n");
c28c4d19 MB	317	return 1;
	318	}
	319
	320	/* get fpga component image node offset */
fc598412 MS	321	noffset = fit_image_get_node(fit_hdr,
fc598412 MS	322	fit_uname);
c28c4d19	323	if (noffset < 0) {
fc598412 MS	324	printf("Can't find '%s' FIT subimage\n",
fc598412 MS	325	fit_uname);
c28c4d19 MB	326	return 1;
	327	}
	328
	329	/* verify integrity */
b8da8366	330	if (!fit_image_verify(fit_hdr, noffset)) {
c28c4d19 MB	331	puts ("Bad Data Hash\n");
	332	return 1;
	333	}
	334
	335	/* get fpga subimage data address and length */
fc598412 MS	336	if (fit_image_get_data(fit_hdr, noffset,
	337	&fit_data, &data_size)) {
	338	puts("Fpga subimage data not found\n");
c28c4d19 MB	339	return 1;
	340	}
	341
7a78bd26 MS	342	rc = fpga_load(dev, fit_data, data_size,
7a78bd26 MS	343	BIT_FULL);
c28c4d19	344	}
d5934ad7 MB	345	break;
	346	#endif
	347	default:
fc598412	348	puts("** Unknown image type\n");
d5934ad7 MB	349	rc = FPGA_FAIL;
d5934ad7 MB	350	break;
f0ff4692 SR	351	}
f0ff4692 SR	352	break;
64e809af	353	#endif
f0ff4692	354
d4ca31c4	355	case FPGA_DUMP:
fc598412	356	rc = fpga_dump(dev, fpga_data, data_size);
d4ca31c4 WD	357	break;
	358
	359	default:
fc598412	360	printf("Unknown operation\n");
4c12eeb8	361	return CMD_RET_USAGE;
d4ca31c4	362	}
fc598412	363	return rc;
4a9cbbe8 WD	364	}
4a9cbbe8 WD	365
cedd48e2	366	#if defined(CONFIG_CMD_FPGA_LOADFS) \|\| defined(CONFIG_CMD_FPGA_LOAD_SECURE)
1a897668 SDPP	367	U_BOOT_CMD(fpga, 9, 1, do_fpga,
1a897668 SDPP	368	#else
fc598412	369	U_BOOT_CMD(fpga, 6, 1, do_fpga,
1a897668	370	#endif
fc598412 MS	371	"loadable FPGA image support",
	372	"[operation type] [device number] [image address] [image size]\n"
	373	"fpga operations:\n"
2d73f0d6	374	" dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
fc598412 MS	375	" info\t[dev]\t\t\tlist known device information\n"
fc598412 MS	376	" load\t[dev] [address] [size]\tLoad device from memory buffer\n"
67193864 MS	377	#if defined(CONFIG_CMD_FPGA_LOADP)
	378	" loadp\t[dev] [address] [size]\t"
	379	"Load device from memory buffer with partial bitstream\n"
	380	#endif
fc598412 MS	381	" loadb\t[dev] [address] [size]\t"
fc598412 MS	382	"Load device from bitstream buffer (Xilinx only)\n"
67193864 MS	383	#if defined(CONFIG_CMD_FPGA_LOADBP)
	384	" loadbp\t[dev] [address] [size]\t"
	385	"Load device from bitstream buffer with partial bitstream"
	386	"(Xilinx only)\n"
	387	#endif
1a897668 SDPP	388	#if defined(CONFIG_CMD_FPGA_LOADFS)
	389	"Load device from filesystem (FAT by default) (Xilinx only)\n"
	390	" loadfs [dev] [address] [image size] [blocksize] <interface>\n"
	391	" [<dev[:part]>] <filename>\n"
	392	#endif
64e809af	393	#if defined(CONFIG_CMD_FPGA_LOADMK)
fc598412	394	" loadmk [dev] [address]\tLoad device generated with mkimage"
c28c4d19	395	#if defined(CONFIG_FIT)
fc598412 MS	396	"\n"
	397	"\tFor loadmk operating on FIT format uImage address must include\n"
	398	"\tsubimage unit name in the form of addr:<subimg_uname>"
c28c4d19	399	#endif
64e809af	400	#endif
cedd48e2 SDPP	401	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	402	"Load encrypted bitstream (Xilinx only)\n"
	403	" loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
	404	" [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
	405	"Loads the secure bistreams(authenticated/encrypted/both\n"
	406	"authenticated and encrypted) of [size] from [address].\n"
	407	"The auth-OCM/DDR flag specifies to perform authentication\n"
	408	"in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
	409	"The enc flag specifies which key to be used for decryption\n"
	410	"0-device key, 1-user key, 2-no encryption.\n"
	411	"The optional Userkey address specifies from which address key\n"
	412	"has to be used for decryption if user key is selected.\n"
	413	"NOTE: the sceure bitstream has to be created using xilinx\n"
	414	"bootgen tool only.\n"
	415	#endif
c28c4d19	416	);