[thirdparty/u-boot.git] / cmd / fpga.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2000, 2001
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 */

/*
 *  FPGA support
 */
#include <common.h>
#include <command.h>
#include <fpga.h>
#include <fs.h>
#include <malloc.h>

static long do_fpga_get_device(char *arg)
{
	long dev = FPGA_INVALID_DEVICE;
	char *devstr = env_get("fpga");

	if (devstr)
		/* Should be strtol to handle -1 cases */
		dev = simple_strtol(devstr, NULL, 16);

	if (arg)
		dev = simple_strtol(arg, NULL, 16);

	debug("%s: device = %ld\n", __func__, dev);

	return dev;
}

static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
				cmd_tbl_t *cmdtp, int argc, char *const argv[])
{
	size_t local_data_size;
	long local_fpga_data;

	debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);

	if (argc != cmdtp->maxargs) {
		debug("fpga: incorrect parameters passed\n");
		return CMD_RET_USAGE;
	}

	*dev = do_fpga_get_device(argv[0]);

	local_fpga_data = simple_strtol(argv[1], NULL, 16);
	if (!local_fpga_data) {
		debug("fpga: zero fpga_data address\n");
		return CMD_RET_USAGE;
	}
	*fpga_data = local_fpga_data;

	local_data_size = simple_strtoul(argv[2], NULL, 16);
	if (!local_data_size) {
		debug("fpga: zero size\n");
		return CMD_RET_USAGE;
	}
	*data_size = local_data_size;

	return 0;
}

/* Local defines */
enum {
	FPGA_NONE = -1,
	FPGA_LOADMK,
	FPGA_LOADFS,
	FPGA_LOADS,
};

/*
 * Map op to supported operations.  We don't use a table since we
 * would just have to relocate it from flash anyway.
 */
static int fpga_get_op(char *opstr)
{
	int op = FPGA_NONE;

#if defined(CONFIG_CMD_FPGA_LOADFS)
	if (!strcmp("loadfs", opstr))
		op = FPGA_LOADFS;
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	else if (!strcmp("loadmk", opstr))
		op = FPGA_LOADMK;
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	else if (!strcmp("loads", opstr))
		op = FPGA_LOADS;
#endif

	return op;
}

/* ------------------------------------------------------------------------- */
/* command form:
 *   fpga <op> <device number> <data addr> <datasize>
 * where op is 'load', 'dump', or 'info'
 * If there is no device number field, the fpga environment variable is used.
 * If there is no data addr field, the fpgadata environment variable is used.
 * The info command requires no data address field.
 */
int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
	int op, dev = FPGA_INVALID_DEVICE;
	size_t data_size = 0;
	void *fpga_data = NULL;
	char *devstr = env_get("fpga");
	char *datastr = env_get("fpgadata");
	int rc = FPGA_FAIL;
#if defined(CONFIG_FIT)
	const char *fit_uname = NULL;
	ulong fit_addr;
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	fpga_fs_info fpga_fsinfo;
	fpga_fsinfo.fstype = FS_TYPE_ANY;
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	struct fpga_secure_info fpga_sec_info;

	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
#endif

	if (devstr)
		dev = (int) simple_strtoul(devstr, NULL, 16);
	if (datastr)
		fpga_data = (void *)simple_strtoul(datastr, NULL, 16);

	if (argc > 9 || argc < 2) {
		debug("%s: Too many or too few args (%d)\n", __func__, argc);
		return CMD_RET_USAGE;
	}

	op = fpga_get_op(argv[1]);

	switch (op) {
	case FPGA_NONE:
		printf("Unknown fpga operation \"%s\"\n", argv[1]);
		return CMD_RET_USAGE;
#if defined(CONFIG_CMD_FPGA_LOADFS)
	case FPGA_LOADFS:
		if (argc < 9)
			return CMD_RET_USAGE;
		fpga_fsinfo.blocksize = (unsigned int)
					simple_strtoul(argv[5], NULL, 16);
		fpga_fsinfo.interface = argv[6];
		fpga_fsinfo.dev_part = argv[7];
		fpga_fsinfo.filename = argv[8];

		argc = 5;
		break;
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	case FPGA_LOADS:
		if (argc < 7)
			return CMD_RET_USAGE;
		if (argc == 8)
			fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
						     simple_strtoull(argv[7],
								     NULL, 16);
		fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16);
		fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16);

		if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
		    fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
			puts("ERR: Use <fpga load> for NonSecure bitstream\n");
			return CMD_RET_USAGE;
		}

		if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
		    !fpga_sec_info.userkey_addr) {
			puts("ERR: User key not provided\n");
			return CMD_RET_USAGE;
		}

		argc = 5;
		break;
#endif
	default:
		break;
	}

	switch (argc) {
	case 5:		/* fpga <op> <dev> <data> <datasize> */
		data_size = simple_strtoul(argv[4], NULL, 16);
		if (!data_size) {
			puts("Zero data_size\n");
			return CMD_RET_USAGE;
		}
	case 4:		/* fpga <op> <dev> <data> */
#if defined(CONFIG_FIT)
		if (fit_parse_subimage(argv[3], (ulong)fpga_data,
				       &fit_addr, &fit_uname)) {
			fpga_data = (void *)fit_addr;
			debug("*  fpga: subimage '%s' from FIT image ",
			      fit_uname);
			debug("at 0x%08lx\n", fit_addr);
		} else
#endif
		{
			fpga_data = (void *)simple_strtoul(argv[3], NULL, 16);
			debug("*  fpga: cmdline image address = 0x%08lx\n",
			      (ulong)fpga_data);
		}
		debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
		if (!fpga_data) {
			puts("Zero fpga_data address\n");
			return CMD_RET_USAGE;
		}
	case 3:		/* fpga <op> <dev | data addr> */
		dev = (int)simple_strtoul(argv[2], NULL, 16);
		debug("%s: device = %d\n", __func__, dev);
	}

	if (dev == FPGA_INVALID_DEVICE) {
		puts("FPGA device not specified\n");
		return CMD_RET_USAGE;
	}

	switch (op) {
#if defined(CONFIG_CMD_FPGA_LOADFS)
	case FPGA_LOADFS:
		rc = fpga_fsload(dev, fpga_data, data_size, &fpga_fsinfo);
		break;
#endif

#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	case FPGA_LOADS:
		rc = fpga_loads(dev, fpga_data, data_size, &fpga_sec_info);
		break;
#endif

#if defined(CONFIG_CMD_FPGA_LOADMK)
	case FPGA_LOADMK:
		switch (genimg_get_format(fpga_data)) {
#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
		case IMAGE_FORMAT_LEGACY:
			{
				image_header_t *hdr =
						(image_header_t *)fpga_data;
				ulong data;
				uint8_t comp;

				comp = image_get_comp(hdr);
				if (comp == IH_COMP_GZIP) {
#if defined(CONFIG_GZIP)
					ulong image_buf = image_get_data(hdr);
					data = image_get_load(hdr);
					ulong image_size = ~0UL;

					if (gunzip((void *)data, ~0UL,
						   (void *)image_buf,
						   &image_size) != 0) {
						puts("GUNZIP: error\n");
						return 1;
					}
					data_size = image_size;
#else
					puts("Gunzip image is not supported\n");
					return 1;
#endif
				} else {
					data = (ulong)image_get_data(hdr);
					data_size = image_get_data_size(hdr);
				}
				rc = fpga_load(dev, (void *)data, data_size,
					       BIT_FULL);
			}
			break;
#endif
#if defined(CONFIG_FIT)
		case IMAGE_FORMAT_FIT:
			{
				const void *fit_hdr = (const void *)fpga_data;
				int noffset;
				const void *fit_data;

				if (fit_uname == NULL) {
					puts("No FIT subimage unit name\n");
					return 1;
				}

				if (!fit_check_format(fit_hdr)) {
					puts("Bad FIT image format\n");
					return 1;
				}

				/* get fpga component image node offset */
				noffset = fit_image_get_node(fit_hdr,
							     fit_uname);
				if (noffset < 0) {
					printf("Can't find '%s' FIT subimage\n",
					       fit_uname);
					return 1;
				}

				/* verify integrity */
				if (!fit_image_verify(fit_hdr, noffset)) {
					puts ("Bad Data Hash\n");
					return 1;
				}

				/* get fpga subimage data address and length */
				if (fit_image_get_data(fit_hdr, noffset,
						       &fit_data, &data_size)) {
					puts("Fpga subimage data not found\n");
					return 1;
				}

				rc = fpga_load(dev, fit_data, data_size,
					       BIT_FULL);
			}
			break;
#endif
		default:
			puts("** Unknown image type\n");
			rc = FPGA_FAIL;
			break;
		}
		break;
#endif

	default:
		printf("Unknown operation\n");
		return CMD_RET_USAGE;
	}
	return rc;
}

static int do_fpga_info(cmd_tbl_t *cmdtp, int flag, int argc,
			char * const argv[])
{
	long dev = do_fpga_get_device(argv[0]);

	return fpga_info(dev);
}

static int do_fpga_dump(cmd_tbl_t *cmdtp, int flag, int argc,
			char * const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_dump(dev, (void *)fpga_data, data_size);
}

static int do_fpga_load(cmd_tbl_t *cmdtp, int flag, int argc,
			char * const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
}

static int do_fpga_loadb(cmd_tbl_t *cmdtp, int flag, int argc,
			 char * const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
}

#if defined(CONFIG_CMD_FPGA_LOADP)
static int do_fpga_loadp(cmd_tbl_t *cmdtp, int flag, int argc,
			 char * const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADBP)
static int do_fpga_loadbp(cmd_tbl_t *cmdtp, int flag, int argc,
			  char * const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
				  BIT_PARTIAL);
}
#endif

static cmd_tbl_t fpga_commands[] = {
	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
	U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
#if defined(CONFIG_CMD_FPGA_LOADP)
	U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADBP)
	U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
#endif
};

static int do_fpga_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
			   char *const argv[])
{
	cmd_tbl_t *fpga_cmd;
	int ret;

	if (argc < 2)
		return CMD_RET_USAGE;

	fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
				ARRAY_SIZE(fpga_commands));

	/* This should be removed when all functions are converted */
	if (!fpga_cmd)
		return do_fpga(cmdtp, flag, argc, argv);

	/* FIXME This can't be reached till all functions are converted */
	if (!fpga_cmd) {
		debug("fpga: non existing command\n");
		return CMD_RET_USAGE;
	}

	argc -= 2;
	argv += 2;

	if (argc > fpga_cmd->maxargs) {
		debug("fpga: more parameters passed\n");
		return CMD_RET_USAGE;
	}

	ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);

	return cmd_process_error(fpga_cmd, ret);
}

#if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
#else
U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
#endif
	   "loadable FPGA image support",
	   "[operation type] [device number] [image address] [image size]\n"
	   "fpga operations:\n"
	   "  dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
	   "  info\t[dev]\t\t\tlist known device information\n"
	   "  load\t[dev] [address] [size]\tLoad device from memory buffer\n"
#if defined(CONFIG_CMD_FPGA_LOADP)
	   "  loadp\t[dev] [address] [size]\t"
	   "Load device from memory buffer with partial bitstream\n"
#endif
	   "  loadb\t[dev] [address] [size]\t"
	   "Load device from bitstream buffer (Xilinx only)\n"
#if defined(CONFIG_CMD_FPGA_LOADBP)
	   "  loadbp\t[dev] [address] [size]\t"
	   "Load device from bitstream buffer with partial bitstream"
	   "(Xilinx only)\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	   "Load device from filesystem (FAT by default) (Xilinx only)\n"
	   "  loadfs [dev] [address] [image size] [blocksize] <interface>\n"
	   "        [<dev[:part]>] <filename>\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	   "  loadmk [dev] [address]\tLoad device generated with mkimage"
#if defined(CONFIG_FIT)
	   "\n"
	   "\tFor loadmk operating on FIT format uImage address must include\n"
	   "\tsubimage unit name in the form of addr:<subimg_uname>"
#endif
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	   "Load encrypted bitstream (Xilinx only)\n"
	   "  loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
	   "        [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
	   "Loads the secure bistreams(authenticated/encrypted/both\n"
	   "authenticated and encrypted) of [size] from [address].\n"
	   "The auth-OCM/DDR flag specifies to perform authentication\n"
	   "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
	   "The enc flag specifies which key to be used for decryption\n"
	   "0-device key, 1-user key, 2-no encryption.\n"
	   "The optional Userkey address specifies from which address key\n"
	   "has to be used for decryption if user key is selected.\n"
	   "NOTE: the sceure bitstream has to be created using xilinx\n"
	   "bootgen tool only.\n"
#endif
);
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
4a9cbbe8 WD	2	/*
	3	* (C) Copyright 2000, 2001
	4	* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4a9cbbe8 WD	5	*/
	6
	7	/*
	8	* FPGA support
	9	*/
	10	#include <common.h>
	11	#include <command.h>
8bde7f77	12	#include <fpga.h>
1a897668	13	#include <fs.h>
c3d2b4b4	14	#include <malloc.h>
4a9cbbe8	15
f4c7a4ae MS	16	static long do_fpga_get_device(char *arg)
	17	{
	18	long dev = FPGA_INVALID_DEVICE;
	19	char *devstr = env_get("fpga");
	20
	21	if (devstr)
	22	/* Should be strtol to handle -1 cases */
	23	dev = simple_strtol(devstr, NULL, 16);
	24
	25	if (arg)
	26	dev = simple_strtol(arg, NULL, 16);
	27
	28	debug("%s: device = %ld\n", __func__, dev);
	29
	30	return dev;
	31	}
	32
85754795 MS	33	static int do_fpga_check_params(long dev, long fpga_data, size_t *data_size,
	34	cmd_tbl_t cmdtp, int argc, char const argv[])
	35	{
	36	size_t local_data_size;
	37	long local_fpga_data;
	38
	39	debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);
	40
	41	if (argc != cmdtp->maxargs) {
	42	debug("fpga: incorrect parameters passed\n");
	43	return CMD_RET_USAGE;
	44	}
	45
	46	*dev = do_fpga_get_device(argv[0]);
	47
	48	local_fpga_data = simple_strtol(argv[1], NULL, 16);
	49	if (!local_fpga_data) {
	50	debug("fpga: zero fpga_data address\n");
	51	return CMD_RET_USAGE;
	52	}
	53	*fpga_data = local_fpga_data;
	54
	55	local_data_size = simple_strtoul(argv[2], NULL, 16);
	56	if (!local_data_size) {
	57	debug("fpga: zero size\n");
	58	return CMD_RET_USAGE;
	59	}
	60	*data_size = local_data_size;
	61
	62	return 0;
	63	}
	64
4a9cbbe8	65	/* Local defines */
5cf22289 MS	66	enum {
5cf22289 MS	67	FPGA_NONE = -1,
5cf22289	68	FPGA_LOADMK,
5cf22289	69	FPGA_LOADFS,
cedd48e2	70	FPGA_LOADS,
5cf22289	71	};
4a9cbbe8	72
323fe38e MS	73	/*
	74	* Map op to supported operations. We don't use a table since we
	75	* would just have to relocate it from flash anyway.
	76	*/
	77	static int fpga_get_op(char *opstr)
	78	{
	79	int op = FPGA_NONE;
	80
323fe38e	81	#if defined(CONFIG_CMD_FPGA_LOADFS)
85754795	82	if (!strcmp("loadfs", opstr))
323fe38e MS	83	op = FPGA_LOADFS;
	84	#endif
	85	#if defined(CONFIG_CMD_FPGA_LOADMK)
	86	else if (!strcmp("loadmk", opstr))
	87	op = FPGA_LOADMK;
	88	#endif
323fe38e MS	89	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	90	else if (!strcmp("loads", opstr))
	91	op = FPGA_LOADS;
	92	#endif
	93
	94	return op;
	95	}
	96
4a9cbbe8 WD	97	/* ------------------------------------------------------------------------- */
	98	/* command form:
	99	* fpga <op> <device number> <data addr> <datasize>
	100	* where op is 'load', 'dump', or 'info'
	101	* If there is no device number field, the fpga environment variable is used.
	102	* If there is no data addr field, the fpgadata environment variable is used.
	103	* The info command requires no data address field.
	104	*/
fc598412	105	int do_fpga(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
4a9cbbe8	106	{
d4ca31c4 WD	107	int op, dev = FPGA_INVALID_DEVICE;
	108	size_t data_size = 0;
	109	void *fpga_data = NULL;
00caae6d SG	110	char *devstr = env_get("fpga");
00caae6d SG	111	char *datastr = env_get("fpgadata");
d4ca31c4	112	int rc = FPGA_FAIL;
fc598412	113	#if defined(CONFIG_FIT)
c28c4d19 MB	114	const char *fit_uname = NULL;
	115	ulong fit_addr;
	116	#endif
1a897668 SDPP	117	#if defined(CONFIG_CMD_FPGA_LOADFS)
	118	fpga_fs_info fpga_fsinfo;
	119	fpga_fsinfo.fstype = FS_TYPE_ANY;
	120	#endif
cedd48e2 SDPP	121	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	122	struct fpga_secure_info fpga_sec_info;
	123
	124	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
	125	#endif
d4ca31c4 WD	126
d4ca31c4 WD	127	if (devstr)
fc598412	128	dev = (int) simple_strtoul(devstr, NULL, 16);
d4ca31c4	129	if (datastr)
fc598412	130	fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
d4ca31c4	131
f5953610 SDPP	132	if (argc > 9 \|\| argc < 2) {
	133	debug("%s: Too many or too few args (%d)\n", __func__, argc);
	134	return CMD_RET_USAGE;
	135	}
	136
323fe38e	137	op = fpga_get_op(argv[1]);
f5953610 SDPP	138
f5953610 SDPP	139	switch (op) {
55010969 MS	140	case FPGA_NONE:
	141	printf("Unknown fpga operation \"%s\"\n", argv[1]);
	142	return CMD_RET_USAGE;
1a897668	143	#if defined(CONFIG_CMD_FPGA_LOADFS)
f5953610 SDPP	144	case FPGA_LOADFS:
	145	if (argc < 9)
	146	return CMD_RET_USAGE;
1a897668	147	fpga_fsinfo.blocksize = (unsigned int)
f5953610	148	simple_strtoul(argv[5], NULL, 16);
1a897668 SDPP	149	fpga_fsinfo.interface = argv[6];
	150	fpga_fsinfo.dev_part = argv[7];
	151	fpga_fsinfo.filename = argv[8];
44d839bd	152
f5953610 SDPP	153	argc = 5;
f5953610 SDPP	154	break;
cedd48e2 SDPP	155	#endif
	156	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	157	case FPGA_LOADS:
	158	if (argc < 7)
	159	return CMD_RET_USAGE;
	160	if (argc == 8)
	161	fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
	162	simple_strtoull(argv[7],
	163	NULL, 16);
	164	fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16);
	165	fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16);
44d839bd MS	166
	167	if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
	168	fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
	169	puts("ERR: Use <fpga load> for NonSecure bitstream\n");
	170	return CMD_RET_USAGE;
	171	}
	172
	173	if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
	174	!fpga_sec_info.userkey_addr) {
	175	puts("ERR: User key not provided\n");
	176	return CMD_RET_USAGE;
	177	}
	178
cedd48e2 SDPP	179	argc = 5;
cedd48e2 SDPP	180	break;
1a897668	181	#endif
f5953610 SDPP	182	default:
	183	break;
	184	}
	185
	186	switch (argc) {
d4ca31c4	187	case 5: /* fpga <op> <dev> <data> <datasize> */
fc598412	188	data_size = simple_strtoul(argv[4], NULL, 16);
5cadab60 MS	189	if (!data_size) {
	190	puts("Zero data_size\n");
	191	return CMD_RET_USAGE;
	192	}
d4ca31c4	193	case 4: /* fpga <op> <dev> <data> */
c28c4d19	194	#if defined(CONFIG_FIT)
fc598412 MS	195	if (fit_parse_subimage(argv[3], (ulong)fpga_data,
fc598412 MS	196	&fit_addr, &fit_uname)) {
c28c4d19	197	fpga_data = (void *)fit_addr;
fc598412 MS	198	debug("* fpga: subimage '%s' from FIT image ",
	199	fit_uname);
	200	debug("at 0x%08lx\n", fit_addr);
c28c4d19 MB	201	} else
	202	#endif
	203	{
fc598412	204	fpga_data = (void *)simple_strtoul(argv[3], NULL, 16);
06297db0	205	debug("* fpga: cmdline image address = 0x%08lx\n",
fc598412	206	(ulong)fpga_data);
c28c4d19	207	}
455ad585	208	debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
5cadab60 MS	209	if (!fpga_data) {
	210	puts("Zero fpga_data address\n");
	211	return CMD_RET_USAGE;
	212	}
d4ca31c4	213	case 3: /* fpga <op> <dev \| data addr> */
fc598412	214	dev = (int)simple_strtoul(argv[2], NULL, 16);
06297db0	215	debug("%s: device = %d\n", __func__, dev);
d4ca31c4 WD	216	}
d4ca31c4 WD	217
a790b5b2 SB	218	if (dev == FPGA_INVALID_DEVICE) {
a790b5b2 SB	219	puts("FPGA device not specified\n");
ccd65203	220	return CMD_RET_USAGE;
a790b5b2 SB	221	}
a790b5b2 SB	222
d4ca31c4	223	switch (op) {
1a897668 SDPP	224	#if defined(CONFIG_CMD_FPGA_LOADFS)
	225	case FPGA_LOADFS:
	226	rc = fpga_fsload(dev, fpga_data, data_size, &fpga_fsinfo);
	227	break;
	228	#endif
	229
cedd48e2 SDPP	230	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	231	case FPGA_LOADS:
	232	rc = fpga_loads(dev, fpga_data, data_size, &fpga_sec_info);
	233	break;
	234	#endif
	235
64e809af	236	#if defined(CONFIG_CMD_FPGA_LOADMK)
f0ff4692	237	case FPGA_LOADMK:
fc598412	238	switch (genimg_get_format(fpga_data)) {
21d29f7f	239	#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
d5934ad7 MB	240	case IMAGE_FORMAT_LEGACY:
d5934ad7 MB	241	{
fc598412 MS	242	image_header_t *hdr =
	243	(image_header_t *)fpga_data;
	244	ulong data;
32d7cdd3 MS	245	uint8_t comp;
	246
	247	comp = image_get_comp(hdr);
	248	if (comp == IH_COMP_GZIP) {
1b63aaa5	249	#if defined(CONFIG_GZIP)
32d7cdd3 MS	250	ulong image_buf = image_get_data(hdr);
	251	data = image_get_load(hdr);
	252	ulong image_size = ~0UL;
	253
	254	if (gunzip((void *)data, ~0UL,
	255	(void *)image_buf,
	256	&image_size) != 0) {
	257	puts("GUNZIP: error\n");
	258	return 1;
	259	}
	260	data_size = image_size;
1b63aaa5 MS	261	#else
	262	puts("Gunzip image is not supported\n");
	263	return 1;
	264	#endif
32d7cdd3 MS	265	} else {
	266	data = (ulong)image_get_data(hdr);
	267	data_size = image_get_data_size(hdr);
	268	}
7a78bd26 MS	269	rc = fpga_load(dev, (void *)data, data_size,
7a78bd26 MS	270	BIT_FULL);
f0ff4692	271	}
d5934ad7	272	break;
21d29f7f	273	#endif
d5934ad7 MB	274	#if defined(CONFIG_FIT)
d5934ad7 MB	275	case IMAGE_FORMAT_FIT:
c28c4d19 MB	276	{
	277	const void fit_hdr = (const void )fpga_data;
	278	int noffset;
e6a857da	279	const void *fit_data;
c28c4d19 MB	280
c28c4d19 MB	281	if (fit_uname == NULL) {
fc598412	282	puts("No FIT subimage unit name\n");
c28c4d19 MB	283	return 1;
	284	}
	285
fc598412 MS	286	if (!fit_check_format(fit_hdr)) {
fc598412 MS	287	puts("Bad FIT image format\n");
c28c4d19 MB	288	return 1;
	289	}
	290
	291	/* get fpga component image node offset */
fc598412 MS	292	noffset = fit_image_get_node(fit_hdr,
fc598412 MS	293	fit_uname);
c28c4d19	294	if (noffset < 0) {
fc598412 MS	295	printf("Can't find '%s' FIT subimage\n",
fc598412 MS	296	fit_uname);
c28c4d19 MB	297	return 1;
	298	}
	299
	300	/* verify integrity */
b8da8366	301	if (!fit_image_verify(fit_hdr, noffset)) {
c28c4d19 MB	302	puts ("Bad Data Hash\n");
	303	return 1;
	304	}
	305
	306	/* get fpga subimage data address and length */
fc598412 MS	307	if (fit_image_get_data(fit_hdr, noffset,
	308	&fit_data, &data_size)) {
	309	puts("Fpga subimage data not found\n");
c28c4d19 MB	310	return 1;
	311	}
	312
7a78bd26 MS	313	rc = fpga_load(dev, fit_data, data_size,
7a78bd26 MS	314	BIT_FULL);
c28c4d19	315	}
d5934ad7 MB	316	break;
	317	#endif
	318	default:
fc598412	319	puts("** Unknown image type\n");
d5934ad7 MB	320	rc = FPGA_FAIL;
d5934ad7 MB	321	break;
f0ff4692 SR	322	}
f0ff4692 SR	323	break;
64e809af	324	#endif
f0ff4692	325
d4ca31c4	326	default:
fc598412	327	printf("Unknown operation\n");
4c12eeb8	328	return CMD_RET_USAGE;
d4ca31c4	329	}
fc598412	330	return rc;
4a9cbbe8 WD	331	}
4a9cbbe8 WD	332
f4c7a4ae MS	333	static int do_fpga_info(cmd_tbl_t *cmdtp, int flag, int argc,
	334	char * const argv[])
	335	{
	336	long dev = do_fpga_get_device(argv[0]);
	337
	338	return fpga_info(dev);
	339	}
	340
85754795 MS	341	static int do_fpga_dump(cmd_tbl_t *cmdtp, int flag, int argc,
	342	char * const argv[])
	343	{
	344	size_t data_size = 0;
	345	long fpga_data, dev;
	346	int ret;
	347
	348	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	349	cmdtp, argc, argv);
	350	if (ret)
	351	return ret;
	352
	353	return fpga_dump(dev, (void *)fpga_data, data_size);
	354	}
	355
	356	static int do_fpga_load(cmd_tbl_t *cmdtp, int flag, int argc,
	357	char * const argv[])
	358	{
	359	size_t data_size = 0;
	360	long fpga_data, dev;
	361	int ret;
	362
	363	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	364	cmdtp, argc, argv);
	365	if (ret)
	366	return ret;
	367
	368	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
	369	}
	370
	371	static int do_fpga_loadb(cmd_tbl_t *cmdtp, int flag, int argc,
	372	char * const argv[])
	373	{
	374	size_t data_size = 0;
	375	long fpga_data, dev;
	376	int ret;
	377
	378	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	379	cmdtp, argc, argv);
	380	if (ret)
	381	return ret;
	382
	383	return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
	384	}
	385
	386	#if defined(CONFIG_CMD_FPGA_LOADP)
	387	static int do_fpga_loadp(cmd_tbl_t *cmdtp, int flag, int argc,
	388	char * const argv[])
	389	{
	390	size_t data_size = 0;
	391	long fpga_data, dev;
	392	int ret;
	393
	394	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	395	cmdtp, argc, argv);
	396	if (ret)
	397	return ret;
	398
	399	return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
	400	}
	401	#endif
	402
	403	#if defined(CONFIG_CMD_FPGA_LOADBP)
	404	static int do_fpga_loadbp(cmd_tbl_t *cmdtp, int flag, int argc,
405	char * const argv[])
406	{
407	size_t data_size = 0;
408	long fpga_data, dev;
409	int ret;
410
411	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
412	cmdtp, argc, argv);
413	if (ret)
414	return ret;
415
416	return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
417	BIT_PARTIAL);
418	}
419	#endif
420
9657d97c	421	static cmd_tbl_t fpga_commands[] = {
f4c7a4ae	422	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
85754795 MS	423	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
	424	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
	425	U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
	426	#if defined(CONFIG_CMD_FPGA_LOADP)
	427	U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
	428	#endif
	429	#if defined(CONFIG_CMD_FPGA_LOADBP)
	430	U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
	431	#endif
9657d97c MS	432	};
	433
	434	static int do_fpga_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
	435	char *const argv[])
	436	{
	437	cmd_tbl_t *fpga_cmd;
	438	int ret;
	439
	440	if (argc < 2)
	441	return CMD_RET_USAGE;
	442
	443	fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
	444	ARRAY_SIZE(fpga_commands));
	445
	446	/* This should be removed when all functions are converted */
	447	if (!fpga_cmd)
	448	return do_fpga(cmdtp, flag, argc, argv);
	449
	450	/* FIXME This can't be reached till all functions are converted */
	451	if (!fpga_cmd) {
	452	debug("fpga: non existing command\n");
	453	return CMD_RET_USAGE;
	454	}
	455
	456	argc -= 2;
	457	argv += 2;
	458
	459	if (argc > fpga_cmd->maxargs) {
	460	debug("fpga: more parameters passed\n");
	461	return CMD_RET_USAGE;
	462	}
	463
	464	ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);
	465
	466	return cmd_process_error(fpga_cmd, ret);
	467	}
	468
cedd48e2	469	#if defined(CONFIG_CMD_FPGA_LOADFS) \|\| defined(CONFIG_CMD_FPGA_LOAD_SECURE)
9657d97c	470	U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
1a897668	471	#else
9657d97c	472	U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
1a897668	473	#endif
fc598412 MS	474	"loadable FPGA image support",
	475	"[operation type] [device number] [image address] [image size]\n"
	476	"fpga operations:\n"
2d73f0d6	477	" dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
fc598412 MS	478	" info\t[dev]\t\t\tlist known device information\n"
fc598412 MS	479	" load\t[dev] [address] [size]\tLoad device from memory buffer\n"
67193864 MS	480	#if defined(CONFIG_CMD_FPGA_LOADP)
	481	" loadp\t[dev] [address] [size]\t"
	482	"Load device from memory buffer with partial bitstream\n"
	483	#endif
fc598412 MS	484	" loadb\t[dev] [address] [size]\t"
fc598412 MS	485	"Load device from bitstream buffer (Xilinx only)\n"
67193864 MS	486	#if defined(CONFIG_CMD_FPGA_LOADBP)
	487	" loadbp\t[dev] [address] [size]\t"
	488	"Load device from bitstream buffer with partial bitstream"
	489	"(Xilinx only)\n"
	490	#endif
1a897668 SDPP	491	#if defined(CONFIG_CMD_FPGA_LOADFS)
	492	"Load device from filesystem (FAT by default) (Xilinx only)\n"
	493	" loadfs [dev] [address] [image size] [blocksize] <interface>\n"
	494	" [<dev[:part]>] <filename>\n"
	495	#endif
64e809af	496	#if defined(CONFIG_CMD_FPGA_LOADMK)
fc598412	497	" loadmk [dev] [address]\tLoad device generated with mkimage"
c28c4d19	498	#if defined(CONFIG_FIT)
fc598412 MS	499	"\n"
	500	"\tFor loadmk operating on FIT format uImage address must include\n"
	501	"\tsubimage unit name in the form of addr:<subimg_uname>"
c28c4d19	502	#endif
64e809af	503	#endif
cedd48e2 SDPP	504	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	505	"Load encrypted bitstream (Xilinx only)\n"
	506	" loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
	507	" [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
	508	"Loads the secure bistreams(authenticated/encrypted/both\n"
	509	"authenticated and encrypted) of [size] from [address].\n"
	510	"The auth-OCM/DDR flag specifies to perform authentication\n"
	511	"in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
	512	"The enc flag specifies which key to be used for decryption\n"
	513	"0-device key, 1-user key, 2-no encryption.\n"
	514	"The optional Userkey address specifies from which address key\n"
	515	"has to be used for decryption if user key is selected.\n"
	516	"NOTE: the sceure bitstream has to be created using xilinx\n"
	517	"bootgen tool only.\n"
	518	#endif
c28c4d19	519	);