[thirdparty/u-boot.git] / cmd / fpga.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2000, 2001
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 */

/*
 *  FPGA support
 */
#include <common.h>
#include <command.h>
#include <fpga.h>
#include <fs.h>
#include <malloc.h>

static long do_fpga_get_device(char *arg)
{
	long dev = FPGA_INVALID_DEVICE;
	char *devstr = env_get("fpga");

	if (devstr)
		/* Should be strtol to handle -1 cases */
		dev = simple_strtol(devstr, NULL, 16);

	if (dev == FPGA_INVALID_DEVICE && arg)
		dev = simple_strtol(arg, NULL, 16);

	debug("%s: device = %ld\n", __func__, dev);

	return dev;
}

static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
				cmd_tbl_t *cmdtp, int argc, char *const argv[])
{
	size_t local_data_size;
	long local_fpga_data;

	debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);

	if (argc != cmdtp->maxargs) {
		debug("fpga: incorrect parameters passed\n");
		return CMD_RET_USAGE;
	}

	*dev = do_fpga_get_device(argv[0]);

	local_fpga_data = simple_strtol(argv[1], NULL, 16);
	if (!local_fpga_data) {
		debug("fpga: zero fpga_data address\n");
		return CMD_RET_USAGE;
	}
	*fpga_data = local_fpga_data;

	local_data_size = simple_strtoul(argv[2], NULL, 16);
	if (!local_data_size) {
		debug("fpga: zero size\n");
		return CMD_RET_USAGE;
	}
	*data_size = local_data_size;

	return 0;
}

/* Local defines */
enum {
	FPGA_NONE = -1,
	FPGA_LOADS,
};

/*
 * Map op to supported operations.  We don't use a table since we
 * would just have to relocate it from flash anyway.
 */
static int fpga_get_op(char *opstr)
{
	int op = FPGA_NONE;

#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	if (!strcmp("loads", opstr))
		op = FPGA_LOADS;
#endif

	return op;
}

/* ------------------------------------------------------------------------- */
/* command form:
 *   fpga <op> <device number> <data addr> <datasize>
 * where op is 'load', 'dump', or 'info'
 * If there is no device number field, the fpga environment variable is used.
 * If there is no data addr field, the fpgadata environment variable is used.
 * The info command requires no data address field.
 */
int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
	int op, dev = FPGA_INVALID_DEVICE;
	size_t data_size = 0;
	void *fpga_data = NULL;
	int rc = FPGA_FAIL;
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	struct fpga_secure_info fpga_sec_info;

	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
#endif

	if (argc > 9 || argc < 2) {
		debug("%s: Too many or too few args (%d)\n", __func__, argc);
		return CMD_RET_USAGE;
	}

	op = fpga_get_op(argv[1]);

	switch (op) {
	case FPGA_NONE:
		printf("Unknown fpga operation \"%s\"\n", argv[1]);
		return CMD_RET_USAGE;
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	case FPGA_LOADS:
		if (argc < 7)
			return CMD_RET_USAGE;
		if (argc == 8)
			fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
						     simple_strtoull(argv[7],
								     NULL, 16);
		fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16);
		fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16);

		if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
		    fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
			puts("ERR: Use <fpga load> for NonSecure bitstream\n");
			return CMD_RET_USAGE;
		}

		if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
		    !fpga_sec_info.userkey_addr) {
			puts("ERR: User key not provided\n");
			return CMD_RET_USAGE;
		}

		argc = 5;
		break;
#endif
	default:
		break;
	}

	switch (argc) {
	case 5:		/* fpga <op> <dev> <data> <datasize> */
		data_size = simple_strtoul(argv[4], NULL, 16);
		if (!data_size) {
			puts("Zero data_size\n");
			return CMD_RET_USAGE;
		}
	case 4:		/* fpga <op> <dev> <data> */
		{
			fpga_data = (void *)simple_strtoul(argv[3], NULL, 16);
			debug("*  fpga: cmdline image address = 0x%08lx\n",
			      (ulong)fpga_data);
		}
		debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
		if (!fpga_data) {
			puts("Zero fpga_data address\n");
			return CMD_RET_USAGE;
		}
	case 3:		/* fpga <op> <dev | data addr> */
		dev = (int)simple_strtoul(argv[2], NULL, 16);
		debug("%s: device = %d\n", __func__, dev);
	}

	if (dev == FPGA_INVALID_DEVICE) {
		puts("FPGA device not specified\n");
		return CMD_RET_USAGE;
	}

	switch (op) {
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	case FPGA_LOADS:
		rc = fpga_loads(dev, fpga_data, data_size, &fpga_sec_info);
		break;
#endif

	default:
		printf("Unknown operation\n");
		return CMD_RET_USAGE;
	}
	return rc;
}

#if defined(CONFIG_CMD_FPGA_LOADFS)
static int do_fpga_loadfs(cmd_tbl_t *cmdtp, int flag, int argc,
			  char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;
	fpga_fs_info fpga_fsinfo;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	fpga_fsinfo.fstype = FS_TYPE_ANY;
	fpga_fsinfo.blocksize = (unsigned int)simple_strtoul(argv[3], NULL, 16);
	fpga_fsinfo.interface = argv[4];
	fpga_fsinfo.dev_part = argv[5];
	fpga_fsinfo.filename = argv[6];

	return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
}
#endif

static int do_fpga_info(cmd_tbl_t *cmdtp, int flag, int argc,
			char * const argv[])
{
	long dev = do_fpga_get_device(argv[0]);

	return fpga_info(dev);
}

static int do_fpga_dump(cmd_tbl_t *cmdtp, int flag, int argc,
			char * const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_dump(dev, (void *)fpga_data, data_size);
}

static int do_fpga_load(cmd_tbl_t *cmdtp, int flag, int argc,
			char * const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
}

static int do_fpga_loadb(cmd_tbl_t *cmdtp, int flag, int argc,
			 char * const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
}

#if defined(CONFIG_CMD_FPGA_LOADP)
static int do_fpga_loadp(cmd_tbl_t *cmdtp, int flag, int argc,
			 char * const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADBP)
static int do_fpga_loadbp(cmd_tbl_t *cmdtp, int flag, int argc,
			  char * const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
				  BIT_PARTIAL);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADMK)
static int do_fpga_loadmk(cmd_tbl_t *cmdtp, int flag, int argc,
			  char * const argv[])
{
	size_t data_size = 0;
	void *fpga_data = NULL;
#if defined(CONFIG_FIT)
	const char *fit_uname = NULL;
	ulong fit_addr;
#endif
	ulong dev = do_fpga_get_device(argv[0]);
	char *datastr = env_get("fpgadata");

	debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);

	if (dev == FPGA_INVALID_DEVICE) {
		debug("fpga: Invalid fpga device\n");
		return CMD_RET_USAGE;
	}

	if (argc == 0 && !datastr) {
		debug("fpga: No datastr passed\n");
		return CMD_RET_USAGE;
	}

	if (argc == 2) {
		datastr = argv[1];
		debug("fpga: Full command with two args\n");
	} else if (argc == 1 && !datastr) {
		debug("fpga: Dev is setup - fpgadata passed\n");
		datastr = argv[0];
	}

#if defined(CONFIG_FIT)
	if (fit_parse_subimage(datastr, (ulong)fpga_data,
			       &fit_addr, &fit_uname)) {
		fpga_data = (void *)fit_addr;
		debug("*  fpga: subimage '%s' from FIT image ",
		      fit_uname);
		debug("at 0x%08lx\n", fit_addr);
	} else
#endif
	{
		fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
		debug("*  fpga: cmdline image address = 0x%08lx\n",
		      (ulong)fpga_data);
	}
	debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
	if (!fpga_data) {
		puts("Zero fpga_data address\n");
		return CMD_RET_USAGE;
	}

	switch (genimg_get_format(fpga_data)) {
#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
	case IMAGE_FORMAT_LEGACY:
	{
		image_header_t *hdr = (image_header_t *)fpga_data;
		ulong data;
		u8 comp;

		comp = image_get_comp(hdr);
		if (comp == IH_COMP_GZIP) {
#if defined(CONFIG_GZIP)
			ulong image_buf = image_get_data(hdr);
			ulong image_size = ~0UL;

			data = image_get_load(hdr);

			if (gunzip((void *)data, ~0UL, (void *)image_buf,
				   &image_size) != 0) {
				puts("GUNZIP: error\n");
				return 1;
			}
			data_size = image_size;
#else
			puts("Gunzip image is not supported\n");
			return 1;
#endif
		} else {
			data = (ulong)image_get_data(hdr);
			data_size = image_get_data_size(hdr);
		}
		return fpga_load(dev, (void *)data, data_size,
				  BIT_FULL);
	}
#endif
#if defined(CONFIG_FIT)
	case IMAGE_FORMAT_FIT:
	{
		const void *fit_hdr = (const void *)fpga_data;
		int noffset;
		const void *fit_data;

		if (!fit_uname) {
			puts("No FIT subimage unit name\n");
			return 1;
		}

		if (!fit_check_format(fit_hdr)) {
			puts("Bad FIT image format\n");
			return 1;
		}

		/* get fpga component image node offset */
		noffset = fit_image_get_node(fit_hdr, fit_uname);
		if (noffset < 0) {
			printf("Can't find '%s' FIT subimage\n", fit_uname);
			return 1;
		}

		/* verify integrity */
		if (!fit_image_verify(fit_hdr, noffset)) {
			puts("Bad Data Hash\n");
			return 1;
		}

		/* get fpga subimage data address and length */
		if (fit_image_get_data(fit_hdr, noffset, &fit_data,
				       &data_size)) {
			puts("Fpga subimage data not found\n");
			return 1;
		}

		return fpga_load(dev, fit_data, data_size, BIT_FULL);
	}
#endif
	default:
		puts("** Unknown image type\n");
		return FPGA_FAIL;
	}
}
#endif

static cmd_tbl_t fpga_commands[] = {
	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
	U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
#if defined(CONFIG_CMD_FPGA_LOADP)
	U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADBP)
	U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
#endif
};

static int do_fpga_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
			   char *const argv[])
{
	cmd_tbl_t *fpga_cmd;
	int ret;

	if (argc < 2)
		return CMD_RET_USAGE;

	fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
				ARRAY_SIZE(fpga_commands));

	/* This should be removed when all functions are converted */
	if (!fpga_cmd)
		return do_fpga(cmdtp, flag, argc, argv);

	/* FIXME This can't be reached till all functions are converted */
	if (!fpga_cmd) {
		debug("fpga: non existing command\n");
		return CMD_RET_USAGE;
	}

	argc -= 2;
	argv += 2;

	if (argc > fpga_cmd->maxargs) {
		debug("fpga: more parameters passed\n");
		return CMD_RET_USAGE;
	}

	ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);

	return cmd_process_error(fpga_cmd, ret);
}

#if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
#else
U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
#endif
	   "loadable FPGA image support",
	   "[operation type] [device number] [image address] [image size]\n"
	   "fpga operations:\n"
	   "  dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
	   "  info\t[dev]\t\t\tlist known device information\n"
	   "  load\t[dev] [address] [size]\tLoad device from memory buffer\n"
#if defined(CONFIG_CMD_FPGA_LOADP)
	   "  loadp\t[dev] [address] [size]\t"
	   "Load device from memory buffer with partial bitstream\n"
#endif
	   "  loadb\t[dev] [address] [size]\t"
	   "Load device from bitstream buffer (Xilinx only)\n"
#if defined(CONFIG_CMD_FPGA_LOADBP)
	   "  loadbp\t[dev] [address] [size]\t"
	   "Load device from bitstream buffer with partial bitstream"
	   "(Xilinx only)\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	   "Load device from filesystem (FAT by default) (Xilinx only)\n"
	   "  loadfs [dev] [address] [image size] [blocksize] <interface>\n"
	   "        [<dev[:part]>] <filename>\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	   "  loadmk [dev] [address]\tLoad device generated with mkimage"
#if defined(CONFIG_FIT)
	   "\n"
	   "\tFor loadmk operating on FIT format uImage address must include\n"
	   "\tsubimage unit name in the form of addr:<subimg_uname>"
#endif
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	   "Load encrypted bitstream (Xilinx only)\n"
	   "  loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
	   "        [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
	   "Loads the secure bistreams(authenticated/encrypted/both\n"
	   "authenticated and encrypted) of [size] from [address].\n"
	   "The auth-OCM/DDR flag specifies to perform authentication\n"
	   "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
	   "The enc flag specifies which key to be used for decryption\n"
	   "0-device key, 1-user key, 2-no encryption.\n"
	   "The optional Userkey address specifies from which address key\n"
	   "has to be used for decryption if user key is selected.\n"
	   "NOTE: the sceure bitstream has to be created using xilinx\n"
	   "bootgen tool only.\n"
#endif
);
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
4a9cbbe8 WD	2	/*
	3	* (C) Copyright 2000, 2001
	4	* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4a9cbbe8 WD	5	*/
	6
	7	/*
	8	* FPGA support
	9	*/
	10	#include <common.h>
	11	#include <command.h>
8bde7f77	12	#include <fpga.h>
1a897668	13	#include <fs.h>
c3d2b4b4	14	#include <malloc.h>
4a9cbbe8	15
f4c7a4ae MS	16	static long do_fpga_get_device(char *arg)
	17	{
	18	long dev = FPGA_INVALID_DEVICE;
	19	char *devstr = env_get("fpga");
	20
	21	if (devstr)
	22	/* Should be strtol to handle -1 cases */
	23	dev = simple_strtol(devstr, NULL, 16);
	24
8c75f794	25	if (dev == FPGA_INVALID_DEVICE && arg)
f4c7a4ae MS	26	dev = simple_strtol(arg, NULL, 16);
	27
	28	debug("%s: device = %ld\n", __func__, dev);
	29
	30	return dev;
	31	}
	32
85754795 MS	33	static int do_fpga_check_params(long dev, long fpga_data, size_t *data_size,
	34	cmd_tbl_t cmdtp, int argc, char const argv[])
	35	{
	36	size_t local_data_size;
	37	long local_fpga_data;
	38
	39	debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);
	40
	41	if (argc != cmdtp->maxargs) {
	42	debug("fpga: incorrect parameters passed\n");
	43	return CMD_RET_USAGE;
	44	}
	45
	46	*dev = do_fpga_get_device(argv[0]);
	47
	48	local_fpga_data = simple_strtol(argv[1], NULL, 16);
	49	if (!local_fpga_data) {
	50	debug("fpga: zero fpga_data address\n");
	51	return CMD_RET_USAGE;
	52	}
	53	*fpga_data = local_fpga_data;
	54
	55	local_data_size = simple_strtoul(argv[2], NULL, 16);
	56	if (!local_data_size) {
	57	debug("fpga: zero size\n");
	58	return CMD_RET_USAGE;
	59	}
	60	*data_size = local_data_size;
	61
	62	return 0;
	63	}
	64
4a9cbbe8	65	/* Local defines */
5cf22289 MS	66	enum {
5cf22289 MS	67	FPGA_NONE = -1,
cedd48e2	68	FPGA_LOADS,
5cf22289	69	};
4a9cbbe8	70
323fe38e MS	71	/*
	72	* Map op to supported operations. We don't use a table since we
	73	* would just have to relocate it from flash anyway.
	74	*/
	75	static int fpga_get_op(char *opstr)
	76	{
	77	int op = FPGA_NONE;
	78
323fe38e	79	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
2892fe80	80	if (!strcmp("loads", opstr))
323fe38e MS	81	op = FPGA_LOADS;
	82	#endif
	83
	84	return op;
	85	}
	86
4a9cbbe8 WD	87	/* ------------------------------------------------------------------------- */
	88	/* command form:
	89	* fpga <op> <device number> <data addr> <datasize>
	90	* where op is 'load', 'dump', or 'info'
	91	* If there is no device number field, the fpga environment variable is used.
	92	* If there is no data addr field, the fpgadata environment variable is used.
	93	* The info command requires no data address field.
	94	*/
fc598412	95	int do_fpga(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
4a9cbbe8	96	{
d4ca31c4 WD	97	int op, dev = FPGA_INVALID_DEVICE;
	98	size_t data_size = 0;
	99	void *fpga_data = NULL;
d4ca31c4	100	int rc = FPGA_FAIL;
cedd48e2 SDPP	101	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	102	struct fpga_secure_info fpga_sec_info;
	103
	104	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
	105	#endif
d4ca31c4	106
f5953610 SDPP	107	if (argc > 9 \|\| argc < 2) {
	108	debug("%s: Too many or too few args (%d)\n", __func__, argc);
	109	return CMD_RET_USAGE;
	110	}
	111
323fe38e	112	op = fpga_get_op(argv[1]);
f5953610 SDPP	113
f5953610 SDPP	114	switch (op) {
55010969 MS	115	case FPGA_NONE:
	116	printf("Unknown fpga operation \"%s\"\n", argv[1]);
	117	return CMD_RET_USAGE;
cedd48e2 SDPP	118	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	119	case FPGA_LOADS:
	120	if (argc < 7)
	121	return CMD_RET_USAGE;
	122	if (argc == 8)
	123	fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
	124	simple_strtoull(argv[7],
	125	NULL, 16);
	126	fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16);
	127	fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16);
44d839bd MS	128
	129	if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
	130	fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
	131	puts("ERR: Use <fpga load> for NonSecure bitstream\n");
	132	return CMD_RET_USAGE;
	133	}
	134
	135	if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
	136	!fpga_sec_info.userkey_addr) {
	137	puts("ERR: User key not provided\n");
	138	return CMD_RET_USAGE;
	139	}
	140
cedd48e2 SDPP	141	argc = 5;
cedd48e2 SDPP	142	break;
1a897668	143	#endif
f5953610 SDPP	144	default:
	145	break;
	146	}
	147
	148	switch (argc) {
d4ca31c4	149	case 5: /* fpga <op> <dev> <data> <datasize> */
fc598412	150	data_size = simple_strtoul(argv[4], NULL, 16);
5cadab60 MS	151	if (!data_size) {
	152	puts("Zero data_size\n");
	153	return CMD_RET_USAGE;
	154	}
d4ca31c4	155	case 4: /* fpga <op> <dev> <data> */
c28c4d19	156	{
fc598412	157	fpga_data = (void *)simple_strtoul(argv[3], NULL, 16);
06297db0	158	debug("* fpga: cmdline image address = 0x%08lx\n",
fc598412	159	(ulong)fpga_data);
c28c4d19	160	}
455ad585	161	debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
5cadab60 MS	162	if (!fpga_data) {
	163	puts("Zero fpga_data address\n");
	164	return CMD_RET_USAGE;
	165	}
d4ca31c4	166	case 3: /* fpga <op> <dev \| data addr> */
fc598412	167	dev = (int)simple_strtoul(argv[2], NULL, 16);
06297db0	168	debug("%s: device = %d\n", __func__, dev);
d4ca31c4 WD	169	}
d4ca31c4 WD	170
a790b5b2 SB	171	if (dev == FPGA_INVALID_DEVICE) {
a790b5b2 SB	172	puts("FPGA device not specified\n");
ccd65203	173	return CMD_RET_USAGE;
a790b5b2 SB	174	}
a790b5b2 SB	175
d4ca31c4	176	switch (op) {
cedd48e2 SDPP	177	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	178	case FPGA_LOADS:
	179	rc = fpga_loads(dev, fpga_data, data_size, &fpga_sec_info);
	180	break;
	181	#endif
f0ff4692	182
d4ca31c4	183	default:
fc598412	184	printf("Unknown operation\n");
4c12eeb8	185	return CMD_RET_USAGE;
d4ca31c4	186	}
fc598412	187	return rc;
4a9cbbe8 WD	188	}
4a9cbbe8 WD	189
49503f9a MS	190	#if defined(CONFIG_CMD_FPGA_LOADFS)
	191	static int do_fpga_loadfs(cmd_tbl_t *cmdtp, int flag, int argc,
	192	char *const argv[])
	193	{
	194	size_t data_size = 0;
	195	long fpga_data, dev;
	196	int ret;
	197	fpga_fs_info fpga_fsinfo;
	198
	199	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	200	cmdtp, argc, argv);
	201	if (ret)
	202	return ret;
	203
	204	fpga_fsinfo.fstype = FS_TYPE_ANY;
	205	fpga_fsinfo.blocksize = (unsigned int)simple_strtoul(argv[3], NULL, 16);
	206	fpga_fsinfo.interface = argv[4];
	207	fpga_fsinfo.dev_part = argv[5];
	208	fpga_fsinfo.filename = argv[6];
	209
	210	return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
	211	}
	212	#endif
	213
f4c7a4ae MS	214	static int do_fpga_info(cmd_tbl_t *cmdtp, int flag, int argc,
	215	char * const argv[])
	216	{
	217	long dev = do_fpga_get_device(argv[0]);
	218
	219	return fpga_info(dev);
	220	}
	221
85754795 MS	222	static int do_fpga_dump(cmd_tbl_t *cmdtp, int flag, int argc,
	223	char * const argv[])
	224	{
	225	size_t data_size = 0;
	226	long fpga_data, dev;
	227	int ret;
	228
	229	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	230	cmdtp, argc, argv);
	231	if (ret)
	232	return ret;
	233
	234	return fpga_dump(dev, (void *)fpga_data, data_size);
	235	}
	236
	237	static int do_fpga_load(cmd_tbl_t *cmdtp, int flag, int argc,
	238	char * const argv[])
	239	{
	240	size_t data_size = 0;
	241	long fpga_data, dev;
	242	int ret;
	243
	244	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	245	cmdtp, argc, argv);
	246	if (ret)
	247	return ret;
	248
	249	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
	250	}
	251
	252	static int do_fpga_loadb(cmd_tbl_t *cmdtp, int flag, int argc,
	253	char * const argv[])
	254	{
	255	size_t data_size = 0;
	256	long fpga_data, dev;
	257	int ret;
	258
	259	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	260	cmdtp, argc, argv);
	261	if (ret)
	262	return ret;
	263
	264	return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
	265	}
	266
	267	#if defined(CONFIG_CMD_FPGA_LOADP)
	268	static int do_fpga_loadp(cmd_tbl_t *cmdtp, int flag, int argc,
	269	char * const argv[])
	270	{
	271	size_t data_size = 0;
	272	long fpga_data, dev;
	273	int ret;
	274
	275	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	276	cmdtp, argc, argv);
	277	if (ret)
	278	return ret;
	279
	280	return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
	281	}
	282	#endif
	283
	284	#if defined(CONFIG_CMD_FPGA_LOADBP)
	285	static int do_fpga_loadbp(cmd_tbl_t *cmdtp, int flag, int argc,
286	char * const argv[])
287	{
288	size_t data_size = 0;
289	long fpga_data, dev;
290	int ret;
291
292	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
293	cmdtp, argc, argv);
294	if (ret)
295	return ret;
296
297	return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
298	BIT_PARTIAL);
299	}
300	#endif
301
2892fe80 MS	302	#if defined(CONFIG_CMD_FPGA_LOADMK)
	303	static int do_fpga_loadmk(cmd_tbl_t *cmdtp, int flag, int argc,
	304	char * const argv[])
	305	{
	306	size_t data_size = 0;
	307	void *fpga_data = NULL;
	308	#if defined(CONFIG_FIT)
	309	const char *fit_uname = NULL;
	310	ulong fit_addr;
	311	#endif
	312	ulong dev = do_fpga_get_device(argv[0]);
	313	char *datastr = env_get("fpgadata");
	314
8c75f794 MS	315	debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);
	316
	317	if (dev == FPGA_INVALID_DEVICE) {
	318	debug("fpga: Invalid fpga device\n");
	319	return CMD_RET_USAGE;
	320	}
	321
	322	if (argc == 0 && !datastr) {
	323	debug("fpga: No datastr passed\n");
	324	return CMD_RET_USAGE;
	325	}
2892fe80 MS	326
2892fe80 MS	327	if (argc == 2) {
8c75f794 MS	328	datastr = argv[1];
	329	debug("fpga: Full command with two args\n");
	330	} else if (argc == 1 && !datastr) {
	331	debug("fpga: Dev is setup - fpgadata passed\n");
	332	datastr = argv[0];
	333	}
	334
2892fe80	335	#if defined(CONFIG_FIT)
8c75f794 MS	336	if (fit_parse_subimage(datastr, (ulong)fpga_data,
	337	&fit_addr, &fit_uname)) {
	338	fpga_data = (void *)fit_addr;
	339	debug("* fpga: subimage '%s' from FIT image ",
	340	fit_uname);
	341	debug("at 0x%08lx\n", fit_addr);
	342	} else
2892fe80	343	#endif
8c75f794 MS	344	{
	345	fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
	346	debug("* fpga: cmdline image address = 0x%08lx\n",
	347	(ulong)fpga_data);
	348	}
	349	debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
	350	if (!fpga_data) {
	351	puts("Zero fpga_data address\n");
	352	return CMD_RET_USAGE;
2892fe80 MS	353	}
	354
	355	switch (genimg_get_format(fpga_data)) {
	356	#if defined(CONFIG_IMAGE_FORMAT_LEGACY)
	357	case IMAGE_FORMAT_LEGACY:
	358	{
	359	image_header_t hdr = (image_header_t )fpga_data;
	360	ulong data;
	361	u8 comp;
	362
	363	comp = image_get_comp(hdr);
	364	if (comp == IH_COMP_GZIP) {
	365	#if defined(CONFIG_GZIP)
	366	ulong image_buf = image_get_data(hdr);
	367	ulong image_size = ~0UL;
	368
	369	data = image_get_load(hdr);
	370
	371	if (gunzip((void )data, ~0UL, (void )image_buf,
	372	&image_size) != 0) {
	373	puts("GUNZIP: error\n");
	374	return 1;
	375	}
	376	data_size = image_size;
	377	#else
	378	puts("Gunzip image is not supported\n");
	379	return 1;
	380	#endif
	381	} else {
	382	data = (ulong)image_get_data(hdr);
	383	data_size = image_get_data_size(hdr);
	384	}
	385	return fpga_load(dev, (void *)data, data_size,
	386	BIT_FULL);
	387	}
	388	#endif
	389	#if defined(CONFIG_FIT)
	390	case IMAGE_FORMAT_FIT:
	391	{
	392	const void fit_hdr = (const void )fpga_data;
	393	int noffset;
	394	const void *fit_data;
	395
	396	if (!fit_uname) {
	397	puts("No FIT subimage unit name\n");
	398	return 1;
	399	}
	400
	401	if (!fit_check_format(fit_hdr)) {
	402	puts("Bad FIT image format\n");
	403	return 1;
	404	}
	405
	406	/* get fpga component image node offset */
	407	noffset = fit_image_get_node(fit_hdr, fit_uname);
	408	if (noffset < 0) {
	409	printf("Can't find '%s' FIT subimage\n", fit_uname);
	410	return 1;
	411	}
	412
	413	/* verify integrity */
	414	if (!fit_image_verify(fit_hdr, noffset)) {
	415	puts("Bad Data Hash\n");
	416	return 1;
417	}
418
419	/* get fpga subimage data address and length */
420	if (fit_image_get_data(fit_hdr, noffset, &fit_data,
421	&data_size)) {
422	puts("Fpga subimage data not found\n");
423	return 1;
424	}
425
426	return fpga_load(dev, fit_data, data_size, BIT_FULL);
427	}
428	#endif
429	default:
430	puts("** Unknown image type\n");
431	return FPGA_FAIL;
432	}
433	}
434	#endif
435
9657d97c	436	static cmd_tbl_t fpga_commands[] = {
f4c7a4ae	437	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
85754795 MS	438	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
	439	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
	440	U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
	441	#if defined(CONFIG_CMD_FPGA_LOADP)
	442	U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
	443	#endif
	444	#if defined(CONFIG_CMD_FPGA_LOADBP)
	445	U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
	446	#endif
49503f9a MS	447	#if defined(CONFIG_CMD_FPGA_LOADFS)
	448	U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
	449	#endif
2892fe80 MS	450	#if defined(CONFIG_CMD_FPGA_LOADMK)
	451	U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
	452	#endif
9657d97c MS	453	};
	454
	455	static int do_fpga_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
	456	char *const argv[])
	457	{
	458	cmd_tbl_t *fpga_cmd;
	459	int ret;
	460
	461	if (argc < 2)
	462	return CMD_RET_USAGE;
	463
	464	fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
	465	ARRAY_SIZE(fpga_commands));
	466
	467	/* This should be removed when all functions are converted */
	468	if (!fpga_cmd)
	469	return do_fpga(cmdtp, flag, argc, argv);
	470
	471	/* FIXME This can't be reached till all functions are converted */
	472	if (!fpga_cmd) {
	473	debug("fpga: non existing command\n");
	474	return CMD_RET_USAGE;
	475	}
	476
	477	argc -= 2;
	478	argv += 2;
	479
	480	if (argc > fpga_cmd->maxargs) {
	481	debug("fpga: more parameters passed\n");
	482	return CMD_RET_USAGE;
	483	}
	484
	485	ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);
	486
	487	return cmd_process_error(fpga_cmd, ret);
	488	}
	489
cedd48e2	490	#if defined(CONFIG_CMD_FPGA_LOADFS) \|\| defined(CONFIG_CMD_FPGA_LOAD_SECURE)
9657d97c	491	U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
1a897668	492	#else
9657d97c	493	U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
1a897668	494	#endif
fc598412 MS	495	"loadable FPGA image support",
	496	"[operation type] [device number] [image address] [image size]\n"
	497	"fpga operations:\n"
2d73f0d6	498	" dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
fc598412 MS	499	" info\t[dev]\t\t\tlist known device information\n"
fc598412 MS	500	" load\t[dev] [address] [size]\tLoad device from memory buffer\n"
67193864 MS	501	#if defined(CONFIG_CMD_FPGA_LOADP)
	502	" loadp\t[dev] [address] [size]\t"
	503	"Load device from memory buffer with partial bitstream\n"
	504	#endif
fc598412 MS	505	" loadb\t[dev] [address] [size]\t"
fc598412 MS	506	"Load device from bitstream buffer (Xilinx only)\n"
67193864 MS	507	#if defined(CONFIG_CMD_FPGA_LOADBP)
	508	" loadbp\t[dev] [address] [size]\t"
	509	"Load device from bitstream buffer with partial bitstream"
	510	"(Xilinx only)\n"
	511	#endif
1a897668 SDPP	512	#if defined(CONFIG_CMD_FPGA_LOADFS)
	513	"Load device from filesystem (FAT by default) (Xilinx only)\n"
	514	" loadfs [dev] [address] [image size] [blocksize] <interface>\n"
	515	" [<dev[:part]>] <filename>\n"
	516	#endif
64e809af	517	#if defined(CONFIG_CMD_FPGA_LOADMK)
fc598412	518	" loadmk [dev] [address]\tLoad device generated with mkimage"
c28c4d19	519	#if defined(CONFIG_FIT)
fc598412 MS	520	"\n"
	521	"\tFor loadmk operating on FIT format uImage address must include\n"
	522	"\tsubimage unit name in the form of addr:<subimg_uname>"
c28c4d19	523	#endif
64e809af	524	#endif
cedd48e2 SDPP	525	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	526	"Load encrypted bitstream (Xilinx only)\n"
	527	" loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
	528	" [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
	529	"Loads the secure bistreams(authenticated/encrypted/both\n"
	530	"authenticated and encrypted) of [size] from [address].\n"
	531	"The auth-OCM/DDR flag specifies to perform authentication\n"
	532	"in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
	533	"The enc flag specifies which key to be used for decryption\n"
	534	"0-device key, 1-user key, 2-no encryption.\n"
	535	"The optional Userkey address specifies from which address key\n"
	536	"has to be used for decryption if user key is selected.\n"
	537	"NOTE: the sceure bitstream has to be created using xilinx\n"
	538	"bootgen tool only.\n"
	539	#endif
c28c4d19	540	);