[thirdparty/u-boot.git] / cmd / fpga.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2000, 2001
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 */

/*
 *  FPGA support
 */
#include <command.h>
#include <env.h>
#include <fpga.h>
#include <fs.h>
#include <gzip.h>
#include <image.h>
#include <log.h>
#include <malloc.h>

static long do_fpga_get_device(char *arg)
{
	long dev = FPGA_INVALID_DEVICE;
	char *devstr = env_get("fpga");

	if (devstr)
		/* Should be strtol to handle -1 cases */
		dev = simple_strtol(devstr, NULL, 16);

	if (dev == FPGA_INVALID_DEVICE && arg)
		dev = simple_strtol(arg, NULL, 16);

	log_debug("device = %ld\n", dev);

	return dev;
}

static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
				struct cmd_tbl *cmdtp, int argc,
				char *const argv[])
{
	size_t local_data_size;
	long local_fpga_data;

	log_debug("%d, %d\n", argc, cmdtp->maxargs);

	if (argc != cmdtp->maxargs) {
		log_err("Incorrect number of parameters passed\n");
		return CMD_RET_FAILURE;
	}

	*dev = do_fpga_get_device(argv[0]);

	local_fpga_data = simple_strtol(argv[1], NULL, 16);
	if (!local_fpga_data) {
		log_err("Zero fpga_data address\n");
		return CMD_RET_FAILURE;
	}
	*fpga_data = local_fpga_data;

	local_data_size = hextoul(argv[2], NULL);
	if (!local_data_size) {
		log_err("Zero size\n");
		return CMD_RET_FAILURE;
	}
	*data_size = local_data_size;

	return 0;
}

#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
static int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc,
			 char *const argv[])
{
	struct fpga_secure_info fpga_sec_info;
	const int pos_userkey = 5;
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));

	if (argc < pos_userkey) {
		log_err("Too few parameters passed\n");
		return CMD_RET_FAILURE;
	}

	if (argc == pos_userkey + 1)
		fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
					      simple_strtoull(argv[pos_userkey],
							      NULL, 16);
	else
		/*
		 * If 6th parameter is not passed then do_fpga_check_params
		 * will get 5 instead of expected 6 which means that function
		 * return CMD_RET_FAILURE. Increase number of params +1 to pass
		 * this.
		 */
		argc++;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	fpga_sec_info.encflag = (u8)hextoul(argv[4], NULL);
	fpga_sec_info.authflag = (u8)hextoul(argv[3], NULL);

	if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
	    fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
		log_err("Use <fpga load> for NonSecure bitstream\n");
		return CMD_RET_FAILURE;
	}

	if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
	    !fpga_sec_info.userkey_addr) {
		log_err("User key not provided\n");
		return CMD_RET_FAILURE;
	}

	return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADFS)
static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
			  char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;
	fpga_fs_info fpga_fsinfo;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	fpga_fsinfo.fstype = FS_TYPE_ANY;
	fpga_fsinfo.blocksize = (unsigned int)hextoul(argv[3], NULL);
	fpga_fsinfo.interface = argv[4];
	fpga_fsinfo.dev_part = argv[5];
	fpga_fsinfo.filename = argv[6];

	return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
}
#endif

static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
			char *const argv[])
{
	long dev = do_fpga_get_device(argv[0]);

	return fpga_info(dev);
}

static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
			char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_dump(dev, (void *)fpga_data, data_size);
}

static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
			char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, 0);
}

#if defined(CONFIG_CMD_FPGA_LOADB)
static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
			 char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
}
#endif
#if defined(CONFIG_CMD_FPGA_LOADP)
static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
			 char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, 0);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADBP)
static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
			  char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
				  BIT_PARTIAL);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADMK)
static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
			  char *const argv[])
{
	size_t data_size = 0;
	void *fpga_data = NULL;
#if defined(CONFIG_FIT)
	const char *fit_uname = NULL;
	ulong fit_addr;
#endif
	ulong dev = do_fpga_get_device(argv[0]);
	char *datastr = env_get("fpgadata");

	log_debug("argc %x, dev %lx, datastr %s\n", argc, dev, datastr);

	if (dev == FPGA_INVALID_DEVICE) {
		log_err("Invalid fpga device\n");
		return CMD_RET_FAILURE;
	}

	if (argc == 0 && !datastr) {
		log_err("No datastr passed\n");
		return CMD_RET_FAILURE;
	}

	if (argc == 2) {
		datastr = argv[1];
		log_debug("Full command with two args\n");
	} else if (argc == 1 && !datastr) {
		log_debug("Dev is setup - fpgadata passed\n");
		datastr = argv[0];
	}

#if defined(CONFIG_FIT)
	if (fit_parse_subimage(datastr, (ulong)fpga_data,
			       &fit_addr, &fit_uname)) {
		fpga_data = (void *)fit_addr;
		log_debug("*  fpga: subimage '%s' from FIT image ",
			  fit_uname);
		log_debug("at 0x%08lx\n", fit_addr);
	} else
#endif
	{
		fpga_data = (void *)hextoul(datastr, NULL);
		log_debug("*  fpga: cmdline image address = 0x%08lx\n",
			  (ulong)fpga_data);
	}
	log_debug("fpga_data = 0x%lx\n", (ulong)fpga_data);
	if (!fpga_data) {
		log_err("Zero fpga_data address\n");
		return CMD_RET_FAILURE;
	}

	switch (genimg_get_format(fpga_data)) {
#if defined(CONFIG_LEGACY_IMAGE_FORMAT)
	case IMAGE_FORMAT_LEGACY:
	{
		struct legacy_img_hdr *hdr = (struct legacy_img_hdr *)fpga_data;
		ulong data;
		u8 comp;

		comp = image_get_comp(hdr);
		if (comp == IH_COMP_GZIP) {
#if defined(CONFIG_GZIP)
			ulong image_buf = image_get_data(hdr);
			ulong image_size = ~0UL;

			data = image_get_load(hdr);

			if (gunzip((void *)data, ~0U, (void *)image_buf,
				   &image_size) != 0) {
				log_err("Gunzip error\n");
				return CMD_RET_FAILURE;
			}
			data_size = image_size;
#else
			log_err("Gunzip image is not supported\n");
			return CMD_RET_FAILURE;
#endif
		} else {
			data = (ulong)image_get_data(hdr);
			data_size = image_get_data_size(hdr);
		}
		return fpga_load(dev, (void *)data, data_size,
				  BIT_FULL, 0);
	}
#endif
#if defined(CONFIG_FIT)
	case IMAGE_FORMAT_FIT:
	{
		const void *fit_hdr = (const void *)fpga_data;
		int err;
		const void *fit_data;

		if (!fit_uname) {
			log_err("No FIT subimage unit name\n");
			return CMD_RET_FAILURE;
		}

		if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) {
			log_err("Bad FIT image format\n");
			return CMD_RET_FAILURE;
		}

		err = fit_get_data_node(fit_hdr, fit_uname, &fit_data,
					&data_size);
		if (err) {
			printf("Could not load '%s' subimage (err %d)\n",
			       fit_uname, err);
			return CMD_RET_FAILURE;
		}

		return fpga_load(dev, fit_data, data_size, BIT_FULL, 0);
	}
#endif
	default:
		log_err("Unknown image type\n");
		return CMD_RET_FAILURE;
	}
}
#endif

static struct cmd_tbl fpga_commands[] = {
	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
#if defined(CONFIG_CMD_FPGA_LOADB)
	U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADP)
	U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADBP)
	U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
#endif
};

static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
			   char *const argv[])
{
	struct cmd_tbl *fpga_cmd;
	int ret;

	if (argc < 2)
		return CMD_RET_USAGE;

	fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
				ARRAY_SIZE(fpga_commands));
	if (!fpga_cmd) {
		log_err("Non existing command\n");
		return CMD_RET_FAILURE;
	}

	argc -= 2;
	argv += 2;

	if (argc > fpga_cmd->maxargs) {
		log_err("Too many parameters passed\n");
		return CMD_RET_FAILURE;
	}

	ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);

	return cmd_process_error(fpga_cmd, ret);
}

#if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
#else
U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
#endif
	 "loadable FPGA image support",
	 "info   [dev]                  List known device information\n"
	 "fpga dump   <dev> <address> <size> Load device to memory buffer\n"
	 "fpga load   <dev> <address> <size> Load device from memory buffer\n"
#if defined(CONFIG_CMD_FPGA_LOADP)
	 "fpga loadb  <dev> <address> <size> Load device from bitstream buffer\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADP)
	 "fpga loadp  <dev> <address> <size> Load device from memory buffer\n"
	 "            with partial bitstream\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADBP)
	 "fpga loadbp <dev> <address> <size> Load device from bitstream buffer\n"
	 "             with partial bitstream\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	 "fpga loadfs <dev> <address> <size> <blocksize> <interface> [<dev[:part]>] <filename>\n"
	 "            Load device from filesystem (FAT by default)\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	 "fpga loadmk <dev> <address>        Load device generated with mkimage\n"
#if defined(CONFIG_FIT)
	 "            NOTE: loadmk operating on FIT must include subimage unit\n"
	 "            name in the form of addr:<subimg_uname>\n"
#endif
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	 "fpga loads  <dev> <address> <size> <authflag> <encflag> [Userkey address]\n"
	 "            Load device from memory buffer with secure bistream\n"
	 "            (authenticated/encrypted/both)\n"
	 "            -authflag: 0 for OCM, 1 for DDR, 2 for no authentication\n"
	 "            (specifies where to perform authentication)\n"
	 "            -encflag: 0 for device key, 1 for user key, 2 for no encryption\n"
	 "            -Userkey address: address where user key is stored\n"
	 "            NOTE: secure bitstream has to be created using Xilinx bootgen tool\n"
#endif
);
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
4a9cbbe8 WD	2	/*
	3	* (C) Copyright 2000, 2001
	4	* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4a9cbbe8 WD	5	*/
	6
	7	/*
	8	* FPGA support
	9	*/
4a9cbbe8	10	#include <command.h>
7b51b576	11	#include <env.h>
8bde7f77	12	#include <fpga.h>
1a897668	13	#include <fs.h>
0c670fc1	14	#include <gzip.h>
4d72caa5	15	#include <image.h>
f7ae49fc	16	#include <log.h>
c3d2b4b4	17	#include <malloc.h>
4a9cbbe8	18
f4c7a4ae MS	19	static long do_fpga_get_device(char *arg)
	20	{
	21	long dev = FPGA_INVALID_DEVICE;
	22	char *devstr = env_get("fpga");
	23
	24	if (devstr)
	25	/* Should be strtol to handle -1 cases */
	26	dev = simple_strtol(devstr, NULL, 16);
	27
8c75f794	28	if (dev == FPGA_INVALID_DEVICE && arg)
f4c7a4ae MS	29	dev = simple_strtol(arg, NULL, 16);
f4c7a4ae MS	30
f08dcc55	31	log_debug("device = %ld\n", dev);
f4c7a4ae MS	32
	33	return dev;
	34	}
	35
85754795	36	static int do_fpga_check_params(long dev, long fpga_data, size_t *data_size,
09140113 SG	37	struct cmd_tbl *cmdtp, int argc,
09140113 SG	38	char *const argv[])
85754795 MS	39	{
	40	size_t local_data_size;
	41	long local_fpga_data;
	42
f08dcc55	43	log_debug("%d, %d\n", argc, cmdtp->maxargs);
85754795 MS	44
85754795 MS	45	if (argc != cmdtp->maxargs) {
f08dcc55 PVT	46	log_err("Incorrect number of parameters passed\n");
f08dcc55 PVT	47	return CMD_RET_FAILURE;
85754795 MS	48	}
	49
	50	*dev = do_fpga_get_device(argv[0]);
	51
	52	local_fpga_data = simple_strtol(argv[1], NULL, 16);
	53	if (!local_fpga_data) {
f08dcc55 PVT	54	log_err("Zero fpga_data address\n");
f08dcc55 PVT	55	return CMD_RET_FAILURE;
85754795 MS	56	}
	57	*fpga_data = local_fpga_data;
	58
7e5f460e	59	local_data_size = hextoul(argv[2], NULL);
85754795	60	if (!local_data_size) {
f08dcc55 PVT	61	log_err("Zero size\n");
f08dcc55 PVT	62	return CMD_RET_FAILURE;
85754795 MS	63	}
	64	*data_size = local_data_size;
	65
	66	return 0;
	67	}
	68
323fe38e	69	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
6b82252c MS	70	static int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc,
6b82252c MS	71	char *const argv[])
4a9cbbe8	72	{
f08dcc55 PVT	73	struct fpga_secure_info fpga_sec_info;
f08dcc55 PVT	74	const int pos_userkey = 5;
d4ca31c4	75	size_t data_size = 0;
b5d19a93 MS	76	long fpga_data, dev;
b5d19a93 MS	77	int ret;
cedd48e2 SDPP	78
cedd48e2 SDPP	79	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
d4ca31c4	80
f08dcc55 PVT	81	if (argc < pos_userkey) {
	82	log_err("Too few parameters passed\n");
	83	return CMD_RET_FAILURE;
f5953610 SDPP	84	}
f5953610 SDPP	85
f08dcc55	86	if (argc == pos_userkey + 1)
b5d19a93	87	fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
f08dcc55	88	simple_strtoull(argv[pos_userkey],
b5d19a93 MS	89	NULL, 16);
	90	else
	91	/*
	92	* If 6th parameter is not passed then do_fpga_check_params
	93	* will get 5 instead of expected 6 which means that function
f08dcc55	94	* return CMD_RET_FAILURE. Increase number of params +1 to pass
b5d19a93 MS	95	* this.
	96	*/
	97	argc++;
	98
f08dcc55 PVT	99	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	100	cmdtp, argc, argv);
	101	if (ret)
	102	return ret;
	103
7e5f460e SG	104	fpga_sec_info.encflag = (u8)hextoul(argv[4], NULL);
7e5f460e SG	105	fpga_sec_info.authflag = (u8)hextoul(argv[3], NULL);
b5d19a93 MS	106
	107	if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
	108	fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
f08dcc55 PVT	109	log_err("Use <fpga load> for NonSecure bitstream\n");
f08dcc55 PVT	110	return CMD_RET_FAILURE;
f5953610 SDPP	111	}
f5953610 SDPP	112
b5d19a93 MS	113	if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
b5d19a93 MS	114	!fpga_sec_info.userkey_addr) {
f08dcc55 PVT	115	log_err("User key not provided\n");
f08dcc55 PVT	116	return CMD_RET_FAILURE;
a790b5b2 SB	117	}
a790b5b2 SB	118
b5d19a93	119	return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
4a9cbbe8	120	}
b5d19a93	121	#endif
4a9cbbe8	122
49503f9a	123	#if defined(CONFIG_CMD_FPGA_LOADFS)
09140113	124	static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
49503f9a MS	125	char *const argv[])
	126	{
	127	size_t data_size = 0;
	128	long fpga_data, dev;
	129	int ret;
	130	fpga_fs_info fpga_fsinfo;
	131
	132	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	133	cmdtp, argc, argv);
	134	if (ret)
	135	return ret;
	136
	137	fpga_fsinfo.fstype = FS_TYPE_ANY;
7e5f460e	138	fpga_fsinfo.blocksize = (unsigned int)hextoul(argv[3], NULL);
49503f9a MS	139	fpga_fsinfo.interface = argv[4];
	140	fpga_fsinfo.dev_part = argv[5];
	141	fpga_fsinfo.filename = argv[6];
	142
	143	return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
	144	}
	145	#endif
	146
09140113 SG	147	static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	148	char *const argv[])
f4c7a4ae MS	149	{
	150	long dev = do_fpga_get_device(argv[0]);
	151
	152	return fpga_info(dev);
	153	}
	154
09140113 SG	155	static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	156	char *const argv[])
85754795 MS	157	{
	158	size_t data_size = 0;
	159	long fpga_data, dev;
	160	int ret;
	161
	162	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	163	cmdtp, argc, argv);
	164	if (ret)
	165	return ret;
	166
	167	return fpga_dump(dev, (void *)fpga_data, data_size);
	168	}
	169
09140113 SG	170	static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	171	char *const argv[])
85754795 MS	172	{
	173	size_t data_size = 0;
	174	long fpga_data, dev;
	175	int ret;
	176
	177	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	178	cmdtp, argc, argv);
	179	if (ret)
	180	return ret;
	181
282eed50	182	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, 0);
85754795 MS	183	}
85754795 MS	184
f8f37887	185	#if defined(CONFIG_CMD_FPGA_LOADB)
09140113 SG	186	static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	187	char *const argv[])
85754795 MS	188	{
	189	size_t data_size = 0;
	190	long fpga_data, dev;
	191	int ret;
	192
	193	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	194	cmdtp, argc, argv);
	195	if (ret)
	196	return ret;
	197
	198	return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
	199	}
f8f37887	200	#endif
85754795	201	#if defined(CONFIG_CMD_FPGA_LOADP)
09140113 SG	202	static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	203	char *const argv[])
85754795 MS	204	{
	205	size_t data_size = 0;
	206	long fpga_data, dev;
	207	int ret;
	208
	209	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	210	cmdtp, argc, argv);
	211	if (ret)
	212	return ret;
	213
282eed50	214	return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, 0);
85754795 MS	215	}
	216	#endif
	217
	218	#if defined(CONFIG_CMD_FPGA_LOADBP)
09140113 SG	219	static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	220	char *const argv[])
85754795 MS	221	{
	222	size_t data_size = 0;
	223	long fpga_data, dev;
	224	int ret;
	225
	226	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	227	cmdtp, argc, argv);
	228	if (ret)
	229	return ret;
	230
	231	return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
	232	BIT_PARTIAL);
	233	}
	234	#endif
	235
2892fe80	236	#if defined(CONFIG_CMD_FPGA_LOADMK)
09140113 SG	237	static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	238	char *const argv[])
2892fe80 MS	239	{
	240	size_t data_size = 0;
	241	void *fpga_data = NULL;
	242	#if defined(CONFIG_FIT)
	243	const char *fit_uname = NULL;
	244	ulong fit_addr;
	245	#endif
	246	ulong dev = do_fpga_get_device(argv[0]);
	247	char *datastr = env_get("fpgadata");
	248
f08dcc55	249	log_debug("argc %x, dev %lx, datastr %s\n", argc, dev, datastr);
8c75f794 MS	250
8c75f794 MS	251	if (dev == FPGA_INVALID_DEVICE) {
f08dcc55 PVT	252	log_err("Invalid fpga device\n");
f08dcc55 PVT	253	return CMD_RET_FAILURE;
8c75f794 MS	254	}
	255
	256	if (argc == 0 && !datastr) {
f08dcc55 PVT	257	log_err("No datastr passed\n");
f08dcc55 PVT	258	return CMD_RET_FAILURE;
8c75f794	259	}
2892fe80 MS	260
2892fe80 MS	261	if (argc == 2) {
8c75f794	262	datastr = argv[1];
f08dcc55	263	log_debug("Full command with two args\n");
8c75f794	264	} else if (argc == 1 && !datastr) {
f08dcc55	265	log_debug("Dev is setup - fpgadata passed\n");
8c75f794 MS	266	datastr = argv[0];
	267	}
	268
2892fe80	269	#if defined(CONFIG_FIT)
8c75f794 MS	270	if (fit_parse_subimage(datastr, (ulong)fpga_data,
	271	&fit_addr, &fit_uname)) {
	272	fpga_data = (void *)fit_addr;
f08dcc55 PVT	273	log_debug("* fpga: subimage '%s' from FIT image ",
	274	fit_uname);
	275	log_debug("at 0x%08lx\n", fit_addr);
8c75f794	276	} else
2892fe80	277	#endif
8c75f794	278	{
7e5f460e	279	fpga_data = (void *)hextoul(datastr, NULL);
f08dcc55 PVT	280	log_debug("* fpga: cmdline image address = 0x%08lx\n",
f08dcc55 PVT	281	(ulong)fpga_data);
8c75f794	282	}
f08dcc55	283	log_debug("fpga_data = 0x%lx\n", (ulong)fpga_data);
8c75f794	284	if (!fpga_data) {
f08dcc55 PVT	285	log_err("Zero fpga_data address\n");
f08dcc55 PVT	286	return CMD_RET_FAILURE;
2892fe80 MS	287	}
	288
	289	switch (genimg_get_format(fpga_data)) {
c76c93a3	290	#if defined(CONFIG_LEGACY_IMAGE_FORMAT)
2892fe80 MS	291	case IMAGE_FORMAT_LEGACY:
2892fe80 MS	292	{
f3543e69	293	struct legacy_img_hdr hdr = (struct legacy_img_hdr )fpga_data;
2892fe80 MS	294	ulong data;
	295	u8 comp;
	296
	297	comp = image_get_comp(hdr);
	298	if (comp == IH_COMP_GZIP) {
	299	#if defined(CONFIG_GZIP)
	300	ulong image_buf = image_get_data(hdr);
	301	ulong image_size = ~0UL;
	302
	303	data = image_get_load(hdr);
	304
53a10c8c	305	if (gunzip((void )data, ~0U, (void )image_buf,
2892fe80	306	&image_size) != 0) {
f08dcc55	307	log_err("Gunzip error\n");
a2d1033b	308	return CMD_RET_FAILURE;
2892fe80 MS	309	}
	310	data_size = image_size;
	311	#else
f08dcc55 PVT	312	log_err("Gunzip image is not supported\n");
f08dcc55 PVT	313	return CMD_RET_FAILURE;
2892fe80 MS	314	#endif
	315	} else {
	316	data = (ulong)image_get_data(hdr);
	317	data_size = image_get_data_size(hdr);
	318	}
	319	return fpga_load(dev, (void *)data, data_size,
282eed50	320	BIT_FULL, 0);
2892fe80 MS	321	}
	322	#endif
	323	#if defined(CONFIG_FIT)
	324	case IMAGE_FORMAT_FIT:
	325	{
	326	const void fit_hdr = (const void )fpga_data;
7b42bde0	327	int err;
2892fe80 MS	328	const void *fit_data;
	329
	330	if (!fit_uname) {
f08dcc55	331	log_err("No FIT subimage unit name\n");
a2d1033b	332	return CMD_RET_FAILURE;
2892fe80 MS	333	}
2892fe80 MS	334
c5819701	335	if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) {
f08dcc55	336	log_err("Bad FIT image format\n");
a2d1033b	337	return CMD_RET_FAILURE;
2892fe80 MS	338	}
2892fe80 MS	339
7b42bde0 SA	340	err = fit_get_data_node(fit_hdr, fit_uname, &fit_data,
	341	&data_size);
	342	if (err) {
	343	printf("Could not load '%s' subimage (err %d)\n",
	344	fit_uname, err);
a2d1033b	345	return CMD_RET_FAILURE;
2892fe80 MS	346	}
2892fe80 MS	347
282eed50	348	return fpga_load(dev, fit_data, data_size, BIT_FULL, 0);
2892fe80 MS	349	}
	350	#endif
	351	default:
f08dcc55	352	log_err("Unknown image type\n");
a2d1033b	353	return CMD_RET_FAILURE;
2892fe80 MS	354	}
	355	}
	356	#endif
	357
09140113	358	static struct cmd_tbl fpga_commands[] = {
f4c7a4ae	359	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
85754795 MS	360	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
85754795 MS	361	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
f8f37887	362	#if defined(CONFIG_CMD_FPGA_LOADB)
85754795	363	U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
f8f37887	364	#endif
85754795 MS	365	#if defined(CONFIG_CMD_FPGA_LOADP)
	366	U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
	367	#endif
	368	#if defined(CONFIG_CMD_FPGA_LOADBP)
	369	U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
	370	#endif
49503f9a MS	371	#if defined(CONFIG_CMD_FPGA_LOADFS)
	372	U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
	373	#endif
2892fe80 MS	374	#if defined(CONFIG_CMD_FPGA_LOADMK)
	375	U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
	376	#endif
b5d19a93 MS	377	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	378	U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
	379	#endif
9657d97c MS	380	};
9657d97c MS	381
09140113	382	static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
9657d97c MS	383	char *const argv[])
9657d97c MS	384	{
09140113	385	struct cmd_tbl *fpga_cmd;
9657d97c MS	386	int ret;
	387
	388	if (argc < 2)
	389	return CMD_RET_USAGE;
	390
	391	fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
	392	ARRAY_SIZE(fpga_commands));
9657d97c	393	if (!fpga_cmd) {
f08dcc55 PVT	394	log_err("Non existing command\n");
f08dcc55 PVT	395	return CMD_RET_FAILURE;
9657d97c MS	396	}
	397
	398	argc -= 2;
	399	argv += 2;
	400
	401	if (argc > fpga_cmd->maxargs) {
f08dcc55 PVT	402	log_err("Too many parameters passed\n");
f08dcc55 PVT	403	return CMD_RET_FAILURE;
9657d97c MS	404	}
	405
	406	ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);
	407
	408	return cmd_process_error(fpga_cmd, ret);
	409	}
	410
cedd48e2	411	#if defined(CONFIG_CMD_FPGA_LOADFS) \|\| defined(CONFIG_CMD_FPGA_LOAD_SECURE)
9657d97c	412	U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
1a897668	413	#else
9657d97c	414	U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
1a897668	415	#endif
c0fed34e IE	416	"loadable FPGA image support",
	417	"info [dev] List known device information\n"
	418	"fpga dump <dev> <address> <size> Load device to memory buffer\n"
	419	"fpga load <dev> <address> <size> Load device from memory buffer\n"
f8f37887	420	#if defined(CONFIG_CMD_FPGA_LOADP)
49373922	421	"fpga loadb <dev> <address> <size> Load device from bitstream buffer\n"
f8f37887	422	#endif
67193864	423	#if defined(CONFIG_CMD_FPGA_LOADP)
c0fed34e IE	424	"fpga loadp <dev> <address> <size> Load device from memory buffer\n"
c0fed34e IE	425	" with partial bitstream\n"
67193864	426	#endif
67193864	427	#if defined(CONFIG_CMD_FPGA_LOADBP)
c0fed34e	428	"fpga loadbp <dev> <address> <size> Load device from bitstream buffer\n"
ce54f50c	429	" with partial bitstream\n"
67193864	430	#endif
1a897668	431	#if defined(CONFIG_CMD_FPGA_LOADFS)
c0fed34e	432	"fpga loadfs <dev> <address> <size> <blocksize> <interface> [<dev[:part]>] <filename>\n"
ce54f50c	433	" Load device from filesystem (FAT by default)\n"
1a897668	434	#endif
64e809af	435	#if defined(CONFIG_CMD_FPGA_LOADMK)
c0fed34e	436	"fpga loadmk <dev> <address> Load device generated with mkimage\n"
c28c4d19	437	#if defined(CONFIG_FIT)
c0fed34e IE	438	" NOTE: loadmk operating on FIT must include subimage unit\n"
c0fed34e IE	439	" name in the form of addr:<subimg_uname>\n"
c28c4d19	440	#endif
64e809af	441	#endif
cedd48e2	442	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
d2619de2 IE	443	"fpga loads <dev> <address> <size> <authflag> <encflag> [Userkey address]\n"
d2619de2 IE	444	" Load device from memory buffer with secure bistream\n"
ce54f50c	445	" (authenticated/encrypted/both)\n"
d2619de2 IE	446	" -authflag: 0 for OCM, 1 for DDR, 2 for no authentication\n"
	447	" (specifies where to perform authentication)\n"
	448	" -encflag: 0 for device key, 1 for user key, 2 for no encryption\n"
	449	" -Userkey address: address where user key is stored\n"
	450	" NOTE: secure bitstream has to be created using Xilinx bootgen tool\n"
cedd48e2	451	#endif
c28c4d19	452	);