[thirdparty/u-boot.git] / cmd / fpga.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2000, 2001
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 */

/*
 *  FPGA support
 */
#include <command.h>
#include <env.h>
#include <fpga.h>
#include <fs.h>
#include <gzip.h>
#include <image.h>
#include <log.h>
#include <malloc.h>

static long do_fpga_get_device(char *arg)
{
	long dev = FPGA_INVALID_DEVICE;
	char *devstr = env_get("fpga");

	if (devstr)
		/* Should be strtol to handle -1 cases */
		dev = simple_strtol(devstr, NULL, 16);

	if (dev == FPGA_INVALID_DEVICE && arg)
		dev = simple_strtol(arg, NULL, 16);

	debug("%s: device = %ld\n", __func__, dev);

	return dev;
}

static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
				struct cmd_tbl *cmdtp, int argc,
				char *const argv[])
{
	size_t local_data_size;
	long local_fpga_data;

	debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);

	if (argc != cmdtp->maxargs) {
		debug("fpga: incorrect parameters passed\n");
		return CMD_RET_USAGE;
	}

	*dev = do_fpga_get_device(argv[0]);

	local_fpga_data = simple_strtol(argv[1], NULL, 16);
	if (!local_fpga_data) {
		debug("fpga: zero fpga_data address\n");
		return CMD_RET_USAGE;
	}
	*fpga_data = local_fpga_data;

	local_data_size = hextoul(argv[2], NULL);
	if (!local_data_size) {
		debug("fpga: zero size\n");
		return CMD_RET_USAGE;
	}
	*data_size = local_data_size;

	return 0;
}

#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;
	struct fpga_secure_info fpga_sec_info;

	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));

	if (argc < 5) {
		debug("fpga: incorrect parameters passed\n");
		return CMD_RET_USAGE;
	}

	if (argc == 6)
		fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
					      simple_strtoull(argv[5],
							      NULL, 16);
	else
		/*
		 * If 6th parameter is not passed then do_fpga_check_params
		 * will get 5 instead of expected 6 which means that function
		 * return CMD_RET_USAGE. Increase number of params +1 to pass
		 * this.
		 */
		argc++;

	fpga_sec_info.encflag = (u8)hextoul(argv[4], NULL);
	fpga_sec_info.authflag = (u8)hextoul(argv[3], NULL);

	if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
	    fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
		debug("fpga: Use <fpga load> for NonSecure bitstream\n");
		return CMD_RET_USAGE;
	}

	if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
	    !fpga_sec_info.userkey_addr) {
		debug("fpga: User key not provided\n");
		return CMD_RET_USAGE;
	}

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADFS)
static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
			  char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;
	fpga_fs_info fpga_fsinfo;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	fpga_fsinfo.fstype = FS_TYPE_ANY;
	fpga_fsinfo.blocksize = (unsigned int)hextoul(argv[3], NULL);
	fpga_fsinfo.interface = argv[4];
	fpga_fsinfo.dev_part = argv[5];
	fpga_fsinfo.filename = argv[6];

	return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
}
#endif

static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
			char *const argv[])
{
	long dev = do_fpga_get_device(argv[0]);

	return fpga_info(dev);
}

static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
			char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_dump(dev, (void *)fpga_data, data_size);
}

static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
			char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, 0);
}

static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
			 char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
}

#if defined(CONFIG_CMD_FPGA_LOADP)
static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
			 char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, 0);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADBP)
static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
			  char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
				  BIT_PARTIAL);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADMK)
static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
			  char *const argv[])
{
	size_t data_size = 0;
	void *fpga_data = NULL;
#if defined(CONFIG_FIT)
	const char *fit_uname = NULL;
	ulong fit_addr;
#endif
	ulong dev = do_fpga_get_device(argv[0]);
	char *datastr = env_get("fpgadata");

	debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);

	if (dev == FPGA_INVALID_DEVICE) {
		debug("fpga: Invalid fpga device\n");
		return CMD_RET_USAGE;
	}

	if (argc == 0 && !datastr) {
		debug("fpga: No datastr passed\n");
		return CMD_RET_USAGE;
	}

	if (argc == 2) {
		datastr = argv[1];
		debug("fpga: Full command with two args\n");
	} else if (argc == 1 && !datastr) {
		debug("fpga: Dev is setup - fpgadata passed\n");
		datastr = argv[0];
	}

#if defined(CONFIG_FIT)
	if (fit_parse_subimage(datastr, (ulong)fpga_data,
			       &fit_addr, &fit_uname)) {
		fpga_data = (void *)fit_addr;
		debug("*  fpga: subimage '%s' from FIT image ",
		      fit_uname);
		debug("at 0x%08lx\n", fit_addr);
	} else
#endif
	{
		fpga_data = (void *)hextoul(datastr, NULL);
		debug("*  fpga: cmdline image address = 0x%08lx\n",
		      (ulong)fpga_data);
	}
	debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
	if (!fpga_data) {
		puts("Zero fpga_data address\n");
		return CMD_RET_USAGE;
	}

	switch (genimg_get_format(fpga_data)) {
#if defined(CONFIG_LEGACY_IMAGE_FORMAT)
	case IMAGE_FORMAT_LEGACY:
	{
		struct legacy_img_hdr *hdr = (struct legacy_img_hdr *)fpga_data;
		ulong data;
		u8 comp;

		comp = image_get_comp(hdr);
		if (comp == IH_COMP_GZIP) {
#if defined(CONFIG_GZIP)
			ulong image_buf = image_get_data(hdr);
			ulong image_size = ~0UL;

			data = image_get_load(hdr);

			if (gunzip((void *)data, ~0UL, (void *)image_buf,
				   &image_size) != 0) {
				puts("GUNZIP: error\n");
				return CMD_RET_FAILURE;
			}
			data_size = image_size;
#else
			puts("Gunzip image is not supported\n");
			return 1;
#endif
		} else {
			data = (ulong)image_get_data(hdr);
			data_size = image_get_data_size(hdr);
		}
		return fpga_load(dev, (void *)data, data_size,
				  BIT_FULL, 0);
	}
#endif
#if defined(CONFIG_FIT)
	case IMAGE_FORMAT_FIT:
	{
		const void *fit_hdr = (const void *)fpga_data;
		int err;
		const void *fit_data;

		if (!fit_uname) {
			puts("No FIT subimage unit name\n");
			return CMD_RET_FAILURE;
		}

		if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) {
			puts("Bad FIT image format\n");
			return CMD_RET_FAILURE;
		}

		err = fit_get_data_node(fit_hdr, fit_uname, &fit_data,
					&data_size);
		if (err) {
			printf("Could not load '%s' subimage (err %d)\n",
			       fit_uname, err);
			return CMD_RET_FAILURE;
		}

		return fpga_load(dev, fit_data, data_size, BIT_FULL, 0);
	}
#endif
	default:
		puts("** Unknown image type\n");
		return CMD_RET_FAILURE;
	}
}
#endif

static struct cmd_tbl fpga_commands[] = {
	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
	U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
#if defined(CONFIG_CMD_FPGA_LOADP)
	U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADBP)
	U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
#endif
};

static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
			   char *const argv[])
{
	struct cmd_tbl *fpga_cmd;
	int ret;

	if (argc < 2)
		return CMD_RET_USAGE;

	fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
				ARRAY_SIZE(fpga_commands));
	if (!fpga_cmd) {
		debug("fpga: non existing command\n");
		return CMD_RET_USAGE;
	}

	argc -= 2;
	argv += 2;

	if (argc > fpga_cmd->maxargs) {
		debug("fpga: more parameters passed\n");
		return CMD_RET_USAGE;
	}

	ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);

	return cmd_process_error(fpga_cmd, ret);
}

#if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
#else
U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
#endif
	   "loadable FPGA image support",
	   "[operation type] [device number] [image address] [image size]\n"
	   "fpga operations:\n"
	   "  dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
	   "  info\t[dev]\t\t\tlist known device information\n"
	   "  load\t[dev] [address] [size]\tLoad device from memory buffer\n"
#if defined(CONFIG_CMD_FPGA_LOADP)
	   "  loadp\t[dev] [address] [size]\t"
	   "Load device from memory buffer with partial bitstream\n"
#endif
	   "  loadb\t[dev] [address] [size]\t"
	   "Load device from bitstream buffer (Xilinx only)\n"
#if defined(CONFIG_CMD_FPGA_LOADBP)
	   "  loadbp\t[dev] [address] [size]\t"
	   "Load device from bitstream buffer with partial bitstream"
	   "(Xilinx only)\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	   "Load device from filesystem (FAT by default) (Xilinx only)\n"
	   "  loadfs [dev] [address] [image size] [blocksize] <interface>\n"
	   "        [<dev[:part]>] <filename>\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	   "  loadmk [dev] [address]\tLoad device generated with mkimage"
#if defined(CONFIG_FIT)
	   "\n"
	   "\tFor loadmk operating on FIT format uImage address must include\n"
	   "\tsubimage unit name in the form of addr:<subimg_uname>"
#endif
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	   "Load encrypted bitstream (Xilinx only)\n"
	   "  loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
	   "        [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
	   "Loads the secure bistreams(authenticated/encrypted/both\n"
	   "authenticated and encrypted) of [size] from [address].\n"
	   "The auth-OCM/DDR flag specifies to perform authentication\n"
	   "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
	   "The enc flag specifies which key to be used for decryption\n"
	   "0-device key, 1-user key, 2-no encryption.\n"
	   "The optional Userkey address specifies from which address key\n"
	   "has to be used for decryption if user key is selected.\n"
	   "NOTE: the secure bitstream has to be created using Xilinx\n"
	   "bootgen tool only.\n"
#endif
);
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
4a9cbbe8 WD	2	/*
	3	* (C) Copyright 2000, 2001
	4	* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4a9cbbe8 WD	5	*/
	6
	7	/*
	8	* FPGA support
	9	*/
4a9cbbe8	10	#include <command.h>
7b51b576	11	#include <env.h>
8bde7f77	12	#include <fpga.h>
1a897668	13	#include <fs.h>
0c670fc1	14	#include <gzip.h>
4d72caa5	15	#include <image.h>
f7ae49fc	16	#include <log.h>
c3d2b4b4	17	#include <malloc.h>
4a9cbbe8	18
f4c7a4ae MS	19	static long do_fpga_get_device(char *arg)
	20	{
	21	long dev = FPGA_INVALID_DEVICE;
	22	char *devstr = env_get("fpga");
	23
	24	if (devstr)
	25	/* Should be strtol to handle -1 cases */
	26	dev = simple_strtol(devstr, NULL, 16);
	27
8c75f794	28	if (dev == FPGA_INVALID_DEVICE && arg)
f4c7a4ae MS	29	dev = simple_strtol(arg, NULL, 16);
	30
	31	debug("%s: device = %ld\n", __func__, dev);
	32
	33	return dev;
	34	}
	35
85754795	36	static int do_fpga_check_params(long dev, long fpga_data, size_t *data_size,
09140113 SG	37	struct cmd_tbl *cmdtp, int argc,
09140113 SG	38	char *const argv[])
85754795 MS	39	{
	40	size_t local_data_size;
	41	long local_fpga_data;
	42
	43	debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);
	44
	45	if (argc != cmdtp->maxargs) {
	46	debug("fpga: incorrect parameters passed\n");
	47	return CMD_RET_USAGE;
	48	}
	49
	50	*dev = do_fpga_get_device(argv[0]);
	51
	52	local_fpga_data = simple_strtol(argv[1], NULL, 16);
	53	if (!local_fpga_data) {
	54	debug("fpga: zero fpga_data address\n");
	55	return CMD_RET_USAGE;
	56	}
	57	*fpga_data = local_fpga_data;
	58
7e5f460e	59	local_data_size = hextoul(argv[2], NULL);
85754795 MS	60	if (!local_data_size) {
	61	debug("fpga: zero size\n");
	62	return CMD_RET_USAGE;
	63	}
	64	*data_size = local_data_size;
	65
	66	return 0;
	67	}
	68
323fe38e	69	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
09140113	70	int do_fpga_loads(struct cmd_tbl cmdtp, int flag, int argc, char const argv[])
4a9cbbe8	71	{
d4ca31c4	72	size_t data_size = 0;
b5d19a93 MS	73	long fpga_data, dev;
b5d19a93 MS	74	int ret;
cedd48e2 SDPP	75	struct fpga_secure_info fpga_sec_info;
	76
	77	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
d4ca31c4	78
b5d19a93 MS	79	if (argc < 5) {
b5d19a93 MS	80	debug("fpga: incorrect parameters passed\n");
f5953610 SDPP	81	return CMD_RET_USAGE;
	82	}
	83
b5d19a93 MS	84	if (argc == 6)
	85	fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
	86	simple_strtoull(argv[5],
	87	NULL, 16);
	88	else
	89	/*
	90	* If 6th parameter is not passed then do_fpga_check_params
	91	* will get 5 instead of expected 6 which means that function
	92	* return CMD_RET_USAGE. Increase number of params +1 to pass
	93	* this.
	94	*/
	95	argc++;
	96
7e5f460e SG	97	fpga_sec_info.encflag = (u8)hextoul(argv[4], NULL);
7e5f460e SG	98	fpga_sec_info.authflag = (u8)hextoul(argv[3], NULL);
b5d19a93 MS	99
	100	if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
	101	fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
	102	debug("fpga: Use <fpga load> for NonSecure bitstream\n");
55010969	103	return CMD_RET_USAGE;
f5953610 SDPP	104	}
f5953610 SDPP	105
b5d19a93 MS	106	if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
	107	!fpga_sec_info.userkey_addr) {
	108	debug("fpga: User key not provided\n");
ccd65203	109	return CMD_RET_USAGE;
a790b5b2 SB	110	}
a790b5b2 SB	111
b5d19a93 MS	112	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	113	cmdtp, argc, argv);
	114	if (ret)
	115	return ret;
f0ff4692	116
b5d19a93	117	return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
4a9cbbe8	118	}
b5d19a93	119	#endif
4a9cbbe8	120
49503f9a	121	#if defined(CONFIG_CMD_FPGA_LOADFS)
09140113	122	static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
49503f9a MS	123	char *const argv[])
	124	{
	125	size_t data_size = 0;
	126	long fpga_data, dev;
	127	int ret;
	128	fpga_fs_info fpga_fsinfo;
	129
	130	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	131	cmdtp, argc, argv);
	132	if (ret)
	133	return ret;
	134
	135	fpga_fsinfo.fstype = FS_TYPE_ANY;
7e5f460e	136	fpga_fsinfo.blocksize = (unsigned int)hextoul(argv[3], NULL);
49503f9a MS	137	fpga_fsinfo.interface = argv[4];
	138	fpga_fsinfo.dev_part = argv[5];
	139	fpga_fsinfo.filename = argv[6];
	140
	141	return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
	142	}
	143	#endif
	144
09140113 SG	145	static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	146	char *const argv[])
f4c7a4ae MS	147	{
	148	long dev = do_fpga_get_device(argv[0]);
	149
	150	return fpga_info(dev);
	151	}
	152
09140113 SG	153	static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	154	char *const argv[])
85754795 MS	155	{
	156	size_t data_size = 0;
	157	long fpga_data, dev;
	158	int ret;
	159
	160	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	161	cmdtp, argc, argv);
	162	if (ret)
	163	return ret;
	164
	165	return fpga_dump(dev, (void *)fpga_data, data_size);
	166	}
	167
09140113 SG	168	static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	169	char *const argv[])
85754795 MS	170	{
	171	size_t data_size = 0;
	172	long fpga_data, dev;
	173	int ret;
	174
	175	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	176	cmdtp, argc, argv);
	177	if (ret)
	178	return ret;
	179
282eed50	180	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, 0);
85754795 MS	181	}
85754795 MS	182
09140113 SG	183	static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	184	char *const argv[])
85754795 MS	185	{
	186	size_t data_size = 0;
	187	long fpga_data, dev;
	188	int ret;
	189
	190	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	191	cmdtp, argc, argv);
	192	if (ret)
	193	return ret;
	194
	195	return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
	196	}
	197
	198	#if defined(CONFIG_CMD_FPGA_LOADP)
09140113 SG	199	static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	200	char *const argv[])
85754795 MS	201	{
	202	size_t data_size = 0;
	203	long fpga_data, dev;
	204	int ret;
	205
	206	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	207	cmdtp, argc, argv);
	208	if (ret)
	209	return ret;
	210
282eed50	211	return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, 0);
85754795 MS	212	}
	213	#endif
	214
	215	#if defined(CONFIG_CMD_FPGA_LOADBP)
09140113 SG	216	static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	217	char *const argv[])
85754795 MS	218	{
	219	size_t data_size = 0;
	220	long fpga_data, dev;
	221	int ret;
	222
	223	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	224	cmdtp, argc, argv);
	225	if (ret)
	226	return ret;
	227
	228	return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
	229	BIT_PARTIAL);
	230	}
	231	#endif
	232
2892fe80	233	#if defined(CONFIG_CMD_FPGA_LOADMK)
09140113 SG	234	static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	235	char *const argv[])
2892fe80 MS	236	{
	237	size_t data_size = 0;
	238	void *fpga_data = NULL;
	239	#if defined(CONFIG_FIT)
	240	const char *fit_uname = NULL;
	241	ulong fit_addr;
	242	#endif
	243	ulong dev = do_fpga_get_device(argv[0]);
	244	char *datastr = env_get("fpgadata");
	245
8c75f794 MS	246	debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);
	247
	248	if (dev == FPGA_INVALID_DEVICE) {
	249	debug("fpga: Invalid fpga device\n");
	250	return CMD_RET_USAGE;
	251	}
	252
	253	if (argc == 0 && !datastr) {
	254	debug("fpga: No datastr passed\n");
	255	return CMD_RET_USAGE;
	256	}
2892fe80 MS	257
2892fe80 MS	258	if (argc == 2) {
8c75f794 MS	259	datastr = argv[1];
	260	debug("fpga: Full command with two args\n");
	261	} else if (argc == 1 && !datastr) {
	262	debug("fpga: Dev is setup - fpgadata passed\n");
	263	datastr = argv[0];
	264	}
	265
2892fe80	266	#if defined(CONFIG_FIT)
8c75f794 MS	267	if (fit_parse_subimage(datastr, (ulong)fpga_data,
	268	&fit_addr, &fit_uname)) {
	269	fpga_data = (void *)fit_addr;
	270	debug("* fpga: subimage '%s' from FIT image ",
	271	fit_uname);
	272	debug("at 0x%08lx\n", fit_addr);
	273	} else
2892fe80	274	#endif
8c75f794	275	{
7e5f460e	276	fpga_data = (void *)hextoul(datastr, NULL);
8c75f794 MS	277	debug("* fpga: cmdline image address = 0x%08lx\n",
	278	(ulong)fpga_data);
	279	}
	280	debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
	281	if (!fpga_data) {
	282	puts("Zero fpga_data address\n");
	283	return CMD_RET_USAGE;
2892fe80 MS	284	}
	285
	286	switch (genimg_get_format(fpga_data)) {
c76c93a3	287	#if defined(CONFIG_LEGACY_IMAGE_FORMAT)
2892fe80 MS	288	case IMAGE_FORMAT_LEGACY:
2892fe80 MS	289	{
f3543e69	290	struct legacy_img_hdr hdr = (struct legacy_img_hdr )fpga_data;
2892fe80 MS	291	ulong data;
	292	u8 comp;
	293
	294	comp = image_get_comp(hdr);
	295	if (comp == IH_COMP_GZIP) {
	296	#if defined(CONFIG_GZIP)
	297	ulong image_buf = image_get_data(hdr);
	298	ulong image_size = ~0UL;
	299
	300	data = image_get_load(hdr);
	301
	302	if (gunzip((void )data, ~0UL, (void )image_buf,
	303	&image_size) != 0) {
	304	puts("GUNZIP: error\n");
a2d1033b	305	return CMD_RET_FAILURE;
2892fe80 MS	306	}
	307	data_size = image_size;
	308	#else
	309	puts("Gunzip image is not supported\n");
	310	return 1;
	311	#endif
	312	} else {
	313	data = (ulong)image_get_data(hdr);
	314	data_size = image_get_data_size(hdr);
	315	}
	316	return fpga_load(dev, (void *)data, data_size,
282eed50	317	BIT_FULL, 0);
2892fe80 MS	318	}
	319	#endif
	320	#if defined(CONFIG_FIT)
	321	case IMAGE_FORMAT_FIT:
	322	{
	323	const void fit_hdr = (const void )fpga_data;
7b42bde0	324	int err;
2892fe80 MS	325	const void *fit_data;
	326
	327	if (!fit_uname) {
	328	puts("No FIT subimage unit name\n");
a2d1033b	329	return CMD_RET_FAILURE;
2892fe80 MS	330	}
2892fe80 MS	331
c5819701	332	if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) {
2892fe80	333	puts("Bad FIT image format\n");
a2d1033b	334	return CMD_RET_FAILURE;
2892fe80 MS	335	}
2892fe80 MS	336
7b42bde0 SA	337	err = fit_get_data_node(fit_hdr, fit_uname, &fit_data,
	338	&data_size);
	339	if (err) {
	340	printf("Could not load '%s' subimage (err %d)\n",
	341	fit_uname, err);
a2d1033b	342	return CMD_RET_FAILURE;
2892fe80 MS	343	}
2892fe80 MS	344
282eed50	345	return fpga_load(dev, fit_data, data_size, BIT_FULL, 0);
2892fe80 MS	346	}
	347	#endif
	348	default:
	349	puts("** Unknown image type\n");
a2d1033b	350	return CMD_RET_FAILURE;
2892fe80 MS	351	}
	352	}
	353	#endif
	354
09140113	355	static struct cmd_tbl fpga_commands[] = {
f4c7a4ae	356	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
85754795 MS	357	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
	358	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
	359	U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
	360	#if defined(CONFIG_CMD_FPGA_LOADP)
	361	U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
	362	#endif
	363	#if defined(CONFIG_CMD_FPGA_LOADBP)
	364	U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
	365	#endif
49503f9a MS	366	#if defined(CONFIG_CMD_FPGA_LOADFS)
	367	U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
	368	#endif
2892fe80 MS	369	#if defined(CONFIG_CMD_FPGA_LOADMK)
	370	U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
	371	#endif
b5d19a93 MS	372	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	373	U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
	374	#endif
9657d97c MS	375	};
9657d97c MS	376
09140113	377	static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
9657d97c MS	378	char *const argv[])
9657d97c MS	379	{
09140113	380	struct cmd_tbl *fpga_cmd;
9657d97c MS	381	int ret;
	382
	383	if (argc < 2)
	384	return CMD_RET_USAGE;
	385
	386	fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
	387	ARRAY_SIZE(fpga_commands));
9657d97c MS	388	if (!fpga_cmd) {
	389	debug("fpga: non existing command\n");
	390	return CMD_RET_USAGE;
	391	}
	392
	393	argc -= 2;
	394	argv += 2;
	395
	396	if (argc > fpga_cmd->maxargs) {
	397	debug("fpga: more parameters passed\n");
	398	return CMD_RET_USAGE;
	399	}
	400
	401	ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);
	402
	403	return cmd_process_error(fpga_cmd, ret);
	404	}
	405
cedd48e2	406	#if defined(CONFIG_CMD_FPGA_LOADFS) \|\| defined(CONFIG_CMD_FPGA_LOAD_SECURE)
9657d97c	407	U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
1a897668	408	#else
9657d97c	409	U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
1a897668	410	#endif
fc598412 MS	411	"loadable FPGA image support",
	412	"[operation type] [device number] [image address] [image size]\n"
	413	"fpga operations:\n"
2d73f0d6	414	" dump\t[dev] [address] [size]\tLoad device to memory buffer\n"
fc598412 MS	415	" info\t[dev]\t\t\tlist known device information\n"
fc598412 MS	416	" load\t[dev] [address] [size]\tLoad device from memory buffer\n"
67193864 MS	417	#if defined(CONFIG_CMD_FPGA_LOADP)
	418	" loadp\t[dev] [address] [size]\t"
	419	"Load device from memory buffer with partial bitstream\n"
	420	#endif
fc598412 MS	421	" loadb\t[dev] [address] [size]\t"
fc598412 MS	422	"Load device from bitstream buffer (Xilinx only)\n"
67193864 MS	423	#if defined(CONFIG_CMD_FPGA_LOADBP)
	424	" loadbp\t[dev] [address] [size]\t"
	425	"Load device from bitstream buffer with partial bitstream"
	426	"(Xilinx only)\n"
	427	#endif
1a897668 SDPP	428	#if defined(CONFIG_CMD_FPGA_LOADFS)
	429	"Load device from filesystem (FAT by default) (Xilinx only)\n"
	430	" loadfs [dev] [address] [image size] [blocksize] <interface>\n"
	431	" [<dev[:part]>] <filename>\n"
	432	#endif
64e809af	433	#if defined(CONFIG_CMD_FPGA_LOADMK)
fc598412	434	" loadmk [dev] [address]\tLoad device generated with mkimage"
c28c4d19	435	#if defined(CONFIG_FIT)
fc598412 MS	436	"\n"
	437	"\tFor loadmk operating on FIT format uImage address must include\n"
	438	"\tsubimage unit name in the form of addr:<subimg_uname>"
c28c4d19	439	#endif
64e809af	440	#endif
cedd48e2 SDPP	441	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	442	"Load encrypted bitstream (Xilinx only)\n"
	443	" loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n"
	444	" [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n"
	445	"Loads the secure bistreams(authenticated/encrypted/both\n"
	446	"authenticated and encrypted) of [size] from [address].\n"
	447	"The auth-OCM/DDR flag specifies to perform authentication\n"
	448	"in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n"
	449	"The enc flag specifies which key to be used for decryption\n"
	450	"0-device key, 1-user key, 2-no encryption.\n"
	451	"The optional Userkey address specifies from which address key\n"
	452	"has to be used for decryption if user key is selected.\n"
ce9e4e0d	453	"NOTE: the secure bitstream has to be created using Xilinx\n"
cedd48e2 SDPP	454	"bootgen tool only.\n"
cedd48e2 SDPP	455	#endif
c28c4d19	456	);