[thirdparty/u-boot.git] / cmd / fpga.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2000, 2001
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 */

/*
 *  FPGA support
 */
#include <command.h>
#include <env.h>
#include <fpga.h>
#include <fs.h>
#include <gzip.h>
#include <image.h>
#include <log.h>
#include <malloc.h>

static long do_fpga_get_device(char *arg)
{
	long dev = FPGA_INVALID_DEVICE;
	char *devstr = env_get("fpga");

	if (devstr)
		/* Should be strtol to handle -1 cases */
		dev = simple_strtol(devstr, NULL, 16);

	if (dev == FPGA_INVALID_DEVICE && arg)
		dev = simple_strtol(arg, NULL, 16);

	debug("%s: device = %ld\n", __func__, dev);

	return dev;
}

static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
				struct cmd_tbl *cmdtp, int argc,
				char *const argv[])
{
	size_t local_data_size;
	long local_fpga_data;

	debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);

	if (argc != cmdtp->maxargs) {
		debug("fpga: incorrect parameters passed\n");
		return CMD_RET_USAGE;
	}

	*dev = do_fpga_get_device(argv[0]);

	local_fpga_data = simple_strtol(argv[1], NULL, 16);
	if (!local_fpga_data) {
		debug("fpga: zero fpga_data address\n");
		return CMD_RET_USAGE;
	}
	*fpga_data = local_fpga_data;

	local_data_size = hextoul(argv[2], NULL);
	if (!local_data_size) {
		debug("fpga: zero size\n");
		return CMD_RET_USAGE;
	}
	*data_size = local_data_size;

	return 0;
}

#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
static int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc,
			 char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;
	struct fpga_secure_info fpga_sec_info;

	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));

	if (argc < 5) {
		debug("fpga: incorrect parameters passed\n");
		return CMD_RET_USAGE;
	}

	if (argc == 6)
		fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
					      simple_strtoull(argv[5],
							      NULL, 16);
	else
		/*
		 * If 6th parameter is not passed then do_fpga_check_params
		 * will get 5 instead of expected 6 which means that function
		 * return CMD_RET_USAGE. Increase number of params +1 to pass
		 * this.
		 */
		argc++;

	fpga_sec_info.encflag = (u8)hextoul(argv[4], NULL);
	fpga_sec_info.authflag = (u8)hextoul(argv[3], NULL);

	if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
	    fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
		debug("fpga: Use <fpga load> for NonSecure bitstream\n");
		return CMD_RET_USAGE;
	}

	if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
	    !fpga_sec_info.userkey_addr) {
		debug("fpga: User key not provided\n");
		return CMD_RET_USAGE;
	}

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADFS)
static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
			  char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;
	fpga_fs_info fpga_fsinfo;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	fpga_fsinfo.fstype = FS_TYPE_ANY;
	fpga_fsinfo.blocksize = (unsigned int)hextoul(argv[3], NULL);
	fpga_fsinfo.interface = argv[4];
	fpga_fsinfo.dev_part = argv[5];
	fpga_fsinfo.filename = argv[6];

	return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
}
#endif

static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
			char *const argv[])
{
	long dev = do_fpga_get_device(argv[0]);

	return fpga_info(dev);
}

static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
			char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_dump(dev, (void *)fpga_data, data_size);
}

static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
			char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, 0);
}

#if defined(CONFIG_CMD_FPGA_LOADB)
static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
			 char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
}
#endif
#if defined(CONFIG_CMD_FPGA_LOADP)
static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
			 char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, 0);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADBP)
static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
			  char *const argv[])
{
	size_t data_size = 0;
	long fpga_data, dev;
	int ret;

	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
				   cmdtp, argc, argv);
	if (ret)
		return ret;

	return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
				  BIT_PARTIAL);
}
#endif

#if defined(CONFIG_CMD_FPGA_LOADMK)
static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
			  char *const argv[])
{
	size_t data_size = 0;
	void *fpga_data = NULL;
#if defined(CONFIG_FIT)
	const char *fit_uname = NULL;
	ulong fit_addr;
#endif
	ulong dev = do_fpga_get_device(argv[0]);
	char *datastr = env_get("fpgadata");

	debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);

	if (dev == FPGA_INVALID_DEVICE) {
		debug("fpga: Invalid fpga device\n");
		return CMD_RET_USAGE;
	}

	if (argc == 0 && !datastr) {
		debug("fpga: No datastr passed\n");
		return CMD_RET_USAGE;
	}

	if (argc == 2) {
		datastr = argv[1];
		debug("fpga: Full command with two args\n");
	} else if (argc == 1 && !datastr) {
		debug("fpga: Dev is setup - fpgadata passed\n");
		datastr = argv[0];
	}

#if defined(CONFIG_FIT)
	if (fit_parse_subimage(datastr, (ulong)fpga_data,
			       &fit_addr, &fit_uname)) {
		fpga_data = (void *)fit_addr;
		debug("*  fpga: subimage '%s' from FIT image ",
		      fit_uname);
		debug("at 0x%08lx\n", fit_addr);
	} else
#endif
	{
		fpga_data = (void *)hextoul(datastr, NULL);
		debug("*  fpga: cmdline image address = 0x%08lx\n",
		      (ulong)fpga_data);
	}
	debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
	if (!fpga_data) {
		puts("Zero fpga_data address\n");
		return CMD_RET_USAGE;
	}

	switch (genimg_get_format(fpga_data)) {
#if defined(CONFIG_LEGACY_IMAGE_FORMAT)
	case IMAGE_FORMAT_LEGACY:
	{
		struct legacy_img_hdr *hdr = (struct legacy_img_hdr *)fpga_data;
		ulong data;
		u8 comp;

		comp = image_get_comp(hdr);
		if (comp == IH_COMP_GZIP) {
#if defined(CONFIG_GZIP)
			ulong image_buf = image_get_data(hdr);
			ulong image_size = ~0UL;

			data = image_get_load(hdr);

			if (gunzip((void *)data, ~0UL, (void *)image_buf,
				   &image_size) != 0) {
				puts("GUNZIP: error\n");
				return CMD_RET_FAILURE;
			}
			data_size = image_size;
#else
			puts("Gunzip image is not supported\n");
			return 1;
#endif
		} else {
			data = (ulong)image_get_data(hdr);
			data_size = image_get_data_size(hdr);
		}
		return fpga_load(dev, (void *)data, data_size,
				  BIT_FULL, 0);
	}
#endif
#if defined(CONFIG_FIT)
	case IMAGE_FORMAT_FIT:
	{
		const void *fit_hdr = (const void *)fpga_data;
		int err;
		const void *fit_data;

		if (!fit_uname) {
			puts("No FIT subimage unit name\n");
			return CMD_RET_FAILURE;
		}

		if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) {
			puts("Bad FIT image format\n");
			return CMD_RET_FAILURE;
		}

		err = fit_get_data_node(fit_hdr, fit_uname, &fit_data,
					&data_size);
		if (err) {
			printf("Could not load '%s' subimage (err %d)\n",
			       fit_uname, err);
			return CMD_RET_FAILURE;
		}

		return fpga_load(dev, fit_data, data_size, BIT_FULL, 0);
	}
#endif
	default:
		puts("** Unknown image type\n");
		return CMD_RET_FAILURE;
	}
}
#endif

static struct cmd_tbl fpga_commands[] = {
	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
#if defined(CONFIG_CMD_FPGA_LOADB)
	U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADP)
	U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADBP)
	U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
#endif
};

static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
			   char *const argv[])
{
	struct cmd_tbl *fpga_cmd;
	int ret;

	if (argc < 2)
		return CMD_RET_USAGE;

	fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
				ARRAY_SIZE(fpga_commands));
	if (!fpga_cmd) {
		debug("fpga: non existing command\n");
		return CMD_RET_USAGE;
	}

	argc -= 2;
	argv += 2;

	if (argc > fpga_cmd->maxargs) {
		debug("fpga: more parameters passed\n");
		return CMD_RET_USAGE;
	}

	ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);

	return cmd_process_error(fpga_cmd, ret);
}

#if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE)
U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
#else
U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
#endif
	 "loadable FPGA image support",
	 "info   [dev]                  List known device information\n"
	 "fpga dump   <dev> <address> <size> Load device to memory buffer\n"
	 "fpga load   <dev> <address> <size> Load device from memory buffer\n"
#if defined(CONFIG_CMD_FPGA_LOADP)
	 "fpga loadb  <dev> <address> <size> Load device from bitstream buffer\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADP)
	 "fpga loadp  <dev> <address> <size> Load device from memory buffer\n"
	 "            with partial bitstream\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADBP)
	 "fpga loadbp <dev> <address> <size> Load device from bitstream buffer\n"
	 "             with partial bitstream\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADFS)
	 "fpga loadfs <dev> <address> <size> <blocksize> <interface> [<dev[:part]>] <filename>\n"
	 "            Load device from filesystem (FAT by default)\n"
#endif
#if defined(CONFIG_CMD_FPGA_LOADMK)
	 "fpga loadmk <dev> <address>        Load device generated with mkimage\n"
#if defined(CONFIG_FIT)
	 "            NOTE: loadmk operating on FIT must include subimage unit\n"
	 "            name in the form of addr:<subimg_uname>\n"
#endif
#endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	 "fpga loads  <dev> <address> <size> <authflag> <encflag> [Userkey address]\n"
	 "            Load device from memory buffer with secure bistream\n"
	 "            (authenticated/encrypted/both)\n"
	 "            -authflag: 0 for OCM, 1 for DDR, 2 for no authentication\n"
	 "            (specifies where to perform authentication)\n"
	 "            -encflag: 0 for device key, 1 for user key, 2 for no encryption\n"
	 "            -Userkey address: address where user key is stored\n"
	 "            NOTE: secure bitstream has to be created using Xilinx bootgen tool\n"
#endif
);
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
4a9cbbe8 WD	2	/*
	3	* (C) Copyright 2000, 2001
	4	* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4a9cbbe8 WD	5	*/
	6
	7	/*
	8	* FPGA support
	9	*/
4a9cbbe8	10	#include <command.h>
7b51b576	11	#include <env.h>
8bde7f77	12	#include <fpga.h>
1a897668	13	#include <fs.h>
0c670fc1	14	#include <gzip.h>
4d72caa5	15	#include <image.h>
f7ae49fc	16	#include <log.h>
c3d2b4b4	17	#include <malloc.h>
4a9cbbe8	18
f4c7a4ae MS	19	static long do_fpga_get_device(char *arg)
	20	{
	21	long dev = FPGA_INVALID_DEVICE;
	22	char *devstr = env_get("fpga");
	23
	24	if (devstr)
	25	/* Should be strtol to handle -1 cases */
	26	dev = simple_strtol(devstr, NULL, 16);
	27
8c75f794	28	if (dev == FPGA_INVALID_DEVICE && arg)
f4c7a4ae MS	29	dev = simple_strtol(arg, NULL, 16);
	30
	31	debug("%s: device = %ld\n", __func__, dev);
	32
	33	return dev;
	34	}
	35
85754795	36	static int do_fpga_check_params(long dev, long fpga_data, size_t *data_size,
09140113 SG	37	struct cmd_tbl *cmdtp, int argc,
09140113 SG	38	char *const argv[])
85754795 MS	39	{
	40	size_t local_data_size;
	41	long local_fpga_data;
	42
	43	debug("%s %d, %d\n", __func__, argc, cmdtp->maxargs);
	44
	45	if (argc != cmdtp->maxargs) {
	46	debug("fpga: incorrect parameters passed\n");
	47	return CMD_RET_USAGE;
	48	}
	49
	50	*dev = do_fpga_get_device(argv[0]);
	51
	52	local_fpga_data = simple_strtol(argv[1], NULL, 16);
	53	if (!local_fpga_data) {
	54	debug("fpga: zero fpga_data address\n");
	55	return CMD_RET_USAGE;
	56	}
	57	*fpga_data = local_fpga_data;
	58
7e5f460e	59	local_data_size = hextoul(argv[2], NULL);
85754795 MS	60	if (!local_data_size) {
	61	debug("fpga: zero size\n");
	62	return CMD_RET_USAGE;
	63	}
	64	*data_size = local_data_size;
	65
	66	return 0;
	67	}
	68
323fe38e	69	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
6b82252c MS	70	static int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc,
6b82252c MS	71	char *const argv[])
4a9cbbe8	72	{
d4ca31c4	73	size_t data_size = 0;
b5d19a93 MS	74	long fpga_data, dev;
b5d19a93 MS	75	int ret;
cedd48e2 SDPP	76	struct fpga_secure_info fpga_sec_info;
	77
	78	memset(&fpga_sec_info, 0, sizeof(fpga_sec_info));
d4ca31c4	79
b5d19a93 MS	80	if (argc < 5) {
b5d19a93 MS	81	debug("fpga: incorrect parameters passed\n");
f5953610 SDPP	82	return CMD_RET_USAGE;
	83	}
	84
b5d19a93 MS	85	if (argc == 6)
	86	fpga_sec_info.userkey_addr = (u8 *)(uintptr_t)
	87	simple_strtoull(argv[5],
	88	NULL, 16);
	89	else
	90	/*
	91	* If 6th parameter is not passed then do_fpga_check_params
	92	* will get 5 instead of expected 6 which means that function
	93	* return CMD_RET_USAGE. Increase number of params +1 to pass
	94	* this.
	95	*/
	96	argc++;
	97
7e5f460e SG	98	fpga_sec_info.encflag = (u8)hextoul(argv[4], NULL);
7e5f460e SG	99	fpga_sec_info.authflag = (u8)hextoul(argv[3], NULL);
b5d19a93 MS	100
	101	if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH &&
	102	fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) {
	103	debug("fpga: Use <fpga load> for NonSecure bitstream\n");
55010969	104	return CMD_RET_USAGE;
f5953610 SDPP	105	}
f5953610 SDPP	106
b5d19a93 MS	107	if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY &&
	108	!fpga_sec_info.userkey_addr) {
	109	debug("fpga: User key not provided\n");
ccd65203	110	return CMD_RET_USAGE;
a790b5b2 SB	111	}
a790b5b2 SB	112
b5d19a93 MS	113	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	114	cmdtp, argc, argv);
	115	if (ret)
	116	return ret;
f0ff4692	117
b5d19a93	118	return fpga_loads(dev, (void *)fpga_data, data_size, &fpga_sec_info);
4a9cbbe8	119	}
b5d19a93	120	#endif
4a9cbbe8	121
49503f9a	122	#if defined(CONFIG_CMD_FPGA_LOADFS)
09140113	123	static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
49503f9a MS	124	char *const argv[])
	125	{
	126	size_t data_size = 0;
	127	long fpga_data, dev;
	128	int ret;
	129	fpga_fs_info fpga_fsinfo;
	130
	131	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	132	cmdtp, argc, argv);
	133	if (ret)
	134	return ret;
	135
	136	fpga_fsinfo.fstype = FS_TYPE_ANY;
7e5f460e	137	fpga_fsinfo.blocksize = (unsigned int)hextoul(argv[3], NULL);
49503f9a MS	138	fpga_fsinfo.interface = argv[4];
	139	fpga_fsinfo.dev_part = argv[5];
	140	fpga_fsinfo.filename = argv[6];
	141
	142	return fpga_fsload(dev, (void *)fpga_data, data_size, &fpga_fsinfo);
	143	}
	144	#endif
	145
09140113 SG	146	static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	147	char *const argv[])
f4c7a4ae MS	148	{
	149	long dev = do_fpga_get_device(argv[0]);
	150
	151	return fpga_info(dev);
	152	}
	153
09140113 SG	154	static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	155	char *const argv[])
85754795 MS	156	{
	157	size_t data_size = 0;
	158	long fpga_data, dev;
	159	int ret;
	160
	161	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	162	cmdtp, argc, argv);
	163	if (ret)
	164	return ret;
	165
	166	return fpga_dump(dev, (void *)fpga_data, data_size);
	167	}
	168
09140113 SG	169	static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	170	char *const argv[])
85754795 MS	171	{
	172	size_t data_size = 0;
	173	long fpga_data, dev;
	174	int ret;
	175
	176	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	177	cmdtp, argc, argv);
	178	if (ret)
	179	return ret;
	180
282eed50	181	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, 0);
85754795 MS	182	}
85754795 MS	183
f8f37887	184	#if defined(CONFIG_CMD_FPGA_LOADB)
09140113 SG	185	static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	186	char *const argv[])
85754795 MS	187	{
	188	size_t data_size = 0;
	189	long fpga_data, dev;
	190	int ret;
	191
	192	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	193	cmdtp, argc, argv);
	194	if (ret)
	195	return ret;
	196
	197	return fpga_loadbitstream(dev, (void *)fpga_data, data_size, BIT_FULL);
	198	}
f8f37887	199	#endif
85754795	200	#if defined(CONFIG_CMD_FPGA_LOADP)
09140113 SG	201	static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	202	char *const argv[])
85754795 MS	203	{
	204	size_t data_size = 0;
	205	long fpga_data, dev;
	206	int ret;
	207
	208	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	209	cmdtp, argc, argv);
	210	if (ret)
	211	return ret;
	212
282eed50	213	return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, 0);
85754795 MS	214	}
	215	#endif
	216
	217	#if defined(CONFIG_CMD_FPGA_LOADBP)
09140113 SG	218	static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	219	char *const argv[])
85754795 MS	220	{
	221	size_t data_size = 0;
	222	long fpga_data, dev;
	223	int ret;
	224
	225	ret = do_fpga_check_params(&dev, &fpga_data, &data_size,
	226	cmdtp, argc, argv);
	227	if (ret)
	228	return ret;
	229
	230	return fpga_loadbitstream(dev, (void *)fpga_data, data_size,
	231	BIT_PARTIAL);
	232	}
	233	#endif
	234
2892fe80	235	#if defined(CONFIG_CMD_FPGA_LOADMK)
09140113 SG	236	static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
09140113 SG	237	char *const argv[])
2892fe80 MS	238	{
	239	size_t data_size = 0;
	240	void *fpga_data = NULL;
	241	#if defined(CONFIG_FIT)
	242	const char *fit_uname = NULL;
	243	ulong fit_addr;
	244	#endif
	245	ulong dev = do_fpga_get_device(argv[0]);
	246	char *datastr = env_get("fpgadata");
	247
8c75f794 MS	248	debug("fpga: argc %x, dev %lx, datastr %s\n", argc, dev, datastr);
	249
	250	if (dev == FPGA_INVALID_DEVICE) {
	251	debug("fpga: Invalid fpga device\n");
	252	return CMD_RET_USAGE;
	253	}
	254
	255	if (argc == 0 && !datastr) {
	256	debug("fpga: No datastr passed\n");
	257	return CMD_RET_USAGE;
	258	}
2892fe80 MS	259
2892fe80 MS	260	if (argc == 2) {
8c75f794 MS	261	datastr = argv[1];
	262	debug("fpga: Full command with two args\n");
	263	} else if (argc == 1 && !datastr) {
	264	debug("fpga: Dev is setup - fpgadata passed\n");
	265	datastr = argv[0];
	266	}
	267
2892fe80	268	#if defined(CONFIG_FIT)
8c75f794 MS	269	if (fit_parse_subimage(datastr, (ulong)fpga_data,
	270	&fit_addr, &fit_uname)) {
	271	fpga_data = (void *)fit_addr;
	272	debug("* fpga: subimage '%s' from FIT image ",
	273	fit_uname);
	274	debug("at 0x%08lx\n", fit_addr);
	275	} else
2892fe80	276	#endif
8c75f794	277	{
7e5f460e	278	fpga_data = (void *)hextoul(datastr, NULL);
8c75f794 MS	279	debug("* fpga: cmdline image address = 0x%08lx\n",
	280	(ulong)fpga_data);
	281	}
	282	debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data);
	283	if (!fpga_data) {
	284	puts("Zero fpga_data address\n");
	285	return CMD_RET_USAGE;
2892fe80 MS	286	}
	287
	288	switch (genimg_get_format(fpga_data)) {
c76c93a3	289	#if defined(CONFIG_LEGACY_IMAGE_FORMAT)
2892fe80 MS	290	case IMAGE_FORMAT_LEGACY:
2892fe80 MS	291	{
f3543e69	292	struct legacy_img_hdr hdr = (struct legacy_img_hdr )fpga_data;
2892fe80 MS	293	ulong data;
	294	u8 comp;
	295
	296	comp = image_get_comp(hdr);
	297	if (comp == IH_COMP_GZIP) {
	298	#if defined(CONFIG_GZIP)
	299	ulong image_buf = image_get_data(hdr);
	300	ulong image_size = ~0UL;
	301
	302	data = image_get_load(hdr);
	303
	304	if (gunzip((void )data, ~0UL, (void )image_buf,
	305	&image_size) != 0) {
	306	puts("GUNZIP: error\n");
a2d1033b	307	return CMD_RET_FAILURE;
2892fe80 MS	308	}
	309	data_size = image_size;
	310	#else
	311	puts("Gunzip image is not supported\n");
	312	return 1;
	313	#endif
	314	} else {
	315	data = (ulong)image_get_data(hdr);
	316	data_size = image_get_data_size(hdr);
	317	}
	318	return fpga_load(dev, (void *)data, data_size,
282eed50	319	BIT_FULL, 0);
2892fe80 MS	320	}
	321	#endif
	322	#if defined(CONFIG_FIT)
	323	case IMAGE_FORMAT_FIT:
	324	{
	325	const void fit_hdr = (const void )fpga_data;
7b42bde0	326	int err;
2892fe80 MS	327	const void *fit_data;
	328
	329	if (!fit_uname) {
	330	puts("No FIT subimage unit name\n");
a2d1033b	331	return CMD_RET_FAILURE;
2892fe80 MS	332	}
2892fe80 MS	333
c5819701	334	if (fit_check_format(fit_hdr, IMAGE_SIZE_INVAL)) {
2892fe80	335	puts("Bad FIT image format\n");
a2d1033b	336	return CMD_RET_FAILURE;
2892fe80 MS	337	}
2892fe80 MS	338
7b42bde0 SA	339	err = fit_get_data_node(fit_hdr, fit_uname, &fit_data,
	340	&data_size);
	341	if (err) {
	342	printf("Could not load '%s' subimage (err %d)\n",
	343	fit_uname, err);
a2d1033b	344	return CMD_RET_FAILURE;
2892fe80 MS	345	}
2892fe80 MS	346
282eed50	347	return fpga_load(dev, fit_data, data_size, BIT_FULL, 0);
2892fe80 MS	348	}
	349	#endif
	350	default:
	351	puts("** Unknown image type\n");
a2d1033b	352	return CMD_RET_FAILURE;
2892fe80 MS	353	}
	354	}
	355	#endif
	356
09140113	357	static struct cmd_tbl fpga_commands[] = {
f4c7a4ae	358	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
85754795 MS	359	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
85754795 MS	360	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
f8f37887	361	#if defined(CONFIG_CMD_FPGA_LOADB)
85754795	362	U_BOOT_CMD_MKENT(loadb, 3, 1, do_fpga_loadb, "", ""),
f8f37887	363	#endif
85754795 MS	364	#if defined(CONFIG_CMD_FPGA_LOADP)
	365	U_BOOT_CMD_MKENT(loadp, 3, 1, do_fpga_loadp, "", ""),
	366	#endif
	367	#if defined(CONFIG_CMD_FPGA_LOADBP)
	368	U_BOOT_CMD_MKENT(loadbp, 3, 1, do_fpga_loadbp, "", ""),
	369	#endif
49503f9a MS	370	#if defined(CONFIG_CMD_FPGA_LOADFS)
	371	U_BOOT_CMD_MKENT(loadfs, 7, 1, do_fpga_loadfs, "", ""),
	372	#endif
2892fe80 MS	373	#if defined(CONFIG_CMD_FPGA_LOADMK)
	374	U_BOOT_CMD_MKENT(loadmk, 2, 1, do_fpga_loadmk, "", ""),
	375	#endif
b5d19a93 MS	376	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
	377	U_BOOT_CMD_MKENT(loads, 6, 1, do_fpga_loads, "", ""),
	378	#endif
9657d97c MS	379	};
9657d97c MS	380
09140113	381	static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
9657d97c MS	382	char *const argv[])
9657d97c MS	383	{
09140113	384	struct cmd_tbl *fpga_cmd;
9657d97c MS	385	int ret;
	386
	387	if (argc < 2)
	388	return CMD_RET_USAGE;
	389
	390	fpga_cmd = find_cmd_tbl(argv[1], fpga_commands,
	391	ARRAY_SIZE(fpga_commands));
9657d97c MS	392	if (!fpga_cmd) {
	393	debug("fpga: non existing command\n");
	394	return CMD_RET_USAGE;
	395	}
	396
	397	argc -= 2;
	398	argv += 2;
	399
	400	if (argc > fpga_cmd->maxargs) {
	401	debug("fpga: more parameters passed\n");
	402	return CMD_RET_USAGE;
	403	}
	404
	405	ret = fpga_cmd->cmd(fpga_cmd, flag, argc, argv);
	406
	407	return cmd_process_error(fpga_cmd, ret);
	408	}
	409
cedd48e2	410	#if defined(CONFIG_CMD_FPGA_LOADFS) \|\| defined(CONFIG_CMD_FPGA_LOAD_SECURE)
9657d97c	411	U_BOOT_CMD(fpga, 9, 1, do_fpga_wrapper,
1a897668	412	#else
9657d97c	413	U_BOOT_CMD(fpga, 6, 1, do_fpga_wrapper,
1a897668	414	#endif
c0fed34e IE	415	"loadable FPGA image support",
	416	"info [dev] List known device information\n"
	417	"fpga dump <dev> <address> <size> Load device to memory buffer\n"
	418	"fpga load <dev> <address> <size> Load device from memory buffer\n"
f8f37887	419	#if defined(CONFIG_CMD_FPGA_LOADP)
49373922	420	"fpga loadb <dev> <address> <size> Load device from bitstream buffer\n"
f8f37887	421	#endif
67193864	422	#if defined(CONFIG_CMD_FPGA_LOADP)
c0fed34e IE	423	"fpga loadp <dev> <address> <size> Load device from memory buffer\n"
c0fed34e IE	424	" with partial bitstream\n"
67193864	425	#endif
67193864	426	#if defined(CONFIG_CMD_FPGA_LOADBP)
c0fed34e	427	"fpga loadbp <dev> <address> <size> Load device from bitstream buffer\n"
ce54f50c	428	" with partial bitstream\n"
67193864	429	#endif
1a897668	430	#if defined(CONFIG_CMD_FPGA_LOADFS)
c0fed34e	431	"fpga loadfs <dev> <address> <size> <blocksize> <interface> [<dev[:part]>] <filename>\n"
ce54f50c	432	" Load device from filesystem (FAT by default)\n"
1a897668	433	#endif
64e809af	434	#if defined(CONFIG_CMD_FPGA_LOADMK)
c0fed34e	435	"fpga loadmk <dev> <address> Load device generated with mkimage\n"
c28c4d19	436	#if defined(CONFIG_FIT)
c0fed34e IE	437	" NOTE: loadmk operating on FIT must include subimage unit\n"
c0fed34e IE	438	" name in the form of addr:<subimg_uname>\n"
c28c4d19	439	#endif
64e809af	440	#endif
cedd48e2	441	#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
d2619de2 IE	442	"fpga loads <dev> <address> <size> <authflag> <encflag> [Userkey address]\n"
d2619de2 IE	443	" Load device from memory buffer with secure bistream\n"
ce54f50c	444	" (authenticated/encrypted/both)\n"
d2619de2 IE	445	" -authflag: 0 for OCM, 1 for DDR, 2 for no authentication\n"
	446	" (specifies where to perform authentication)\n"
	447	" -encflag: 0 for device key, 1 for user key, 2 for no encryption\n"
	448	" -Userkey address: address where user key is stored\n"
	449	" NOTE: secure bitstream has to be created using Xilinx bootgen tool\n"
cedd48e2	450	#endif
c28c4d19	451	);