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5b845b66 | 1 | /* |
5da627a4 WD |
2 | * (C) Copyright 2003 |
3 | * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de | |
4 | * | |
5b845b66 WD |
5 | * (C) Copyright 2002 |
6 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. | |
7 | * | |
8 | * See file CREDITS for list of people who contributed to this | |
9 | * project. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License as | |
13 | * published by the Free Software Foundation; either version 2 of | |
14 | * the License, or (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
24 | * MA 02111-1307 USA | |
25 | * | |
26 | */ | |
27 | ||
5b845b66 WD |
28 | /* |
29 | * Altera FPGA support | |
30 | */ | |
31 | #include <common.h> | |
5da627a4 | 32 | #include <ACEX1K.h> |
5b845b66 | 33 | |
5da627a4 WD |
34 | /* Define FPGA_DEBUG to get debug printf's */ |
35 | /* #define FPGA_DEBUG */ | |
5b845b66 WD |
36 | |
37 | #ifdef FPGA_DEBUG | |
38 | #define PRINTF(fmt,args...) printf (fmt ,##args) | |
39 | #else | |
40 | #define PRINTF(fmt,args...) | |
41 | #endif | |
42 | ||
0133502e | 43 | #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) |
5b845b66 | 44 | |
5da627a4 WD |
45 | /* Local Static Functions */ |
46 | static int altera_validate (Altera_desc * desc, char *fn); | |
47 | ||
5b845b66 WD |
48 | /* ------------------------------------------------------------------------- */ |
49 | int altera_load( Altera_desc *desc, void *buf, size_t bsize ) | |
50 | { | |
5da627a4 WD |
51 | int ret_val = FPGA_FAIL; /* assume a failure */ |
52 | ||
64cd52ef | 53 | if (!altera_validate (desc, (char *)__FUNCTION__)) { |
5da627a4 WD |
54 | printf ("%s: Invalid device descriptor\n", __FUNCTION__); |
55 | } else { | |
56 | switch (desc->family) { | |
57 | case Altera_ACEX1K: | |
f0ff4692 | 58 | case Altera_CYC2: |
0133502e | 59 | #if defined(CONFIG_FPGA_ACEX1K) |
5da627a4 WD |
60 | PRINTF ("%s: Launching the ACEX1K Loader...\n", |
61 | __FUNCTION__); | |
62 | ret_val = ACEX1K_load (desc, buf, bsize); | |
0133502e | 63 | #elif defined CONFIG_FPGA_CYCLON2 |
f0ff4692 SR |
64 | PRINTF ("%s: Launching the CYCLON II Loader...\n", |
65 | __FUNCTION__); | |
66 | ret_val = CYC2_load (desc, buf, bsize); | |
5da627a4 WD |
67 | #else |
68 | printf ("%s: No support for ACEX1K devices.\n", | |
69 | __FUNCTION__); | |
70 | #endif | |
71 | break; | |
72 | ||
73 | default: | |
74 | printf ("%s: Unsupported family type, %d\n", | |
75 | __FUNCTION__, desc->family); | |
76 | } | |
77 | } | |
78 | ||
79 | return ret_val; | |
5b845b66 WD |
80 | } |
81 | ||
82 | int altera_dump( Altera_desc *desc, void *buf, size_t bsize ) | |
83 | { | |
5da627a4 WD |
84 | int ret_val = FPGA_FAIL; /* assume a failure */ |
85 | ||
64cd52ef | 86 | if (!altera_validate (desc, (char *)__FUNCTION__)) { |
5da627a4 WD |
87 | printf ("%s: Invalid device descriptor\n", __FUNCTION__); |
88 | } else { | |
89 | switch (desc->family) { | |
90 | case Altera_ACEX1K: | |
0133502e | 91 | #if defined(CONFIG_FPGA_ACEX) |
5da627a4 WD |
92 | PRINTF ("%s: Launching the ACEX1K Reader...\n", |
93 | __FUNCTION__); | |
94 | ret_val = ACEX1K_dump (desc, buf, bsize); | |
95 | #else | |
96 | printf ("%s: No support for ACEX1K devices.\n", | |
97 | __FUNCTION__); | |
98 | #endif | |
99 | break; | |
100 | ||
101 | default: | |
102 | printf ("%s: Unsupported family type, %d\n", | |
103 | __FUNCTION__, desc->family); | |
104 | } | |
105 | } | |
106 | ||
107 | return ret_val; | |
5b845b66 WD |
108 | } |
109 | ||
110 | int altera_info( Altera_desc *desc ) | |
111 | { | |
5da627a4 WD |
112 | int ret_val = FPGA_FAIL; |
113 | ||
64cd52ef | 114 | if (altera_validate (desc, (char *)__FUNCTION__)) { |
5da627a4 WD |
115 | printf ("Family: \t"); |
116 | switch (desc->family) { | |
117 | case Altera_ACEX1K: | |
118 | printf ("ACEX1K\n"); | |
119 | break; | |
120 | /* Add new family types here */ | |
f0ff4692 SR |
121 | case Altera_CYC2: |
122 | printf ("CYCLON II\n"); | |
123 | break; | |
5da627a4 WD |
124 | default: |
125 | printf ("Unknown family type, %d\n", desc->family); | |
126 | } | |
127 | ||
128 | printf ("Interface type:\t"); | |
129 | switch (desc->iface) { | |
130 | case passive_serial: | |
131 | printf ("Passive Serial (PS)\n"); | |
132 | break; | |
133 | case passive_parallel_synchronous: | |
134 | printf ("Passive Parallel Synchronous (PPS)\n"); | |
135 | break; | |
136 | case passive_parallel_asynchronous: | |
137 | printf ("Passive Parallel Asynchronous (PPA)\n"); | |
138 | break; | |
139 | case passive_serial_asynchronous: | |
140 | printf ("Passive Serial Asynchronous (PSA)\n"); | |
141 | break; | |
142 | case altera_jtag_mode: /* Not used */ | |
143 | printf ("JTAG Mode\n"); | |
144 | break; | |
145 | /* Add new interface types here */ | |
146 | default: | |
147 | printf ("Unsupported interface type, %d\n", desc->iface); | |
148 | } | |
149 | ||
150 | printf ("Device Size: \t%d bytes\n" | |
151 | "Cookie: \t0x%x (%d)\n", | |
152 | desc->size, desc->cookie, desc->cookie); | |
153 | ||
154 | if (desc->iface_fns) { | |
155 | printf ("Device Function Table @ 0x%p\n", desc->iface_fns); | |
156 | switch (desc->family) { | |
157 | case Altera_ACEX1K: | |
f0ff4692 | 158 | case Altera_CYC2: |
0133502e | 159 | #if defined(CONFIG_FPGA_ACEX1K) |
5da627a4 | 160 | ACEX1K_info (desc); |
0133502e | 161 | #elif defined(CONFIG_FPGA_CYCLON2) |
f0ff4692 | 162 | CYC2_info (desc); |
5da627a4 WD |
163 | #else |
164 | /* just in case */ | |
165 | printf ("%s: No support for ACEX1K devices.\n", | |
166 | __FUNCTION__); | |
167 | #endif | |
168 | break; | |
169 | /* Add new family types here */ | |
170 | default: | |
171 | /* we don't need a message here - we give one up above */ | |
b77fad3b | 172 | break; |
5da627a4 WD |
173 | } |
174 | } else { | |
175 | printf ("No Device Function Table.\n"); | |
176 | } | |
177 | ||
178 | ret_val = FPGA_SUCCESS; | |
179 | } else { | |
180 | printf ("%s: Invalid device descriptor\n", __FUNCTION__); | |
181 | } | |
182 | ||
183 | return ret_val; | |
184 | } | |
185 | ||
186 | int altera_reloc( Altera_desc *desc, ulong reloc_offset) | |
187 | { | |
188 | int ret_val = FPGA_FAIL; /* assume a failure */ | |
189 | ||
64cd52ef | 190 | if (!altera_validate (desc, (char *)__FUNCTION__)) { |
5da627a4 WD |
191 | printf ("%s: Invalid device descriptor\n", __FUNCTION__); |
192 | } else { | |
193 | switch (desc->family) { | |
194 | case Altera_ACEX1K: | |
0133502e | 195 | #if defined(CONFIG_FPGA_ACEX1K) |
5da627a4 WD |
196 | ret_val = ACEX1K_reloc (desc, reloc_offset); |
197 | #else | |
198 | printf ("%s: No support for ACEX devices.\n", | |
f0ff4692 SR |
199 | __FUNCTION__); |
200 | #endif | |
201 | break; | |
202 | case Altera_CYC2: | |
0133502e | 203 | #if defined(CONFIG_FPGA_CYCLON2) |
f0ff4692 SR |
204 | ret_val = CYC2_reloc (desc, reloc_offset); |
205 | #else | |
206 | printf ("%s: No support for CYCLON II devices.\n", | |
5da627a4 WD |
207 | __FUNCTION__); |
208 | #endif | |
209 | break; | |
210 | /* Add new family types here */ | |
211 | default: | |
212 | printf ("%s: Unsupported family type, %d\n", | |
213 | __FUNCTION__, desc->family); | |
214 | } | |
215 | } | |
216 | ||
217 | return ret_val; | |
5b845b66 WD |
218 | } |
219 | ||
220 | /* ------------------------------------------------------------------------- */ | |
221 | ||
5da627a4 WD |
222 | static int altera_validate (Altera_desc * desc, char *fn) |
223 | { | |
224 | int ret_val = FALSE; | |
225 | ||
226 | if (desc) { | |
227 | if ((desc->family > min_altera_type) && | |
228 | (desc->family < max_altera_type)) { | |
229 | if ((desc->iface > min_altera_iface_type) && | |
230 | (desc->iface < max_altera_iface_type)) { | |
231 | if (desc->size) { | |
232 | ret_val = TRUE; | |
233 | } else { | |
234 | printf ("%s: NULL part size\n", fn); | |
235 | } | |
236 | } else { | |
237 | printf ("%s: Invalid Interface type, %d\n", | |
238 | fn, desc->iface); | |
239 | } | |
240 | } else { | |
241 | printf ("%s: Invalid family type, %d\n", fn, desc->family); | |
242 | } | |
243 | } else { | |
244 | printf ("%s: NULL descriptor!\n", fn); | |
245 | } | |
246 | ||
247 | return ret_val; | |
248 | } | |
5b845b66 WD |
249 | |
250 | /* ------------------------------------------------------------------------- */ | |
251 | ||
0133502e | 252 | #endif /* CONFIG_FPGA & CONFIG_FPGA_ALTERA */ |