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Merge patch series "nand: Add sandbox tests"
[thirdparty/u-boot.git] / common / board_r.c
CommitLineData
83d290c5 1// SPDX-License-Identifier: GPL-2.0+
6f6430d7
SG
2/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
6f6430d7
SG
10 */
11
12#include <common.h>
12d738ae 13#include <api.h>
52f24238 14#include <bootstage.h>
1eb69ae4 15#include <cpu_func.h>
70545642 16#include <cyclic.h>
4e4bf944 17#include <display_options.h>
a6f2aafe 18#include <exports.h>
17ead040 19#ifdef CONFIG_MTD_NOR_FLASH
b79fdc76 20#include <flash.h>
17ead040 21#endif
db41d65a 22#include <hang.h>
8e8ccfe1 23#include <image.h>
36bf446b 24#include <irq_func.h>
f7ae49fc 25#include <log.h>
5e6267af 26#include <net.h>
90526e9f 27#include <asm/cache.h>
401d1c4f 28#include <asm/global_data.h>
3db71108 29#include <u-boot/crc.h>
3c10dc95 30#include <binman.h>
cbb2df20 31#include <command.h>
24b852a7 32#include <console.h>
1ce60176 33#include <dm.h>
3f989e7b 34#include <env.h>
f3998fdc 35#include <env_internal.h>
6f6430d7 36#include <fdtdec.h>
c2240d4d 37#include <ide.h>
6b8d3cea 38#include <init.h>
6f6430d7 39#include <initcall.h>
c2240d4d 40#include <kgdb.h>
c30b7adb 41#include <irq_func.h>
6f6430d7 42#include <malloc.h>
0eb25b61 43#include <mapmem.h>
c2240d4d 44#include <miiphy.h>
6f6430d7 45#include <mmc.h>
90a979d7 46#include <mux.h>
6f6430d7 47#include <nand.h>
3af86a4e 48#include <of_live.h>
6f6430d7 49#include <onenand_uboot.h>
722bc5b5 50#include <pvblock.h>
c2240d4d 51#include <scsi.h>
6f6430d7 52#include <serial.h>
c3e4430e 53#include <status_led.h>
6f6430d7 54#include <stdio_dev.h>
1057e6cf 55#include <timer.h>
71c52dba 56#include <trace.h>
c2240d4d 57#include <watchdog.h>
48654416 58#include <xen.h>
6f6430d7 59#include <asm/sections.h>
1ce60176 60#include <dm/root.h>
7de8bd03 61#include <dm/ofnode.h>
c2240d4d 62#include <linux/compiler.h>
1ce60176 63#include <linux/err.h>
50149ea3 64#include <efi_loader.h>
06985289 65#include <wdt.h>
fd765b0e 66#include <asm-generic/gpio.h>
c57c9439 67#include <efi_loader.h>
13ae36cc 68#include <relocate.h>
6f6430d7
SG
69
70DECLARE_GLOBAL_DATA_PTR;
71
72ulong monitor_flash_len;
73
dd2a6cd0 74__weak int board_flash_wp_on(void)
c2240d4d
SG
75{
76 /*
77 * Most flashes can't be detected when write protection is enabled,
78 * so provide a way to let U-Boot gracefully ignore write protected
79 * devices.
80 */
81 return 0;
82}
83
fb504b2c 84__weak int cpu_secondary_init_r(void)
c2240d4d 85{
c2240d4d
SG
86 return 0;
87}
6f6430d7 88
71c52dba
SG
89static int initr_trace(void)
90{
91#ifdef CONFIG_TRACE
92 trace_init(gd->trace_buff, CONFIG_TRACE_BUFFER_SIZE);
93#endif
94
95 return 0;
96}
97
6f6430d7
SG
98static int initr_reloc(void)
99{
c9356be3
SG
100 /* tell others: relocation done */
101 gd->flags |= GD_FLG_RELOC | GD_FLG_FULL_MALLOC_INIT;
6f6430d7
SG
102
103 return 0;
104}
105
4d4222d0 106#if defined(CONFIG_ARM) || defined(CONFIG_RISCV)
6f6430d7
SG
107/*
108 * Some of these functions are needed purely because the functions they
109 * call return void. If we change them to return 0, these stubs can go away.
110 */
111static int initr_caches(void)
112{
113 /* Enable caches */
114 enable_caches();
115 return 0;
116}
117#endif
118
c2240d4d
SG
119__weak int fixup_cpu(void)
120{
121 return 0;
122}
123
6f6430d7
SG
124static int initr_reloc_global_data(void)
125{
b60eff31
AA
126#ifdef __ARM__
127 monitor_flash_len = _end - __image_copy_start;
11232139 128#elif defined(CONFIG_RISCV)
ccea96f4 129 monitor_flash_len = (ulong)_end - (ulong)_start;
5ff10aa7 130#elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
ccea96f4 131 monitor_flash_len = (ulong)__init_end - gd->relocaddr;
6f6430d7 132#endif
c2240d4d
SG
133#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
134 /*
135 * The gd->cpu pointer is set to an address in flash before relocation.
136 * We need to update it to point to the same CPU entry in RAM.
137 * TODO: why not just add gd->reloc_ofs?
138 */
a0ba279a 139 gd->arch.cpu += gd->relocaddr - CONFIG_SYS_MONITOR_BASE;
c2240d4d
SG
140
141 /*
142 * If we didn't know the cpu mask & # cores, we can save them of
143 * now rather than 'computing' them constantly
144 */
145 fixup_cpu();
146#endif
8d8ee47e 147#ifdef CONFIG_SYS_RELOC_GD_ENV_ADDR
c2240d4d 148 /*
6c6add60
SG
149 * Relocate the early env_addr pointer unless we know it is not inside
150 * the binary. Some systems need this and for the rest, it doesn't hurt.
c2240d4d 151 */
6c6add60 152 gd->env_addr += gd->reloc_off;
c2240d4d 153#endif
50149ea3 154#ifdef CONFIG_EFI_LOADER
e7ac009b
HS
155 /*
156 * On the ARM architecture gd is mapped to a fixed register (r9 or x18).
157 * As this register may be overwritten by an EFI payload we save it here
158 * and restore it on every callback entered.
159 */
160 efi_save_gd();
161
50149ea3
AG
162 efi_runtime_relocate(gd->relocaddr, NULL);
163#endif
e9acb9ea 164
c2240d4d 165 return 0;
6f6430d7
SG
166}
167
130845ba 168__weak int arch_initr_trap(void)
c2240d4d 169{
c2240d4d
SG
170 return 0;
171}
c2240d4d 172
c2240d4d
SG
173#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
174static int initr_unlock_ram_in_cache(void)
175{
176 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
177 return 0;
178}
179#endif
180
c2240d4d
SG
181static int initr_barrier(void)
182{
183#ifdef CONFIG_PPC
184 /* TODO: Can we not use dmb() macros for this? */
185 asm("sync ; isync");
186#endif
187 return 0;
188}
189
6f6430d7
SG
190static int initr_malloc(void)
191{
0be0f205 192 ulong start;
6f6430d7 193
3d6d5075 194#if CONFIG_IS_ENABLED(SYS_MALLOC_F)
d59476b6
SG
195 debug("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
196 gd->malloc_ptr / 1024);
197#endif
6f6430d7 198 /* The malloc area is immediately below the monitor copy in DRAM */
5e0404ff
SW
199 /*
200 * This value MUST match the value of gd->start_addr_sp in board_f.c:
201 * reserve_noncached().
202 */
0be0f205
SG
203 start = gd->relocaddr - TOTAL_MALLOC_LEN;
204 gd_set_malloc_start(start);
205 mem_malloc_init((ulong)map_sysmem(start, TOTAL_MALLOC_LEN),
a733b06b 206 TOTAL_MALLOC_LEN);
6f6430d7
SG
207 return 0;
208}
209
3af86a4e
SG
210static int initr_of_live(void)
211{
a652d9c7
SG
212 if (CONFIG_IS_ENABLED(OF_LIVE)) {
213 int ret;
a132f770 214
a652d9c7
SG
215 bootstage_start(BOOTSTAGE_ID_ACCUM_OF_LIVE, "of_live");
216 ret = of_live_build(gd->fdt_blob,
217 (struct device_node **)gd_of_root_ptr());
218 bootstage_accum(BOOTSTAGE_ID_ACCUM_OF_LIVE);
219 if (ret)
220 return ret;
221 }
a132f770
SG
222
223 return 0;
3af86a4e 224}
3af86a4e 225
1ce60176
SG
226#ifdef CONFIG_DM
227static int initr_dm(void)
228{
1057e6cf
SG
229 int ret;
230
ee88ba71
SG
231 oftree_reset();
232
ab7cd627
SG
233 /* Save the pre-reloc driver model and start a new one */
234 gd->dm_root_f = gd->dm_root;
235 gd->dm_root = NULL;
d74d6b44
SG
236#ifdef CONFIG_TIMER
237 gd->timer = NULL;
238#endif
b67eefdb 239 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_R, "dm_r");
1057e6cf 240 ret = dm_init_and_scan(false);
b67eefdb 241 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_R);
1057e6cf
SG
242 if (ret)
243 return ret;
1057e6cf
SG
244
245 return 0;
1ce60176
SG
246}
247#endif
248
dd0edcb2
SG
249static int initr_dm_devices(void)
250{
251 int ret;
252
253 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
254 ret = dm_timer_init();
255 if (ret)
256 return ret;
257 }
258
90a979d7
JJH
259 if (IS_ENABLED(CONFIG_MULTIPLEXER)) {
260 /*
261 * Initialize the multiplexer controls to their default state.
262 * This must be done early as other drivers may unknowingly
263 * rely on it.
264 */
265 ret = dm_mux_init();
266 if (ret)
267 return ret;
268 }
269
dd0edcb2
SG
270 return 0;
271}
272
881c124a
SG
273static int initr_bootstage(void)
274{
881c124a
SG
275 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R, "board_init_r");
276
277 return 0;
278}
279
6f6430d7
SG
280__weak int power_init_board(void)
281{
282 return 0;
283}
284
285static int initr_announce(void)
286{
a0ba279a 287 debug("Now running in RAM - U-Boot at: %08lx\n", gd->relocaddr);
6f6430d7
SG
288 return 0;
289}
290
3c10dc95
SG
291static int initr_binman(void)
292{
c03cb022
TH
293 int ret;
294
3c10dc95
SG
295 if (!CONFIG_IS_ENABLED(BINMAN_FDT))
296 return 0;
297
c03cb022
TH
298 ret = binman_init();
299 if (ret)
300 printf("binman_init failed:%d\n", ret);
301
302 return ret;
3c10dc95
SG
303}
304
e856bdcf 305#if defined(CONFIG_MTD_NOR_FLASH)
62d3a58d
PG
306__weak int is_flash_available(void)
307{
308 return 1;
309}
310
6f6430d7
SG
311static int initr_flash(void)
312{
c2240d4d 313 ulong flash_size = 0;
b75d8dc5 314 struct bd_info *bd = gd->bd;
6f6430d7 315
62d3a58d
PG
316 if (!is_flash_available())
317 return 0;
318
6f6430d7
SG
319 puts("Flash: ");
320
70879a92 321 if (board_flash_wp_on())
c2240d4d 322 printf("Uninitialized - Write Protect On\n");
70879a92 323 else
c2240d4d 324 flash_size = flash_init();
70879a92 325
6f6430d7
SG
326 print_size(flash_size, "");
327#ifdef CONFIG_SYS_FLASH_CHECKSUM
328 /*
92f84b67
MS
329 * Compute and print flash CRC if flashchecksum is set to 'y'
330 *
29caf930 331 * NOTE: Maybe we should add some schedule()? XXX
92f84b67 332 */
bfebc8c9 333 if (env_get_yesno("flashchecksum") == 1) {
65cc0e2a 334 const uchar *flash_base = (const uchar *)CFG_SYS_FLASH_BASE;
92f84b67 335
6f6430d7 336 printf(" CRC: %08X", crc32(0,
92f84b67
MS
337 flash_base,
338 flash_size));
6f6430d7
SG
339 }
340#endif /* CONFIG_SYS_FLASH_CHECKSUM */
341 putc('\n');
342
c2240d4d 343 /* update start of FLASH memory */
65cc0e2a
TR
344#ifdef CFG_SYS_FLASH_BASE
345 bd->bi_flashstart = CFG_SYS_FLASH_BASE;
c2240d4d
SG
346#endif
347 /* size of FLASH memory (final value) */
348 bd->bi_flashsize = flash_size;
349
350#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
351 /* Make a update of the Memctrl. */
352 update_flash_size(flash_size);
353#endif
354
c2240d4d
SG
355#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
356 /* flash mapped at end of memory map */
98463903 357 bd->bi_flashoffset = CONFIG_TEXT_BASE + flash_size;
65cc0e2a 358#elif CONFIG_SYS_MONITOR_BASE == CFG_SYS_FLASH_BASE
c2240d4d
SG
359 bd->bi_flashoffset = monitor_flash_len; /* reserved area for monitor */
360#endif
361 return 0;
362}
363#endif
364
6f6430d7
SG
365#ifdef CONFIG_CMD_NAND
366/* go init the NAND */
2588ba14 367static int initr_nand(void)
6f6430d7
SG
368{
369 puts("NAND: ");
370 nand_init();
203db38a 371 printf("%lu MiB\n", nand_size() / 1024);
6f6430d7
SG
372 return 0;
373}
374#endif
375
376#if defined(CONFIG_CMD_ONENAND)
377/* go init the NAND */
2588ba14 378static int initr_onenand(void)
6f6430d7
SG
379{
380 puts("NAND: ");
381 onenand_init();
382 return 0;
383}
384#endif
385
4aa2ba3a 386#ifdef CONFIG_MMC
2588ba14 387static int initr_mmc(void)
6f6430d7
SG
388{
389 puts("MMC: ");
390 mmc_initialize(gd->bd);
391 return 0;
392}
393#endif
394
722bc5b5
AL
395#ifdef CONFIG_PVBLOCK
396static int initr_pvblock(void)
397{
398 puts("PVBLOCK: ");
399 pvblock_init();
400 return 0;
401}
402#endif
403
6f6430d7
SG
404/*
405 * Tell if it's OK to load the environment early in boot.
406 *
776babd7 407 * If CONFIG_OF_CONTROL is defined, we'll check with the FDT to see
6f6430d7
SG
408 * if this is OK (defaulting to saying it's OK).
409 *
410 * NOTE: Loading the environment early can be a bad idea if security is
411 * important, since no verification is done on the environment.
412 *
185f812c 413 * Return: 0 if environment should not be loaded, !=0 if it is ok to load
6f6430d7
SG
414 */
415static int should_load_env(void)
416{
9441f8cb 417 if (IS_ENABLED(CONFIG_OF_CONTROL))
7de8bd03 418 return ofnode_conf_read_int("load-environment", 1);
9441f8cb
OP
419
420 if (IS_ENABLED(CONFIG_DELAY_ENVIRONMENT))
421 return 0;
422
6f6430d7 423 return 1;
6f6430d7
SG
424}
425
426static int initr_env(void)
427{
428 /* initialize environment */
429 if (should_load_env())
430 env_relocate();
431 else
0ac7d722 432 env_set_default(NULL, 0);
9441f8cb 433
95fd9772
RV
434 env_import_fdt();
435
9441f8cb
OP
436 if (IS_ENABLED(CONFIG_OF_CONTROL))
437 env_set_hex("fdtcontroladdr",
438 (unsigned long)map_to_sysmem(gd->fdt_blob));
6f6430d7 439
4c776089 440 #if (IS_ENABLED(CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR) || \
10f8bc09 441 IS_ENABLED(CONFIG_SAVE_PREV_BL_FDT_ADDR))
12a3e1ad
DS
442 save_prev_bl_data();
443 #endif
444
6f6430d7 445 /* Initialize from environment */
bb872dd9 446 image_load_addr = env_get_ulong("loadaddr", 16, image_load_addr);
c2240d4d 447
c2240d4d
SG
448 return 0;
449}
450
167f699b 451#ifdef CONFIG_SYS_MALLOC_BOOTPARAMS
c722f0b0
AB
452static int initr_malloc_bootparams(void)
453{
454 gd->bd->bi_boot_params = (ulong)malloc(CONFIG_SYS_BOOTPARAMS_LEN);
455 if (!gd->bd->bi_boot_params) {
456 puts("WARNING: Cannot allocate space for boot parameters\n");
457 return -ENOMEM;
458 }
459 return 0;
460}
461#endif
462
2d8d190c 463#if defined(CONFIG_LED_STATUS)
c2240d4d
SG
464static int initr_status_led(void)
465{
2d8d190c
UM
466#if defined(CONFIG_LED_STATUS_BOOT)
467 status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING);
13cfbe51
BN
468#else
469 status_led_init();
470#endif
c2240d4d
SG
471 return 0;
472}
473#endif
474
6f6430d7
SG
475#ifdef CONFIG_CMD_NET
476static int initr_net(void)
477{
478 puts("Net: ");
d2eaec60 479 eth_initialize();
6f6430d7
SG
480#if defined(CONFIG_RESET_PHY_R)
481 debug("Reset Ethernet PHY\n");
482 reset_phy();
483#endif
484 return 0;
485}
486#endif
487
488#ifdef CONFIG_POST
489static int initr_post(void)
490{
491 post_run(NULL, POST_RAM | post_bootmode_get(0));
492 return 0;
493}
494#endif
495
7c5c137c 496#if defined(CFG_PRAM)
6f6430d7
SG
497/*
498 * Export available size of memory for Linux, taking into account the
499 * protected RAM at top of memory
500 */
501int initr_mem(void)
502{
503 ulong pram = 0;
504 char memsz[32];
505
7c5c137c 506 pram = env_get_ulong("pram", 10, CFG_PRAM);
92f84b67 507 sprintf(memsz, "%ldk", (long int)((gd->ram_size / 1024) - pram));
382bee57 508 env_set("mem", memsz);
c2240d4d
SG
509
510 return 0;
511}
512#endif
513
ff66e7bb
SG
514static int dm_announce(void)
515{
516 int device_count;
517 int uclass_count;
518
519 if (IS_ENABLED(CONFIG_DM)) {
520 dm_get_stats(&device_count, &uclass_count);
521 printf("Core: %d devices, %d uclasses", device_count,
522 uclass_count);
523 if (CONFIG_IS_ENABLED(OF_REAL))
524 printf(", devicetree: %s", fdtdec_get_srcname());
525 printf("\n");
93233b07
SG
526 if (IS_ENABLED(CONFIG_OF_HAS_PRIOR_STAGE) &&
527 (gd->fdt_src == FDTSRC_SEPARATE ||
528 gd->fdt_src == FDTSRC_EMBED)) {
529 printf("Warning: Unexpected devicetree source (not from a prior stage)");
530 printf("Warning: U-Boot may not function properly\n");
531 }
c74e0341
SG
532 if (IS_ENABLED(CONFIG_OF_TAG_MIGRATE) &&
533 (gd->flags & GD_FLG_OF_TAG_MIGRATE))
534 /*
535 * U-Boot will silently fail to work after 2023.07 if
536 * there are old tags present
537 */
538 printf("Warning: Device tree includes old 'u-boot,dm-' tags: please fix by 2023.07!\n");
ff66e7bb
SG
539 }
540
541 return 0;
542}
543
6f6430d7
SG
544static int run_main_loop(void)
545{
a733b06b
SG
546#ifdef CONFIG_SANDBOX
547 sandbox_main_loop_init();
548#endif
467bad5e
SG
549
550 event_notify_null(EVT_MAIN_LOOP);
551
6f6430d7
SG
552 /* main_loop() can return to retry autoboot, if so just run it again */
553 for (;;)
554 main_loop();
555 return 0;
556}
557
558/*
e7f59dea
SG
559 * Over time we hope to remove these functions with code fragments and
560 * stub functions, and instead call the relevant function directly.
561 *
562 * We also hope to remove most of the driver-related init and do it if/when
6f6430d7 563 * the driver is later used.
c2240d4d
SG
564 *
565 * TODO: perhaps reset the watchdog in the initcall function after each call?
6f6430d7 566 */
4acff452 567static init_fnc_t init_sequence_r[] = {
71c52dba 568 initr_trace,
6f6430d7 569 initr_reloc,
87a5d1b5 570 event_init,
c2240d4d 571 /* TODO: could x86/PPC have this also perhaps? */
4d4222d0 572#if defined(CONFIG_ARM) || defined(CONFIG_RISCV)
6f6430d7 573 initr_caches,
12eaf31c
YS
574 /* Note: For Freescale LS2 SoCs, new MMU table is created in DDR.
575 * A temporary mapping of IFC high region is since removed,
92f84b67 576 * so environmental variables in NOR flash is not available
12eaf31c
YS
577 * until board_init() is called below to remap IFC to high
578 * region.
579 */
9fb02491
SG
580#endif
581 initr_reloc_global_data,
fef3e25f
YS
582#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
583 initr_unlock_ram_in_cache,
584#endif
9fb02491
SG
585 initr_barrier,
586 initr_malloc,
af1bc0cf 587 log_init,
5ac44a55 588 initr_bootstage, /* Needs malloc() but has its own timer */
51c5a2c5
OP
589#if defined(CONFIG_CONSOLE_RECORD)
590 console_record_init,
591#endif
671fa63e 592#ifdef CONFIG_SYS_NONCACHED_MEMORY
42d0d422 593 noncached_init,
671fa63e 594#endif
3af86a4e 595 initr_of_live,
9fb02491
SG
596#ifdef CONFIG_DM
597 initr_dm,
598#endif
a43b598c 599#ifdef CONFIG_ADDR_MAP
1b212bb9 600 init_addr_map,
a43b598c 601#endif
11232139 602#if defined(CONFIG_ARM) || defined(CONFIG_RISCV) || defined(CONFIG_SANDBOX)
6f6430d7 603 board_init, /* Setup chipselects */
c2240d4d
SG
604#endif
605 /*
606 * TODO: printing of the clock inforamtion of the board is now
607 * implemented as part of bdinfo command. Currently only support for
608 * davinci SOC's is added. Remove this check once all the board
609 * implement this.
610 */
611#ifdef CONFIG_CLOCKS
612 set_cpu_clk_info, /* Setup clock information */
5d00995c
AG
613#endif
614#ifdef CONFIG_EFI_LOADER
615 efi_memory_init,
6f6430d7 616#endif
3c10dc95 617 initr_binman,
fe08d39d
SG
618#ifdef CONFIG_FSP_VERSION2
619 arch_fsp_init_r,
620#endif
dd0edcb2 621 initr_dm_devices,
9fb02491 622 stdio_init_tables,
bf2fb81a 623 serial_initialize,
6f6430d7 624 initr_announce,
ff66e7bb 625 dm_announce,
6874cb72 626#if CONFIG_IS_ENABLED(WDT)
84b2416b
WG
627 initr_watchdog,
628#endif
c2240d4d 629 INIT_FUNC_WATCHDOG_RESET
130845ba 630 arch_initr_trap,
c2240d4d
SG
631#if defined(CONFIG_BOARD_EARLY_INIT_R)
632 board_early_init_r,
633#endif
634 INIT_FUNC_WATCHDOG_RESET
6f6430d7 635#ifdef CONFIG_POST
7addd3c6 636 post_output_backlog,
6f6430d7 637#endif
c2240d4d 638 INIT_FUNC_WATCHDOG_RESET
b9f6d0f7 639#if defined(CONFIG_PCI_INIT_R) && defined(CONFIG_SYS_EARLY_PCI_INIT)
c2240d4d
SG
640 /*
641 * Do early PCI configuration _before_ the flash gets initialised,
92f84b67 642 * because PCU resources are crucial for flash access on some boards.
c2240d4d 643 */
b9f6d0f7 644 pci_init,
c2240d4d 645#endif
6f6430d7
SG
646#ifdef CONFIG_ARCH_EARLY_INIT_R
647 arch_early_init_r,
648#endif
649 power_init_board,
e856bdcf 650#ifdef CONFIG_MTD_NOR_FLASH
6f6430d7 651 initr_flash,
c2240d4d
SG
652#endif
653 INIT_FUNC_WATCHDOG_RESET
936478e7 654#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_X86)
c2240d4d
SG
655 /* initialize higher level parts of CPU like time base and timers */
656 cpu_init_r,
be274b99 657#endif
023d9c93 658#ifdef CONFIG_EFI_LOADER
5e847f77
HS
659 efi_init_early,
660#endif
6f6430d7
SG
661#ifdef CONFIG_CMD_NAND
662 initr_nand,
663#endif
664#ifdef CONFIG_CMD_ONENAND
665 initr_onenand,
666#endif
4aa2ba3a 667#ifdef CONFIG_MMC
6f6430d7 668 initr_mmc,
48654416
OA
669#endif
670#ifdef CONFIG_XEN
eb2825b7 671 xen_init,
722bc5b5
AL
672#endif
673#ifdef CONFIG_PVBLOCK
674 initr_pvblock,
6f6430d7
SG
675#endif
676 initr_env,
167f699b 677#ifdef CONFIG_SYS_MALLOC_BOOTPARAMS
c722f0b0
AB
678 initr_malloc_bootparams,
679#endif
c2240d4d 680 INIT_FUNC_WATCHDOG_RESET
fb504b2c 681 cpu_secondary_init_r,
d7d40f61 682#if defined(CONFIG_ID_EEPROM)
c2240d4d
SG
683 mac_read_from_eeprom,
684#endif
6092ce50 685 INITCALL_EVENT(EVT_SETTINGS_R),
c2240d4d 686 INIT_FUNC_WATCHDOG_RESET
b9f6d0f7 687#if defined(CONFIG_PCI_INIT_R) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
c2240d4d
SG
688 /*
689 * Do pci configuration
690 */
b9f6d0f7 691 pci_init,
c2240d4d 692#endif
9fb02491 693 stdio_add_devices,
01548580 694 jumptable_init,
6f6430d7 695#ifdef CONFIG_API
ce41e735 696 api_init,
6f6430d7
SG
697#endif
698 console_init_r, /* fully init console as a device */
699#ifdef CONFIG_DISPLAY_BOARDINFO_LATE
b0895384 700 console_announce_r,
0365ffcc 701 show_board_info,
6f6430d7
SG
702#endif
703#ifdef CONFIG_ARCH_MISC_INIT
704 arch_misc_init, /* miscellaneous arch-dependent init */
705#endif
706#ifdef CONFIG_MISC_INIT_R
707 misc_init_r, /* miscellaneous platform-dependent init */
c2240d4d
SG
708#endif
709 INIT_FUNC_WATCHDOG_RESET
710#ifdef CONFIG_CMD_KGDB
78fc0395 711 kgdb_init,
6f6430d7
SG
712#endif
713 interrupt_init,
daab59ac 714#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K)
be274b99
SG
715 timer_init, /* initialize timer */
716#endif
2d8d190c 717#if defined(CONFIG_LED_STATUS)
c2240d4d
SG
718 initr_status_led,
719#endif
720 /* PPC has a udelay(20) here dating from 2002. Why? */
6f6430d7
SG
721#ifdef CONFIG_BOARD_LATE_INIT
722 board_late_init,
723#endif
724#ifdef CONFIG_BITBANGMII
c65abc70 725 bb_miiphy_init,
6f6430d7 726#endif
fd00c53f 727#ifdef CONFIG_PCI_ENDPOINT
c343e8c0 728 pci_ep_init,
fd00c53f 729#endif
6f6430d7 730#ifdef CONFIG_CMD_NET
c2240d4d 731 INIT_FUNC_WATCHDOG_RESET
6f6430d7
SG
732 initr_net,
733#endif
734#ifdef CONFIG_POST
735 initr_post,
c2240d4d 736#endif
c2240d4d 737 INIT_FUNC_WATCHDOG_RESET
91caa3bb 738 INITCALL_EVENT(EVT_LAST_STAGE_INIT),
7c5c137c 739#if defined(CFG_PRAM)
c2240d4d 740 initr_mem,
6f6430d7
SG
741#endif
742 run_main_loop,
743};
744
745void board_init_r(gd_t *new_gd, ulong dest_addr)
746{
c38a21d7
SG
747 /*
748 * The pre-relocation drivers may be using memory that has now gone
749 * away. Mark serial as unavailable - this will fall back to the debug
750 * UART if available.
751 *
752 * Do the same with log drivers since the memory may not be available.
753 */
754 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
755
fb92308b
SG
756 /*
757 * Set up the new global data pointer. So far only x86 does this
758 * here.
759 * TODO(sjg@chromium.org): Consider doing this for all archs, or
760 * dropping the new_gd parameter.
761 */
86bb4888
SG
762 if (CONFIG_IS_ENABLED(X86_64) && !IS_ENABLED(CONFIG_EFI_APP))
763 arch_setup_gd(new_gd);
fb92308b 764
47a602ea 765#if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
6f6430d7 766 gd = new_gd;
be274b99 767#endif
af1bc0cf 768 gd->flags &= ~GD_FLG_LOG_READY;
7395398a 769
6f6430d7
SG
770 if (initcall_run_list(init_sequence_r))
771 hang();
772
773 /* NOTREACHED - run_main_loop() does not return */
774 hang();
775}