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Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
[people/ms/u-boot.git] / common / cmd_bdinfo.c
CommitLineData
8bde7f77
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Boot support
26 */
27#include <common.h>
28#include <command.h>
29
d87080b7 30DECLARE_GLOBAL_DATA_PTR;
8bde7f77 31
8bde7f77
WD
32static void print_num(const char *, ulong);
33
26e42cbd 34#if !defined(CONFIG_ARM) || defined(CONFIG_CMD_NET)
de2dff6f 35static void print_eth(int idx);
26e42cbd 36#endif
de2dff6f 37
8bde7f77 38#ifndef CONFIG_ARM /* PowerPC and other */
b57ca3e1 39static void print_lnum(const char *, u64);
8bde7f77
WD
40
41#ifdef CONFIG_PPC
42static void print_str(const char *, const char *);
43
44int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
45{
8bde7f77
WD
46 bd_t *bd = gd->bd;
47 char buf[32];
48
49#ifdef DEBUG
50 print_num ("bd address", (ulong)bd );
51#endif
52 print_num ("memstart", bd->bi_memstart );
b57ca3e1 53 print_lnum ("memsize", bd->bi_memsize );
8bde7f77
WD
54 print_num ("flashstart", bd->bi_flashstart );
55 print_num ("flashsize", bd->bi_flashsize );
56 print_num ("flashoffset", bd->bi_flashoffset );
57 print_num ("sramstart", bd->bi_sramstart );
58 print_num ("sramsize", bd->bi_sramsize );
97d80fc3
WD
59#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \
60 defined(CONFIG_8260) || defined(CONFIG_E500)
8bde7f77
WD
61 print_num ("immr_base", bd->bi_immr_base );
62#endif
63 print_num ("bootflags", bd->bi_bootflags );
97d80fc3 64#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
9fea65a6 65 defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \
6c5879f3 66 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
887e2ec9
SR
67 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
68 defined(CONFIG_440SP) || defined(CONFIG_440SPE)
8bde7f77 69 print_str ("procfreq", strmhz(buf, bd->bi_procfreq));
983fda83 70 print_str ("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq));
9fea65a6 71#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_XILINX_405) || \
887e2ec9
SR
72 defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) || \
73 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
983fda83 74 print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq));
8bde7f77 75#endif
9fea65a6 76#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
9c4c5ae3 77#if defined(CONFIG_CPM2)
8bde7f77
WD
78 print_str ("vco", strmhz(buf, bd->bi_vco));
79 print_str ("sccfreq", strmhz(buf, bd->bi_sccfreq));
80 print_str ("brgfreq", strmhz(buf, bd->bi_brgfreq));
81#endif
82 print_str ("intfreq", strmhz(buf, bd->bi_intfreq));
9c4c5ae3 83#if defined(CONFIG_CPM2)
8bde7f77
WD
84 print_str ("cpmfreq", strmhz(buf, bd->bi_cpmfreq));
85#endif
86 print_str ("busfreq", strmhz(buf, bd->bi_busfreq));
9fea65a6 87#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
983fda83
WD
88#if defined(CONFIG_MPC8220)
89 print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq));
90 print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq));
91 print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq));
92 print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq));
93 print_str ("pevfreq", strmhz(buf, bd->bi_pevfreq));
94#endif
03f5c550 95
de2dff6f 96 print_eth(0);
e2ffd59b 97#if defined(CONFIG_HAS_ETH1)
de2dff6f 98 print_eth(1);
03f5c550 99#endif
e2ffd59b 100#if defined(CONFIG_HAS_ETH2)
de2dff6f 101 print_eth(2);
42d1f039 102#endif
e2ffd59b 103#if defined(CONFIG_HAS_ETH3)
de2dff6f 104 print_eth(3);
03f5c550 105#endif
c68a05fe 106#if defined(CONFIG_HAS_ETH4)
de2dff6f 107 print_eth(4);
c68a05fe 108#endif
c68a05fe 109#if defined(CONFIG_HAS_ETH5)
de2dff6f 110 print_eth(5);
c68a05fe 111#endif
112
8bde7f77
WD
113#ifdef CONFIG_HERMES
114 print_str ("ethspeed", strmhz(buf, bd->bi_ethspeed));
115#endif
b6446b67
MF
116 printf ("IP addr = %pI4\n", &bd->bi_ip_addr);
117 printf ("baudrate = %6ld bps\n", bd->bi_baudrate );
8bde7f77
WD
118 return 0;
119}
120
4a551709
WD
121#elif defined(CONFIG_NIOS) /* NIOS*/
122
123int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
124{
4a551709
WD
125 bd_t *bd = gd->bd;
126
127 print_num ("memstart", (ulong)bd->bi_memstart);
b57ca3e1 128 print_lnum ("memsize", (u64)bd->bi_memsize);
4a551709
WD
129 print_num ("flashstart", (ulong)bd->bi_flashstart);
130 print_num ("flashsize", (ulong)bd->bi_flashsize);
131 print_num ("flashoffset", (ulong)bd->bi_flashoffset);
132
de2dff6f 133 print_eth(0);
b6446b67
MF
134 printf ("ip_addr = %pI4\n", &bd->bi_ip_addr);
135 printf ("baudrate = %ld bps\n", bd->bi_baudrate);
4a551709
WD
136
137 return 0;
138}
139
5c952cf0
WD
140#elif defined(CONFIG_NIOS2) /* Nios-II */
141
142int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
143{
5c952cf0
WD
144 bd_t *bd = gd->bd;
145
146 print_num ("mem start", (ulong)bd->bi_memstart);
b57ca3e1 147 print_lnum ("mem size", (u64)bd->bi_memsize);
5c952cf0
WD
148 print_num ("flash start", (ulong)bd->bi_flashstart);
149 print_num ("flash size", (ulong)bd->bi_flashsize);
150 print_num ("flash offset", (ulong)bd->bi_flashoffset);
151
6d0f6bcf 152#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
153 print_num ("sram start", (ulong)bd->bi_sramstart);
154 print_num ("sram size", (ulong)bd->bi_sramsize);
155#endif
156
90253178 157#if defined(CONFIG_CMD_NET)
de2dff6f 158 print_eth(0);
b6446b67 159 printf ("ip_addr = %pI4\n", &bd->bi_ip_addr);
5c952cf0
WD
160#endif
161
b6446b67 162 printf ("baudrate = %ld bps\n", bd->bi_baudrate);
5c952cf0
WD
163
164 return 0;
165}
cfc67116
MS
166#elif defined(CONFIG_MICROBLAZE) /* ! PPC, which leaves Microblaze */
167
168int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
169{
cfc67116
MS
170 bd_t *bd = gd->bd;
171 print_num ("mem start ", (ulong)bd->bi_memstart);
b57ca3e1 172 print_lnum ("mem size ", (u64)bd->bi_memsize);
cfc67116
MS
173 print_num ("flash start ", (ulong)bd->bi_flashstart);
174 print_num ("flash size ", (ulong)bd->bi_flashsize);
175 print_num ("flash offset ", (ulong)bd->bi_flashoffset);
6d0f6bcf 176#if defined(CONFIG_SYS_SRAM_BASE)
cfc67116
MS
177 print_num ("sram start ", (ulong)bd->bi_sramstart);
178 print_num ("sram size ", (ulong)bd->bi_sramsize);
179#endif
90253178 180#if defined(CONFIG_CMD_NET)
de2dff6f 181 print_eth(0);
b6446b67 182 printf ("ip_addr = %pI4\n", &bd->bi_ip_addr);
cfc67116 183#endif
b6446b67 184 printf ("baudrate = %ld bps\n", (ulong)bd->bi_baudrate);
cfc67116
MS
185 return 0;
186}
4a551709 187
00ab32c8
DH
188#elif defined(CONFIG_SPARC) /* SPARC */
189int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
190{
191 bd_t *bd = gd->bd;
00ab32c8
DH
192
193#ifdef DEBUG
194 print_num("bd address ", (ulong) bd);
195#endif
196 print_num("memstart ", bd->bi_memstart);
b57ca3e1 197 print_lnum("memsize ", bd->bi_memsize);
00ab32c8 198 print_num("flashstart ", bd->bi_flashstart);
6d0f6bcf 199 print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE);
0e8d1586 200 print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR);
6d0f6bcf
JCPV
201 printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%lx (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE,
202 CONFIG_SYS_MONITOR_LEN);
203 printf("CONFIG_SYS_MALLOC_BASE = 0x%lx (%d)\n", CONFIG_SYS_MALLOC_BASE,
204 CONFIG_SYS_MALLOC_LEN);
205 printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_INIT_SP_OFFSET,
206 CONFIG_SYS_STACK_SIZE);
207 printf("CONFIG_SYS_PROM_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_PROM_OFFSET,
208 CONFIG_SYS_PROM_SIZE);
209 printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%lx (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET,
210 CONFIG_SYS_GBL_DATA_SIZE);
00ab32c8
DH
211
212#if defined(CONFIG_CMD_NET)
de2dff6f 213 print_eth(0);
b6446b67 214 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
00ab32c8 215#endif
b6446b67 216 printf("baudrate = %6ld bps\n", bd->bi_baudrate);
00ab32c8
DH
217 return 0;
218}
219
8e585f02 220#elif defined(CONFIG_M68K) /* M68K */
8ae158cd 221static void print_str(const char *, const char *);
8e585f02
TL
222
223int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
224{
8e585f02 225 bd_t *bd = gd->bd;
8ae158cd
TL
226 char buf[32];
227
8e585f02 228 print_num ("memstart", (ulong)bd->bi_memstart);
b57ca3e1 229 print_lnum ("memsize", (u64)bd->bi_memsize);
8e585f02
TL
230 print_num ("flashstart", (ulong)bd->bi_flashstart);
231 print_num ("flashsize", (ulong)bd->bi_flashsize);
232 print_num ("flashoffset", (ulong)bd->bi_flashoffset);
6d0f6bcf 233#if defined(CONFIG_SYS_INIT_RAM_ADDR)
8ae158cd
TL
234 print_num ("sramstart", (ulong)bd->bi_sramstart);
235 print_num ("sramsize", (ulong)bd->bi_sramsize);
8e585f02 236#endif
6d0f6bcf 237#if defined(CONFIG_SYS_MBAR)
8ae158cd 238 print_num ("mbar", bd->bi_mbar_base);
8e585f02 239#endif
ee73cc59 240 print_str ("cpufreq", strmhz(buf, bd->bi_intfreq));
8ae158cd
TL
241 print_str ("busfreq", strmhz(buf, bd->bi_busfreq));
242#ifdef CONFIG_PCI
243 print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq));
244#endif
245#ifdef CONFIG_EXTRA_CLOCK
246 print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq));
247 print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq));
248 print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq));
249#endif
26667b7f 250#if defined(CONFIG_CMD_NET)
de2dff6f 251 print_eth(0);
8e585f02 252#if defined(CONFIG_HAS_ETH1)
de2dff6f 253 print_eth(1);
8e585f02 254#endif
8e585f02 255#if defined(CONFIG_HAS_ETH2)
de2dff6f 256 print_eth(2);
8e585f02 257#endif
8e585f02 258#if defined(CONFIG_HAS_ETH3)
de2dff6f 259 print_eth(3);
8e585f02
TL
260#endif
261
b6446b67 262 printf ("ip_addr = %pI4\n", &bd->bi_ip_addr);
26667b7f 263#endif
b6446b67 264 printf ("baudrate = %ld bps\n", bd->bi_baudrate);
8e585f02
TL
265
266 return 0;
267}
268
8dc48d71 269#elif defined(CONFIG_BLACKFIN)
6dadc919 270static void print_str(const char *, const char *);
8dc48d71
MF
271
272int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
273{
8dc48d71 274 bd_t *bd = gd->bd;
6dadc919 275 char buf[32];
8dc48d71
MF
276
277 printf("U-Boot = %s\n", bd->bi_r_version);
278 printf("CPU = %s\n", bd->bi_cpu);
279 printf("Board = %s\n", bd->bi_board_name);
6dadc919
MF
280 print_str("VCO", strmhz(buf, bd->bi_vco));
281 print_str("CCLK", strmhz(buf, bd->bi_cclk));
282 print_str("SCLK", strmhz(buf, bd->bi_sclk));
8dc48d71
MF
283
284 print_num("boot_params", (ulong)bd->bi_boot_params);
285 print_num("memstart", (ulong)bd->bi_memstart);
b57ca3e1 286 print_lnum("memsize", (u64)bd->bi_memsize);
8dc48d71
MF
287 print_num("flashstart", (ulong)bd->bi_flashstart);
288 print_num("flashsize", (ulong)bd->bi_flashsize);
289 print_num("flashoffset", (ulong)bd->bi_flashoffset);
290
de2dff6f 291 print_eth(0);
b6446b67
MF
292 printf("ip_addr = %pI4\n", &bd->bi_ip_addr);
293 printf("baudrate = %d bps\n", bd->bi_baudrate);
8dc48d71
MF
294
295 return 0;
296}
297
8bde7f77
WD
298#else /* ! PPC, which leaves MIPS */
299
300int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
301{
8bde7f77
WD
302 bd_t *bd = gd->bd;
303
304 print_num ("boot_params", (ulong)bd->bi_boot_params);
305 print_num ("memstart", (ulong)bd->bi_memstart);
b57ca3e1 306 print_lnum ("memsize", (u64)bd->bi_memsize);
8bde7f77
WD
307 print_num ("flashstart", (ulong)bd->bi_flashstart);
308 print_num ("flashsize", (ulong)bd->bi_flashsize);
309 print_num ("flashoffset", (ulong)bd->bi_flashoffset);
310
de2dff6f 311 print_eth(0);
b6446b67
MF
312 printf ("ip_addr = %pI4\n", &bd->bi_ip_addr);
313 printf ("baudrate = %d bps\n", bd->bi_baudrate);
8bde7f77
WD
314
315 return 0;
316}
317#endif /* MIPS */
318
319#else /* ARM */
320
321int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
322{
8bde7f77
WD
323 int i;
324 bd_t *bd = gd->bd;
325
326 print_num ("arch_number", bd->bi_arch_number);
327 print_num ("env_t", (ulong)bd->bi_env);
328 print_num ("boot_params", (ulong)bd->bi_boot_params);
329
330 for (i=0; i<CONFIG_NR_DRAM_BANKS; ++i) {
331 print_num("DRAM bank", i);
332 print_num("-> start", bd->bi_dram[i].start);
333 print_num("-> size", bd->bi_dram[i].size);
334 }
335
a41dbbd9 336#if defined(CONFIG_CMD_NET)
de2dff6f 337 print_eth(0);
b6446b67 338 printf ("ip_addr = %pI4\n", &bd->bi_ip_addr);
a41dbbd9 339#endif
b6446b67 340 printf ("baudrate = %d bps\n", bd->bi_baudrate);
8bde7f77
WD
341
342 return 0;
343}
344
345#endif /* CONFIG_ARM XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
346
347static void print_num(const char *name, ulong value)
348{
349 printf ("%-12s= 0x%08lX\n", name, value);
350}
351
26e42cbd 352#if !defined(CONFIG_ARM) || defined(CONFIG_CMD_NET)
de2dff6f
MF
353static void print_eth(int idx)
354{
355 char name[10], *val;
356 if (idx)
357 sprintf(name, "eth%iaddr", idx);
358 else
359 strcpy(name, "ethaddr");
360 val = getenv(name);
361 if (!val)
362 val = "(not set)";
363 printf("%-12s= %s\n", name, val);
364}
26e42cbd 365#endif
de2dff6f 366
b57ca3e1
BB
367#ifndef CONFIG_ARM
368static void print_lnum(const char *name, u64 value)
369{
370 printf ("%-12s= 0x%.8llX\n", name, value);
371}
372#endif
373
6dadc919 374#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_BLACKFIN)
8bde7f77
WD
375static void print_str(const char *name, const char *str)
376{
377 printf ("%-12s= %6s MHz\n", name, str);
378}
379#endif /* CONFIG_PPC */
380
381
382/* -------------------------------------------------------------------- */
383
0d498393
WD
384U_BOOT_CMD(
385 bdinfo, 1, 1, do_bdinfo,
2fb2604d 386 "print Board Info structure",
a89c33db 387 ""
8bde7f77 388);