[thirdparty/u-boot.git] / common / cmd_fpga.c

/*
 * (C) Copyright 2000, 2001
 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 */

/*
 *  FPGA support
 */
#include <common.h>
#include <command.h>
#if (CONFIG_COMMANDS & CFG_CMD_NET)
#include <net.h>
#endif
#include <fpga.h>

#if 0
#define	FPGA_DEBUG
#endif

#ifdef	FPGA_DEBUG
#define	PRINTF(fmt,args...)	printf (fmt ,##args)
#else
#define PRINTF(fmt,args...)
#endif

#if defined (CONFIG_FPGA) && ( CONFIG_COMMANDS & CFG_CMD_FPGA )

/* Local functions */
static void fpga_usage (cmd_tbl_t * cmdtp);
static int fpga_get_op (char *opstr);

/* Local defines */
#define FPGA_NONE   -1
#define FPGA_INFO   0
#define FPGA_LOAD   1
#define FPGA_LOADB  2
#define FPGA_DUMP   3

/* Convert bitstream data and load into the fpga */
int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
{
	int length;
	char* swapdata;
	int swapsize;
	char buffer[80];
	char *ptr;
	char *dataptr;
	int data;
	int i;
	int rc;

	dataptr = fpgadata;

#if CFG_FPGA_XILINX
	/* skip the first 13 bytes of the bitsteam, their meaning is unknown */
	dataptr+=13;

	/* get design name (identifier, length, string) */
	if (*dataptr++ != 0x61) {
		PRINTF(__FUNCTION__ ": Design name identifier not recognized in bitstream.\n");
		return FPGA_FAIL;
	}

	length = (*dataptr << 8) + *(dataptr+1);
	dataptr+=2;
	for(i=0;i<length;i++)
		buffer[i]=*dataptr++;

	buffer[length-5]='\0'; /* remove filename extension */
	PRINTF(__FUNCTION__ ": design name = \"%s\".\n",buffer);

	/* get part number (identifier, length, string) */
	if (*dataptr++ != 0x62) {
		printf(__FUNCTION__ ": Part number identifier not recognized in bitstream.\n");
		return FPGA_FAIL;
	}

	length = (*dataptr << 8) + *(dataptr+1); dataptr+=2;
	for(i=0;i<length;i++)
		buffer[i]=*dataptr++;
	PRINTF(__FUNCTION__ ": part number = \"%s\".\n",buffer);

	/* get date (identifier, length, string) */
	if (*dataptr++ != 0x63) {
		printf(__FUNCTION__ ": Date identifier not recognized in bitstream.\n");
		return FPGA_FAIL;
	}

	length = (*dataptr << 8) + *(dataptr+1); dataptr+=2;
	for(i=0;i<length;i++)
		buffer[i]=*dataptr++;
	PRINTF(__FUNCTION__ ": date = \"%s\".\n",buffer);

	/* get time (identifier, length, string) */
	if (*dataptr++ != 0x64) {
		printf(__FUNCTION__ ": Time identifier not recognized in bitstream.\n");
		return FPGA_FAIL;
	}

	length = (*dataptr << 8) + *(dataptr+1); dataptr+=2;
	for(i=0;i<length;i++)
		buffer[i]=*dataptr++;
	PRINTF(__FUNCTION__ ": time = \"%s\".\n",buffer);

	/* get fpga data length (identifier, length) */
	if (*dataptr++ != 0x65) {
		printf(__FUNCTION__ ": Data length identifier not recognized in bitstream.\n");
		return FPGA_FAIL;
	}
	swapsize = ((long)*dataptr<<24) + ((long)*(dataptr+1)<<16) + ((long)*(dataptr+2)<<8) + (long)*(dataptr+3);
	dataptr+=4;
	PRINTF(__FUNCTION__ ": bytes in bitstream = %d.\n",swapsize);

	/* check consistency of length obtained */
	if (swapsize >= size) {
		printf(__FUNCTION__ ": Could not find right length of data in bitstream.\n");
		return FPGA_FAIL;
	}

	/* allocate memory */
	swapdata = (char *)malloc(swapsize);
	if (swapdata == NULL) {
		printf(__FUNCTION__ ": Could not allocate %d bytes memory !\n",swapsize);
		return FPGA_FAIL;
	}

	/* read data into memory and swap bits */
	ptr = swapdata;
	for (i = 0; i < swapsize; i++) {
		data = 0x00;
		data |= (*dataptr & 0x01) << 7;
		data |= (*dataptr & 0x02) << 5;
		data |= (*dataptr & 0x04) << 3;
		data |= (*dataptr & 0x08) << 1;
		data |= (*dataptr & 0x10) >> 1;
		data |= (*dataptr & 0x20) >> 3;
		data |= (*dataptr & 0x40) >> 5;
		data |= (*dataptr & 0x80) >> 7;
		*ptr++ = data;
		dataptr++;
	}

	rc = fpga_load(dev, swapdata, swapsize);
	free(swapdata);
	return rc;
#else
	printf("Bitstream support only for Xilinx devices.\n");
	return FPGA_FAIL;
#endif
}

/* ------------------------------------------------------------------------- */
/* command form:
 *   fpga <op> <device number> <data addr> <datasize>
 * where op is 'load', 'dump', or 'info'
 * If there is no device number field, the fpga environment variable is used.
 * If there is no data addr field, the fpgadata environment variable is used.
 * The info command requires no data address field.
 */
int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
	int op, dev = FPGA_INVALID_DEVICE;
	size_t data_size = 0;
	void *fpga_data = NULL;
	char *devstr = getenv ("fpga");
	char *datastr = getenv ("fpgadata");
	int rc = FPGA_FAIL;

	if (devstr)
		dev = (int) simple_strtoul (devstr, NULL, 16);
	if (datastr)
		fpga_data = (void *) simple_strtoul (datastr, NULL, 16);

	switch (argc) {
	case 5:		/* fpga <op> <dev> <data> <datasize> */
		data_size = simple_strtoul (argv[4], NULL, 16);
	case 4:		/* fpga <op> <dev> <data> */
		fpga_data = (void *) simple_strtoul (argv[3], NULL, 16);
		PRINTF (__FUNCTION__ ": fpga_data = 0x%x\n",
			(uint) fpga_data);
	case 3:		/* fpga <op> <dev | data addr> */
		dev = (int) simple_strtoul (argv[2], NULL, 16);
		PRINTF (__FUNCTION__ ": device = %d\n", dev);
		/* FIXME - this is a really weak test */
		if ((argc == 3) && (dev > fpga_count ())) {	/* must be buffer ptr */
			PRINTF (__FUNCTION__
				": Assuming buffer pointer in arg 3\n");
			fpga_data = (void *) dev;
			PRINTF (__FUNCTION__ ": fpga_data = 0x%x\n",
				(uint) fpga_data);
			dev = FPGA_INVALID_DEVICE;	/* reset device num */
		}
	case 2:		/* fpga <op> */
		op = (int) fpga_get_op (argv[1]);
		break;
	default:
		PRINTF (__FUNCTION__ ": Too many or too few args (%d)\n",
			argc);
		op = FPGA_NONE;	/* force usage display */
		break;
	}

	switch (op) {
	case FPGA_NONE:
		fpga_usage (cmdtp);
		break;

	case FPGA_INFO:
		rc = fpga_info (dev);
		break;

	case FPGA_LOAD:
		rc = fpga_load (dev, fpga_data, data_size);
		break;

	case FPGA_LOADB:
		rc = fpga_loadbitstream(dev, fpga_data, data_size);
		break;

	case FPGA_DUMP:
		rc = fpga_dump (dev, fpga_data, data_size);
		break;

	default:
		printf ("Unknown operation.\n");
		fpga_usage (cmdtp);
		break;
	}
	return (rc);
}

static void fpga_usage (cmd_tbl_t * cmdtp)
{
	printf ("Usage:\n%s\n", cmdtp->usage);
}

/*
 * Map op to supported operations.  We don't use a table since we
 * would just have to relocate it from flash anyway.
 */
static int fpga_get_op (char *opstr)
{
	int op = FPGA_NONE;

	if (!strcmp ("info", opstr)) {
		op = FPGA_INFO;
	} else if (!strcmp ("loadb", opstr)) {
		op = FPGA_LOADB;
	} else if (!strcmp ("load", opstr)) {
		op = FPGA_LOAD;
	} else if (!strcmp ("dump", opstr)) {
		op = FPGA_DUMP;
	}

	if (op == FPGA_NONE) {
		printf ("Unknown fpga operation \"%s\"\n", opstr);
	}
	return op;
}

U_BOOT_CMD (fpga, 6, 1, do_fpga,
	    "fpga    - loadable FPGA image support\n",
	    "fpga [operation type] [device number] [image address] [image size]\n"
	    "fpga operations:\n"
	    "\tinfo\tlist known device information.\n"
	    "\tload\tLoad device from memory buffer.\n"
	    "\tloadb\tLoad device from bitstream buffer (Xilinx devices only).\n"
	    "\tdump\tLoad device to memory buffer.\n");
#endif /* CONFIG_FPGA && CONFIG_COMMANDS & CFG_CMD_FPGA */
Commit	Line	Data
4a9cbbe8 WD	1	/*
	2	* (C) Copyright 2000, 2001
	3	* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*
	23	*/
	24
	25	/*
	26	* FPGA support
	27	*/
	28	#include <common.h>
	29	#include <command.h>
4a9cbbe8 WD	30	#if (CONFIG_COMMANDS & CFG_CMD_NET)
	31	#include <net.h>
	32	#endif
8bde7f77	33	#include <fpga.h>
4a9cbbe8 WD	34
	35	#if 0
	36	#define FPGA_DEBUG
	37	#endif
	38
	39	#ifdef FPGA_DEBUG
	40	#define PRINTF(fmt,args...) printf (fmt ,##args)
	41	#else
	42	#define PRINTF(fmt,args...)
	43	#endif
	44
	45	#if defined (CONFIG_FPGA) && ( CONFIG_COMMANDS & CFG_CMD_FPGA )
	46
	47	/* Local functions */
d4ca31c4 WD	48	static void fpga_usage (cmd_tbl_t * cmdtp);
d4ca31c4 WD	49	static int fpga_get_op (char *opstr);
4a9cbbe8 WD	50
	51	/* Local defines */
	52	#define FPGA_NONE -1
	53	#define FPGA_INFO 0
	54	#define FPGA_LOAD 1
30ce5ab0	55	#define FPGA_LOADB 2
4a9cbbe8 WD	56	#define FPGA_DUMP 3
4a9cbbe8 WD	57
30ce5ab0 WD	58	/* Convert bitstream data and load into the fpga */
	59	int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
	60	{
	61	int length;
	62	char* swapdata;
	63	int swapsize;
	64	char buffer[80];
	65	char *ptr;
	66	char *dataptr;
	67	int data;
	68	int i;
	69	int rc;
	70
	71	dataptr = fpgadata;
	72
	73	#if CFG_FPGA_XILINX
	74	/* skip the first 13 bytes of the bitsteam, their meaning is unknown */
	75	dataptr+=13;
	76
	77	/* get design name (identifier, length, string) */
	78	if (*dataptr++ != 0x61) {
	79	PRINTF(__FUNCTION__ ": Design name identifier not recognized in bitstream.\n");
	80	return FPGA_FAIL;
	81	}
	82
a562e1bd	83	length = (dataptr << 8) + (dataptr+1);
30ce5ab0 WD	84	dataptr+=2;
	85	for(i=0;i<length;i++)
	86	buffer[i]=*dataptr++;
a562e1bd	87
30ce5ab0 WD	88	buffer[length-5]='\0'; /* remove filename extension */
	89	PRINTF(__FUNCTION__ ": design name = \"%s\".\n",buffer);
	90
	91	/* get part number (identifier, length, string) */
	92	if (*dataptr++ != 0x62) {
	93	printf(__FUNCTION__ ": Part number identifier not recognized in bitstream.\n");
	94	return FPGA_FAIL;
	95	}
a562e1bd	96
30ce5ab0	97	length = (dataptr << 8) + (dataptr+1); dataptr+=2;
a562e1bd	98	for(i=0;i<length;i++)
30ce5ab0 WD	99	buffer[i]=*dataptr++;
30ce5ab0 WD	100	PRINTF(__FUNCTION__ ": part number = \"%s\".\n",buffer);
a562e1bd	101
30ce5ab0 WD	102	/* get date (identifier, length, string) */
	103	if (*dataptr++ != 0x63) {
	104	printf(__FUNCTION__ ": Date identifier not recognized in bitstream.\n");
	105	return FPGA_FAIL;
	106	}
a562e1bd	107
30ce5ab0 WD	108	length = (dataptr << 8) + (dataptr+1); dataptr+=2;
	109	for(i=0;i<length;i++)
	110	buffer[i]=*dataptr++;
	111	PRINTF(__FUNCTION__ ": date = \"%s\".\n",buffer);
	112
	113	/* get time (identifier, length, string) */
	114	if (*dataptr++ != 0x64) {
	115	printf(__FUNCTION__ ": Time identifier not recognized in bitstream.\n");
	116	return FPGA_FAIL;
	117	}
a562e1bd	118
30ce5ab0 WD	119	length = (dataptr << 8) + (dataptr+1); dataptr+=2;
	120	for(i=0;i<length;i++)
	121	buffer[i]=*dataptr++;
	122	PRINTF(__FUNCTION__ ": time = \"%s\".\n",buffer);
a562e1bd	123
30ce5ab0 WD	124	/* get fpga data length (identifier, length) */
	125	if (*dataptr++ != 0x65) {
	126	printf(__FUNCTION__ ": Data length identifier not recognized in bitstream.\n");
	127	return FPGA_FAIL;
	128	}
	129	swapsize = ((long)dataptr<<24) + ((long)(dataptr+1)<<16) + ((long)(dataptr+2)<<8) + (long)(dataptr+3);
	130	dataptr+=4;
	131	PRINTF(__FUNCTION__ ": bytes in bitstream = %d.\n",swapsize);
a562e1bd	132
30ce5ab0 WD	133	/* check consistency of length obtained */
	134	if (swapsize >= size) {
	135	printf(__FUNCTION__ ": Could not find right length of data in bitstream.\n");
	136	return FPGA_FAIL;
	137	}
a562e1bd	138
30ce5ab0 WD	139	/* allocate memory */
	140	swapdata = (char *)malloc(swapsize);
	141	if (swapdata == NULL) {
	142	printf(__FUNCTION__ ": Could not allocate %d bytes memory !\n",swapsize);
	143	return FPGA_FAIL;
	144	}
a562e1bd	145
30ce5ab0 WD	146	/* read data into memory and swap bits */
	147	ptr = swapdata;
	148	for (i = 0; i < swapsize; i++) {
	149	data = 0x00;
	150	data \|= (*dataptr & 0x01) << 7;
	151	data \|= (*dataptr & 0x02) << 5;
	152	data \|= (*dataptr & 0x04) << 3;
	153	data \|= (*dataptr & 0x08) << 1;
	154	data \|= (*dataptr & 0x10) >> 1;
	155	data \|= (*dataptr & 0x20) >> 3;
	156	data \|= (*dataptr & 0x40) >> 5;
	157	data \|= (*dataptr & 0x80) >> 7;
	158	*ptr++ = data;
	159	dataptr++;
	160	}
	161
	162	rc = fpga_load(dev, swapdata, swapsize);
	163	free(swapdata);
	164	return rc;
	165	#else
	166	printf("Bitstream support only for Xilinx devices.\n");
	167	return FPGA_FAIL;
	168	#endif
	169	}
	170
4a9cbbe8 WD	171	/* ------------------------------------------------------------------------- */
	172	/* command form:
	173	* fpga <op> <device number> <data addr> <datasize>
	174	* where op is 'load', 'dump', or 'info'
	175	* If there is no device number field, the fpga environment variable is used.
	176	* If there is no data addr field, the fpgadata environment variable is used.
	177	* The info command requires no data address field.
	178	*/
d4ca31c4	179	int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
4a9cbbe8	180	{
d4ca31c4 WD	181	int op, dev = FPGA_INVALID_DEVICE;
	182	size_t data_size = 0;
	183	void *fpga_data = NULL;
	184	char *devstr = getenv ("fpga");
	185	char *datastr = getenv ("fpgadata");
	186	int rc = FPGA_FAIL;
	187
	188	if (devstr)
	189	dev = (int) simple_strtoul (devstr, NULL, 16);
	190	if (datastr)
	191	fpga_data = (void *) simple_strtoul (datastr, NULL, 16);
	192
	193	switch (argc) {
	194	case 5: /* fpga <op> <dev> <data> <datasize> */
	195	data_size = simple_strtoul (argv[4], NULL, 16);
	196	case 4: /* fpga <op> <dev> <data> */
	197	fpga_data = (void *) simple_strtoul (argv[3], NULL, 16);
	198	PRINTF (__FUNCTION__ ": fpga_data = 0x%x\n",
	199	(uint) fpga_data);
	200	case 3: /* fpga <op> <dev \| data addr> */
	201	dev = (int) simple_strtoul (argv[2], NULL, 16);
	202	PRINTF (__FUNCTION__ ": device = %d\n", dev);
	203	/* FIXME - this is a really weak test */
	204	if ((argc == 3) && (dev > fpga_count ())) { /* must be buffer ptr */
	205	PRINTF (__FUNCTION__
	206	": Assuming buffer pointer in arg 3\n");
	207	fpga_data = (void *) dev;
	208	PRINTF (__FUNCTION__ ": fpga_data = 0x%x\n",
	209	(uint) fpga_data);
	210	dev = FPGA_INVALID_DEVICE; /* reset device num */
	211	}
	212	case 2: /* fpga <op> */
	213	op = (int) fpga_get_op (argv[1]);
	214	break;
	215	default:
	216	PRINTF (__FUNCTION__ ": Too many or too few args (%d)\n",
	217	argc);
	218	op = FPGA_NONE; /* force usage display */
	219	break;
	220	}
	221
	222	switch (op) {
	223	case FPGA_NONE:
	224	fpga_usage (cmdtp);
	225	break;
	226
	227	case FPGA_INFO:
	228	rc = fpga_info (dev);
	229	break;
	230
	231	case FPGA_LOAD:
	232	rc = fpga_load (dev, fpga_data, data_size);
	233	break;
	234
30ce5ab0 WD	235	case FPGA_LOADB:
	236	rc = fpga_loadbitstream(dev, fpga_data, data_size);
	237	break;
	238
d4ca31c4 WD	239	case FPGA_DUMP:
	240	rc = fpga_dump (dev, fpga_data, data_size);
	241	break;
	242
	243	default:
	244	printf ("Unknown operation.\n");
	245	fpga_usage (cmdtp);
	246	break;
	247	}
	248	return (rc);
4a9cbbe8 WD	249	}
4a9cbbe8 WD	250
d4ca31c4	251	static void fpga_usage (cmd_tbl_t * cmdtp)
4a9cbbe8	252	{
d4ca31c4	253	printf ("Usage:\n%s\n", cmdtp->usage);
4a9cbbe8 WD	254	}
	255
	256	/*
	257	* Map op to supported operations. We don't use a table since we
	258	* would just have to relocate it from flash anyway.
	259	*/
d4ca31c4	260	static int fpga_get_op (char *opstr)
4a9cbbe8 WD	261	{
	262	int op = FPGA_NONE;
	263
	264	if (!strcmp ("info", opstr)) {
	265	op = FPGA_INFO;
30ce5ab0 WD	266	} else if (!strcmp ("loadb", opstr)) {
30ce5ab0 WD	267	op = FPGA_LOADB;
d4ca31c4	268	} else if (!strcmp ("load", opstr)) {
4a9cbbe8	269	op = FPGA_LOAD;
d4ca31c4	270	} else if (!strcmp ("dump", opstr)) {
4a9cbbe8 WD	271	op = FPGA_DUMP;
	272	}
	273
d4ca31c4	274	if (op == FPGA_NONE) {
4a9cbbe8 WD	275	printf ("Unknown fpga operation \"%s\"\n", opstr);
	276	}
	277	return op;
	278	}
	279
d4ca31c4	280	U_BOOT_CMD (fpga, 6, 1, do_fpga,
dd875c76	281	"fpga - loadable FPGA image support\n",
d4ca31c4 WD	282	"fpga [operation type] [device number] [image address] [image size]\n"
	283	"fpga operations:\n"
	284	"\tinfo\tlist known device information.\n"
	285	"\tload\tLoad device from memory buffer.\n"
30ce5ab0	286	"\tloadb\tLoad device from bitstream buffer (Xilinx devices only).\n"
d4ca31c4 WD	287	"\tdump\tLoad device to memory buffer.\n");
d4ca31c4 WD	288	#endif /* CONFIG_FPGA && CONFIG_COMMANDS & CFG_CMD_FPGA */