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81a8824f WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * I2C Functions similar to the standard memory functions. | |
26 | * | |
27 | * There are several parameters in many of the commands that bear further | |
28 | * explanations: | |
29 | * | |
81a8824f WD |
30 | * {i2c_chip} is the I2C chip address (the first byte sent on the bus). |
31 | * Each I2C chip on the bus has a unique address. On the I2C data bus, | |
32 | * the address is the upper seven bits and the LSB is the "read/write" | |
33 | * bit. Note that the {i2c_chip} address specified on the command | |
34 | * line is not shifted up: e.g. a typical EEPROM memory chip may have | |
35 | * an I2C address of 0x50, but the data put on the bus will be 0xA0 | |
36 | * for write and 0xA1 for read. This "non shifted" address notation | |
37 | * matches at least half of the data sheets :-/. | |
38 | * | |
39 | * {addr} is the address (or offset) within the chip. Small memory | |
40 | * chips have 8 bit addresses. Large memory chips have 16 bit | |
41 | * addresses. Other memory chips have 9, 10, or 11 bit addresses. | |
42 | * Many non-memory chips have multiple registers and {addr} is used | |
43 | * as the register index. Some non-memory chips have only one register | |
44 | * and therefore don't need any {addr} parameter. | |
45 | * | |
46 | * The default {addr} parameter is one byte (.1) which works well for | |
47 | * memories and registers with 8 bits of address space. | |
48 | * | |
49 | * You can specify the length of the {addr} field with the optional .0, | |
50 | * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are | |
51 | * manipulating a single register device which doesn't use an address | |
52 | * field, use "0.0" for the address and the ".0" length field will | |
53 | * suppress the address in the I2C data stream. This also works for | |
54 | * successive reads using the I2C auto-incrementing memory pointer. | |
55 | * | |
56 | * If you are manipulating a large memory with 2-byte addresses, use | |
57 | * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal). | |
58 | * | |
59 | * Then there are the unfortunate memory chips that spill the most | |
60 | * significant 1, 2, or 3 bits of address into the chip address byte. | |
61 | * This effectively makes one chip (logically) look like 2, 4, or | |
62 | * 8 chips. This is handled (awkwardly) by #defining | |
6d0f6bcf | 63 | * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the |
81a8824f WD |
64 | * {addr} field (since .1 is the default, it doesn't actually have to |
65 | * be specified). Examples: given a memory chip at I2C chip address | |
66 | * 0x50, the following would happen... | |
0f89c54b | 67 | * i2c md 50 0 10 display 16 bytes starting at 0x000 |
81a8824f | 68 | * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd> |
0f89c54b | 69 | * i2c md 50 100 10 display 16 bytes starting at 0x100 |
81a8824f | 70 | * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd> |
0f89c54b | 71 | * i2c md 50 210 10 display 16 bytes starting at 0x210 |
81a8824f WD |
72 | * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd> |
73 | * This is awfully ugly. It would be nice if someone would think up | |
74 | * a better way of handling this. | |
75 | * | |
76 | * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). | |
77 | */ | |
78 | ||
79 | #include <common.h> | |
80 | #include <command.h> | |
735987c5 | 81 | #include <edid.h> |
67b23a32 | 82 | #include <environment.h> |
81a8824f | 83 | #include <i2c.h> |
67b23a32 | 84 | #include <malloc.h> |
81a8824f | 85 | #include <asm/byteorder.h> |
2515d843 | 86 | #include <linux/compiler.h> |
81a8824f | 87 | |
81a8824f WD |
88 | /* Display values from last command. |
89 | * Memory modify remembered values are different from display memory. | |
90 | */ | |
91 | static uchar i2c_dp_last_chip; | |
92 | static uint i2c_dp_last_addr; | |
93 | static uint i2c_dp_last_alen; | |
94 | static uint i2c_dp_last_length = 0x10; | |
95 | ||
96 | static uchar i2c_mm_last_chip; | |
97 | static uint i2c_mm_last_addr; | |
98 | static uint i2c_mm_last_alen; | |
99 | ||
bb99ad6d BW |
100 | /* If only one I2C bus is present, the list of devices to ignore when |
101 | * the probe command is issued is represented by a 1D array of addresses. | |
102 | * When multiple buses are present, the list is an array of bus-address | |
103 | * pairs. The following macros take care of this */ | |
104 | ||
6d0f6bcf | 105 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
bb99ad6d BW |
106 | #if defined(CONFIG_I2C_MULTI_BUS) |
107 | static struct | |
108 | { | |
109 | uchar bus; | |
110 | uchar addr; | |
6d0f6bcf | 111 | } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
112 | #define GET_BUS_NUM i2c_get_bus_num() |
113 | #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b)) | |
114 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a)) | |
115 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr | |
116 | #else /* single bus */ | |
6d0f6bcf | 117 | static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
118 | #define GET_BUS_NUM 0 |
119 | #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ | |
120 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) | |
121 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)] | |
122 | #endif /* CONFIG_MULTI_BUS */ | |
123 | ||
124 | #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0])) | |
81a8824f WD |
125 | #endif |
126 | ||
67b23a32 HS |
127 | #if defined(CONFIG_I2C_MUX) |
128 | static I2C_MUX_DEVICE *i2c_mux_devices = NULL; | |
6d0f6bcf | 129 | static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS; |
67b23a32 HS |
130 | |
131 | DECLARE_GLOBAL_DATA_PTR; | |
132 | ||
133 | #endif | |
134 | ||
a266fe95 FM |
135 | #define DISP_LINE_LEN 16 |
136 | ||
06afa388 MV |
137 | /** |
138 | * i2c_init_board() - Board-specific I2C bus init | |
139 | * | |
140 | * This function is the default no-op implementation of I2C bus | |
141 | * initialization. This function can be overriden by board-specific | |
142 | * implementation if needed. | |
143 | */ | |
2515d843 MV |
144 | __weak |
145 | void i2c_init_board(void) | |
c649dda5 SB |
146 | { |
147 | return; | |
148 | } | |
c649dda5 | 149 | |
655b34a7 | 150 | /* TODO: Implement architecture-specific get/set functions */ |
06afa388 MV |
151 | |
152 | /** | |
153 | * i2c_get_bus_speed() - Return I2C bus speed | |
154 | * | |
155 | * This function is the default implementation of function for retrieveing | |
156 | * the current I2C bus speed in Hz. | |
157 | * | |
158 | * A driver implementing runtime switching of I2C bus speed must override | |
159 | * this function to report the speed correctly. Simple or legacy drivers | |
160 | * can use this fallback. | |
161 | * | |
162 | * Returns I2C bus speed in Hz. | |
163 | */ | |
2515d843 MV |
164 | __weak |
165 | unsigned int i2c_get_bus_speed(void) | |
655b34a7 PT |
166 | { |
167 | return CONFIG_SYS_I2C_SPEED; | |
168 | } | |
655b34a7 | 169 | |
06afa388 MV |
170 | /** |
171 | * i2c_set_bus_speed() - Configure I2C bus speed | |
172 | * @speed: Newly set speed of the I2C bus in Hz | |
173 | * | |
174 | * This function is the default implementation of function for setting | |
175 | * the I2C bus speed in Hz. | |
176 | * | |
177 | * A driver implementing runtime switching of I2C bus speed must override | |
178 | * this function to report the speed correctly. Simple or legacy drivers | |
179 | * can use this fallback. | |
180 | * | |
181 | * Returns zero on success, negative value on error. | |
182 | */ | |
2515d843 MV |
183 | __weak |
184 | int i2c_set_bus_speed(unsigned int speed) | |
655b34a7 PT |
185 | { |
186 | if (speed != CONFIG_SYS_I2C_SPEED) | |
187 | return -1; | |
188 | ||
189 | return 0; | |
190 | } | |
655b34a7 | 191 | |
06afa388 MV |
192 | /** |
193 | * get_alen() - Small parser helper function to get address length | |
194 | * | |
195 | * Returns the address length. | |
2c0dc990 FM |
196 | */ |
197 | static uint get_alen(char *arg) | |
198 | { | |
199 | int j; | |
200 | int alen; | |
201 | ||
202 | alen = 1; | |
203 | for (j = 0; j < 8; j++) { | |
204 | if (arg[j] == '.') { | |
205 | alen = arg[j+1] - '0'; | |
2c0dc990 FM |
206 | break; |
207 | } else if (arg[j] == '\0') | |
208 | break; | |
209 | } | |
210 | return alen; | |
211 | } | |
212 | ||
06afa388 MV |
213 | /** |
214 | * do_i2c_read() - Handle the "i2c read" command-line command | |
215 | * @cmdtp: Command data struct pointer | |
216 | * @flag: Command flag | |
217 | * @argc: Command-line argument count | |
218 | * @argv: Array of command-line arguments | |
219 | * | |
220 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
221 | * on error. | |
222 | * | |
652e5354 FM |
223 | * Syntax: |
224 | * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr} | |
225 | */ | |
54841ab5 | 226 | static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
652e5354 FM |
227 | { |
228 | u_char chip; | |
229 | uint devaddr, alen, length; | |
230 | u_char *memaddr; | |
652e5354 | 231 | |
47e26b1b | 232 | if (argc != 5) |
4c12eeb8 | 233 | return CMD_RET_USAGE; |
652e5354 FM |
234 | |
235 | /* | |
236 | * I2C chip address | |
237 | */ | |
238 | chip = simple_strtoul(argv[1], NULL, 16); | |
239 | ||
240 | /* | |
241 | * I2C data address within the chip. This can be 1 or | |
242 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
243 | */ | |
244 | devaddr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 245 | alen = get_alen(argv[2]); |
7a92e53c | 246 | if (alen > 3) |
4c12eeb8 | 247 | return CMD_RET_USAGE; |
652e5354 FM |
248 | |
249 | /* | |
250 | * Length is the number of objects, not number of bytes. | |
251 | */ | |
252 | length = simple_strtoul(argv[3], NULL, 16); | |
253 | ||
254 | /* | |
255 | * memaddr is the address where to store things in memory | |
256 | */ | |
257 | memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16); | |
258 | ||
259 | if (i2c_read(chip, devaddr, alen, memaddr, length) != 0) { | |
260 | puts ("Error reading the chip.\n"); | |
261 | return 1; | |
262 | } | |
263 | return 0; | |
264 | } | |
265 | ||
ff5d2dce YS |
266 | static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
267 | { | |
268 | u_char chip; | |
269 | uint devaddr, alen, length; | |
270 | u_char *memaddr; | |
271 | ||
272 | if (argc != 5) | |
273 | return cmd_usage(cmdtp); | |
274 | ||
275 | /* | |
276 | * memaddr is the address where to store things in memory | |
277 | */ | |
278 | memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16); | |
279 | ||
280 | /* | |
281 | * I2C chip address | |
282 | */ | |
283 | chip = simple_strtoul(argv[2], NULL, 16); | |
284 | ||
285 | /* | |
286 | * I2C data address within the chip. This can be 1 or | |
287 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
288 | */ | |
289 | devaddr = simple_strtoul(argv[3], NULL, 16); | |
290 | alen = get_alen(argv[3]); | |
291 | if (alen > 3) | |
292 | return cmd_usage(cmdtp); | |
293 | ||
294 | /* | |
295 | * Length is the number of objects, not number of bytes. | |
296 | */ | |
297 | length = simple_strtoul(argv[4], NULL, 16); | |
298 | ||
299 | while (length-- > 0) { | |
300 | if (i2c_write(chip, devaddr++, alen, memaddr++, 1) != 0) { | |
301 | puts("Error writing to the chip.\n"); | |
302 | return 1; | |
303 | } | |
304 | /* | |
305 | * No write delay with FRAM devices. | |
306 | */ | |
307 | #if !defined(CONFIG_SYS_I2C_FRAM) | |
308 | udelay(11000); | |
309 | #endif | |
310 | } | |
311 | return 0; | |
312 | } | |
313 | ||
06afa388 MV |
314 | /** |
315 | * do_i2c_md() - Handle the "i2c md" command-line command | |
316 | * @cmdtp: Command data struct pointer | |
317 | * @flag: Command flag | |
318 | * @argc: Command-line argument count | |
319 | * @argv: Array of command-line arguments | |
320 | * | |
321 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
322 | * on error. | |
323 | * | |
4a8cf338 FM |
324 | * Syntax: |
325 | * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} | |
326 | */ | |
54841ab5 | 327 | static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
328 | { |
329 | u_char chip; | |
330 | uint addr, alen, length; | |
331 | int j, nbytes, linebytes; | |
332 | ||
333 | /* We use the last specified parameters, unless new ones are | |
334 | * entered. | |
335 | */ | |
336 | chip = i2c_dp_last_chip; | |
337 | addr = i2c_dp_last_addr; | |
338 | alen = i2c_dp_last_alen; | |
339 | length = i2c_dp_last_length; | |
340 | ||
47e26b1b | 341 | if (argc < 3) |
4c12eeb8 | 342 | return CMD_RET_USAGE; |
81a8824f WD |
343 | |
344 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
345 | /* | |
346 | * New command specified. | |
347 | */ | |
81a8824f WD |
348 | |
349 | /* | |
350 | * I2C chip address | |
351 | */ | |
352 | chip = simple_strtoul(argv[1], NULL, 16); | |
353 | ||
354 | /* | |
355 | * I2C data address within the chip. This can be 1 or | |
356 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
357 | */ | |
358 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 359 | alen = get_alen(argv[2]); |
7a92e53c | 360 | if (alen > 3) |
4c12eeb8 | 361 | return CMD_RET_USAGE; |
81a8824f WD |
362 | |
363 | /* | |
364 | * If another parameter, it is the length to display. | |
365 | * Length is the number of objects, not number of bytes. | |
366 | */ | |
367 | if (argc > 3) | |
368 | length = simple_strtoul(argv[3], NULL, 16); | |
369 | } | |
370 | ||
371 | /* | |
372 | * Print the lines. | |
373 | * | |
374 | * We buffer all read data, so we can make sure data is read only | |
375 | * once. | |
376 | */ | |
377 | nbytes = length; | |
378 | do { | |
379 | unsigned char linebuf[DISP_LINE_LEN]; | |
380 | unsigned char *cp; | |
381 | ||
382 | linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; | |
383 | ||
e857a5bd | 384 | if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0) |
4b9206ed | 385 | puts ("Error reading the chip.\n"); |
e857a5bd | 386 | else { |
81a8824f WD |
387 | printf("%04x:", addr); |
388 | cp = linebuf; | |
389 | for (j=0; j<linebytes; j++) { | |
390 | printf(" %02x", *cp++); | |
391 | addr++; | |
392 | } | |
4b9206ed | 393 | puts (" "); |
81a8824f WD |
394 | cp = linebuf; |
395 | for (j=0; j<linebytes; j++) { | |
396 | if ((*cp < 0x20) || (*cp > 0x7e)) | |
4b9206ed | 397 | puts ("."); |
81a8824f WD |
398 | else |
399 | printf("%c", *cp); | |
400 | cp++; | |
401 | } | |
4b9206ed | 402 | putc ('\n'); |
81a8824f WD |
403 | } |
404 | nbytes -= linebytes; | |
405 | } while (nbytes > 0); | |
406 | ||
407 | i2c_dp_last_chip = chip; | |
408 | i2c_dp_last_addr = addr; | |
409 | i2c_dp_last_alen = alen; | |
410 | i2c_dp_last_length = length; | |
411 | ||
412 | return 0; | |
413 | } | |
414 | ||
06afa388 MV |
415 | /** |
416 | * do_i2c_mw() - Handle the "i2c mw" command-line command | |
417 | * @cmdtp: Command data struct pointer | |
418 | * @flag: Command flag | |
419 | * @argc: Command-line argument count | |
420 | * @argv: Array of command-line arguments | |
421 | * | |
422 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
423 | * on error. | |
81a8824f WD |
424 | * |
425 | * Syntax: | |
0f89c54b | 426 | * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] |
81a8824f | 427 | */ |
54841ab5 | 428 | static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
429 | { |
430 | uchar chip; | |
431 | ulong addr; | |
432 | uint alen; | |
433 | uchar byte; | |
434 | int count; | |
81a8824f | 435 | |
47e26b1b | 436 | if ((argc < 4) || (argc > 5)) |
4c12eeb8 | 437 | return CMD_RET_USAGE; |
81a8824f WD |
438 | |
439 | /* | |
53677ef1 WD |
440 | * Chip is always specified. |
441 | */ | |
81a8824f WD |
442 | chip = simple_strtoul(argv[1], NULL, 16); |
443 | ||
444 | /* | |
445 | * Address is always specified. | |
446 | */ | |
447 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 448 | alen = get_alen(argv[2]); |
7a92e53c | 449 | if (alen > 3) |
4c12eeb8 | 450 | return CMD_RET_USAGE; |
81a8824f WD |
451 | |
452 | /* | |
453 | * Value to write is always specified. | |
454 | */ | |
455 | byte = simple_strtoul(argv[3], NULL, 16); | |
456 | ||
457 | /* | |
458 | * Optional count | |
459 | */ | |
e857a5bd | 460 | if (argc == 5) |
81a8824f | 461 | count = simple_strtoul(argv[4], NULL, 16); |
e857a5bd | 462 | else |
81a8824f | 463 | count = 1; |
81a8824f WD |
464 | |
465 | while (count-- > 0) { | |
e857a5bd | 466 | if (i2c_write(chip, addr++, alen, &byte, 1) != 0) |
4b9206ed | 467 | puts ("Error writing the chip.\n"); |
81a8824f WD |
468 | /* |
469 | * Wait for the write to complete. The write can take | |
470 | * up to 10mSec (we allow a little more time). | |
81a8824f | 471 | */ |
d4f5c728 | 472 | /* |
473 | * No write delay with FRAM devices. | |
474 | */ | |
6d0f6bcf | 475 | #if !defined(CONFIG_SYS_I2C_FRAM) |
81a8824f | 476 | udelay(11000); |
d4f5c728 | 477 | #endif |
81a8824f WD |
478 | } |
479 | ||
06afa388 | 480 | return 0; |
81a8824f WD |
481 | } |
482 | ||
06afa388 MV |
483 | /** |
484 | * do_i2c_crc() - Handle the "i2c crc32" command-line command | |
485 | * @cmdtp: Command data struct pointer | |
486 | * @flag: Command flag | |
487 | * @argc: Command-line argument count | |
488 | * @argv: Array of command-line arguments | |
489 | * | |
490 | * Calculate a CRC on memory | |
491 | * | |
492 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
493 | * on error. | |
81a8824f WD |
494 | * |
495 | * Syntax: | |
0f89c54b | 496 | * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} |
81a8824f | 497 | */ |
54841ab5 | 498 | static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
499 | { |
500 | uchar chip; | |
501 | ulong addr; | |
502 | uint alen; | |
503 | int count; | |
504 | uchar byte; | |
505 | ulong crc; | |
506 | ulong err; | |
81a8824f | 507 | |
47e26b1b | 508 | if (argc < 4) |
4c12eeb8 | 509 | return CMD_RET_USAGE; |
81a8824f WD |
510 | |
511 | /* | |
53677ef1 WD |
512 | * Chip is always specified. |
513 | */ | |
81a8824f WD |
514 | chip = simple_strtoul(argv[1], NULL, 16); |
515 | ||
516 | /* | |
517 | * Address is always specified. | |
518 | */ | |
519 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 520 | alen = get_alen(argv[2]); |
7a92e53c | 521 | if (alen > 3) |
4c12eeb8 | 522 | return CMD_RET_USAGE; |
81a8824f WD |
523 | |
524 | /* | |
525 | * Count is always specified | |
526 | */ | |
527 | count = simple_strtoul(argv[3], NULL, 16); | |
528 | ||
529 | printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1); | |
530 | /* | |
531 | * CRC a byte at a time. This is going to be slooow, but hey, the | |
532 | * memories are small and slow too so hopefully nobody notices. | |
533 | */ | |
534 | crc = 0; | |
535 | err = 0; | |
e857a5bd TT |
536 | while (count-- > 0) { |
537 | if (i2c_read(chip, addr, alen, &byte, 1) != 0) | |
81a8824f | 538 | err++; |
81a8824f WD |
539 | crc = crc32 (crc, &byte, 1); |
540 | addr++; | |
541 | } | |
e857a5bd | 542 | if (err > 0) |
4b9206ed | 543 | puts ("Error reading the chip,\n"); |
e857a5bd | 544 | else |
81a8824f | 545 | printf ("%08lx\n", crc); |
81a8824f WD |
546 | |
547 | return 0; | |
548 | } | |
549 | ||
06afa388 MV |
550 | /** |
551 | * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command | |
552 | * @cmdtp: Command data struct pointer | |
553 | * @flag: Command flag | |
554 | * @argc: Command-line argument count | |
555 | * @argv: Array of command-line arguments | |
556 | * | |
557 | * Modify memory. | |
558 | * | |
559 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
560 | * on error. | |
81a8824f WD |
561 | * |
562 | * Syntax: | |
0f89c54b PT |
563 | * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} |
564 | * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} | |
81a8824f | 565 | */ |
81a8824f | 566 | static int |
54841ab5 | 567 | mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) |
81a8824f WD |
568 | { |
569 | uchar chip; | |
570 | ulong addr; | |
571 | uint alen; | |
572 | ulong data; | |
573 | int size = 1; | |
574 | int nbytes; | |
81a8824f | 575 | |
47e26b1b | 576 | if (argc != 3) |
4c12eeb8 | 577 | return CMD_RET_USAGE; |
81a8824f WD |
578 | |
579 | #ifdef CONFIG_BOOT_RETRY_TIME | |
580 | reset_cmd_timeout(); /* got a good command to get here */ | |
581 | #endif | |
582 | /* | |
583 | * We use the last specified parameters, unless new ones are | |
584 | * entered. | |
585 | */ | |
586 | chip = i2c_mm_last_chip; | |
587 | addr = i2c_mm_last_addr; | |
588 | alen = i2c_mm_last_alen; | |
589 | ||
590 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
591 | /* | |
592 | * New command specified. Check for a size specification. | |
593 | * Defaults to byte if no or incorrect specification. | |
594 | */ | |
595 | size = cmd_get_data_size(argv[0], 1); | |
596 | ||
597 | /* | |
53677ef1 WD |
598 | * Chip is always specified. |
599 | */ | |
81a8824f WD |
600 | chip = simple_strtoul(argv[1], NULL, 16); |
601 | ||
602 | /* | |
603 | * Address is always specified. | |
604 | */ | |
605 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 606 | alen = get_alen(argv[2]); |
7a92e53c | 607 | if (alen > 3) |
4c12eeb8 | 608 | return CMD_RET_USAGE; |
81a8824f WD |
609 | } |
610 | ||
611 | /* | |
612 | * Print the address, followed by value. Then accept input for | |
613 | * the next value. A non-converted value exits. | |
614 | */ | |
615 | do { | |
616 | printf("%08lx:", addr); | |
e857a5bd | 617 | if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0) |
4b9206ed | 618 | puts ("\nError reading the chip,\n"); |
e857a5bd | 619 | else { |
81a8824f | 620 | data = cpu_to_be32(data); |
e857a5bd | 621 | if (size == 1) |
81a8824f | 622 | printf(" %02lx", (data >> 24) & 0x000000FF); |
e857a5bd | 623 | else if (size == 2) |
81a8824f | 624 | printf(" %04lx", (data >> 16) & 0x0000FFFF); |
e857a5bd | 625 | else |
81a8824f | 626 | printf(" %08lx", data); |
81a8824f WD |
627 | } |
628 | ||
629 | nbytes = readline (" ? "); | |
630 | if (nbytes == 0) { | |
631 | /* | |
632 | * <CR> pressed as only input, don't modify current | |
633 | * location and move to next. | |
634 | */ | |
635 | if (incrflag) | |
636 | addr += size; | |
637 | nbytes = size; | |
638 | #ifdef CONFIG_BOOT_RETRY_TIME | |
639 | reset_cmd_timeout(); /* good enough to not time out */ | |
640 | #endif | |
641 | } | |
642 | #ifdef CONFIG_BOOT_RETRY_TIME | |
e857a5bd | 643 | else if (nbytes == -2) |
81a8824f | 644 | break; /* timed out, exit the command */ |
81a8824f WD |
645 | #endif |
646 | else { | |
647 | char *endp; | |
648 | ||
649 | data = simple_strtoul(console_buffer, &endp, 16); | |
e857a5bd | 650 | if (size == 1) |
81a8824f | 651 | data = data << 24; |
e857a5bd | 652 | else if (size == 2) |
81a8824f | 653 | data = data << 16; |
81a8824f WD |
654 | data = be32_to_cpu(data); |
655 | nbytes = endp - console_buffer; | |
656 | if (nbytes) { | |
657 | #ifdef CONFIG_BOOT_RETRY_TIME | |
658 | /* | |
659 | * good enough to not time out | |
660 | */ | |
661 | reset_cmd_timeout(); | |
662 | #endif | |
e857a5bd | 663 | if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0) |
4b9206ed | 664 | puts ("Error writing the chip.\n"); |
6d0f6bcf JCPV |
665 | #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS |
666 | udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); | |
2535d602 | 667 | #endif |
81a8824f WD |
668 | if (incrflag) |
669 | addr += size; | |
670 | } | |
671 | } | |
672 | } while (nbytes); | |
673 | ||
0800707b PT |
674 | i2c_mm_last_chip = chip; |
675 | i2c_mm_last_addr = addr; | |
676 | i2c_mm_last_alen = alen; | |
81a8824f WD |
677 | |
678 | return 0; | |
679 | } | |
680 | ||
06afa388 MV |
681 | /** |
682 | * do_i2c_probe() - Handle the "i2c probe" command-line command | |
683 | * @cmdtp: Command data struct pointer | |
684 | * @flag: Command flag | |
685 | * @argc: Command-line argument count | |
686 | * @argv: Array of command-line arguments | |
687 | * | |
688 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
689 | * on error. | |
690 | * | |
81a8824f | 691 | * Syntax: |
54b99e51 EN |
692 | * i2c probe {addr} |
693 | * | |
694 | * Returns zero (success) if one or more I2C devices was found | |
81a8824f | 695 | */ |
54841ab5 | 696 | static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
697 | { |
698 | int j; | |
54b99e51 EN |
699 | int addr = -1; |
700 | int found = 0; | |
6d0f6bcf | 701 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 702 | int k, skip; |
bb99ad6d BW |
703 | uchar bus = GET_BUS_NUM; |
704 | #endif /* NOPROBES */ | |
81a8824f | 705 | |
54b99e51 EN |
706 | if (argc == 2) |
707 | addr = simple_strtol(argv[1], 0, 16); | |
708 | ||
4b9206ed | 709 | puts ("Valid chip addresses:"); |
e857a5bd | 710 | for (j = 0; j < 128; j++) { |
54b99e51 EN |
711 | if ((0 <= addr) && (j != addr)) |
712 | continue; | |
713 | ||
6d0f6bcf | 714 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 715 | skip = 0; |
e857a5bd TT |
716 | for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) { |
717 | if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) { | |
81a8824f WD |
718 | skip = 1; |
719 | break; | |
720 | } | |
721 | } | |
722 | if (skip) | |
723 | continue; | |
724 | #endif | |
54b99e51 | 725 | if (i2c_probe(j) == 0) { |
81a8824f | 726 | printf(" %02X", j); |
54b99e51 EN |
727 | found++; |
728 | } | |
81a8824f | 729 | } |
4b9206ed | 730 | putc ('\n'); |
81a8824f | 731 | |
6d0f6bcf | 732 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 733 | puts ("Excluded chip addresses:"); |
e857a5bd TT |
734 | for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) { |
735 | if (COMPARE_BUS(bus,k)) | |
bb99ad6d BW |
736 | printf(" %02X", NO_PROBE_ADDR(k)); |
737 | } | |
4b9206ed | 738 | putc ('\n'); |
81a8824f WD |
739 | #endif |
740 | ||
54b99e51 | 741 | return (0 == found); |
81a8824f WD |
742 | } |
743 | ||
06afa388 MV |
744 | /** |
745 | * do_i2c_loop() - Handle the "i2c loop" command-line command | |
746 | * @cmdtp: Command data struct pointer | |
747 | * @flag: Command flag | |
748 | * @argc: Command-line argument count | |
749 | * @argv: Array of command-line arguments | |
750 | * | |
751 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
752 | * on error. | |
753 | * | |
81a8824f | 754 | * Syntax: |
0f89c54b | 755 | * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] |
81a8824f WD |
756 | * {length} - Number of bytes to read |
757 | * {delay} - A DECIMAL number and defaults to 1000 uSec | |
758 | */ | |
54841ab5 | 759 | static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
760 | { |
761 | u_char chip; | |
762 | ulong alen; | |
763 | uint addr; | |
764 | uint length; | |
765 | u_char bytes[16]; | |
766 | int delay; | |
81a8824f | 767 | |
47e26b1b | 768 | if (argc < 3) |
4c12eeb8 | 769 | return CMD_RET_USAGE; |
81a8824f WD |
770 | |
771 | /* | |
772 | * Chip is always specified. | |
773 | */ | |
774 | chip = simple_strtoul(argv[1], NULL, 16); | |
775 | ||
776 | /* | |
777 | * Address is always specified. | |
778 | */ | |
779 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 780 | alen = get_alen(argv[2]); |
7a92e53c | 781 | if (alen > 3) |
4c12eeb8 | 782 | return CMD_RET_USAGE; |
81a8824f WD |
783 | |
784 | /* | |
785 | * Length is the number of objects, not number of bytes. | |
786 | */ | |
787 | length = 1; | |
788 | length = simple_strtoul(argv[3], NULL, 16); | |
e857a5bd | 789 | if (length > sizeof(bytes)) |
81a8824f | 790 | length = sizeof(bytes); |
81a8824f WD |
791 | |
792 | /* | |
793 | * The delay time (uSec) is optional. | |
794 | */ | |
795 | delay = 1000; | |
e857a5bd | 796 | if (argc > 3) |
81a8824f | 797 | delay = simple_strtoul(argv[4], NULL, 10); |
81a8824f WD |
798 | /* |
799 | * Run the loop... | |
800 | */ | |
e857a5bd TT |
801 | while (1) { |
802 | if (i2c_read(chip, addr, alen, bytes, length) != 0) | |
4b9206ed | 803 | puts ("Error reading the chip.\n"); |
81a8824f WD |
804 | udelay(delay); |
805 | } | |
806 | ||
807 | /* NOTREACHED */ | |
808 | return 0; | |
809 | } | |
810 | ||
81a8824f WD |
811 | /* |
812 | * The SDRAM command is separately configured because many | |
813 | * (most?) embedded boards don't use SDRAM DIMMs. | |
06afa388 MV |
814 | * |
815 | * FIXME: Document and probably move elsewhere! | |
81a8824f | 816 | */ |
c76fe474 | 817 | #if defined(CONFIG_CMD_SDRAM) |
632de067 LJ |
818 | static void print_ddr2_tcyc (u_char const b) |
819 | { | |
820 | printf ("%d.", (b >> 4) & 0x0F); | |
821 | switch (b & 0x0F) { | |
822 | case 0x0: | |
823 | case 0x1: | |
824 | case 0x2: | |
825 | case 0x3: | |
826 | case 0x4: | |
827 | case 0x5: | |
828 | case 0x6: | |
829 | case 0x7: | |
830 | case 0x8: | |
831 | case 0x9: | |
832 | printf ("%d ns\n", b & 0x0F); | |
833 | break; | |
834 | case 0xA: | |
835 | puts ("25 ns\n"); | |
836 | break; | |
837 | case 0xB: | |
838 | puts ("33 ns\n"); | |
839 | break; | |
840 | case 0xC: | |
841 | puts ("66 ns\n"); | |
842 | break; | |
843 | case 0xD: | |
844 | puts ("75 ns\n"); | |
845 | break; | |
846 | default: | |
847 | puts ("?? ns\n"); | |
848 | break; | |
849 | } | |
850 | } | |
851 | ||
852 | static void decode_bits (u_char const b, char const *str[], int const do_once) | |
853 | { | |
854 | u_char mask; | |
855 | ||
856 | for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) { | |
857 | if (b & mask) { | |
858 | puts (*str); | |
859 | if (do_once) | |
860 | return; | |
861 | } | |
862 | } | |
863 | } | |
81a8824f WD |
864 | |
865 | /* | |
866 | * Syntax: | |
0f89c54b | 867 | * i2c sdram {i2c_chip} |
81a8824f | 868 | */ |
54841ab5 | 869 | static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 870 | { |
632de067 LJ |
871 | enum { unknown, EDO, SDRAM, DDR2 } type; |
872 | ||
81a8824f WD |
873 | u_char chip; |
874 | u_char data[128]; | |
875 | u_char cksum; | |
876 | int j; | |
877 | ||
632de067 LJ |
878 | static const char *decode_CAS_DDR2[] = { |
879 | " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD" | |
880 | }; | |
881 | ||
882 | static const char *decode_CAS_default[] = { | |
883 | " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1" | |
884 | }; | |
885 | ||
886 | static const char *decode_CS_WE_default[] = { | |
887 | " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0" | |
888 | }; | |
889 | ||
890 | static const char *decode_byte21_default[] = { | |
891 | " TBD (bit 7)\n", | |
892 | " Redundant row address\n", | |
893 | " Differential clock input\n", | |
894 | " Registerd DQMB inputs\n", | |
895 | " Buffered DQMB inputs\n", | |
896 | " On-card PLL\n", | |
897 | " Registered address/control lines\n", | |
898 | " Buffered address/control lines\n" | |
899 | }; | |
900 | ||
901 | static const char *decode_byte22_DDR2[] = { | |
902 | " TBD (bit 7)\n", | |
903 | " TBD (bit 6)\n", | |
904 | " TBD (bit 5)\n", | |
905 | " TBD (bit 4)\n", | |
906 | " TBD (bit 3)\n", | |
907 | " Supports partial array self refresh\n", | |
908 | " Supports 50 ohm ODT\n", | |
909 | " Supports weak driver\n" | |
910 | }; | |
911 | ||
912 | static const char *decode_row_density_DDR2[] = { | |
913 | "512 MiB", "256 MiB", "128 MiB", "16 GiB", | |
914 | "8 GiB", "4 GiB", "2 GiB", "1 GiB" | |
915 | }; | |
916 | ||
917 | static const char *decode_row_density_default[] = { | |
918 | "512 MiB", "256 MiB", "128 MiB", "64 MiB", | |
919 | "32 MiB", "16 MiB", "8 MiB", "4 MiB" | |
920 | }; | |
921 | ||
47e26b1b | 922 | if (argc < 2) |
4c12eeb8 | 923 | return CMD_RET_USAGE; |
47e26b1b | 924 | |
81a8824f WD |
925 | /* |
926 | * Chip is always specified. | |
632de067 LJ |
927 | */ |
928 | chip = simple_strtoul (argv[1], NULL, 16); | |
81a8824f | 929 | |
632de067 | 930 | if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) { |
4b9206ed | 931 | puts ("No SDRAM Serial Presence Detect found.\n"); |
81a8824f WD |
932 | return 1; |
933 | } | |
934 | ||
935 | cksum = 0; | |
936 | for (j = 0; j < 63; j++) { | |
937 | cksum += data[j]; | |
938 | } | |
e857a5bd | 939 | if (cksum != data[63]) { |
81a8824f | 940 | printf ("WARNING: Configuration data checksum failure:\n" |
632de067 | 941 | " is 0x%02x, calculated 0x%02x\n", data[63], cksum); |
81a8824f | 942 | } |
632de067 | 943 | printf ("SPD data revision %d.%d\n", |
81a8824f | 944 | (data[62] >> 4) & 0x0F, data[62] & 0x0F); |
632de067 LJ |
945 | printf ("Bytes used 0x%02X\n", data[0]); |
946 | printf ("Serial memory size 0x%02X\n", 1 << data[1]); | |
947 | ||
4b9206ed | 948 | puts ("Memory type "); |
632de067 | 949 | switch (data[2]) { |
0df6b844 LJ |
950 | case 2: |
951 | type = EDO; | |
952 | puts ("EDO\n"); | |
953 | break; | |
954 | case 4: | |
955 | type = SDRAM; | |
956 | puts ("SDRAM\n"); | |
957 | break; | |
958 | case 8: | |
959 | type = DDR2; | |
960 | puts ("DDR2\n"); | |
961 | break; | |
962 | default: | |
963 | type = unknown; | |
964 | puts ("unknown\n"); | |
965 | break; | |
81a8824f | 966 | } |
632de067 | 967 | |
4b9206ed | 968 | puts ("Row address bits "); |
e857a5bd | 969 | if ((data[3] & 0x00F0) == 0) |
632de067 | 970 | printf ("%d\n", data[3] & 0x0F); |
e857a5bd | 971 | else |
632de067 LJ |
972 | printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F); |
973 | ||
4b9206ed | 974 | puts ("Column address bits "); |
e857a5bd | 975 | if ((data[4] & 0x00F0) == 0) |
632de067 | 976 | printf ("%d\n", data[4] & 0x0F); |
e857a5bd | 977 | else |
632de067 | 978 | printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F); |
0df6b844 LJ |
979 | |
980 | switch (type) { | |
981 | case DDR2: | |
632de067 LJ |
982 | printf ("Number of ranks %d\n", |
983 | (data[5] & 0x07) + 1); | |
0df6b844 LJ |
984 | break; |
985 | default: | |
632de067 | 986 | printf ("Module rows %d\n", data[5]); |
0df6b844 LJ |
987 | break; |
988 | } | |
989 | ||
990 | switch (type) { | |
991 | case DDR2: | |
632de067 | 992 | printf ("Module data width %d bits\n", data[6]); |
0df6b844 LJ |
993 | break; |
994 | default: | |
632de067 LJ |
995 | printf ("Module data width %d bits\n", |
996 | (data[7] << 8) | data[6]); | |
0df6b844 LJ |
997 | break; |
998 | } | |
999 | ||
4b9206ed | 1000 | puts ("Interface signal levels "); |
81a8824f | 1001 | switch(data[8]) { |
0df6b844 | 1002 | case 0: puts ("TTL 5.0 V\n"); break; |
4b9206ed | 1003 | case 1: puts ("LVTTL\n"); break; |
0df6b844 LJ |
1004 | case 2: puts ("HSTL 1.5 V\n"); break; |
1005 | case 3: puts ("SSTL 3.3 V\n"); break; | |
1006 | case 4: puts ("SSTL 2.5 V\n"); break; | |
1007 | case 5: puts ("SSTL 1.8 V\n"); break; | |
4b9206ed | 1008 | default: puts ("unknown\n"); break; |
81a8824f | 1009 | } |
0df6b844 LJ |
1010 | |
1011 | switch (type) { | |
1012 | case DDR2: | |
632de067 LJ |
1013 | printf ("SDRAM cycle time "); |
1014 | print_ddr2_tcyc (data[9]); | |
0df6b844 LJ |
1015 | break; |
1016 | default: | |
632de067 LJ |
1017 | printf ("SDRAM cycle time %d.%d ns\n", |
1018 | (data[9] >> 4) & 0x0F, data[9] & 0x0F); | |
0df6b844 LJ |
1019 | break; |
1020 | } | |
1021 | ||
1022 | switch (type) { | |
1023 | case DDR2: | |
632de067 LJ |
1024 | printf ("SDRAM access time 0.%d%d ns\n", |
1025 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
1026 | break; |
1027 | default: | |
632de067 LJ |
1028 | printf ("SDRAM access time %d.%d ns\n", |
1029 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
1030 | break; |
1031 | } | |
1032 | ||
4b9206ed | 1033 | puts ("EDC configuration "); |
632de067 | 1034 | switch (data[11]) { |
4b9206ed WD |
1035 | case 0: puts ("None\n"); break; |
1036 | case 1: puts ("Parity\n"); break; | |
1037 | case 2: puts ("ECC\n"); break; | |
1038 | default: puts ("unknown\n"); break; | |
81a8824f | 1039 | } |
632de067 | 1040 | |
e857a5bd | 1041 | if ((data[12] & 0x80) == 0) |
4b9206ed | 1042 | puts ("No self refresh, rate "); |
e857a5bd | 1043 | else |
4b9206ed | 1044 | puts ("Self refresh, rate "); |
632de067 | 1045 | |
81a8824f | 1046 | switch(data[12] & 0x7F) { |
632de067 LJ |
1047 | case 0: puts ("15.625 us\n"); break; |
1048 | case 1: puts ("3.9 us\n"); break; | |
1049 | case 2: puts ("7.8 us\n"); break; | |
1050 | case 3: puts ("31.3 us\n"); break; | |
1051 | case 4: puts ("62.5 us\n"); break; | |
1052 | case 5: puts ("125 us\n"); break; | |
4b9206ed | 1053 | default: puts ("unknown\n"); break; |
81a8824f | 1054 | } |
0df6b844 LJ |
1055 | |
1056 | switch (type) { | |
1057 | case DDR2: | |
632de067 | 1058 | printf ("SDRAM width (primary) %d\n", data[13]); |
0df6b844 LJ |
1059 | break; |
1060 | default: | |
632de067 | 1061 | printf ("SDRAM width (primary) %d\n", data[13] & 0x7F); |
0df6b844 | 1062 | if ((data[13] & 0x80) != 0) { |
632de067 LJ |
1063 | printf (" (second bank) %d\n", |
1064 | 2 * (data[13] & 0x7F)); | |
0df6b844 LJ |
1065 | } |
1066 | break; | |
1067 | } | |
1068 | ||
1069 | switch (type) { | |
1070 | case DDR2: | |
1071 | if (data[14] != 0) | |
632de067 | 1072 | printf ("EDC width %d\n", data[14]); |
0df6b844 LJ |
1073 | break; |
1074 | default: | |
1075 | if (data[14] != 0) { | |
632de067 LJ |
1076 | printf ("EDC width %d\n", |
1077 | data[14] & 0x7F); | |
0df6b844 LJ |
1078 | |
1079 | if ((data[14] & 0x80) != 0) { | |
632de067 LJ |
1080 | printf (" (second bank) %d\n", |
1081 | 2 * (data[14] & 0x7F)); | |
0df6b844 LJ |
1082 | } |
1083 | } | |
1084 | break; | |
81a8824f | 1085 | } |
0df6b844 | 1086 | |
632de067 LJ |
1087 | if (DDR2 != type) { |
1088 | printf ("Min clock delay, back-to-back random column addresses " | |
1089 | "%d\n", data[15]); | |
0df6b844 LJ |
1090 | } |
1091 | ||
4b9206ed WD |
1092 | puts ("Burst length(s) "); |
1093 | if (data[16] & 0x80) puts (" Page"); | |
1094 | if (data[16] & 0x08) puts (" 8"); | |
1095 | if (data[16] & 0x04) puts (" 4"); | |
1096 | if (data[16] & 0x02) puts (" 2"); | |
1097 | if (data[16] & 0x01) puts (" 1"); | |
1098 | putc ('\n'); | |
632de067 | 1099 | printf ("Number of banks %d\n", data[17]); |
0df6b844 LJ |
1100 | |
1101 | switch (type) { | |
1102 | case DDR2: | |
1103 | puts ("CAS latency(s) "); | |
632de067 | 1104 | decode_bits (data[18], decode_CAS_DDR2, 0); |
0df6b844 LJ |
1105 | putc ('\n'); |
1106 | break; | |
1107 | default: | |
1108 | puts ("CAS latency(s) "); | |
632de067 | 1109 | decode_bits (data[18], decode_CAS_default, 0); |
0df6b844 LJ |
1110 | putc ('\n'); |
1111 | break; | |
1112 | } | |
1113 | ||
1114 | if (DDR2 != type) { | |
1115 | puts ("CS latency(s) "); | |
632de067 | 1116 | decode_bits (data[19], decode_CS_WE_default, 0); |
0df6b844 LJ |
1117 | putc ('\n'); |
1118 | } | |
1119 | ||
1120 | if (DDR2 != type) { | |
1121 | puts ("WE latency(s) "); | |
632de067 | 1122 | decode_bits (data[20], decode_CS_WE_default, 0); |
0df6b844 LJ |
1123 | putc ('\n'); |
1124 | } | |
1125 | ||
1126 | switch (type) { | |
1127 | case DDR2: | |
1128 | puts ("Module attributes:\n"); | |
1129 | if (data[21] & 0x80) | |
1130 | puts (" TBD (bit 7)\n"); | |
1131 | if (data[21] & 0x40) | |
1132 | puts (" Analysis probe installed\n"); | |
1133 | if (data[21] & 0x20) | |
1134 | puts (" TBD (bit 5)\n"); | |
1135 | if (data[21] & 0x10) | |
1136 | puts (" FET switch external enable\n"); | |
632de067 | 1137 | printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03); |
0df6b844 | 1138 | if (data[20] & 0x11) { |
632de067 LJ |
1139 | printf (" %d active registers on DIMM\n", |
1140 | (data[21] & 0x03) + 1); | |
0df6b844 LJ |
1141 | } |
1142 | break; | |
1143 | default: | |
1144 | puts ("Module attributes:\n"); | |
1145 | if (!data[21]) | |
1146 | puts (" (none)\n"); | |
632de067 LJ |
1147 | else |
1148 | decode_bits (data[21], decode_byte21_default, 0); | |
0df6b844 LJ |
1149 | break; |
1150 | } | |
1151 | ||
1152 | switch (type) { | |
1153 | case DDR2: | |
632de067 | 1154 | decode_bits (data[22], decode_byte22_DDR2, 0); |
0df6b844 LJ |
1155 | break; |
1156 | default: | |
1157 | puts ("Device attributes:\n"); | |
1158 | if (data[22] & 0x80) puts (" TBD (bit 7)\n"); | |
1159 | if (data[22] & 0x40) puts (" TBD (bit 6)\n"); | |
1160 | if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n"); | |
1161 | else puts (" Upper Vcc tolerance 10%\n"); | |
1162 | if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n"); | |
1163 | else puts (" Lower Vcc tolerance 10%\n"); | |
1164 | if (data[22] & 0x08) puts (" Supports write1/read burst\n"); | |
1165 | if (data[22] & 0x04) puts (" Supports precharge all\n"); | |
1166 | if (data[22] & 0x02) puts (" Supports auto precharge\n"); | |
1167 | if (data[22] & 0x01) puts (" Supports early RAS# precharge\n"); | |
1168 | break; | |
1169 | } | |
1170 | ||
1171 | switch (type) { | |
1172 | case DDR2: | |
632de067 LJ |
1173 | printf ("SDRAM cycle time (2nd highest CAS latency) "); |
1174 | print_ddr2_tcyc (data[23]); | |
0df6b844 LJ |
1175 | break; |
1176 | default: | |
632de067 LJ |
1177 | printf ("SDRAM cycle time (2nd highest CAS latency) %d." |
1178 | "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F); | |
0df6b844 LJ |
1179 | break; |
1180 | } | |
1181 | ||
1182 | switch (type) { | |
1183 | case DDR2: | |
632de067 LJ |
1184 | printf ("SDRAM access from clock (2nd highest CAS latency) 0." |
1185 | "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1186 | break; |
1187 | default: | |
632de067 LJ |
1188 | printf ("SDRAM access from clock (2nd highest CAS latency) %d." |
1189 | "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1190 | break; |
1191 | } | |
1192 | ||
1193 | switch (type) { | |
1194 | case DDR2: | |
632de067 LJ |
1195 | printf ("SDRAM cycle time (3rd highest CAS latency) "); |
1196 | print_ddr2_tcyc (data[25]); | |
0df6b844 LJ |
1197 | break; |
1198 | default: | |
632de067 LJ |
1199 | printf ("SDRAM cycle time (3rd highest CAS latency) %d." |
1200 | "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F); | |
0df6b844 LJ |
1201 | break; |
1202 | } | |
1203 | ||
1204 | switch (type) { | |
1205 | case DDR2: | |
632de067 LJ |
1206 | printf ("SDRAM access from clock (3rd highest CAS latency) 0." |
1207 | "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1208 | break; |
1209 | default: | |
632de067 LJ |
1210 | printf ("SDRAM access from clock (3rd highest CAS latency) %d." |
1211 | "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1212 | break; |
1213 | } | |
1214 | ||
1215 | switch (type) { | |
1216 | case DDR2: | |
632de067 LJ |
1217 | printf ("Minimum row precharge %d.%02d ns\n", |
1218 | (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03)); | |
0df6b844 LJ |
1219 | break; |
1220 | default: | |
632de067 | 1221 | printf ("Minimum row precharge %d ns\n", data[27]); |
0df6b844 LJ |
1222 | break; |
1223 | } | |
1224 | ||
1225 | switch (type) { | |
1226 | case DDR2: | |
632de067 LJ |
1227 | printf ("Row active to row active min %d.%02d ns\n", |
1228 | (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03)); | |
0df6b844 LJ |
1229 | break; |
1230 | default: | |
632de067 | 1231 | printf ("Row active to row active min %d ns\n", data[28]); |
0df6b844 LJ |
1232 | break; |
1233 | } | |
1234 | ||
1235 | switch (type) { | |
1236 | case DDR2: | |
632de067 LJ |
1237 | printf ("RAS to CAS delay min %d.%02d ns\n", |
1238 | (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03)); | |
0df6b844 LJ |
1239 | break; |
1240 | default: | |
632de067 | 1241 | printf ("RAS to CAS delay min %d ns\n", data[29]); |
0df6b844 LJ |
1242 | break; |
1243 | } | |
1244 | ||
632de067 | 1245 | printf ("Minimum RAS pulse width %d ns\n", data[30]); |
0df6b844 LJ |
1246 | |
1247 | switch (type) { | |
1248 | case DDR2: | |
632de067 LJ |
1249 | puts ("Density of each row "); |
1250 | decode_bits (data[31], decode_row_density_DDR2, 1); | |
1251 | putc ('\n'); | |
0df6b844 LJ |
1252 | break; |
1253 | default: | |
632de067 LJ |
1254 | puts ("Density of each row "); |
1255 | decode_bits (data[31], decode_row_density_default, 1); | |
1256 | putc ('\n'); | |
0df6b844 LJ |
1257 | break; |
1258 | } | |
1259 | ||
1260 | switch (type) { | |
1261 | case DDR2: | |
632de067 | 1262 | puts ("Command and Address setup "); |
0df6b844 | 1263 | if (data[32] >= 0xA0) { |
632de067 LJ |
1264 | printf ("1.%d%d ns\n", |
1265 | ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F); | |
0df6b844 | 1266 | } else { |
632de067 LJ |
1267 | printf ("0.%d%d ns\n", |
1268 | ((data[32] >> 4) & 0x0F), data[32] & 0x0F); | |
0df6b844 LJ |
1269 | } |
1270 | break; | |
1271 | default: | |
632de067 LJ |
1272 | printf ("Command and Address setup %c%d.%d ns\n", |
1273 | (data[32] & 0x80) ? '-' : '+', | |
1274 | (data[32] >> 4) & 0x07, data[32] & 0x0F); | |
0df6b844 LJ |
1275 | break; |
1276 | } | |
1277 | ||
1278 | switch (type) { | |
1279 | case DDR2: | |
632de067 | 1280 | puts ("Command and Address hold "); |
0df6b844 | 1281 | if (data[33] >= 0xA0) { |
632de067 LJ |
1282 | printf ("1.%d%d ns\n", |
1283 | ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F); | |
0df6b844 | 1284 | } else { |
632de067 LJ |
1285 | printf ("0.%d%d ns\n", |
1286 | ((data[33] >> 4) & 0x0F), data[33] & 0x0F); | |
0df6b844 LJ |
1287 | } |
1288 | break; | |
1289 | default: | |
632de067 LJ |
1290 | printf ("Command and Address hold %c%d.%d ns\n", |
1291 | (data[33] & 0x80) ? '-' : '+', | |
1292 | (data[33] >> 4) & 0x07, data[33] & 0x0F); | |
0df6b844 LJ |
1293 | break; |
1294 | } | |
1295 | ||
1296 | switch (type) { | |
1297 | case DDR2: | |
632de067 LJ |
1298 | printf ("Data signal input setup 0.%d%d ns\n", |
1299 | (data[34] >> 4) & 0x0F, data[34] & 0x0F); | |
0df6b844 LJ |
1300 | break; |
1301 | default: | |
632de067 LJ |
1302 | printf ("Data signal input setup %c%d.%d ns\n", |
1303 | (data[34] & 0x80) ? '-' : '+', | |
1304 | (data[34] >> 4) & 0x07, data[34] & 0x0F); | |
0df6b844 LJ |
1305 | break; |
1306 | } | |
1307 | ||
1308 | switch (type) { | |
1309 | case DDR2: | |
632de067 LJ |
1310 | printf ("Data signal input hold 0.%d%d ns\n", |
1311 | (data[35] >> 4) & 0x0F, data[35] & 0x0F); | |
0df6b844 LJ |
1312 | break; |
1313 | default: | |
632de067 LJ |
1314 | printf ("Data signal input hold %c%d.%d ns\n", |
1315 | (data[35] & 0x80) ? '-' : '+', | |
1316 | (data[35] >> 4) & 0x07, data[35] & 0x0F); | |
0df6b844 LJ |
1317 | break; |
1318 | } | |
1319 | ||
4b9206ed | 1320 | puts ("Manufacturer's JEDEC ID "); |
e857a5bd | 1321 | for (j = 64; j <= 71; j++) |
632de067 | 1322 | printf ("%02X ", data[j]); |
4b9206ed | 1323 | putc ('\n'); |
632de067 | 1324 | printf ("Manufacturing Location %02X\n", data[72]); |
4b9206ed | 1325 | puts ("Manufacturer's Part Number "); |
e857a5bd | 1326 | for (j = 73; j <= 90; j++) |
632de067 | 1327 | printf ("%02X ", data[j]); |
4b9206ed | 1328 | putc ('\n'); |
632de067 LJ |
1329 | printf ("Revision Code %02X %02X\n", data[91], data[92]); |
1330 | printf ("Manufacturing Date %02X %02X\n", data[93], data[94]); | |
4b9206ed | 1331 | puts ("Assembly Serial Number "); |
e857a5bd | 1332 | for (j = 95; j <= 98; j++) |
632de067 | 1333 | printf ("%02X ", data[j]); |
4b9206ed | 1334 | putc ('\n'); |
81a8824f | 1335 | |
0df6b844 | 1336 | if (DDR2 != type) { |
632de067 LJ |
1337 | printf ("Speed rating PC%d\n", |
1338 | data[126] == 0x66 ? 66 : data[126]); | |
0df6b844 | 1339 | } |
81a8824f WD |
1340 | return 0; |
1341 | } | |
90253178 | 1342 | #endif |
81a8824f | 1343 | |
735987c5 TWHT |
1344 | /* |
1345 | * Syntax: | |
1346 | * i2c edid {i2c_chip} | |
1347 | */ | |
1348 | #if defined(CONFIG_I2C_EDID) | |
1349 | int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) | |
1350 | { | |
1351 | u_char chip; | |
1352 | struct edid1_info edid; | |
1353 | ||
1354 | if (argc < 2) { | |
1355 | cmd_usage(cmdtp); | |
1356 | return 1; | |
1357 | } | |
1358 | ||
1359 | chip = simple_strtoul(argv[1], NULL, 16); | |
1360 | if (i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid)) != 0) { | |
1361 | puts("Error reading EDID content.\n"); | |
1362 | return 1; | |
1363 | } | |
1364 | ||
1365 | if (edid_check_info(&edid)) { | |
1366 | puts("Content isn't valid EDID.\n"); | |
1367 | return 1; | |
1368 | } | |
1369 | ||
1370 | edid_print_info(&edid); | |
1371 | return 0; | |
1372 | ||
1373 | } | |
1374 | #endif /* CONFIG_I2C_EDID */ | |
1375 | ||
67b23a32 | 1376 | #if defined(CONFIG_I2C_MUX) |
06afa388 MV |
1377 | /** |
1378 | * do_i2c_add_bus() - Handle the "i2c bus" command-line command | |
1379 | * @cmdtp: Command data struct pointer | |
1380 | * @flag: Command flag | |
1381 | * @argc: Command-line argument count | |
1382 | * @argv: Array of command-line arguments | |
1383 | * | |
1384 | * Returns zero always. | |
1385 | */ | |
54841ab5 | 1386 | static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
67b23a32 HS |
1387 | { |
1388 | int ret=0; | |
1389 | ||
1390 | if (argc == 1) { | |
1391 | /* show all busses */ | |
1392 | I2C_MUX *mux; | |
1393 | I2C_MUX_DEVICE *device = i2c_mux_devices; | |
1394 | ||
1395 | printf ("Busses reached over muxes:\n"); | |
1396 | while (device != NULL) { | |
1397 | printf ("Bus ID: %x\n", device->busid); | |
1398 | printf (" reached over Mux(es):\n"); | |
1399 | mux = device->mux; | |
1400 | while (mux != NULL) { | |
1401 | printf (" %s@%x ch: %x\n", mux->name, mux->chip, mux->channel); | |
1402 | mux = mux->next; | |
1403 | } | |
1404 | device = device->next; | |
1405 | } | |
1406 | } else { | |
e8260cb2 | 1407 | (void)i2c_mux_ident_muxstring ((uchar *)argv[1]); |
67b23a32 HS |
1408 | ret = 0; |
1409 | } | |
1410 | return ret; | |
1411 | } | |
1412 | #endif /* CONFIG_I2C_MUX */ | |
1413 | ||
bb99ad6d | 1414 | #if defined(CONFIG_I2C_MULTI_BUS) |
06afa388 MV |
1415 | /** |
1416 | * do_i2c_bus_num() - Handle the "i2c dev" command-line command | |
1417 | * @cmdtp: Command data struct pointer | |
1418 | * @flag: Command flag | |
1419 | * @argc: Command-line argument count | |
1420 | * @argv: Array of command-line arguments | |
1421 | * | |
1422 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1423 | * on error. | |
1424 | */ | |
54841ab5 | 1425 | static int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d BW |
1426 | { |
1427 | int bus_idx, ret=0; | |
1428 | ||
e857a5bd TT |
1429 | if (argc == 1) |
1430 | /* querying current setting */ | |
bb99ad6d | 1431 | printf("Current bus is %d\n", i2c_get_bus_num()); |
e857a5bd | 1432 | else { |
bb99ad6d BW |
1433 | bus_idx = simple_strtoul(argv[1], NULL, 10); |
1434 | printf("Setting bus to %d\n", bus_idx); | |
1435 | ret = i2c_set_bus_num(bus_idx); | |
e857a5bd | 1436 | if (ret) |
bb99ad6d | 1437 | printf("Failure changing bus number (%d)\n", ret); |
bb99ad6d BW |
1438 | } |
1439 | return ret; | |
1440 | } | |
1441 | #endif /* CONFIG_I2C_MULTI_BUS */ | |
1442 | ||
06afa388 MV |
1443 | /** |
1444 | * do_i2c_bus_speed() - Handle the "i2c speed" command-line command | |
1445 | * @cmdtp: Command data struct pointer | |
1446 | * @flag: Command flag | |
1447 | * @argc: Command-line argument count | |
1448 | * @argv: Array of command-line arguments | |
1449 | * | |
1450 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1451 | * on error. | |
1452 | */ | |
54841ab5 | 1453 | static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d BW |
1454 | { |
1455 | int speed, ret=0; | |
1456 | ||
e857a5bd TT |
1457 | if (argc == 1) |
1458 | /* querying current speed */ | |
bb99ad6d | 1459 | printf("Current bus speed=%d\n", i2c_get_bus_speed()); |
e857a5bd | 1460 | else { |
bb99ad6d BW |
1461 | speed = simple_strtoul(argv[1], NULL, 10); |
1462 | printf("Setting bus speed to %d Hz\n", speed); | |
1463 | ret = i2c_set_bus_speed(speed); | |
e857a5bd | 1464 | if (ret) |
bb99ad6d | 1465 | printf("Failure changing bus speed (%d)\n", ret); |
bb99ad6d BW |
1466 | } |
1467 | return ret; | |
1468 | } | |
1469 | ||
06afa388 MV |
1470 | /** |
1471 | * do_i2c_mm() - Handle the "i2c mm" command-line command | |
1472 | * @cmdtp: Command data struct pointer | |
1473 | * @flag: Command flag | |
1474 | * @argc: Command-line argument count | |
1475 | * @argv: Array of command-line arguments | |
1476 | * | |
1477 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1478 | * on error. | |
1479 | */ | |
54841ab5 | 1480 | static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d | 1481 | { |
bfc3b77e FM |
1482 | return mod_i2c_mem (cmdtp, 1, flag, argc, argv); |
1483 | } | |
1484 | ||
06afa388 MV |
1485 | /** |
1486 | * do_i2c_nm() - Handle the "i2c nm" command-line command | |
1487 | * @cmdtp: Command data struct pointer | |
1488 | * @flag: Command flag | |
1489 | * @argc: Command-line argument count | |
1490 | * @argv: Array of command-line arguments | |
1491 | * | |
1492 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1493 | * on error. | |
1494 | */ | |
54841ab5 | 1495 | static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1496 | { |
1497 | return mod_i2c_mem (cmdtp, 0, flag, argc, argv); | |
1498 | } | |
e96ad5d3 | 1499 | |
06afa388 MV |
1500 | /** |
1501 | * do_i2c_reset() - Handle the "i2c reset" command-line command | |
1502 | * @cmdtp: Command data struct pointer | |
1503 | * @flag: Command flag | |
1504 | * @argc: Command-line argument count | |
1505 | * @argv: Array of command-line arguments | |
1506 | * | |
1507 | * Returns zero always. | |
1508 | */ | |
54841ab5 | 1509 | static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1510 | { |
1511 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); | |
1512 | return 0; | |
1513 | } | |
1514 | ||
1515 | static cmd_tbl_t cmd_i2c_sub[] = { | |
67b23a32 | 1516 | #if defined(CONFIG_I2C_MUX) |
bfc3b77e | 1517 | U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_add_bus, "", ""), |
67b23a32 | 1518 | #endif /* CONFIG_I2C_MUX */ |
bfc3b77e | 1519 | U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), |
bb99ad6d | 1520 | #if defined(CONFIG_I2C_MULTI_BUS) |
bfc3b77e | 1521 | U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), |
bb99ad6d | 1522 | #endif /* CONFIG_I2C_MULTI_BUS */ |
735987c5 TWHT |
1523 | #if defined(CONFIG_I2C_EDID) |
1524 | U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""), | |
1525 | #endif /* CONFIG_I2C_EDID */ | |
bfc3b77e FM |
1526 | U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""), |
1527 | U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""), | |
1528 | U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""), | |
1529 | U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""), | |
1530 | U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), | |
1531 | U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), | |
652e5354 | 1532 | U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), |
ff5d2dce | 1533 | U_BOOT_CMD_MKENT(write, 5, 0, do_i2c_write, "", ""), |
bfc3b77e | 1534 | U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""), |
c76fe474 | 1535 | #if defined(CONFIG_CMD_SDRAM) |
bfc3b77e | 1536 | U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""), |
90253178 | 1537 | #endif |
bfc3b77e FM |
1538 | U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), |
1539 | }; | |
1540 | ||
2e5167cc | 1541 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
f1d2b313 HS |
1542 | void i2c_reloc(void) { |
1543 | fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); | |
1544 | } | |
1545 | #endif | |
1546 | ||
06afa388 MV |
1547 | /** |
1548 | * do_i2c() - Handle the "i2c" command-line command | |
1549 | * @cmdtp: Command data struct pointer | |
1550 | * @flag: Command flag | |
1551 | * @argc: Command-line argument count | |
1552 | * @argv: Array of command-line arguments | |
1553 | * | |
1554 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1555 | * on error. | |
1556 | */ | |
54841ab5 | 1557 | static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1558 | { |
1559 | cmd_tbl_t *c; | |
1560 | ||
4444b221 | 1561 | if (argc < 2) |
4c12eeb8 | 1562 | return CMD_RET_USAGE; |
4444b221 | 1563 | |
bfc3b77e FM |
1564 | /* Strip off leading 'i2c' command argument */ |
1565 | argc--; | |
1566 | argv++; | |
1567 | ||
1568 | c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub)); | |
1569 | ||
47e26b1b | 1570 | if (c) |
4c12eeb8 | 1571 | return c->cmd(cmdtp, flag, argc, argv); |
47e26b1b | 1572 | else |
4c12eeb8 | 1573 | return CMD_RET_USAGE; |
bb99ad6d | 1574 | } |
8bde7f77 WD |
1575 | |
1576 | /***************************************************/ | |
088f1b19 KP |
1577 | #ifdef CONFIG_SYS_LONGHELP |
1578 | static char i2c_help_text[] = | |
67b23a32 | 1579 | #if defined(CONFIG_I2C_MUX) |
fb0070e9 | 1580 | "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\ni2c " |
67b23a32 | 1581 | #endif /* CONFIG_I2C_MUX */ |
fb0070e9 | 1582 | "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" |
d9fc7032 | 1583 | #if defined(CONFIG_I2C_MULTI_BUS) |
9bc2e4ee | 1584 | "i2c dev [dev] - show or set current I2C bus\n" |
d9fc7032 | 1585 | #endif /* CONFIG_I2C_MULTI_BUS */ |
735987c5 TWHT |
1586 | #if defined(CONFIG_I2C_EDID) |
1587 | "i2c edid chip - print EDID configuration information\n" | |
1588 | #endif /* CONFIG_I2C_EDID */ | |
fb0070e9 | 1589 | "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n" |
d9fc7032 MF |
1590 | "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n" |
1591 | "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n" | |
1592 | "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n" | |
1593 | "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" | |
54b99e51 | 1594 | "i2c probe [address] - test for and show device(s) on the I2C bus\n" |
652e5354 | 1595 | "i2c read chip address[.0, .1, .2] length memaddress - read to memory \n" |
ff5d2dce | 1596 | "i2c write memaddress chip address[.0, .1, .2] length - write memory to i2c\n" |
e43a27c4 | 1597 | "i2c reset - re-init the I2C Controller\n" |
c76fe474 | 1598 | #if defined(CONFIG_CMD_SDRAM) |
fb0070e9 | 1599 | "i2c sdram chip - print SDRAM configuration information\n" |
90253178 | 1600 | #endif |
088f1b19 KP |
1601 | "i2c speed [speed] - show or set I2C bus speed"; |
1602 | #endif | |
1603 | ||
1604 | U_BOOT_CMD( | |
1605 | i2c, 6, 1, do_i2c, | |
1606 | "I2C sub-system", | |
1607 | i2c_help_text | |
d9fc7032 | 1608 | ); |
67b23a32 HS |
1609 | |
1610 | #if defined(CONFIG_I2C_MUX) | |
fd03ea89 | 1611 | static int i2c_mux_add_device(I2C_MUX_DEVICE *dev) |
67b23a32 HS |
1612 | { |
1613 | I2C_MUX_DEVICE *devtmp = i2c_mux_devices; | |
1614 | ||
1615 | if (i2c_mux_devices == NULL) { | |
1616 | i2c_mux_devices = dev; | |
1617 | return 0; | |
1618 | } | |
1619 | while (devtmp->next != NULL) | |
1620 | devtmp = devtmp->next; | |
1621 | ||
1622 | devtmp->next = dev; | |
1623 | return 0; | |
1624 | } | |
1625 | ||
1626 | I2C_MUX_DEVICE *i2c_mux_search_device(int id) | |
1627 | { | |
1628 | I2C_MUX_DEVICE *device = i2c_mux_devices; | |
1629 | ||
1630 | while (device != NULL) { | |
1631 | if (device->busid == id) | |
1632 | return device; | |
1633 | device = device->next; | |
1634 | } | |
1635 | return NULL; | |
1636 | } | |
1637 | ||
1638 | /* searches in the buf from *pos the next ':'. | |
1639 | * returns: | |
1640 | * 0 if found (with *pos = where) | |
1641 | * < 0 if an error occured | |
1642 | * > 0 if the end of buf is reached | |
1643 | */ | |
1644 | static int i2c_mux_search_next (int *pos, uchar *buf, int len) | |
1645 | { | |
1646 | while ((buf[*pos] != ':') && (*pos < len)) { | |
1647 | *pos += 1; | |
1648 | } | |
1649 | if (*pos >= len) | |
1650 | return 1; | |
1651 | if (buf[*pos] != ':') | |
1652 | return -1; | |
1653 | return 0; | |
1654 | } | |
1655 | ||
1656 | static int i2c_mux_get_busid (void) | |
1657 | { | |
1658 | int tmp = i2c_mux_busid; | |
1659 | ||
1660 | i2c_mux_busid ++; | |
1661 | return tmp; | |
1662 | } | |
1663 | ||
f9a78b8d MJ |
1664 | /* Analyses a Muxstring and immediately sends the |
1665 | commands to the muxes. Runs from flash. | |
67b23a32 HS |
1666 | */ |
1667 | int i2c_mux_ident_muxstring_f (uchar *buf) | |
1668 | { | |
1669 | int pos = 0; | |
1670 | int oldpos; | |
1671 | int ret = 0; | |
1672 | int len = strlen((char *)buf); | |
1673 | int chip; | |
1674 | uchar channel; | |
1675 | int was = 0; | |
1676 | ||
1677 | while (ret == 0) { | |
1678 | oldpos = pos; | |
1679 | /* search name */ | |
1680 | ret = i2c_mux_search_next(&pos, buf, len); | |
1681 | if (ret != 0) | |
1682 | printf ("ERROR\n"); | |
1683 | /* search address */ | |
1684 | pos ++; | |
1685 | oldpos = pos; | |
1686 | ret = i2c_mux_search_next(&pos, buf, len); | |
1687 | if (ret != 0) | |
1688 | printf ("ERROR\n"); | |
1689 | buf[pos] = 0; | |
1690 | chip = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1691 | buf[pos] = ':'; | |
1692 | /* search channel */ | |
1693 | pos ++; | |
1694 | oldpos = pos; | |
1695 | ret = i2c_mux_search_next(&pos, buf, len); | |
1696 | if (ret < 0) | |
1697 | printf ("ERROR\n"); | |
1698 | was = 0; | |
1699 | if (buf[pos] != 0) { | |
1700 | buf[pos] = 0; | |
1701 | was = 1; | |
1702 | } | |
1703 | channel = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1704 | if (was) | |
1705 | buf[pos] = ':'; | |
1706 | if (i2c_write(chip, 0, 0, &channel, 1) != 0) { | |
1707 | printf ("Error setting Mux: chip:%x channel: \ | |
1708 | %x\n", chip, channel); | |
1709 | return -1; | |
1710 | } | |
1711 | pos ++; | |
1712 | oldpos = pos; | |
1713 | ||
1714 | } | |
8ec038a6 | 1715 | i2c_init_board(); |
67b23a32 HS |
1716 | |
1717 | return 0; | |
1718 | } | |
1719 | ||
1720 | /* Analyses a Muxstring and if this String is correct | |
1721 | * adds a new I2C Bus. | |
1722 | */ | |
1723 | I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf) | |
1724 | { | |
1725 | I2C_MUX_DEVICE *device; | |
1726 | I2C_MUX *mux; | |
1727 | int pos = 0; | |
1728 | int oldpos; | |
1729 | int ret = 0; | |
1730 | int len = strlen((char *)buf); | |
1731 | int was = 0; | |
1732 | ||
1733 | device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE)); | |
1734 | device->mux = NULL; | |
1735 | device->busid = i2c_mux_get_busid (); | |
1736 | device->next = NULL; | |
1737 | while (ret == 0) { | |
1738 | mux = (I2C_MUX *)malloc (sizeof(I2C_MUX)); | |
1739 | mux->next = NULL; | |
1740 | /* search name of mux */ | |
1741 | oldpos = pos; | |
1742 | ret = i2c_mux_search_next(&pos, buf, len); | |
1743 | if (ret != 0) | |
1744 | printf ("%s no name.\n", __FUNCTION__); | |
1745 | mux->name = (char *)malloc (pos - oldpos + 1); | |
1746 | memcpy (mux->name, &buf[oldpos], pos - oldpos); | |
1747 | mux->name[pos - oldpos] = 0; | |
1748 | /* search address */ | |
1749 | pos ++; | |
1750 | oldpos = pos; | |
1751 | ret = i2c_mux_search_next(&pos, buf, len); | |
1752 | if (ret != 0) | |
1753 | printf ("%s no mux address.\n", __FUNCTION__); | |
1754 | buf[pos] = 0; | |
1755 | mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1756 | buf[pos] = ':'; | |
1757 | /* search channel */ | |
1758 | pos ++; | |
1759 | oldpos = pos; | |
1760 | ret = i2c_mux_search_next(&pos, buf, len); | |
1761 | if (ret < 0) | |
1762 | printf ("%s no mux channel.\n", __FUNCTION__); | |
1763 | was = 0; | |
1764 | if (buf[pos] != 0) { | |
1765 | buf[pos] = 0; | |
1766 | was = 1; | |
1767 | } | |
1768 | mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1769 | if (was) | |
1770 | buf[pos] = ':'; | |
1771 | if (device->mux == NULL) | |
1772 | device->mux = mux; | |
1773 | else { | |
1774 | I2C_MUX *muxtmp = device->mux; | |
1775 | while (muxtmp->next != NULL) { | |
1776 | muxtmp = muxtmp->next; | |
1777 | } | |
1778 | muxtmp->next = mux; | |
1779 | } | |
1780 | pos ++; | |
1781 | oldpos = pos; | |
1782 | } | |
1783 | if (ret > 0) { | |
1784 | /* Add Device */ | |
1785 | i2c_mux_add_device (device); | |
1786 | return device; | |
1787 | } | |
1788 | ||
1789 | return NULL; | |
1790 | } | |
1791 | ||
1792 | int i2x_mux_select_mux(int bus) | |
1793 | { | |
1794 | I2C_MUX_DEVICE *dev; | |
1795 | I2C_MUX *mux; | |
1796 | ||
1797 | if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) { | |
1798 | /* select Default Mux Bus */ | |
6d0f6bcf JCPV |
1799 | #if defined(CONFIG_SYS_I2C_IVM_BUS) |
1800 | i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS); | |
67b23a32 HS |
1801 | #else |
1802 | { | |
1803 | unsigned char *buf; | |
1804 | buf = (unsigned char *) getenv("EEprom_ivm"); | |
1805 | if (buf != NULL) | |
1806 | i2c_mux_ident_muxstring_f (buf); | |
1807 | } | |
1808 | #endif | |
1809 | return 0; | |
1810 | } | |
1811 | dev = i2c_mux_search_device(bus); | |
1812 | if (dev == NULL) | |
1813 | return -1; | |
1814 | ||
1815 | mux = dev->mux; | |
1816 | while (mux != NULL) { | |
c649dda5 SB |
1817 | /* do deblocking on each level of mux, before mux config */ |
1818 | i2c_init_board(); | |
67b23a32 HS |
1819 | if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) { |
1820 | printf ("Error setting Mux: chip:%x channel: \ | |
1821 | %x\n", mux->chip, mux->channel); | |
1822 | return -1; | |
1823 | } | |
1824 | mux = mux->next; | |
1825 | } | |
c649dda5 SB |
1826 | /* do deblocking on each level of mux and after mux config */ |
1827 | i2c_init_board(); | |
67b23a32 HS |
1828 | return 0; |
1829 | } | |
1830 | #endif /* CONFIG_I2C_MUX */ |