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Commit | Line | Data |
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81a8824f | 1 | /* |
3f4978c7 HS |
2 | * (C) Copyright 2009 |
3 | * Sergey Kubushyn, himself, ksi@koi8.net | |
4 | * | |
5 | * Changes for unified multibus/multiadapter I2C support. | |
6 | * | |
81a8824f WD |
7 | * (C) Copyright 2001 |
8 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. | |
9 | * | |
1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
81a8824f WD |
11 | */ |
12 | ||
13 | /* | |
14 | * I2C Functions similar to the standard memory functions. | |
15 | * | |
16 | * There are several parameters in many of the commands that bear further | |
17 | * explanations: | |
18 | * | |
81a8824f WD |
19 | * {i2c_chip} is the I2C chip address (the first byte sent on the bus). |
20 | * Each I2C chip on the bus has a unique address. On the I2C data bus, | |
21 | * the address is the upper seven bits and the LSB is the "read/write" | |
22 | * bit. Note that the {i2c_chip} address specified on the command | |
23 | * line is not shifted up: e.g. a typical EEPROM memory chip may have | |
24 | * an I2C address of 0x50, but the data put on the bus will be 0xA0 | |
25 | * for write and 0xA1 for read. This "non shifted" address notation | |
26 | * matches at least half of the data sheets :-/. | |
27 | * | |
28 | * {addr} is the address (or offset) within the chip. Small memory | |
29 | * chips have 8 bit addresses. Large memory chips have 16 bit | |
30 | * addresses. Other memory chips have 9, 10, or 11 bit addresses. | |
31 | * Many non-memory chips have multiple registers and {addr} is used | |
32 | * as the register index. Some non-memory chips have only one register | |
33 | * and therefore don't need any {addr} parameter. | |
34 | * | |
35 | * The default {addr} parameter is one byte (.1) which works well for | |
36 | * memories and registers with 8 bits of address space. | |
37 | * | |
38 | * You can specify the length of the {addr} field with the optional .0, | |
39 | * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are | |
40 | * manipulating a single register device which doesn't use an address | |
41 | * field, use "0.0" for the address and the ".0" length field will | |
42 | * suppress the address in the I2C data stream. This also works for | |
43 | * successive reads using the I2C auto-incrementing memory pointer. | |
44 | * | |
45 | * If you are manipulating a large memory with 2-byte addresses, use | |
46 | * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal). | |
47 | * | |
48 | * Then there are the unfortunate memory chips that spill the most | |
49 | * significant 1, 2, or 3 bits of address into the chip address byte. | |
50 | * This effectively makes one chip (logically) look like 2, 4, or | |
51 | * 8 chips. This is handled (awkwardly) by #defining | |
6d0f6bcf | 52 | * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the |
81a8824f WD |
53 | * {addr} field (since .1 is the default, it doesn't actually have to |
54 | * be specified). Examples: given a memory chip at I2C chip address | |
55 | * 0x50, the following would happen... | |
0f89c54b | 56 | * i2c md 50 0 10 display 16 bytes starting at 0x000 |
81a8824f | 57 | * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd> |
0f89c54b | 58 | * i2c md 50 100 10 display 16 bytes starting at 0x100 |
81a8824f | 59 | * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd> |
0f89c54b | 60 | * i2c md 50 210 10 display 16 bytes starting at 0x210 |
81a8824f WD |
61 | * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd> |
62 | * This is awfully ugly. It would be nice if someone would think up | |
63 | * a better way of handling this. | |
64 | * | |
65 | * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). | |
66 | */ | |
67 | ||
68 | #include <common.h> | |
0098e179 | 69 | #include <bootretry.h> |
18d66533 | 70 | #include <cli.h> |
81a8824f | 71 | #include <command.h> |
63656b76 | 72 | #include <dm.h> |
735987c5 | 73 | #include <edid.h> |
67b23a32 | 74 | #include <environment.h> |
63656b76 | 75 | #include <errno.h> |
81a8824f | 76 | #include <i2c.h> |
67b23a32 | 77 | #include <malloc.h> |
81a8824f | 78 | #include <asm/byteorder.h> |
2515d843 | 79 | #include <linux/compiler.h> |
81a8824f | 80 | |
3f4978c7 HS |
81 | DECLARE_GLOBAL_DATA_PTR; |
82 | ||
81a8824f WD |
83 | /* Display values from last command. |
84 | * Memory modify remembered values are different from display memory. | |
85 | */ | |
5468461d | 86 | static uint i2c_dp_last_chip; |
81a8824f WD |
87 | static uint i2c_dp_last_addr; |
88 | static uint i2c_dp_last_alen; | |
89 | static uint i2c_dp_last_length = 0x10; | |
90 | ||
5468461d | 91 | static uint i2c_mm_last_chip; |
81a8824f WD |
92 | static uint i2c_mm_last_addr; |
93 | static uint i2c_mm_last_alen; | |
94 | ||
bb99ad6d BW |
95 | /* If only one I2C bus is present, the list of devices to ignore when |
96 | * the probe command is issued is represented by a 1D array of addresses. | |
97 | * When multiple buses are present, the list is an array of bus-address | |
98 | * pairs. The following macros take care of this */ | |
99 | ||
6d0f6bcf | 100 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
9a2accb4 | 101 | #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) |
bb99ad6d BW |
102 | static struct |
103 | { | |
104 | uchar bus; | |
105 | uchar addr; | |
6d0f6bcf | 106 | } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
107 | #define GET_BUS_NUM i2c_get_bus_num() |
108 | #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b)) | |
109 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a)) | |
110 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr | |
111 | #else /* single bus */ | |
6d0f6bcf | 112 | static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
113 | #define GET_BUS_NUM 0 |
114 | #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ | |
115 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) | |
116 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)] | |
3f4978c7 | 117 | #endif /* defined(CONFIG_SYS_I2C) */ |
67b23a32 HS |
118 | #endif |
119 | ||
a266fe95 FM |
120 | #define DISP_LINE_LEN 16 |
121 | ||
63656b76 SG |
122 | /* |
123 | * Default for driver model is to use the chip's existing address length. | |
124 | * For legacy code, this is not stored, so we need to use a suitable | |
125 | * default. | |
126 | */ | |
127 | #ifdef CONFIG_DM_I2C | |
128 | #define DEFAULT_ADDR_LEN (-1) | |
129 | #else | |
130 | #define DEFAULT_ADDR_LEN 1 | |
131 | #endif | |
132 | ||
133 | #ifdef CONFIG_DM_I2C | |
134 | static struct udevice *i2c_cur_bus; | |
135 | ||
f9a4c2da | 136 | static int cmd_i2c_set_bus_num(unsigned int busnum) |
63656b76 SG |
137 | { |
138 | struct udevice *bus; | |
139 | int ret; | |
140 | ||
141 | ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); | |
142 | if (ret) { | |
143 | debug("%s: No bus %d\n", __func__, busnum); | |
144 | return ret; | |
145 | } | |
146 | i2c_cur_bus = bus; | |
147 | ||
148 | return 0; | |
149 | } | |
150 | ||
151 | static int i2c_get_cur_bus(struct udevice **busp) | |
152 | { | |
153 | if (!i2c_cur_bus) { | |
154 | puts("No I2C bus selected\n"); | |
155 | return -ENODEV; | |
156 | } | |
157 | *busp = i2c_cur_bus; | |
158 | ||
159 | return 0; | |
160 | } | |
161 | ||
162 | static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp) | |
163 | { | |
164 | struct udevice *bus; | |
165 | int ret; | |
166 | ||
167 | ret = i2c_get_cur_bus(&bus); | |
168 | if (ret) | |
169 | return ret; | |
170 | ||
25ab4b03 | 171 | return i2c_get_chip(bus, chip_addr, 1, devp); |
63656b76 SG |
172 | } |
173 | ||
174 | #endif | |
175 | ||
06afa388 MV |
176 | /** |
177 | * i2c_init_board() - Board-specific I2C bus init | |
178 | * | |
179 | * This function is the default no-op implementation of I2C bus | |
180 | * initialization. This function can be overriden by board-specific | |
181 | * implementation if needed. | |
182 | */ | |
2515d843 MV |
183 | __weak |
184 | void i2c_init_board(void) | |
c649dda5 | 185 | { |
c649dda5 | 186 | } |
c649dda5 | 187 | |
655b34a7 | 188 | /* TODO: Implement architecture-specific get/set functions */ |
06afa388 MV |
189 | |
190 | /** | |
191 | * i2c_get_bus_speed() - Return I2C bus speed | |
192 | * | |
193 | * This function is the default implementation of function for retrieveing | |
194 | * the current I2C bus speed in Hz. | |
195 | * | |
196 | * A driver implementing runtime switching of I2C bus speed must override | |
197 | * this function to report the speed correctly. Simple or legacy drivers | |
198 | * can use this fallback. | |
199 | * | |
200 | * Returns I2C bus speed in Hz. | |
201 | */ | |
63656b76 | 202 | #if !defined(CONFIG_SYS_I2C) && !defined(CONFIG_DM_I2C) |
3f4978c7 HS |
203 | /* |
204 | * TODO: Implement architecture-specific get/set functions | |
205 | * Should go away, if we switched completely to new multibus support | |
206 | */ | |
2515d843 MV |
207 | __weak |
208 | unsigned int i2c_get_bus_speed(void) | |
655b34a7 PT |
209 | { |
210 | return CONFIG_SYS_I2C_SPEED; | |
211 | } | |
655b34a7 | 212 | |
06afa388 MV |
213 | /** |
214 | * i2c_set_bus_speed() - Configure I2C bus speed | |
215 | * @speed: Newly set speed of the I2C bus in Hz | |
216 | * | |
217 | * This function is the default implementation of function for setting | |
218 | * the I2C bus speed in Hz. | |
219 | * | |
220 | * A driver implementing runtime switching of I2C bus speed must override | |
221 | * this function to report the speed correctly. Simple or legacy drivers | |
222 | * can use this fallback. | |
223 | * | |
224 | * Returns zero on success, negative value on error. | |
225 | */ | |
2515d843 MV |
226 | __weak |
227 | int i2c_set_bus_speed(unsigned int speed) | |
655b34a7 PT |
228 | { |
229 | if (speed != CONFIG_SYS_I2C_SPEED) | |
230 | return -1; | |
231 | ||
232 | return 0; | |
233 | } | |
3f4978c7 | 234 | #endif |
655b34a7 | 235 | |
06afa388 MV |
236 | /** |
237 | * get_alen() - Small parser helper function to get address length | |
238 | * | |
239 | * Returns the address length. | |
2c0dc990 | 240 | */ |
63656b76 | 241 | static uint get_alen(char *arg, int default_len) |
2c0dc990 FM |
242 | { |
243 | int j; | |
244 | int alen; | |
245 | ||
63656b76 | 246 | alen = default_len; |
2c0dc990 FM |
247 | for (j = 0; j < 8; j++) { |
248 | if (arg[j] == '.') { | |
249 | alen = arg[j+1] - '0'; | |
2c0dc990 FM |
250 | break; |
251 | } else if (arg[j] == '\0') | |
252 | break; | |
253 | } | |
254 | return alen; | |
255 | } | |
256 | ||
c1a6f371 SG |
257 | enum i2c_err_op { |
258 | I2C_ERR_READ, | |
259 | I2C_ERR_WRITE, | |
260 | }; | |
261 | ||
262 | static int i2c_report_err(int ret, enum i2c_err_op op) | |
263 | { | |
264 | printf("Error %s the chip: %d\n", | |
265 | op == I2C_ERR_READ ? "reading" : "writing", ret); | |
266 | ||
267 | return CMD_RET_FAILURE; | |
268 | } | |
269 | ||
06afa388 MV |
270 | /** |
271 | * do_i2c_read() - Handle the "i2c read" command-line command | |
272 | * @cmdtp: Command data struct pointer | |
273 | * @flag: Command flag | |
274 | * @argc: Command-line argument count | |
275 | * @argv: Array of command-line arguments | |
276 | * | |
277 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
278 | * on error. | |
279 | * | |
652e5354 FM |
280 | * Syntax: |
281 | * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr} | |
282 | */ | |
54841ab5 | 283 | static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
652e5354 | 284 | { |
5468461d | 285 | uint chip; |
63656b76 SG |
286 | uint devaddr, length; |
287 | int alen; | |
652e5354 | 288 | u_char *memaddr; |
63656b76 SG |
289 | int ret; |
290 | #ifdef CONFIG_DM_I2C | |
291 | struct udevice *dev; | |
292 | #endif | |
652e5354 | 293 | |
47e26b1b | 294 | if (argc != 5) |
4c12eeb8 | 295 | return CMD_RET_USAGE; |
652e5354 FM |
296 | |
297 | /* | |
298 | * I2C chip address | |
299 | */ | |
300 | chip = simple_strtoul(argv[1], NULL, 16); | |
301 | ||
302 | /* | |
303 | * I2C data address within the chip. This can be 1 or | |
304 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
305 | */ | |
306 | devaddr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 307 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 308 | if (alen > 3) |
4c12eeb8 | 309 | return CMD_RET_USAGE; |
652e5354 FM |
310 | |
311 | /* | |
312 | * Length is the number of objects, not number of bytes. | |
313 | */ | |
314 | length = simple_strtoul(argv[3], NULL, 16); | |
315 | ||
316 | /* | |
317 | * memaddr is the address where to store things in memory | |
318 | */ | |
319 | memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16); | |
320 | ||
63656b76 SG |
321 | #ifdef CONFIG_DM_I2C |
322 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
323 | if (!ret && alen != -1) | |
324 | ret = i2c_set_chip_offset_len(dev, alen); | |
325 | if (!ret) | |
f9a4c2da | 326 | ret = dm_i2c_read(dev, devaddr, memaddr, length); |
63656b76 SG |
327 | #else |
328 | ret = i2c_read(chip, devaddr, alen, memaddr, length); | |
329 | #endif | |
330 | if (ret) | |
331 | return i2c_report_err(ret, I2C_ERR_READ); | |
332 | ||
652e5354 FM |
333 | return 0; |
334 | } | |
335 | ||
ff5d2dce YS |
336 | static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
337 | { | |
5468461d | 338 | uint chip; |
63656b76 SG |
339 | uint devaddr, length; |
340 | int alen; | |
ff5d2dce | 341 | u_char *memaddr; |
63656b76 SG |
342 | int ret; |
343 | #ifdef CONFIG_DM_I2C | |
344 | struct udevice *dev; | |
345 | #endif | |
ff5d2dce YS |
346 | |
347 | if (argc != 5) | |
348 | return cmd_usage(cmdtp); | |
349 | ||
350 | /* | |
351 | * memaddr is the address where to store things in memory | |
352 | */ | |
353 | memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16); | |
354 | ||
355 | /* | |
356 | * I2C chip address | |
357 | */ | |
358 | chip = simple_strtoul(argv[2], NULL, 16); | |
359 | ||
360 | /* | |
361 | * I2C data address within the chip. This can be 1 or | |
362 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
363 | */ | |
364 | devaddr = simple_strtoul(argv[3], NULL, 16); | |
63656b76 | 365 | alen = get_alen(argv[3], DEFAULT_ADDR_LEN); |
ff5d2dce YS |
366 | if (alen > 3) |
367 | return cmd_usage(cmdtp); | |
368 | ||
369 | /* | |
370 | * Length is the number of objects, not number of bytes. | |
371 | */ | |
372 | length = simple_strtoul(argv[4], NULL, 16); | |
373 | ||
63656b76 SG |
374 | #ifdef CONFIG_DM_I2C |
375 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
376 | if (!ret && alen != -1) | |
377 | ret = i2c_set_chip_offset_len(dev, alen); | |
378 | if (ret) | |
379 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
380 | #endif | |
381 | ||
ff5d2dce | 382 | while (length-- > 0) { |
63656b76 | 383 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 384 | ret = dm_i2c_write(dev, devaddr++, memaddr++, 1); |
63656b76 SG |
385 | #else |
386 | ret = i2c_write(chip, devaddr++, alen, memaddr++, 1); | |
387 | #endif | |
388 | if (ret) | |
389 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
ff5d2dce YS |
390 | /* |
391 | * No write delay with FRAM devices. | |
392 | */ | |
393 | #if !defined(CONFIG_SYS_I2C_FRAM) | |
394 | udelay(11000); | |
395 | #endif | |
396 | } | |
397 | return 0; | |
398 | } | |
399 | ||
63656b76 SG |
400 | #ifdef CONFIG_DM_I2C |
401 | static int do_i2c_flags(cmd_tbl_t *cmdtp, int flag, int argc, | |
402 | char *const argv[]) | |
403 | { | |
404 | struct udevice *dev; | |
405 | uint flags; | |
406 | int chip; | |
407 | int ret; | |
408 | ||
409 | if (argc < 2) | |
410 | return CMD_RET_USAGE; | |
411 | ||
412 | chip = simple_strtoul(argv[1], NULL, 16); | |
413 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
414 | if (ret) | |
415 | return i2c_report_err(ret, I2C_ERR_READ); | |
416 | ||
417 | if (argc > 2) { | |
418 | flags = simple_strtoul(argv[2], NULL, 16); | |
419 | ret = i2c_set_chip_flags(dev, flags); | |
420 | } else { | |
421 | ret = i2c_get_chip_flags(dev, &flags); | |
422 | if (!ret) | |
423 | printf("%x\n", flags); | |
424 | } | |
425 | if (ret) | |
426 | return i2c_report_err(ret, I2C_ERR_READ); | |
427 | ||
428 | return 0; | |
429 | } | |
430 | #endif | |
431 | ||
06afa388 MV |
432 | /** |
433 | * do_i2c_md() - Handle the "i2c md" command-line command | |
434 | * @cmdtp: Command data struct pointer | |
435 | * @flag: Command flag | |
436 | * @argc: Command-line argument count | |
437 | * @argv: Array of command-line arguments | |
438 | * | |
439 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
440 | * on error. | |
441 | * | |
4a8cf338 FM |
442 | * Syntax: |
443 | * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} | |
444 | */ | |
54841ab5 | 445 | static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 446 | { |
5468461d | 447 | uint chip; |
63656b76 SG |
448 | uint addr, length; |
449 | int alen; | |
81a8824f | 450 | int j, nbytes, linebytes; |
63656b76 SG |
451 | int ret; |
452 | #ifdef CONFIG_DM_I2C | |
453 | struct udevice *dev; | |
454 | #endif | |
81a8824f WD |
455 | |
456 | /* We use the last specified parameters, unless new ones are | |
457 | * entered. | |
458 | */ | |
459 | chip = i2c_dp_last_chip; | |
460 | addr = i2c_dp_last_addr; | |
461 | alen = i2c_dp_last_alen; | |
462 | length = i2c_dp_last_length; | |
463 | ||
47e26b1b | 464 | if (argc < 3) |
4c12eeb8 | 465 | return CMD_RET_USAGE; |
81a8824f WD |
466 | |
467 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
468 | /* | |
469 | * New command specified. | |
470 | */ | |
81a8824f WD |
471 | |
472 | /* | |
473 | * I2C chip address | |
474 | */ | |
475 | chip = simple_strtoul(argv[1], NULL, 16); | |
476 | ||
477 | /* | |
478 | * I2C data address within the chip. This can be 1 or | |
479 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
480 | */ | |
481 | addr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 482 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 483 | if (alen > 3) |
4c12eeb8 | 484 | return CMD_RET_USAGE; |
81a8824f WD |
485 | |
486 | /* | |
487 | * If another parameter, it is the length to display. | |
488 | * Length is the number of objects, not number of bytes. | |
489 | */ | |
490 | if (argc > 3) | |
491 | length = simple_strtoul(argv[3], NULL, 16); | |
492 | } | |
493 | ||
63656b76 SG |
494 | #ifdef CONFIG_DM_I2C |
495 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
496 | if (!ret && alen != -1) | |
497 | ret = i2c_set_chip_offset_len(dev, alen); | |
498 | if (ret) | |
499 | return i2c_report_err(ret, I2C_ERR_READ); | |
500 | #endif | |
501 | ||
81a8824f WD |
502 | /* |
503 | * Print the lines. | |
504 | * | |
505 | * We buffer all read data, so we can make sure data is read only | |
506 | * once. | |
507 | */ | |
508 | nbytes = length; | |
509 | do { | |
510 | unsigned char linebuf[DISP_LINE_LEN]; | |
511 | unsigned char *cp; | |
512 | ||
513 | linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; | |
514 | ||
63656b76 | 515 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 516 | ret = dm_i2c_read(dev, addr, linebuf, linebytes); |
63656b76 SG |
517 | #else |
518 | ret = i2c_read(chip, addr, alen, linebuf, linebytes); | |
519 | #endif | |
520 | if (ret) | |
521 | i2c_report_err(ret, I2C_ERR_READ); | |
e857a5bd | 522 | else { |
81a8824f WD |
523 | printf("%04x:", addr); |
524 | cp = linebuf; | |
525 | for (j=0; j<linebytes; j++) { | |
526 | printf(" %02x", *cp++); | |
527 | addr++; | |
528 | } | |
4b9206ed | 529 | puts (" "); |
81a8824f WD |
530 | cp = linebuf; |
531 | for (j=0; j<linebytes; j++) { | |
532 | if ((*cp < 0x20) || (*cp > 0x7e)) | |
4b9206ed | 533 | puts ("."); |
81a8824f WD |
534 | else |
535 | printf("%c", *cp); | |
536 | cp++; | |
537 | } | |
4b9206ed | 538 | putc ('\n'); |
81a8824f WD |
539 | } |
540 | nbytes -= linebytes; | |
541 | } while (nbytes > 0); | |
542 | ||
543 | i2c_dp_last_chip = chip; | |
544 | i2c_dp_last_addr = addr; | |
545 | i2c_dp_last_alen = alen; | |
546 | i2c_dp_last_length = length; | |
547 | ||
548 | return 0; | |
549 | } | |
550 | ||
06afa388 MV |
551 | /** |
552 | * do_i2c_mw() - Handle the "i2c mw" command-line command | |
553 | * @cmdtp: Command data struct pointer | |
554 | * @flag: Command flag | |
555 | * @argc: Command-line argument count | |
556 | * @argv: Array of command-line arguments | |
557 | * | |
558 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
559 | * on error. | |
81a8824f WD |
560 | * |
561 | * Syntax: | |
0f89c54b | 562 | * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] |
81a8824f | 563 | */ |
54841ab5 | 564 | static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 565 | { |
5468461d | 566 | uint chip; |
81a8824f | 567 | ulong addr; |
63656b76 | 568 | int alen; |
81a8824f WD |
569 | uchar byte; |
570 | int count; | |
63656b76 SG |
571 | int ret; |
572 | #ifdef CONFIG_DM_I2C | |
573 | struct udevice *dev; | |
574 | #endif | |
81a8824f | 575 | |
47e26b1b | 576 | if ((argc < 4) || (argc > 5)) |
4c12eeb8 | 577 | return CMD_RET_USAGE; |
81a8824f WD |
578 | |
579 | /* | |
53677ef1 WD |
580 | * Chip is always specified. |
581 | */ | |
81a8824f WD |
582 | chip = simple_strtoul(argv[1], NULL, 16); |
583 | ||
584 | /* | |
585 | * Address is always specified. | |
586 | */ | |
587 | addr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 588 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 589 | if (alen > 3) |
4c12eeb8 | 590 | return CMD_RET_USAGE; |
81a8824f | 591 | |
63656b76 SG |
592 | #ifdef CONFIG_DM_I2C |
593 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
594 | if (!ret && alen != -1) | |
595 | ret = i2c_set_chip_offset_len(dev, alen); | |
596 | if (ret) | |
597 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
598 | #endif | |
81a8824f WD |
599 | /* |
600 | * Value to write is always specified. | |
601 | */ | |
602 | byte = simple_strtoul(argv[3], NULL, 16); | |
603 | ||
604 | /* | |
605 | * Optional count | |
606 | */ | |
e857a5bd | 607 | if (argc == 5) |
81a8824f | 608 | count = simple_strtoul(argv[4], NULL, 16); |
e857a5bd | 609 | else |
81a8824f | 610 | count = 1; |
81a8824f WD |
611 | |
612 | while (count-- > 0) { | |
63656b76 | 613 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 614 | ret = dm_i2c_write(dev, addr++, &byte, 1); |
63656b76 SG |
615 | #else |
616 | ret = i2c_write(chip, addr++, alen, &byte, 1); | |
617 | #endif | |
618 | if (ret) | |
619 | i2c_report_err(ret, I2C_ERR_WRITE); | |
81a8824f WD |
620 | /* |
621 | * Wait for the write to complete. The write can take | |
622 | * up to 10mSec (we allow a little more time). | |
81a8824f | 623 | */ |
d4f5c728 | 624 | /* |
625 | * No write delay with FRAM devices. | |
626 | */ | |
6d0f6bcf | 627 | #if !defined(CONFIG_SYS_I2C_FRAM) |
81a8824f | 628 | udelay(11000); |
d4f5c728 | 629 | #endif |
81a8824f WD |
630 | } |
631 | ||
06afa388 | 632 | return 0; |
81a8824f WD |
633 | } |
634 | ||
06afa388 MV |
635 | /** |
636 | * do_i2c_crc() - Handle the "i2c crc32" command-line command | |
637 | * @cmdtp: Command data struct pointer | |
638 | * @flag: Command flag | |
639 | * @argc: Command-line argument count | |
640 | * @argv: Array of command-line arguments | |
641 | * | |
642 | * Calculate a CRC on memory | |
643 | * | |
644 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
645 | * on error. | |
81a8824f WD |
646 | * |
647 | * Syntax: | |
0f89c54b | 648 | * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} |
81a8824f | 649 | */ |
54841ab5 | 650 | static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 651 | { |
5468461d | 652 | uint chip; |
81a8824f | 653 | ulong addr; |
63656b76 | 654 | int alen; |
81a8824f WD |
655 | int count; |
656 | uchar byte; | |
657 | ulong crc; | |
658 | ulong err; | |
63656b76 SG |
659 | int ret = 0; |
660 | #ifdef CONFIG_DM_I2C | |
661 | struct udevice *dev; | |
662 | #endif | |
81a8824f | 663 | |
47e26b1b | 664 | if (argc < 4) |
4c12eeb8 | 665 | return CMD_RET_USAGE; |
81a8824f WD |
666 | |
667 | /* | |
53677ef1 WD |
668 | * Chip is always specified. |
669 | */ | |
81a8824f WD |
670 | chip = simple_strtoul(argv[1], NULL, 16); |
671 | ||
672 | /* | |
673 | * Address is always specified. | |
674 | */ | |
675 | addr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 676 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 677 | if (alen > 3) |
4c12eeb8 | 678 | return CMD_RET_USAGE; |
81a8824f | 679 | |
63656b76 SG |
680 | #ifdef CONFIG_DM_I2C |
681 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
682 | if (!ret && alen != -1) | |
683 | ret = i2c_set_chip_offset_len(dev, alen); | |
684 | if (ret) | |
685 | return i2c_report_err(ret, I2C_ERR_READ); | |
686 | #endif | |
81a8824f WD |
687 | /* |
688 | * Count is always specified | |
689 | */ | |
690 | count = simple_strtoul(argv[3], NULL, 16); | |
691 | ||
692 | printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1); | |
693 | /* | |
694 | * CRC a byte at a time. This is going to be slooow, but hey, the | |
695 | * memories are small and slow too so hopefully nobody notices. | |
696 | */ | |
697 | crc = 0; | |
698 | err = 0; | |
e857a5bd | 699 | while (count-- > 0) { |
63656b76 | 700 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 701 | ret = dm_i2c_read(dev, addr, &byte, 1); |
63656b76 SG |
702 | #else |
703 | ret = i2c_read(chip, addr, alen, &byte, 1); | |
704 | #endif | |
705 | if (ret) | |
81a8824f | 706 | err++; |
81a8824f WD |
707 | crc = crc32 (crc, &byte, 1); |
708 | addr++; | |
709 | } | |
e857a5bd | 710 | if (err > 0) |
63656b76 | 711 | i2c_report_err(ret, I2C_ERR_READ); |
e857a5bd | 712 | else |
81a8824f | 713 | printf ("%08lx\n", crc); |
81a8824f WD |
714 | |
715 | return 0; | |
716 | } | |
717 | ||
06afa388 MV |
718 | /** |
719 | * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command | |
720 | * @cmdtp: Command data struct pointer | |
721 | * @flag: Command flag | |
722 | * @argc: Command-line argument count | |
723 | * @argv: Array of command-line arguments | |
724 | * | |
725 | * Modify memory. | |
726 | * | |
727 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
728 | * on error. | |
81a8824f WD |
729 | * |
730 | * Syntax: | |
0f89c54b PT |
731 | * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} |
732 | * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} | |
81a8824f | 733 | */ |
81a8824f | 734 | static int |
54841ab5 | 735 | mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) |
81a8824f | 736 | { |
5468461d | 737 | uint chip; |
81a8824f | 738 | ulong addr; |
63656b76 | 739 | int alen; |
81a8824f WD |
740 | ulong data; |
741 | int size = 1; | |
742 | int nbytes; | |
63656b76 SG |
743 | int ret; |
744 | #ifdef CONFIG_DM_I2C | |
745 | struct udevice *dev; | |
746 | #endif | |
81a8824f | 747 | |
47e26b1b | 748 | if (argc != 3) |
4c12eeb8 | 749 | return CMD_RET_USAGE; |
81a8824f | 750 | |
b26440f1 | 751 | bootretry_reset_cmd_timeout(); /* got a good command to get here */ |
81a8824f WD |
752 | /* |
753 | * We use the last specified parameters, unless new ones are | |
754 | * entered. | |
755 | */ | |
756 | chip = i2c_mm_last_chip; | |
757 | addr = i2c_mm_last_addr; | |
758 | alen = i2c_mm_last_alen; | |
759 | ||
760 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
761 | /* | |
762 | * New command specified. Check for a size specification. | |
763 | * Defaults to byte if no or incorrect specification. | |
764 | */ | |
765 | size = cmd_get_data_size(argv[0], 1); | |
766 | ||
767 | /* | |
53677ef1 WD |
768 | * Chip is always specified. |
769 | */ | |
81a8824f WD |
770 | chip = simple_strtoul(argv[1], NULL, 16); |
771 | ||
772 | /* | |
773 | * Address is always specified. | |
774 | */ | |
775 | addr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 776 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 777 | if (alen > 3) |
4c12eeb8 | 778 | return CMD_RET_USAGE; |
81a8824f WD |
779 | } |
780 | ||
63656b76 SG |
781 | #ifdef CONFIG_DM_I2C |
782 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
783 | if (!ret && alen != -1) | |
784 | ret = i2c_set_chip_offset_len(dev, alen); | |
785 | if (ret) | |
786 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
787 | #endif | |
788 | ||
81a8824f WD |
789 | /* |
790 | * Print the address, followed by value. Then accept input for | |
791 | * the next value. A non-converted value exits. | |
792 | */ | |
793 | do { | |
794 | printf("%08lx:", addr); | |
63656b76 | 795 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 796 | ret = dm_i2c_read(dev, addr, (uchar *)&data, size); |
63656b76 SG |
797 | #else |
798 | ret = i2c_read(chip, addr, alen, (uchar *)&data, size); | |
799 | #endif | |
800 | if (ret) | |
801 | i2c_report_err(ret, I2C_ERR_READ); | |
e857a5bd | 802 | else { |
81a8824f | 803 | data = cpu_to_be32(data); |
e857a5bd | 804 | if (size == 1) |
81a8824f | 805 | printf(" %02lx", (data >> 24) & 0x000000FF); |
e857a5bd | 806 | else if (size == 2) |
81a8824f | 807 | printf(" %04lx", (data >> 16) & 0x0000FFFF); |
e857a5bd | 808 | else |
81a8824f | 809 | printf(" %08lx", data); |
81a8824f WD |
810 | } |
811 | ||
e1bf824d | 812 | nbytes = cli_readline(" ? "); |
81a8824f WD |
813 | if (nbytes == 0) { |
814 | /* | |
815 | * <CR> pressed as only input, don't modify current | |
816 | * location and move to next. | |
817 | */ | |
818 | if (incrflag) | |
819 | addr += size; | |
820 | nbytes = size; | |
b26440f1 SG |
821 | /* good enough to not time out */ |
822 | bootretry_reset_cmd_timeout(); | |
81a8824f WD |
823 | } |
824 | #ifdef CONFIG_BOOT_RETRY_TIME | |
e857a5bd | 825 | else if (nbytes == -2) |
81a8824f | 826 | break; /* timed out, exit the command */ |
81a8824f WD |
827 | #endif |
828 | else { | |
829 | char *endp; | |
830 | ||
831 | data = simple_strtoul(console_buffer, &endp, 16); | |
e857a5bd | 832 | if (size == 1) |
81a8824f | 833 | data = data << 24; |
e857a5bd | 834 | else if (size == 2) |
81a8824f | 835 | data = data << 16; |
81a8824f WD |
836 | data = be32_to_cpu(data); |
837 | nbytes = endp - console_buffer; | |
838 | if (nbytes) { | |
81a8824f WD |
839 | /* |
840 | * good enough to not time out | |
841 | */ | |
b26440f1 | 842 | bootretry_reset_cmd_timeout(); |
63656b76 | 843 | #ifdef CONFIG_DM_I2C |
f9a4c2da SG |
844 | ret = dm_i2c_write(dev, addr, (uchar *)&data, |
845 | size); | |
63656b76 SG |
846 | #else |
847 | ret = i2c_write(chip, addr, alen, | |
848 | (uchar *)&data, size); | |
849 | #endif | |
850 | if (ret) | |
851 | i2c_report_err(ret, I2C_ERR_WRITE); | |
6d0f6bcf JCPV |
852 | #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS |
853 | udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); | |
2535d602 | 854 | #endif |
81a8824f WD |
855 | if (incrflag) |
856 | addr += size; | |
857 | } | |
858 | } | |
859 | } while (nbytes); | |
860 | ||
0800707b PT |
861 | i2c_mm_last_chip = chip; |
862 | i2c_mm_last_addr = addr; | |
863 | i2c_mm_last_alen = alen; | |
81a8824f WD |
864 | |
865 | return 0; | |
866 | } | |
867 | ||
06afa388 MV |
868 | /** |
869 | * do_i2c_probe() - Handle the "i2c probe" command-line command | |
870 | * @cmdtp: Command data struct pointer | |
871 | * @flag: Command flag | |
872 | * @argc: Command-line argument count | |
873 | * @argv: Array of command-line arguments | |
874 | * | |
875 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
876 | * on error. | |
877 | * | |
81a8824f | 878 | * Syntax: |
54b99e51 EN |
879 | * i2c probe {addr} |
880 | * | |
881 | * Returns zero (success) if one or more I2C devices was found | |
81a8824f | 882 | */ |
54841ab5 | 883 | static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
884 | { |
885 | int j; | |
54b99e51 EN |
886 | int addr = -1; |
887 | int found = 0; | |
6d0f6bcf | 888 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 889 | int k, skip; |
3f4978c7 | 890 | unsigned int bus = GET_BUS_NUM; |
bb99ad6d | 891 | #endif /* NOPROBES */ |
63656b76 SG |
892 | int ret; |
893 | #ifdef CONFIG_DM_I2C | |
894 | struct udevice *bus, *dev; | |
895 | ||
896 | if (i2c_get_cur_bus(&bus)) | |
897 | return CMD_RET_FAILURE; | |
898 | #endif | |
81a8824f | 899 | |
54b99e51 EN |
900 | if (argc == 2) |
901 | addr = simple_strtol(argv[1], 0, 16); | |
902 | ||
4b9206ed | 903 | puts ("Valid chip addresses:"); |
e857a5bd | 904 | for (j = 0; j < 128; j++) { |
54b99e51 EN |
905 | if ((0 <= addr) && (j != addr)) |
906 | continue; | |
907 | ||
6d0f6bcf | 908 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 909 | skip = 0; |
cfb25cc4 | 910 | for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { |
e857a5bd | 911 | if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) { |
81a8824f WD |
912 | skip = 1; |
913 | break; | |
914 | } | |
915 | } | |
916 | if (skip) | |
917 | continue; | |
918 | #endif | |
63656b76 | 919 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 920 | ret = dm_i2c_probe(bus, j, 0, &dev); |
63656b76 SG |
921 | #else |
922 | ret = i2c_probe(j); | |
923 | #endif | |
924 | if (ret == 0) { | |
81a8824f | 925 | printf(" %02X", j); |
54b99e51 EN |
926 | found++; |
927 | } | |
81a8824f | 928 | } |
4b9206ed | 929 | putc ('\n'); |
81a8824f | 930 | |
6d0f6bcf | 931 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 932 | puts ("Excluded chip addresses:"); |
cfb25cc4 | 933 | for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { |
e857a5bd | 934 | if (COMPARE_BUS(bus,k)) |
bb99ad6d BW |
935 | printf(" %02X", NO_PROBE_ADDR(k)); |
936 | } | |
4b9206ed | 937 | putc ('\n'); |
81a8824f WD |
938 | #endif |
939 | ||
54b99e51 | 940 | return (0 == found); |
81a8824f WD |
941 | } |
942 | ||
06afa388 MV |
943 | /** |
944 | * do_i2c_loop() - Handle the "i2c loop" command-line command | |
945 | * @cmdtp: Command data struct pointer | |
946 | * @flag: Command flag | |
947 | * @argc: Command-line argument count | |
948 | * @argv: Array of command-line arguments | |
949 | * | |
950 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
951 | * on error. | |
952 | * | |
81a8824f | 953 | * Syntax: |
0f89c54b | 954 | * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] |
81a8824f WD |
955 | * {length} - Number of bytes to read |
956 | * {delay} - A DECIMAL number and defaults to 1000 uSec | |
957 | */ | |
54841ab5 | 958 | static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 959 | { |
5468461d | 960 | uint chip; |
63656b76 | 961 | int alen; |
81a8824f WD |
962 | uint addr; |
963 | uint length; | |
964 | u_char bytes[16]; | |
965 | int delay; | |
63656b76 SG |
966 | int ret; |
967 | #ifdef CONFIG_DM_I2C | |
968 | struct udevice *dev; | |
969 | #endif | |
81a8824f | 970 | |
47e26b1b | 971 | if (argc < 3) |
4c12eeb8 | 972 | return CMD_RET_USAGE; |
81a8824f WD |
973 | |
974 | /* | |
975 | * Chip is always specified. | |
976 | */ | |
977 | chip = simple_strtoul(argv[1], NULL, 16); | |
978 | ||
979 | /* | |
980 | * Address is always specified. | |
981 | */ | |
982 | addr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 983 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 984 | if (alen > 3) |
4c12eeb8 | 985 | return CMD_RET_USAGE; |
63656b76 SG |
986 | #ifdef CONFIG_DM_I2C |
987 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
988 | if (!ret && alen != -1) | |
989 | ret = i2c_set_chip_offset_len(dev, alen); | |
990 | if (ret) | |
991 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
992 | #endif | |
81a8824f WD |
993 | |
994 | /* | |
995 | * Length is the number of objects, not number of bytes. | |
996 | */ | |
997 | length = 1; | |
998 | length = simple_strtoul(argv[3], NULL, 16); | |
e857a5bd | 999 | if (length > sizeof(bytes)) |
81a8824f | 1000 | length = sizeof(bytes); |
81a8824f WD |
1001 | |
1002 | /* | |
1003 | * The delay time (uSec) is optional. | |
1004 | */ | |
1005 | delay = 1000; | |
e857a5bd | 1006 | if (argc > 3) |
81a8824f | 1007 | delay = simple_strtoul(argv[4], NULL, 10); |
81a8824f WD |
1008 | /* |
1009 | * Run the loop... | |
1010 | */ | |
e857a5bd | 1011 | while (1) { |
63656b76 | 1012 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 1013 | ret = dm_i2c_read(dev, addr, bytes, length); |
63656b76 SG |
1014 | #else |
1015 | ret = i2c_read(chip, addr, alen, bytes, length); | |
1016 | #endif | |
1017 | if (ret) | |
1018 | i2c_report_err(ret, I2C_ERR_READ); | |
81a8824f WD |
1019 | udelay(delay); |
1020 | } | |
1021 | ||
1022 | /* NOTREACHED */ | |
1023 | return 0; | |
1024 | } | |
1025 | ||
81a8824f WD |
1026 | /* |
1027 | * The SDRAM command is separately configured because many | |
1028 | * (most?) embedded boards don't use SDRAM DIMMs. | |
06afa388 MV |
1029 | * |
1030 | * FIXME: Document and probably move elsewhere! | |
81a8824f | 1031 | */ |
c76fe474 | 1032 | #if defined(CONFIG_CMD_SDRAM) |
632de067 LJ |
1033 | static void print_ddr2_tcyc (u_char const b) |
1034 | { | |
1035 | printf ("%d.", (b >> 4) & 0x0F); | |
1036 | switch (b & 0x0F) { | |
1037 | case 0x0: | |
1038 | case 0x1: | |
1039 | case 0x2: | |
1040 | case 0x3: | |
1041 | case 0x4: | |
1042 | case 0x5: | |
1043 | case 0x6: | |
1044 | case 0x7: | |
1045 | case 0x8: | |
1046 | case 0x9: | |
1047 | printf ("%d ns\n", b & 0x0F); | |
1048 | break; | |
1049 | case 0xA: | |
1050 | puts ("25 ns\n"); | |
1051 | break; | |
1052 | case 0xB: | |
1053 | puts ("33 ns\n"); | |
1054 | break; | |
1055 | case 0xC: | |
1056 | puts ("66 ns\n"); | |
1057 | break; | |
1058 | case 0xD: | |
1059 | puts ("75 ns\n"); | |
1060 | break; | |
1061 | default: | |
1062 | puts ("?? ns\n"); | |
1063 | break; | |
1064 | } | |
1065 | } | |
1066 | ||
1067 | static void decode_bits (u_char const b, char const *str[], int const do_once) | |
1068 | { | |
1069 | u_char mask; | |
1070 | ||
1071 | for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) { | |
1072 | if (b & mask) { | |
1073 | puts (*str); | |
1074 | if (do_once) | |
1075 | return; | |
1076 | } | |
1077 | } | |
1078 | } | |
81a8824f WD |
1079 | |
1080 | /* | |
1081 | * Syntax: | |
0f89c54b | 1082 | * i2c sdram {i2c_chip} |
81a8824f | 1083 | */ |
54841ab5 | 1084 | static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 1085 | { |
632de067 LJ |
1086 | enum { unknown, EDO, SDRAM, DDR2 } type; |
1087 | ||
5468461d | 1088 | uint chip; |
81a8824f WD |
1089 | u_char data[128]; |
1090 | u_char cksum; | |
1091 | int j; | |
1092 | ||
632de067 LJ |
1093 | static const char *decode_CAS_DDR2[] = { |
1094 | " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD" | |
1095 | }; | |
1096 | ||
1097 | static const char *decode_CAS_default[] = { | |
1098 | " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1" | |
1099 | }; | |
1100 | ||
1101 | static const char *decode_CS_WE_default[] = { | |
1102 | " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0" | |
1103 | }; | |
1104 | ||
1105 | static const char *decode_byte21_default[] = { | |
1106 | " TBD (bit 7)\n", | |
1107 | " Redundant row address\n", | |
1108 | " Differential clock input\n", | |
1109 | " Registerd DQMB inputs\n", | |
1110 | " Buffered DQMB inputs\n", | |
1111 | " On-card PLL\n", | |
1112 | " Registered address/control lines\n", | |
1113 | " Buffered address/control lines\n" | |
1114 | }; | |
1115 | ||
1116 | static const char *decode_byte22_DDR2[] = { | |
1117 | " TBD (bit 7)\n", | |
1118 | " TBD (bit 6)\n", | |
1119 | " TBD (bit 5)\n", | |
1120 | " TBD (bit 4)\n", | |
1121 | " TBD (bit 3)\n", | |
1122 | " Supports partial array self refresh\n", | |
1123 | " Supports 50 ohm ODT\n", | |
1124 | " Supports weak driver\n" | |
1125 | }; | |
1126 | ||
1127 | static const char *decode_row_density_DDR2[] = { | |
1128 | "512 MiB", "256 MiB", "128 MiB", "16 GiB", | |
1129 | "8 GiB", "4 GiB", "2 GiB", "1 GiB" | |
1130 | }; | |
1131 | ||
1132 | static const char *decode_row_density_default[] = { | |
1133 | "512 MiB", "256 MiB", "128 MiB", "64 MiB", | |
1134 | "32 MiB", "16 MiB", "8 MiB", "4 MiB" | |
1135 | }; | |
1136 | ||
47e26b1b | 1137 | if (argc < 2) |
4c12eeb8 | 1138 | return CMD_RET_USAGE; |
47e26b1b | 1139 | |
81a8824f WD |
1140 | /* |
1141 | * Chip is always specified. | |
632de067 LJ |
1142 | */ |
1143 | chip = simple_strtoul (argv[1], NULL, 16); | |
81a8824f | 1144 | |
632de067 | 1145 | if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) { |
4b9206ed | 1146 | puts ("No SDRAM Serial Presence Detect found.\n"); |
81a8824f WD |
1147 | return 1; |
1148 | } | |
1149 | ||
1150 | cksum = 0; | |
1151 | for (j = 0; j < 63; j++) { | |
1152 | cksum += data[j]; | |
1153 | } | |
e857a5bd | 1154 | if (cksum != data[63]) { |
81a8824f | 1155 | printf ("WARNING: Configuration data checksum failure:\n" |
632de067 | 1156 | " is 0x%02x, calculated 0x%02x\n", data[63], cksum); |
81a8824f | 1157 | } |
632de067 | 1158 | printf ("SPD data revision %d.%d\n", |
81a8824f | 1159 | (data[62] >> 4) & 0x0F, data[62] & 0x0F); |
632de067 LJ |
1160 | printf ("Bytes used 0x%02X\n", data[0]); |
1161 | printf ("Serial memory size 0x%02X\n", 1 << data[1]); | |
1162 | ||
4b9206ed | 1163 | puts ("Memory type "); |
632de067 | 1164 | switch (data[2]) { |
0df6b844 LJ |
1165 | case 2: |
1166 | type = EDO; | |
1167 | puts ("EDO\n"); | |
1168 | break; | |
1169 | case 4: | |
1170 | type = SDRAM; | |
1171 | puts ("SDRAM\n"); | |
1172 | break; | |
1173 | case 8: | |
1174 | type = DDR2; | |
1175 | puts ("DDR2\n"); | |
1176 | break; | |
1177 | default: | |
1178 | type = unknown; | |
1179 | puts ("unknown\n"); | |
1180 | break; | |
81a8824f | 1181 | } |
632de067 | 1182 | |
4b9206ed | 1183 | puts ("Row address bits "); |
e857a5bd | 1184 | if ((data[3] & 0x00F0) == 0) |
632de067 | 1185 | printf ("%d\n", data[3] & 0x0F); |
e857a5bd | 1186 | else |
632de067 LJ |
1187 | printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F); |
1188 | ||
4b9206ed | 1189 | puts ("Column address bits "); |
e857a5bd | 1190 | if ((data[4] & 0x00F0) == 0) |
632de067 | 1191 | printf ("%d\n", data[4] & 0x0F); |
e857a5bd | 1192 | else |
632de067 | 1193 | printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F); |
0df6b844 LJ |
1194 | |
1195 | switch (type) { | |
1196 | case DDR2: | |
632de067 LJ |
1197 | printf ("Number of ranks %d\n", |
1198 | (data[5] & 0x07) + 1); | |
0df6b844 LJ |
1199 | break; |
1200 | default: | |
632de067 | 1201 | printf ("Module rows %d\n", data[5]); |
0df6b844 LJ |
1202 | break; |
1203 | } | |
1204 | ||
1205 | switch (type) { | |
1206 | case DDR2: | |
632de067 | 1207 | printf ("Module data width %d bits\n", data[6]); |
0df6b844 LJ |
1208 | break; |
1209 | default: | |
632de067 LJ |
1210 | printf ("Module data width %d bits\n", |
1211 | (data[7] << 8) | data[6]); | |
0df6b844 LJ |
1212 | break; |
1213 | } | |
1214 | ||
4b9206ed | 1215 | puts ("Interface signal levels "); |
81a8824f | 1216 | switch(data[8]) { |
0df6b844 | 1217 | case 0: puts ("TTL 5.0 V\n"); break; |
4b9206ed | 1218 | case 1: puts ("LVTTL\n"); break; |
0df6b844 LJ |
1219 | case 2: puts ("HSTL 1.5 V\n"); break; |
1220 | case 3: puts ("SSTL 3.3 V\n"); break; | |
1221 | case 4: puts ("SSTL 2.5 V\n"); break; | |
1222 | case 5: puts ("SSTL 1.8 V\n"); break; | |
4b9206ed | 1223 | default: puts ("unknown\n"); break; |
81a8824f | 1224 | } |
0df6b844 LJ |
1225 | |
1226 | switch (type) { | |
1227 | case DDR2: | |
632de067 LJ |
1228 | printf ("SDRAM cycle time "); |
1229 | print_ddr2_tcyc (data[9]); | |
0df6b844 LJ |
1230 | break; |
1231 | default: | |
632de067 LJ |
1232 | printf ("SDRAM cycle time %d.%d ns\n", |
1233 | (data[9] >> 4) & 0x0F, data[9] & 0x0F); | |
0df6b844 LJ |
1234 | break; |
1235 | } | |
1236 | ||
1237 | switch (type) { | |
1238 | case DDR2: | |
632de067 LJ |
1239 | printf ("SDRAM access time 0.%d%d ns\n", |
1240 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
1241 | break; |
1242 | default: | |
632de067 LJ |
1243 | printf ("SDRAM access time %d.%d ns\n", |
1244 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
1245 | break; |
1246 | } | |
1247 | ||
4b9206ed | 1248 | puts ("EDC configuration "); |
632de067 | 1249 | switch (data[11]) { |
4b9206ed WD |
1250 | case 0: puts ("None\n"); break; |
1251 | case 1: puts ("Parity\n"); break; | |
1252 | case 2: puts ("ECC\n"); break; | |
1253 | default: puts ("unknown\n"); break; | |
81a8824f | 1254 | } |
632de067 | 1255 | |
e857a5bd | 1256 | if ((data[12] & 0x80) == 0) |
4b9206ed | 1257 | puts ("No self refresh, rate "); |
e857a5bd | 1258 | else |
4b9206ed | 1259 | puts ("Self refresh, rate "); |
632de067 | 1260 | |
81a8824f | 1261 | switch(data[12] & 0x7F) { |
632de067 LJ |
1262 | case 0: puts ("15.625 us\n"); break; |
1263 | case 1: puts ("3.9 us\n"); break; | |
1264 | case 2: puts ("7.8 us\n"); break; | |
1265 | case 3: puts ("31.3 us\n"); break; | |
1266 | case 4: puts ("62.5 us\n"); break; | |
1267 | case 5: puts ("125 us\n"); break; | |
4b9206ed | 1268 | default: puts ("unknown\n"); break; |
81a8824f | 1269 | } |
0df6b844 LJ |
1270 | |
1271 | switch (type) { | |
1272 | case DDR2: | |
632de067 | 1273 | printf ("SDRAM width (primary) %d\n", data[13]); |
0df6b844 LJ |
1274 | break; |
1275 | default: | |
632de067 | 1276 | printf ("SDRAM width (primary) %d\n", data[13] & 0x7F); |
0df6b844 | 1277 | if ((data[13] & 0x80) != 0) { |
632de067 LJ |
1278 | printf (" (second bank) %d\n", |
1279 | 2 * (data[13] & 0x7F)); | |
0df6b844 LJ |
1280 | } |
1281 | break; | |
1282 | } | |
1283 | ||
1284 | switch (type) { | |
1285 | case DDR2: | |
1286 | if (data[14] != 0) | |
632de067 | 1287 | printf ("EDC width %d\n", data[14]); |
0df6b844 LJ |
1288 | break; |
1289 | default: | |
1290 | if (data[14] != 0) { | |
632de067 LJ |
1291 | printf ("EDC width %d\n", |
1292 | data[14] & 0x7F); | |
0df6b844 LJ |
1293 | |
1294 | if ((data[14] & 0x80) != 0) { | |
632de067 LJ |
1295 | printf (" (second bank) %d\n", |
1296 | 2 * (data[14] & 0x7F)); | |
0df6b844 LJ |
1297 | } |
1298 | } | |
1299 | break; | |
81a8824f | 1300 | } |
0df6b844 | 1301 | |
632de067 LJ |
1302 | if (DDR2 != type) { |
1303 | printf ("Min clock delay, back-to-back random column addresses " | |
1304 | "%d\n", data[15]); | |
0df6b844 LJ |
1305 | } |
1306 | ||
4b9206ed WD |
1307 | puts ("Burst length(s) "); |
1308 | if (data[16] & 0x80) puts (" Page"); | |
1309 | if (data[16] & 0x08) puts (" 8"); | |
1310 | if (data[16] & 0x04) puts (" 4"); | |
1311 | if (data[16] & 0x02) puts (" 2"); | |
1312 | if (data[16] & 0x01) puts (" 1"); | |
1313 | putc ('\n'); | |
632de067 | 1314 | printf ("Number of banks %d\n", data[17]); |
0df6b844 LJ |
1315 | |
1316 | switch (type) { | |
1317 | case DDR2: | |
1318 | puts ("CAS latency(s) "); | |
632de067 | 1319 | decode_bits (data[18], decode_CAS_DDR2, 0); |
0df6b844 LJ |
1320 | putc ('\n'); |
1321 | break; | |
1322 | default: | |
1323 | puts ("CAS latency(s) "); | |
632de067 | 1324 | decode_bits (data[18], decode_CAS_default, 0); |
0df6b844 LJ |
1325 | putc ('\n'); |
1326 | break; | |
1327 | } | |
1328 | ||
1329 | if (DDR2 != type) { | |
1330 | puts ("CS latency(s) "); | |
632de067 | 1331 | decode_bits (data[19], decode_CS_WE_default, 0); |
0df6b844 LJ |
1332 | putc ('\n'); |
1333 | } | |
1334 | ||
1335 | if (DDR2 != type) { | |
1336 | puts ("WE latency(s) "); | |
632de067 | 1337 | decode_bits (data[20], decode_CS_WE_default, 0); |
0df6b844 LJ |
1338 | putc ('\n'); |
1339 | } | |
1340 | ||
1341 | switch (type) { | |
1342 | case DDR2: | |
1343 | puts ("Module attributes:\n"); | |
1344 | if (data[21] & 0x80) | |
1345 | puts (" TBD (bit 7)\n"); | |
1346 | if (data[21] & 0x40) | |
1347 | puts (" Analysis probe installed\n"); | |
1348 | if (data[21] & 0x20) | |
1349 | puts (" TBD (bit 5)\n"); | |
1350 | if (data[21] & 0x10) | |
1351 | puts (" FET switch external enable\n"); | |
632de067 | 1352 | printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03); |
0df6b844 | 1353 | if (data[20] & 0x11) { |
632de067 LJ |
1354 | printf (" %d active registers on DIMM\n", |
1355 | (data[21] & 0x03) + 1); | |
0df6b844 LJ |
1356 | } |
1357 | break; | |
1358 | default: | |
1359 | puts ("Module attributes:\n"); | |
1360 | if (!data[21]) | |
1361 | puts (" (none)\n"); | |
632de067 LJ |
1362 | else |
1363 | decode_bits (data[21], decode_byte21_default, 0); | |
0df6b844 LJ |
1364 | break; |
1365 | } | |
1366 | ||
1367 | switch (type) { | |
1368 | case DDR2: | |
632de067 | 1369 | decode_bits (data[22], decode_byte22_DDR2, 0); |
0df6b844 LJ |
1370 | break; |
1371 | default: | |
1372 | puts ("Device attributes:\n"); | |
1373 | if (data[22] & 0x80) puts (" TBD (bit 7)\n"); | |
1374 | if (data[22] & 0x40) puts (" TBD (bit 6)\n"); | |
1375 | if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n"); | |
1376 | else puts (" Upper Vcc tolerance 10%\n"); | |
1377 | if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n"); | |
1378 | else puts (" Lower Vcc tolerance 10%\n"); | |
1379 | if (data[22] & 0x08) puts (" Supports write1/read burst\n"); | |
1380 | if (data[22] & 0x04) puts (" Supports precharge all\n"); | |
1381 | if (data[22] & 0x02) puts (" Supports auto precharge\n"); | |
1382 | if (data[22] & 0x01) puts (" Supports early RAS# precharge\n"); | |
1383 | break; | |
1384 | } | |
1385 | ||
1386 | switch (type) { | |
1387 | case DDR2: | |
632de067 LJ |
1388 | printf ("SDRAM cycle time (2nd highest CAS latency) "); |
1389 | print_ddr2_tcyc (data[23]); | |
0df6b844 LJ |
1390 | break; |
1391 | default: | |
632de067 LJ |
1392 | printf ("SDRAM cycle time (2nd highest CAS latency) %d." |
1393 | "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F); | |
0df6b844 LJ |
1394 | break; |
1395 | } | |
1396 | ||
1397 | switch (type) { | |
1398 | case DDR2: | |
632de067 LJ |
1399 | printf ("SDRAM access from clock (2nd highest CAS latency) 0." |
1400 | "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1401 | break; |
1402 | default: | |
632de067 LJ |
1403 | printf ("SDRAM access from clock (2nd highest CAS latency) %d." |
1404 | "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1405 | break; |
1406 | } | |
1407 | ||
1408 | switch (type) { | |
1409 | case DDR2: | |
632de067 LJ |
1410 | printf ("SDRAM cycle time (3rd highest CAS latency) "); |
1411 | print_ddr2_tcyc (data[25]); | |
0df6b844 LJ |
1412 | break; |
1413 | default: | |
632de067 LJ |
1414 | printf ("SDRAM cycle time (3rd highest CAS latency) %d." |
1415 | "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F); | |
0df6b844 LJ |
1416 | break; |
1417 | } | |
1418 | ||
1419 | switch (type) { | |
1420 | case DDR2: | |
632de067 LJ |
1421 | printf ("SDRAM access from clock (3rd highest CAS latency) 0." |
1422 | "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1423 | break; |
1424 | default: | |
632de067 LJ |
1425 | printf ("SDRAM access from clock (3rd highest CAS latency) %d." |
1426 | "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1427 | break; |
1428 | } | |
1429 | ||
1430 | switch (type) { | |
1431 | case DDR2: | |
632de067 LJ |
1432 | printf ("Minimum row precharge %d.%02d ns\n", |
1433 | (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03)); | |
0df6b844 LJ |
1434 | break; |
1435 | default: | |
632de067 | 1436 | printf ("Minimum row precharge %d ns\n", data[27]); |
0df6b844 LJ |
1437 | break; |
1438 | } | |
1439 | ||
1440 | switch (type) { | |
1441 | case DDR2: | |
632de067 LJ |
1442 | printf ("Row active to row active min %d.%02d ns\n", |
1443 | (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03)); | |
0df6b844 LJ |
1444 | break; |
1445 | default: | |
632de067 | 1446 | printf ("Row active to row active min %d ns\n", data[28]); |
0df6b844 LJ |
1447 | break; |
1448 | } | |
1449 | ||
1450 | switch (type) { | |
1451 | case DDR2: | |
632de067 LJ |
1452 | printf ("RAS to CAS delay min %d.%02d ns\n", |
1453 | (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03)); | |
0df6b844 LJ |
1454 | break; |
1455 | default: | |
632de067 | 1456 | printf ("RAS to CAS delay min %d ns\n", data[29]); |
0df6b844 LJ |
1457 | break; |
1458 | } | |
1459 | ||
632de067 | 1460 | printf ("Minimum RAS pulse width %d ns\n", data[30]); |
0df6b844 LJ |
1461 | |
1462 | switch (type) { | |
1463 | case DDR2: | |
632de067 LJ |
1464 | puts ("Density of each row "); |
1465 | decode_bits (data[31], decode_row_density_DDR2, 1); | |
1466 | putc ('\n'); | |
0df6b844 LJ |
1467 | break; |
1468 | default: | |
632de067 LJ |
1469 | puts ("Density of each row "); |
1470 | decode_bits (data[31], decode_row_density_default, 1); | |
1471 | putc ('\n'); | |
0df6b844 LJ |
1472 | break; |
1473 | } | |
1474 | ||
1475 | switch (type) { | |
1476 | case DDR2: | |
632de067 | 1477 | puts ("Command and Address setup "); |
0df6b844 | 1478 | if (data[32] >= 0xA0) { |
632de067 LJ |
1479 | printf ("1.%d%d ns\n", |
1480 | ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F); | |
0df6b844 | 1481 | } else { |
632de067 LJ |
1482 | printf ("0.%d%d ns\n", |
1483 | ((data[32] >> 4) & 0x0F), data[32] & 0x0F); | |
0df6b844 LJ |
1484 | } |
1485 | break; | |
1486 | default: | |
632de067 LJ |
1487 | printf ("Command and Address setup %c%d.%d ns\n", |
1488 | (data[32] & 0x80) ? '-' : '+', | |
1489 | (data[32] >> 4) & 0x07, data[32] & 0x0F); | |
0df6b844 LJ |
1490 | break; |
1491 | } | |
1492 | ||
1493 | switch (type) { | |
1494 | case DDR2: | |
632de067 | 1495 | puts ("Command and Address hold "); |
0df6b844 | 1496 | if (data[33] >= 0xA0) { |
632de067 LJ |
1497 | printf ("1.%d%d ns\n", |
1498 | ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F); | |
0df6b844 | 1499 | } else { |
632de067 LJ |
1500 | printf ("0.%d%d ns\n", |
1501 | ((data[33] >> 4) & 0x0F), data[33] & 0x0F); | |
0df6b844 LJ |
1502 | } |
1503 | break; | |
1504 | default: | |
632de067 LJ |
1505 | printf ("Command and Address hold %c%d.%d ns\n", |
1506 | (data[33] & 0x80) ? '-' : '+', | |
1507 | (data[33] >> 4) & 0x07, data[33] & 0x0F); | |
0df6b844 LJ |
1508 | break; |
1509 | } | |
1510 | ||
1511 | switch (type) { | |
1512 | case DDR2: | |
632de067 LJ |
1513 | printf ("Data signal input setup 0.%d%d ns\n", |
1514 | (data[34] >> 4) & 0x0F, data[34] & 0x0F); | |
0df6b844 LJ |
1515 | break; |
1516 | default: | |
632de067 LJ |
1517 | printf ("Data signal input setup %c%d.%d ns\n", |
1518 | (data[34] & 0x80) ? '-' : '+', | |
1519 | (data[34] >> 4) & 0x07, data[34] & 0x0F); | |
0df6b844 LJ |
1520 | break; |
1521 | } | |
1522 | ||
1523 | switch (type) { | |
1524 | case DDR2: | |
632de067 LJ |
1525 | printf ("Data signal input hold 0.%d%d ns\n", |
1526 | (data[35] >> 4) & 0x0F, data[35] & 0x0F); | |
0df6b844 LJ |
1527 | break; |
1528 | default: | |
632de067 LJ |
1529 | printf ("Data signal input hold %c%d.%d ns\n", |
1530 | (data[35] & 0x80) ? '-' : '+', | |
1531 | (data[35] >> 4) & 0x07, data[35] & 0x0F); | |
0df6b844 LJ |
1532 | break; |
1533 | } | |
1534 | ||
4b9206ed | 1535 | puts ("Manufacturer's JEDEC ID "); |
e857a5bd | 1536 | for (j = 64; j <= 71; j++) |
632de067 | 1537 | printf ("%02X ", data[j]); |
4b9206ed | 1538 | putc ('\n'); |
632de067 | 1539 | printf ("Manufacturing Location %02X\n", data[72]); |
4b9206ed | 1540 | puts ("Manufacturer's Part Number "); |
e857a5bd | 1541 | for (j = 73; j <= 90; j++) |
632de067 | 1542 | printf ("%02X ", data[j]); |
4b9206ed | 1543 | putc ('\n'); |
632de067 LJ |
1544 | printf ("Revision Code %02X %02X\n", data[91], data[92]); |
1545 | printf ("Manufacturing Date %02X %02X\n", data[93], data[94]); | |
4b9206ed | 1546 | puts ("Assembly Serial Number "); |
e857a5bd | 1547 | for (j = 95; j <= 98; j++) |
632de067 | 1548 | printf ("%02X ", data[j]); |
4b9206ed | 1549 | putc ('\n'); |
81a8824f | 1550 | |
0df6b844 | 1551 | if (DDR2 != type) { |
632de067 LJ |
1552 | printf ("Speed rating PC%d\n", |
1553 | data[126] == 0x66 ? 66 : data[126]); | |
0df6b844 | 1554 | } |
81a8824f WD |
1555 | return 0; |
1556 | } | |
90253178 | 1557 | #endif |
81a8824f | 1558 | |
735987c5 TWHT |
1559 | /* |
1560 | * Syntax: | |
1561 | * i2c edid {i2c_chip} | |
1562 | */ | |
1563 | #if defined(CONFIG_I2C_EDID) | |
1564 | int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) | |
1565 | { | |
5468461d | 1566 | uint chip; |
735987c5 | 1567 | struct edid1_info edid; |
63656b76 SG |
1568 | int ret; |
1569 | #ifdef CONFIG_DM_I2C | |
1570 | struct udevice *dev; | |
1571 | #endif | |
735987c5 TWHT |
1572 | |
1573 | if (argc < 2) { | |
1574 | cmd_usage(cmdtp); | |
1575 | return 1; | |
1576 | } | |
1577 | ||
1578 | chip = simple_strtoul(argv[1], NULL, 16); | |
63656b76 SG |
1579 | #ifdef CONFIG_DM_I2C |
1580 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
1581 | if (!ret) | |
f9a4c2da | 1582 | ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid)); |
63656b76 SG |
1583 | #else |
1584 | ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid)); | |
1585 | #endif | |
1586 | if (ret) | |
1587 | return i2c_report_err(ret, I2C_ERR_READ); | |
735987c5 TWHT |
1588 | |
1589 | if (edid_check_info(&edid)) { | |
1590 | puts("Content isn't valid EDID.\n"); | |
1591 | return 1; | |
1592 | } | |
1593 | ||
1594 | edid_print_info(&edid); | |
1595 | return 0; | |
1596 | ||
1597 | } | |
1598 | #endif /* CONFIG_I2C_EDID */ | |
1599 | ||
06afa388 | 1600 | /** |
3f4978c7 | 1601 | * do_i2c_show_bus() - Handle the "i2c bus" command-line command |
06afa388 MV |
1602 | * @cmdtp: Command data struct pointer |
1603 | * @flag: Command flag | |
1604 | * @argc: Command-line argument count | |
1605 | * @argv: Array of command-line arguments | |
1606 | * | |
1607 | * Returns zero always. | |
1608 | */ | |
3f4978c7 | 1609 | #if defined(CONFIG_SYS_I2C) |
0e350f81 JH |
1610 | static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc, |
1611 | char * const argv[]) | |
67b23a32 | 1612 | { |
3f4978c7 HS |
1613 | int i; |
1614 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
1615 | int j; | |
1616 | #endif | |
67b23a32 HS |
1617 | |
1618 | if (argc == 1) { | |
1619 | /* show all busses */ | |
3f4978c7 HS |
1620 | for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) { |
1621 | printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); | |
1622 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
1623 | for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { | |
1624 | if (i2c_bus[i].next_hop[j].chip == 0) | |
1625 | break; | |
1626 | printf("->%s@0x%2x:%d", | |
1627 | i2c_bus[i].next_hop[j].mux.name, | |
1628 | i2c_bus[i].next_hop[j].chip, | |
1629 | i2c_bus[i].next_hop[j].channel); | |
67b23a32 | 1630 | } |
3f4978c7 HS |
1631 | #endif |
1632 | printf("\n"); | |
67b23a32 HS |
1633 | } |
1634 | } else { | |
3f4978c7 HS |
1635 | /* show specific bus */ |
1636 | i = simple_strtoul(argv[1], NULL, 10); | |
1637 | if (i >= CONFIG_SYS_NUM_I2C_BUSES) { | |
1638 | printf("Invalid bus %d\n", i); | |
1639 | return -1; | |
1640 | } | |
1641 | printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); | |
1642 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
1643 | for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { | |
1644 | if (i2c_bus[i].next_hop[j].chip == 0) | |
1645 | break; | |
1646 | printf("->%s@0x%2x:%d", | |
1647 | i2c_bus[i].next_hop[j].mux.name, | |
1648 | i2c_bus[i].next_hop[j].chip, | |
1649 | i2c_bus[i].next_hop[j].channel); | |
1650 | } | |
1651 | #endif | |
1652 | printf("\n"); | |
67b23a32 | 1653 | } |
3f4978c7 HS |
1654 | |
1655 | return 0; | |
67b23a32 | 1656 | } |
3f4978c7 | 1657 | #endif |
67b23a32 | 1658 | |
06afa388 MV |
1659 | /** |
1660 | * do_i2c_bus_num() - Handle the "i2c dev" command-line command | |
1661 | * @cmdtp: Command data struct pointer | |
1662 | * @flag: Command flag | |
1663 | * @argc: Command-line argument count | |
1664 | * @argv: Array of command-line arguments | |
1665 | * | |
1666 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1667 | * on error. | |
1668 | */ | |
63656b76 SG |
1669 | #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \ |
1670 | defined(CONFIG_DM_I2C) | |
0e350f81 JH |
1671 | static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc, |
1672 | char * const argv[]) | |
bb99ad6d | 1673 | { |
3f4978c7 | 1674 | int ret = 0; |
63656b76 | 1675 | int bus_no; |
bb99ad6d | 1676 | |
63656b76 | 1677 | if (argc == 1) { |
e857a5bd | 1678 | /* querying current setting */ |
63656b76 SG |
1679 | #ifdef CONFIG_DM_I2C |
1680 | struct udevice *bus; | |
1681 | ||
1682 | if (!i2c_get_cur_bus(&bus)) | |
1683 | bus_no = bus->seq; | |
1684 | else | |
1685 | bus_no = -1; | |
1686 | #else | |
1687 | bus_no = i2c_get_bus_num(); | |
1688 | #endif | |
1689 | printf("Current bus is %d\n", bus_no); | |
1690 | } else { | |
3f4978c7 | 1691 | bus_no = simple_strtoul(argv[1], NULL, 10); |
880a4127 | 1692 | #if defined(CONFIG_SYS_I2C) |
3f4978c7 HS |
1693 | if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) { |
1694 | printf("Invalid bus %d\n", bus_no); | |
1695 | return -1; | |
1696 | } | |
880a4127 | 1697 | #endif |
3f4978c7 | 1698 | printf("Setting bus to %d\n", bus_no); |
f9a4c2da SG |
1699 | #ifdef CONFIG_DM_I2C |
1700 | ret = cmd_i2c_set_bus_num(bus_no); | |
1701 | #else | |
3f4978c7 | 1702 | ret = i2c_set_bus_num(bus_no); |
f9a4c2da | 1703 | #endif |
e857a5bd | 1704 | if (ret) |
bb99ad6d | 1705 | printf("Failure changing bus number (%d)\n", ret); |
bb99ad6d BW |
1706 | } |
1707 | return ret; | |
1708 | } | |
3f4978c7 | 1709 | #endif /* defined(CONFIG_SYS_I2C) */ |
bb99ad6d | 1710 | |
06afa388 MV |
1711 | /** |
1712 | * do_i2c_bus_speed() - Handle the "i2c speed" command-line command | |
1713 | * @cmdtp: Command data struct pointer | |
1714 | * @flag: Command flag | |
1715 | * @argc: Command-line argument count | |
1716 | * @argv: Array of command-line arguments | |
1717 | * | |
1718 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1719 | * on error. | |
1720 | */ | |
54841ab5 | 1721 | static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d BW |
1722 | { |
1723 | int speed, ret=0; | |
1724 | ||
63656b76 SG |
1725 | #ifdef CONFIG_DM_I2C |
1726 | struct udevice *bus; | |
1727 | ||
1728 | if (i2c_get_cur_bus(&bus)) | |
1729 | return 1; | |
1730 | #endif | |
1731 | if (argc == 1) { | |
1732 | #ifdef CONFIG_DM_I2C | |
1733 | speed = i2c_get_bus_speed(bus); | |
1734 | #else | |
1735 | speed = i2c_get_bus_speed(); | |
1736 | #endif | |
e857a5bd | 1737 | /* querying current speed */ |
63656b76 SG |
1738 | printf("Current bus speed=%d\n", speed); |
1739 | } else { | |
bb99ad6d BW |
1740 | speed = simple_strtoul(argv[1], NULL, 10); |
1741 | printf("Setting bus speed to %d Hz\n", speed); | |
63656b76 SG |
1742 | #ifdef CONFIG_DM_I2C |
1743 | ret = i2c_set_bus_speed(bus, speed); | |
1744 | #else | |
bb99ad6d | 1745 | ret = i2c_set_bus_speed(speed); |
63656b76 | 1746 | #endif |
e857a5bd | 1747 | if (ret) |
bb99ad6d | 1748 | printf("Failure changing bus speed (%d)\n", ret); |
bb99ad6d BW |
1749 | } |
1750 | return ret; | |
1751 | } | |
1752 | ||
06afa388 MV |
1753 | /** |
1754 | * do_i2c_mm() - Handle the "i2c mm" command-line command | |
1755 | * @cmdtp: Command data struct pointer | |
1756 | * @flag: Command flag | |
1757 | * @argc: Command-line argument count | |
1758 | * @argv: Array of command-line arguments | |
1759 | * | |
1760 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1761 | * on error. | |
1762 | */ | |
54841ab5 | 1763 | static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d | 1764 | { |
bfc3b77e FM |
1765 | return mod_i2c_mem (cmdtp, 1, flag, argc, argv); |
1766 | } | |
1767 | ||
06afa388 MV |
1768 | /** |
1769 | * do_i2c_nm() - Handle the "i2c nm" command-line command | |
1770 | * @cmdtp: Command data struct pointer | |
1771 | * @flag: Command flag | |
1772 | * @argc: Command-line argument count | |
1773 | * @argv: Array of command-line arguments | |
1774 | * | |
1775 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1776 | * on error. | |
1777 | */ | |
54841ab5 | 1778 | static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1779 | { |
1780 | return mod_i2c_mem (cmdtp, 0, flag, argc, argv); | |
1781 | } | |
e96ad5d3 | 1782 | |
06afa388 MV |
1783 | /** |
1784 | * do_i2c_reset() - Handle the "i2c reset" command-line command | |
1785 | * @cmdtp: Command data struct pointer | |
1786 | * @flag: Command flag | |
1787 | * @argc: Command-line argument count | |
1788 | * @argv: Array of command-line arguments | |
1789 | * | |
1790 | * Returns zero always. | |
1791 | */ | |
54841ab5 | 1792 | static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e | 1793 | { |
63656b76 SG |
1794 | #if defined(CONFIG_DM_I2C) |
1795 | struct udevice *bus; | |
1796 | ||
1797 | if (i2c_get_cur_bus(&bus)) | |
1798 | return CMD_RET_FAILURE; | |
1799 | if (i2c_deblock(bus)) { | |
1800 | printf("Error: Not supported by the driver\n"); | |
1801 | return CMD_RET_FAILURE; | |
1802 | } | |
1803 | #elif defined(CONFIG_SYS_I2C) | |
3f4978c7 HS |
1804 | i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr); |
1805 | #else | |
bfc3b77e | 1806 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
3f4978c7 | 1807 | #endif |
bfc3b77e FM |
1808 | return 0; |
1809 | } | |
1810 | ||
1811 | static cmd_tbl_t cmd_i2c_sub[] = { | |
3f4978c7 HS |
1812 | #if defined(CONFIG_SYS_I2C) |
1813 | U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""), | |
9a2accb4 | 1814 | #endif |
bfc3b77e | 1815 | U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), |
3f4978c7 | 1816 | #if defined(CONFIG_SYS_I2C) || \ |
63656b76 | 1817 | defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C) |
bfc3b77e | 1818 | U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), |
bb99ad6d | 1819 | #endif /* CONFIG_I2C_MULTI_BUS */ |
735987c5 TWHT |
1820 | #if defined(CONFIG_I2C_EDID) |
1821 | U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""), | |
1822 | #endif /* CONFIG_I2C_EDID */ | |
bfc3b77e FM |
1823 | U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""), |
1824 | U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""), | |
1825 | U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""), | |
1826 | U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""), | |
1827 | U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), | |
1828 | U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), | |
652e5354 | 1829 | U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), |
ff5d2dce | 1830 | U_BOOT_CMD_MKENT(write, 5, 0, do_i2c_write, "", ""), |
63656b76 SG |
1831 | #ifdef CONFIG_DM_I2C |
1832 | U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""), | |
1833 | #endif | |
bfc3b77e | 1834 | U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""), |
c76fe474 | 1835 | #if defined(CONFIG_CMD_SDRAM) |
bfc3b77e | 1836 | U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""), |
90253178 | 1837 | #endif |
bfc3b77e FM |
1838 | U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), |
1839 | }; | |
1840 | ||
2e5167cc | 1841 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
f1d2b313 HS |
1842 | void i2c_reloc(void) { |
1843 | fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); | |
1844 | } | |
1845 | #endif | |
1846 | ||
06afa388 MV |
1847 | /** |
1848 | * do_i2c() - Handle the "i2c" command-line command | |
1849 | * @cmdtp: Command data struct pointer | |
1850 | * @flag: Command flag | |
1851 | * @argc: Command-line argument count | |
1852 | * @argv: Array of command-line arguments | |
1853 | * | |
1854 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1855 | * on error. | |
1856 | */ | |
54841ab5 | 1857 | static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1858 | { |
1859 | cmd_tbl_t *c; | |
1860 | ||
4444b221 | 1861 | if (argc < 2) |
4c12eeb8 | 1862 | return CMD_RET_USAGE; |
4444b221 | 1863 | |
bfc3b77e FM |
1864 | /* Strip off leading 'i2c' command argument */ |
1865 | argc--; | |
1866 | argv++; | |
1867 | ||
1868 | c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub)); | |
1869 | ||
47e26b1b | 1870 | if (c) |
4c12eeb8 | 1871 | return c->cmd(cmdtp, flag, argc, argv); |
47e26b1b | 1872 | else |
4c12eeb8 | 1873 | return CMD_RET_USAGE; |
bb99ad6d | 1874 | } |
8bde7f77 WD |
1875 | |
1876 | /***************************************************/ | |
088f1b19 KP |
1877 | #ifdef CONFIG_SYS_LONGHELP |
1878 | static char i2c_help_text[] = | |
3f4978c7 HS |
1879 | #if defined(CONFIG_SYS_I2C) |
1880 | "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n" | |
9a2accb4 | 1881 | #endif |
fb0070e9 | 1882 | "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" |
3f4978c7 | 1883 | #if defined(CONFIG_SYS_I2C) || \ |
63656b76 | 1884 | defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C) |
9bc2e4ee | 1885 | "i2c dev [dev] - show or set current I2C bus\n" |
d9fc7032 | 1886 | #endif /* CONFIG_I2C_MULTI_BUS */ |
735987c5 TWHT |
1887 | #if defined(CONFIG_I2C_EDID) |
1888 | "i2c edid chip - print EDID configuration information\n" | |
1889 | #endif /* CONFIG_I2C_EDID */ | |
fb0070e9 | 1890 | "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n" |
d9fc7032 MF |
1891 | "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n" |
1892 | "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n" | |
1893 | "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n" | |
1894 | "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" | |
54b99e51 | 1895 | "i2c probe [address] - test for and show device(s) on the I2C bus\n" |
63656b76 | 1896 | "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n" |
ff5d2dce | 1897 | "i2c write memaddress chip address[.0, .1, .2] length - write memory to i2c\n" |
63656b76 SG |
1898 | #ifdef CONFIG_DM_I2C |
1899 | "i2c flags chip [flags] - set or get chip flags\n" | |
1900 | #endif | |
e43a27c4 | 1901 | "i2c reset - re-init the I2C Controller\n" |
c76fe474 | 1902 | #if defined(CONFIG_CMD_SDRAM) |
fb0070e9 | 1903 | "i2c sdram chip - print SDRAM configuration information\n" |
90253178 | 1904 | #endif |
088f1b19 KP |
1905 | "i2c speed [speed] - show or set I2C bus speed"; |
1906 | #endif | |
1907 | ||
1908 | U_BOOT_CMD( | |
1909 | i2c, 6, 1, do_i2c, | |
1910 | "I2C sub-system", | |
1911 | i2c_help_text | |
d9fc7032 | 1912 | ); |