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Commit | Line | Data |
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81a8824f | 1 | /* |
3f4978c7 HS |
2 | * (C) Copyright 2009 |
3 | * Sergey Kubushyn, himself, ksi@koi8.net | |
4 | * | |
5 | * Changes for unified multibus/multiadapter I2C support. | |
6 | * | |
81a8824f WD |
7 | * (C) Copyright 2001 |
8 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. | |
9 | * | |
1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
81a8824f WD |
11 | */ |
12 | ||
13 | /* | |
14 | * I2C Functions similar to the standard memory functions. | |
15 | * | |
16 | * There are several parameters in many of the commands that bear further | |
17 | * explanations: | |
18 | * | |
81a8824f WD |
19 | * {i2c_chip} is the I2C chip address (the first byte sent on the bus). |
20 | * Each I2C chip on the bus has a unique address. On the I2C data bus, | |
21 | * the address is the upper seven bits and the LSB is the "read/write" | |
22 | * bit. Note that the {i2c_chip} address specified on the command | |
23 | * line is not shifted up: e.g. a typical EEPROM memory chip may have | |
24 | * an I2C address of 0x50, but the data put on the bus will be 0xA0 | |
25 | * for write and 0xA1 for read. This "non shifted" address notation | |
26 | * matches at least half of the data sheets :-/. | |
27 | * | |
28 | * {addr} is the address (or offset) within the chip. Small memory | |
29 | * chips have 8 bit addresses. Large memory chips have 16 bit | |
30 | * addresses. Other memory chips have 9, 10, or 11 bit addresses. | |
31 | * Many non-memory chips have multiple registers and {addr} is used | |
32 | * as the register index. Some non-memory chips have only one register | |
33 | * and therefore don't need any {addr} parameter. | |
34 | * | |
35 | * The default {addr} parameter is one byte (.1) which works well for | |
36 | * memories and registers with 8 bits of address space. | |
37 | * | |
38 | * You can specify the length of the {addr} field with the optional .0, | |
39 | * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are | |
40 | * manipulating a single register device which doesn't use an address | |
41 | * field, use "0.0" for the address and the ".0" length field will | |
42 | * suppress the address in the I2C data stream. This also works for | |
43 | * successive reads using the I2C auto-incrementing memory pointer. | |
44 | * | |
45 | * If you are manipulating a large memory with 2-byte addresses, use | |
46 | * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal). | |
47 | * | |
48 | * Then there are the unfortunate memory chips that spill the most | |
49 | * significant 1, 2, or 3 bits of address into the chip address byte. | |
50 | * This effectively makes one chip (logically) look like 2, 4, or | |
51 | * 8 chips. This is handled (awkwardly) by #defining | |
6d0f6bcf | 52 | * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the |
81a8824f WD |
53 | * {addr} field (since .1 is the default, it doesn't actually have to |
54 | * be specified). Examples: given a memory chip at I2C chip address | |
55 | * 0x50, the following would happen... | |
0f89c54b | 56 | * i2c md 50 0 10 display 16 bytes starting at 0x000 |
81a8824f | 57 | * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd> |
0f89c54b | 58 | * i2c md 50 100 10 display 16 bytes starting at 0x100 |
81a8824f | 59 | * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd> |
0f89c54b | 60 | * i2c md 50 210 10 display 16 bytes starting at 0x210 |
81a8824f WD |
61 | * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd> |
62 | * This is awfully ugly. It would be nice if someone would think up | |
63 | * a better way of handling this. | |
64 | * | |
65 | * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). | |
66 | */ | |
67 | ||
68 | #include <common.h> | |
0098e179 | 69 | #include <bootretry.h> |
18d66533 | 70 | #include <cli.h> |
81a8824f | 71 | #include <command.h> |
63656b76 | 72 | #include <dm.h> |
735987c5 | 73 | #include <edid.h> |
67b23a32 | 74 | #include <environment.h> |
63656b76 | 75 | #include <errno.h> |
81a8824f | 76 | #include <i2c.h> |
67b23a32 | 77 | #include <malloc.h> |
81a8824f | 78 | #include <asm/byteorder.h> |
2515d843 | 79 | #include <linux/compiler.h> |
81a8824f | 80 | |
3f4978c7 HS |
81 | DECLARE_GLOBAL_DATA_PTR; |
82 | ||
81a8824f WD |
83 | /* Display values from last command. |
84 | * Memory modify remembered values are different from display memory. | |
85 | */ | |
5468461d | 86 | static uint i2c_dp_last_chip; |
81a8824f WD |
87 | static uint i2c_dp_last_addr; |
88 | static uint i2c_dp_last_alen; | |
89 | static uint i2c_dp_last_length = 0x10; | |
90 | ||
5468461d | 91 | static uint i2c_mm_last_chip; |
81a8824f WD |
92 | static uint i2c_mm_last_addr; |
93 | static uint i2c_mm_last_alen; | |
94 | ||
bb99ad6d BW |
95 | /* If only one I2C bus is present, the list of devices to ignore when |
96 | * the probe command is issued is represented by a 1D array of addresses. | |
97 | * When multiple buses are present, the list is an array of bus-address | |
98 | * pairs. The following macros take care of this */ | |
99 | ||
6d0f6bcf | 100 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
9a2accb4 | 101 | #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) |
bb99ad6d BW |
102 | static struct |
103 | { | |
104 | uchar bus; | |
105 | uchar addr; | |
6d0f6bcf | 106 | } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
107 | #define GET_BUS_NUM i2c_get_bus_num() |
108 | #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b)) | |
109 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a)) | |
110 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr | |
111 | #else /* single bus */ | |
6d0f6bcf | 112 | static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
113 | #define GET_BUS_NUM 0 |
114 | #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ | |
115 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) | |
116 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)] | |
3f4978c7 | 117 | #endif /* defined(CONFIG_SYS_I2C) */ |
67b23a32 HS |
118 | #endif |
119 | ||
a266fe95 FM |
120 | #define DISP_LINE_LEN 16 |
121 | ||
63656b76 SG |
122 | /* |
123 | * Default for driver model is to use the chip's existing address length. | |
124 | * For legacy code, this is not stored, so we need to use a suitable | |
125 | * default. | |
126 | */ | |
127 | #ifdef CONFIG_DM_I2C | |
128 | #define DEFAULT_ADDR_LEN (-1) | |
129 | #else | |
130 | #define DEFAULT_ADDR_LEN 1 | |
131 | #endif | |
132 | ||
133 | #ifdef CONFIG_DM_I2C | |
134 | static struct udevice *i2c_cur_bus; | |
135 | ||
f9a4c2da | 136 | static int cmd_i2c_set_bus_num(unsigned int busnum) |
63656b76 SG |
137 | { |
138 | struct udevice *bus; | |
139 | int ret; | |
140 | ||
141 | ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); | |
142 | if (ret) { | |
143 | debug("%s: No bus %d\n", __func__, busnum); | |
144 | return ret; | |
145 | } | |
146 | i2c_cur_bus = bus; | |
147 | ||
148 | return 0; | |
149 | } | |
150 | ||
151 | static int i2c_get_cur_bus(struct udevice **busp) | |
152 | { | |
153 | if (!i2c_cur_bus) { | |
154 | puts("No I2C bus selected\n"); | |
155 | return -ENODEV; | |
156 | } | |
157 | *busp = i2c_cur_bus; | |
158 | ||
159 | return 0; | |
160 | } | |
161 | ||
162 | static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp) | |
163 | { | |
164 | struct udevice *bus; | |
165 | int ret; | |
166 | ||
167 | ret = i2c_get_cur_bus(&bus); | |
168 | if (ret) | |
169 | return ret; | |
170 | ||
25ab4b03 | 171 | return i2c_get_chip(bus, chip_addr, 1, devp); |
63656b76 SG |
172 | } |
173 | ||
174 | #endif | |
175 | ||
06afa388 MV |
176 | /** |
177 | * i2c_init_board() - Board-specific I2C bus init | |
178 | * | |
179 | * This function is the default no-op implementation of I2C bus | |
180 | * initialization. This function can be overriden by board-specific | |
181 | * implementation if needed. | |
182 | */ | |
2515d843 MV |
183 | __weak |
184 | void i2c_init_board(void) | |
c649dda5 | 185 | { |
c649dda5 | 186 | } |
c649dda5 | 187 | |
655b34a7 | 188 | /* TODO: Implement architecture-specific get/set functions */ |
06afa388 MV |
189 | |
190 | /** | |
191 | * i2c_get_bus_speed() - Return I2C bus speed | |
192 | * | |
193 | * This function is the default implementation of function for retrieveing | |
194 | * the current I2C bus speed in Hz. | |
195 | * | |
196 | * A driver implementing runtime switching of I2C bus speed must override | |
197 | * this function to report the speed correctly. Simple or legacy drivers | |
198 | * can use this fallback. | |
199 | * | |
200 | * Returns I2C bus speed in Hz. | |
201 | */ | |
63656b76 | 202 | #if !defined(CONFIG_SYS_I2C) && !defined(CONFIG_DM_I2C) |
3f4978c7 HS |
203 | /* |
204 | * TODO: Implement architecture-specific get/set functions | |
205 | * Should go away, if we switched completely to new multibus support | |
206 | */ | |
2515d843 MV |
207 | __weak |
208 | unsigned int i2c_get_bus_speed(void) | |
655b34a7 PT |
209 | { |
210 | return CONFIG_SYS_I2C_SPEED; | |
211 | } | |
655b34a7 | 212 | |
06afa388 MV |
213 | /** |
214 | * i2c_set_bus_speed() - Configure I2C bus speed | |
215 | * @speed: Newly set speed of the I2C bus in Hz | |
216 | * | |
217 | * This function is the default implementation of function for setting | |
218 | * the I2C bus speed in Hz. | |
219 | * | |
220 | * A driver implementing runtime switching of I2C bus speed must override | |
221 | * this function to report the speed correctly. Simple or legacy drivers | |
222 | * can use this fallback. | |
223 | * | |
224 | * Returns zero on success, negative value on error. | |
225 | */ | |
2515d843 MV |
226 | __weak |
227 | int i2c_set_bus_speed(unsigned int speed) | |
655b34a7 PT |
228 | { |
229 | if (speed != CONFIG_SYS_I2C_SPEED) | |
230 | return -1; | |
231 | ||
232 | return 0; | |
233 | } | |
3f4978c7 | 234 | #endif |
655b34a7 | 235 | |
06afa388 MV |
236 | /** |
237 | * get_alen() - Small parser helper function to get address length | |
238 | * | |
239 | * Returns the address length. | |
2c0dc990 | 240 | */ |
63656b76 | 241 | static uint get_alen(char *arg, int default_len) |
2c0dc990 FM |
242 | { |
243 | int j; | |
244 | int alen; | |
245 | ||
63656b76 | 246 | alen = default_len; |
2c0dc990 FM |
247 | for (j = 0; j < 8; j++) { |
248 | if (arg[j] == '.') { | |
249 | alen = arg[j+1] - '0'; | |
2c0dc990 FM |
250 | break; |
251 | } else if (arg[j] == '\0') | |
252 | break; | |
253 | } | |
254 | return alen; | |
255 | } | |
256 | ||
c1a6f371 SG |
257 | enum i2c_err_op { |
258 | I2C_ERR_READ, | |
259 | I2C_ERR_WRITE, | |
260 | }; | |
261 | ||
262 | static int i2c_report_err(int ret, enum i2c_err_op op) | |
263 | { | |
264 | printf("Error %s the chip: %d\n", | |
265 | op == I2C_ERR_READ ? "reading" : "writing", ret); | |
266 | ||
267 | return CMD_RET_FAILURE; | |
268 | } | |
269 | ||
06afa388 MV |
270 | /** |
271 | * do_i2c_read() - Handle the "i2c read" command-line command | |
272 | * @cmdtp: Command data struct pointer | |
273 | * @flag: Command flag | |
274 | * @argc: Command-line argument count | |
275 | * @argv: Array of command-line arguments | |
276 | * | |
277 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
278 | * on error. | |
279 | * | |
652e5354 FM |
280 | * Syntax: |
281 | * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr} | |
282 | */ | |
54841ab5 | 283 | static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
652e5354 | 284 | { |
5468461d | 285 | uint chip; |
63656b76 SG |
286 | uint devaddr, length; |
287 | int alen; | |
652e5354 | 288 | u_char *memaddr; |
63656b76 SG |
289 | int ret; |
290 | #ifdef CONFIG_DM_I2C | |
291 | struct udevice *dev; | |
292 | #endif | |
652e5354 | 293 | |
47e26b1b | 294 | if (argc != 5) |
4c12eeb8 | 295 | return CMD_RET_USAGE; |
652e5354 FM |
296 | |
297 | /* | |
298 | * I2C chip address | |
299 | */ | |
300 | chip = simple_strtoul(argv[1], NULL, 16); | |
301 | ||
302 | /* | |
303 | * I2C data address within the chip. This can be 1 or | |
304 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
305 | */ | |
306 | devaddr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 307 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 308 | if (alen > 3) |
4c12eeb8 | 309 | return CMD_RET_USAGE; |
652e5354 FM |
310 | |
311 | /* | |
312 | * Length is the number of objects, not number of bytes. | |
313 | */ | |
314 | length = simple_strtoul(argv[3], NULL, 16); | |
315 | ||
316 | /* | |
317 | * memaddr is the address where to store things in memory | |
318 | */ | |
319 | memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16); | |
320 | ||
63656b76 SG |
321 | #ifdef CONFIG_DM_I2C |
322 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
323 | if (!ret && alen != -1) | |
324 | ret = i2c_set_chip_offset_len(dev, alen); | |
325 | if (!ret) | |
f9a4c2da | 326 | ret = dm_i2c_read(dev, devaddr, memaddr, length); |
63656b76 SG |
327 | #else |
328 | ret = i2c_read(chip, devaddr, alen, memaddr, length); | |
329 | #endif | |
330 | if (ret) | |
331 | return i2c_report_err(ret, I2C_ERR_READ); | |
332 | ||
652e5354 FM |
333 | return 0; |
334 | } | |
335 | ||
ff5d2dce YS |
336 | static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
337 | { | |
5468461d | 338 | uint chip; |
63656b76 SG |
339 | uint devaddr, length; |
340 | int alen; | |
ff5d2dce | 341 | u_char *memaddr; |
63656b76 SG |
342 | int ret; |
343 | #ifdef CONFIG_DM_I2C | |
344 | struct udevice *dev; | |
ed16f146 | 345 | struct dm_i2c_chip *i2c_chip; |
63656b76 | 346 | #endif |
ff5d2dce | 347 | |
ed16f146 | 348 | if ((argc < 5) || (argc > 6)) |
ff5d2dce YS |
349 | return cmd_usage(cmdtp); |
350 | ||
351 | /* | |
352 | * memaddr is the address where to store things in memory | |
353 | */ | |
354 | memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16); | |
355 | ||
356 | /* | |
357 | * I2C chip address | |
358 | */ | |
359 | chip = simple_strtoul(argv[2], NULL, 16); | |
360 | ||
361 | /* | |
362 | * I2C data address within the chip. This can be 1 or | |
363 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
364 | */ | |
365 | devaddr = simple_strtoul(argv[3], NULL, 16); | |
63656b76 | 366 | alen = get_alen(argv[3], DEFAULT_ADDR_LEN); |
ff5d2dce YS |
367 | if (alen > 3) |
368 | return cmd_usage(cmdtp); | |
369 | ||
370 | /* | |
ed16f146 | 371 | * Length is the number of bytes. |
ff5d2dce YS |
372 | */ |
373 | length = simple_strtoul(argv[4], NULL, 16); | |
374 | ||
63656b76 SG |
375 | #ifdef CONFIG_DM_I2C |
376 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
377 | if (!ret && alen != -1) | |
378 | ret = i2c_set_chip_offset_len(dev, alen); | |
379 | if (ret) | |
380 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
ed16f146 LP |
381 | i2c_chip = dev_get_parent_platdata(dev); |
382 | if (!i2c_chip) | |
383 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
63656b76 SG |
384 | #endif |
385 | ||
ed16f146 LP |
386 | if (argc == 6 && !strcmp(argv[5], "-s")) { |
387 | /* | |
388 | * Write all bytes in a single I2C transaction. If the target | |
389 | * device is an EEPROM, it is your responsibility to not cross | |
390 | * a page boundary. No write delay upon completion, take this | |
391 | * into account if linking commands. | |
392 | */ | |
63656b76 | 393 | #ifdef CONFIG_DM_I2C |
ed16f146 LP |
394 | i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS; |
395 | ret = dm_i2c_write(dev, devaddr, memaddr, length); | |
63656b76 | 396 | #else |
ed16f146 | 397 | ret = i2c_write(chip, devaddr, alen, memaddr, length); |
63656b76 SG |
398 | #endif |
399 | if (ret) | |
400 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
ed16f146 LP |
401 | } else { |
402 | /* | |
403 | * Repeated addressing - perform <length> separate | |
404 | * write transactions of one byte each | |
405 | */ | |
406 | while (length-- > 0) { | |
407 | #ifdef CONFIG_DM_I2C | |
408 | i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS; | |
409 | ret = dm_i2c_write(dev, devaddr++, memaddr++, 1); | |
410 | #else | |
411 | ret = i2c_write(chip, devaddr++, alen, memaddr++, 1); | |
412 | #endif | |
413 | if (ret) | |
414 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
ff5d2dce YS |
415 | /* |
416 | * No write delay with FRAM devices. | |
417 | */ | |
418 | #if !defined(CONFIG_SYS_I2C_FRAM) | |
ed16f146 | 419 | udelay(11000); |
ff5d2dce | 420 | #endif |
ed16f146 | 421 | } |
ff5d2dce YS |
422 | } |
423 | return 0; | |
424 | } | |
425 | ||
63656b76 SG |
426 | #ifdef CONFIG_DM_I2C |
427 | static int do_i2c_flags(cmd_tbl_t *cmdtp, int flag, int argc, | |
428 | char *const argv[]) | |
429 | { | |
430 | struct udevice *dev; | |
431 | uint flags; | |
432 | int chip; | |
433 | int ret; | |
434 | ||
435 | if (argc < 2) | |
436 | return CMD_RET_USAGE; | |
437 | ||
438 | chip = simple_strtoul(argv[1], NULL, 16); | |
439 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
440 | if (ret) | |
441 | return i2c_report_err(ret, I2C_ERR_READ); | |
442 | ||
443 | if (argc > 2) { | |
444 | flags = simple_strtoul(argv[2], NULL, 16); | |
445 | ret = i2c_set_chip_flags(dev, flags); | |
446 | } else { | |
447 | ret = i2c_get_chip_flags(dev, &flags); | |
448 | if (!ret) | |
449 | printf("%x\n", flags); | |
450 | } | |
451 | if (ret) | |
452 | return i2c_report_err(ret, I2C_ERR_READ); | |
453 | ||
454 | return 0; | |
455 | } | |
c10c8e31 SG |
456 | |
457 | static int do_i2c_olen(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) | |
458 | { | |
459 | struct udevice *dev; | |
460 | uint olen; | |
461 | int chip; | |
462 | int ret; | |
463 | ||
464 | if (argc < 2) | |
465 | return CMD_RET_USAGE; | |
466 | ||
467 | chip = simple_strtoul(argv[1], NULL, 16); | |
468 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
469 | if (ret) | |
470 | return i2c_report_err(ret, I2C_ERR_READ); | |
471 | ||
472 | if (argc > 2) { | |
473 | olen = simple_strtoul(argv[2], NULL, 16); | |
474 | ret = i2c_set_chip_offset_len(dev, olen); | |
475 | } else { | |
476 | ret = i2c_get_chip_offset_len(dev); | |
477 | if (ret >= 0) { | |
478 | printf("%x\n", ret); | |
479 | ret = 0; | |
480 | } | |
481 | } | |
482 | if (ret) | |
483 | return i2c_report_err(ret, I2C_ERR_READ); | |
484 | ||
485 | return 0; | |
486 | } | |
63656b76 SG |
487 | #endif |
488 | ||
06afa388 MV |
489 | /** |
490 | * do_i2c_md() - Handle the "i2c md" command-line command | |
491 | * @cmdtp: Command data struct pointer | |
492 | * @flag: Command flag | |
493 | * @argc: Command-line argument count | |
494 | * @argv: Array of command-line arguments | |
495 | * | |
496 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
497 | * on error. | |
498 | * | |
4a8cf338 FM |
499 | * Syntax: |
500 | * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} | |
501 | */ | |
54841ab5 | 502 | static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 503 | { |
5468461d | 504 | uint chip; |
63656b76 SG |
505 | uint addr, length; |
506 | int alen; | |
81a8824f | 507 | int j, nbytes, linebytes; |
63656b76 SG |
508 | int ret; |
509 | #ifdef CONFIG_DM_I2C | |
510 | struct udevice *dev; | |
511 | #endif | |
81a8824f WD |
512 | |
513 | /* We use the last specified parameters, unless new ones are | |
514 | * entered. | |
515 | */ | |
516 | chip = i2c_dp_last_chip; | |
517 | addr = i2c_dp_last_addr; | |
518 | alen = i2c_dp_last_alen; | |
519 | length = i2c_dp_last_length; | |
520 | ||
47e26b1b | 521 | if (argc < 3) |
4c12eeb8 | 522 | return CMD_RET_USAGE; |
81a8824f WD |
523 | |
524 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
525 | /* | |
526 | * New command specified. | |
527 | */ | |
81a8824f WD |
528 | |
529 | /* | |
530 | * I2C chip address | |
531 | */ | |
532 | chip = simple_strtoul(argv[1], NULL, 16); | |
533 | ||
534 | /* | |
535 | * I2C data address within the chip. This can be 1 or | |
536 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
537 | */ | |
538 | addr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 539 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 540 | if (alen > 3) |
4c12eeb8 | 541 | return CMD_RET_USAGE; |
81a8824f WD |
542 | |
543 | /* | |
544 | * If another parameter, it is the length to display. | |
545 | * Length is the number of objects, not number of bytes. | |
546 | */ | |
547 | if (argc > 3) | |
548 | length = simple_strtoul(argv[3], NULL, 16); | |
549 | } | |
550 | ||
63656b76 SG |
551 | #ifdef CONFIG_DM_I2C |
552 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
553 | if (!ret && alen != -1) | |
554 | ret = i2c_set_chip_offset_len(dev, alen); | |
555 | if (ret) | |
556 | return i2c_report_err(ret, I2C_ERR_READ); | |
557 | #endif | |
558 | ||
81a8824f WD |
559 | /* |
560 | * Print the lines. | |
561 | * | |
562 | * We buffer all read data, so we can make sure data is read only | |
563 | * once. | |
564 | */ | |
565 | nbytes = length; | |
566 | do { | |
567 | unsigned char linebuf[DISP_LINE_LEN]; | |
568 | unsigned char *cp; | |
569 | ||
570 | linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; | |
571 | ||
63656b76 | 572 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 573 | ret = dm_i2c_read(dev, addr, linebuf, linebytes); |
63656b76 SG |
574 | #else |
575 | ret = i2c_read(chip, addr, alen, linebuf, linebytes); | |
576 | #endif | |
577 | if (ret) | |
9e533cb0 | 578 | return i2c_report_err(ret, I2C_ERR_READ); |
e857a5bd | 579 | else { |
81a8824f WD |
580 | printf("%04x:", addr); |
581 | cp = linebuf; | |
582 | for (j=0; j<linebytes; j++) { | |
583 | printf(" %02x", *cp++); | |
584 | addr++; | |
585 | } | |
4b9206ed | 586 | puts (" "); |
81a8824f WD |
587 | cp = linebuf; |
588 | for (j=0; j<linebytes; j++) { | |
589 | if ((*cp < 0x20) || (*cp > 0x7e)) | |
4b9206ed | 590 | puts ("."); |
81a8824f WD |
591 | else |
592 | printf("%c", *cp); | |
593 | cp++; | |
594 | } | |
4b9206ed | 595 | putc ('\n'); |
81a8824f WD |
596 | } |
597 | nbytes -= linebytes; | |
598 | } while (nbytes > 0); | |
599 | ||
600 | i2c_dp_last_chip = chip; | |
601 | i2c_dp_last_addr = addr; | |
602 | i2c_dp_last_alen = alen; | |
603 | i2c_dp_last_length = length; | |
604 | ||
605 | return 0; | |
606 | } | |
607 | ||
06afa388 MV |
608 | /** |
609 | * do_i2c_mw() - Handle the "i2c mw" command-line command | |
610 | * @cmdtp: Command data struct pointer | |
611 | * @flag: Command flag | |
612 | * @argc: Command-line argument count | |
613 | * @argv: Array of command-line arguments | |
614 | * | |
615 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
616 | * on error. | |
81a8824f WD |
617 | * |
618 | * Syntax: | |
0f89c54b | 619 | * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] |
81a8824f | 620 | */ |
54841ab5 | 621 | static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 622 | { |
5468461d | 623 | uint chip; |
81a8824f | 624 | ulong addr; |
63656b76 | 625 | int alen; |
81a8824f WD |
626 | uchar byte; |
627 | int count; | |
63656b76 SG |
628 | int ret; |
629 | #ifdef CONFIG_DM_I2C | |
630 | struct udevice *dev; | |
631 | #endif | |
81a8824f | 632 | |
47e26b1b | 633 | if ((argc < 4) || (argc > 5)) |
4c12eeb8 | 634 | return CMD_RET_USAGE; |
81a8824f WD |
635 | |
636 | /* | |
53677ef1 WD |
637 | * Chip is always specified. |
638 | */ | |
81a8824f WD |
639 | chip = simple_strtoul(argv[1], NULL, 16); |
640 | ||
641 | /* | |
642 | * Address is always specified. | |
643 | */ | |
644 | addr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 645 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 646 | if (alen > 3) |
4c12eeb8 | 647 | return CMD_RET_USAGE; |
81a8824f | 648 | |
63656b76 SG |
649 | #ifdef CONFIG_DM_I2C |
650 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
651 | if (!ret && alen != -1) | |
652 | ret = i2c_set_chip_offset_len(dev, alen); | |
653 | if (ret) | |
654 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
655 | #endif | |
81a8824f WD |
656 | /* |
657 | * Value to write is always specified. | |
658 | */ | |
659 | byte = simple_strtoul(argv[3], NULL, 16); | |
660 | ||
661 | /* | |
662 | * Optional count | |
663 | */ | |
e857a5bd | 664 | if (argc == 5) |
81a8824f | 665 | count = simple_strtoul(argv[4], NULL, 16); |
e857a5bd | 666 | else |
81a8824f | 667 | count = 1; |
81a8824f WD |
668 | |
669 | while (count-- > 0) { | |
63656b76 | 670 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 671 | ret = dm_i2c_write(dev, addr++, &byte, 1); |
63656b76 SG |
672 | #else |
673 | ret = i2c_write(chip, addr++, alen, &byte, 1); | |
674 | #endif | |
675 | if (ret) | |
9e533cb0 | 676 | return i2c_report_err(ret, I2C_ERR_WRITE); |
81a8824f WD |
677 | /* |
678 | * Wait for the write to complete. The write can take | |
679 | * up to 10mSec (we allow a little more time). | |
81a8824f | 680 | */ |
d4f5c728 | 681 | /* |
682 | * No write delay with FRAM devices. | |
683 | */ | |
6d0f6bcf | 684 | #if !defined(CONFIG_SYS_I2C_FRAM) |
81a8824f | 685 | udelay(11000); |
d4f5c728 | 686 | #endif |
81a8824f WD |
687 | } |
688 | ||
06afa388 | 689 | return 0; |
81a8824f WD |
690 | } |
691 | ||
06afa388 MV |
692 | /** |
693 | * do_i2c_crc() - Handle the "i2c crc32" command-line command | |
694 | * @cmdtp: Command data struct pointer | |
695 | * @flag: Command flag | |
696 | * @argc: Command-line argument count | |
697 | * @argv: Array of command-line arguments | |
698 | * | |
699 | * Calculate a CRC on memory | |
700 | * | |
701 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
702 | * on error. | |
81a8824f WD |
703 | * |
704 | * Syntax: | |
0f89c54b | 705 | * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} |
81a8824f | 706 | */ |
54841ab5 | 707 | static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 708 | { |
5468461d | 709 | uint chip; |
81a8824f | 710 | ulong addr; |
63656b76 | 711 | int alen; |
81a8824f WD |
712 | int count; |
713 | uchar byte; | |
714 | ulong crc; | |
715 | ulong err; | |
63656b76 SG |
716 | int ret = 0; |
717 | #ifdef CONFIG_DM_I2C | |
718 | struct udevice *dev; | |
719 | #endif | |
81a8824f | 720 | |
47e26b1b | 721 | if (argc < 4) |
4c12eeb8 | 722 | return CMD_RET_USAGE; |
81a8824f WD |
723 | |
724 | /* | |
53677ef1 WD |
725 | * Chip is always specified. |
726 | */ | |
81a8824f WD |
727 | chip = simple_strtoul(argv[1], NULL, 16); |
728 | ||
729 | /* | |
730 | * Address is always specified. | |
731 | */ | |
732 | addr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 733 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 734 | if (alen > 3) |
4c12eeb8 | 735 | return CMD_RET_USAGE; |
81a8824f | 736 | |
63656b76 SG |
737 | #ifdef CONFIG_DM_I2C |
738 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
739 | if (!ret && alen != -1) | |
740 | ret = i2c_set_chip_offset_len(dev, alen); | |
741 | if (ret) | |
742 | return i2c_report_err(ret, I2C_ERR_READ); | |
743 | #endif | |
81a8824f WD |
744 | /* |
745 | * Count is always specified | |
746 | */ | |
747 | count = simple_strtoul(argv[3], NULL, 16); | |
748 | ||
749 | printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1); | |
750 | /* | |
751 | * CRC a byte at a time. This is going to be slooow, but hey, the | |
752 | * memories are small and slow too so hopefully nobody notices. | |
753 | */ | |
754 | crc = 0; | |
755 | err = 0; | |
e857a5bd | 756 | while (count-- > 0) { |
63656b76 | 757 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 758 | ret = dm_i2c_read(dev, addr, &byte, 1); |
63656b76 SG |
759 | #else |
760 | ret = i2c_read(chip, addr, alen, &byte, 1); | |
761 | #endif | |
762 | if (ret) | |
81a8824f | 763 | err++; |
81a8824f WD |
764 | crc = crc32 (crc, &byte, 1); |
765 | addr++; | |
766 | } | |
e857a5bd | 767 | if (err > 0) |
63656b76 | 768 | i2c_report_err(ret, I2C_ERR_READ); |
e857a5bd | 769 | else |
81a8824f | 770 | printf ("%08lx\n", crc); |
81a8824f WD |
771 | |
772 | return 0; | |
773 | } | |
774 | ||
06afa388 MV |
775 | /** |
776 | * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command | |
777 | * @cmdtp: Command data struct pointer | |
778 | * @flag: Command flag | |
779 | * @argc: Command-line argument count | |
780 | * @argv: Array of command-line arguments | |
781 | * | |
782 | * Modify memory. | |
783 | * | |
784 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
785 | * on error. | |
81a8824f WD |
786 | * |
787 | * Syntax: | |
0f89c54b PT |
788 | * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} |
789 | * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} | |
81a8824f | 790 | */ |
81a8824f | 791 | static int |
54841ab5 | 792 | mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) |
81a8824f | 793 | { |
5468461d | 794 | uint chip; |
81a8824f | 795 | ulong addr; |
63656b76 | 796 | int alen; |
81a8824f WD |
797 | ulong data; |
798 | int size = 1; | |
799 | int nbytes; | |
63656b76 SG |
800 | int ret; |
801 | #ifdef CONFIG_DM_I2C | |
802 | struct udevice *dev; | |
803 | #endif | |
81a8824f | 804 | |
47e26b1b | 805 | if (argc != 3) |
4c12eeb8 | 806 | return CMD_RET_USAGE; |
81a8824f | 807 | |
b26440f1 | 808 | bootretry_reset_cmd_timeout(); /* got a good command to get here */ |
81a8824f WD |
809 | /* |
810 | * We use the last specified parameters, unless new ones are | |
811 | * entered. | |
812 | */ | |
813 | chip = i2c_mm_last_chip; | |
814 | addr = i2c_mm_last_addr; | |
815 | alen = i2c_mm_last_alen; | |
816 | ||
817 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
818 | /* | |
819 | * New command specified. Check for a size specification. | |
820 | * Defaults to byte if no or incorrect specification. | |
821 | */ | |
822 | size = cmd_get_data_size(argv[0], 1); | |
823 | ||
824 | /* | |
53677ef1 WD |
825 | * Chip is always specified. |
826 | */ | |
81a8824f WD |
827 | chip = simple_strtoul(argv[1], NULL, 16); |
828 | ||
829 | /* | |
830 | * Address is always specified. | |
831 | */ | |
832 | addr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 833 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 834 | if (alen > 3) |
4c12eeb8 | 835 | return CMD_RET_USAGE; |
81a8824f WD |
836 | } |
837 | ||
63656b76 SG |
838 | #ifdef CONFIG_DM_I2C |
839 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
840 | if (!ret && alen != -1) | |
841 | ret = i2c_set_chip_offset_len(dev, alen); | |
842 | if (ret) | |
843 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
844 | #endif | |
845 | ||
81a8824f WD |
846 | /* |
847 | * Print the address, followed by value. Then accept input for | |
848 | * the next value. A non-converted value exits. | |
849 | */ | |
850 | do { | |
851 | printf("%08lx:", addr); | |
63656b76 | 852 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 853 | ret = dm_i2c_read(dev, addr, (uchar *)&data, size); |
63656b76 SG |
854 | #else |
855 | ret = i2c_read(chip, addr, alen, (uchar *)&data, size); | |
856 | #endif | |
857 | if (ret) | |
9e533cb0 MY |
858 | return i2c_report_err(ret, I2C_ERR_READ); |
859 | ||
860 | data = cpu_to_be32(data); | |
861 | if (size == 1) | |
862 | printf(" %02lx", (data >> 24) & 0x000000FF); | |
863 | else if (size == 2) | |
864 | printf(" %04lx", (data >> 16) & 0x0000FFFF); | |
865 | else | |
866 | printf(" %08lx", data); | |
81a8824f | 867 | |
e1bf824d | 868 | nbytes = cli_readline(" ? "); |
81a8824f WD |
869 | if (nbytes == 0) { |
870 | /* | |
871 | * <CR> pressed as only input, don't modify current | |
872 | * location and move to next. | |
873 | */ | |
874 | if (incrflag) | |
875 | addr += size; | |
876 | nbytes = size; | |
b26440f1 SG |
877 | /* good enough to not time out */ |
878 | bootretry_reset_cmd_timeout(); | |
81a8824f WD |
879 | } |
880 | #ifdef CONFIG_BOOT_RETRY_TIME | |
e857a5bd | 881 | else if (nbytes == -2) |
81a8824f | 882 | break; /* timed out, exit the command */ |
81a8824f WD |
883 | #endif |
884 | else { | |
885 | char *endp; | |
886 | ||
887 | data = simple_strtoul(console_buffer, &endp, 16); | |
e857a5bd | 888 | if (size == 1) |
81a8824f | 889 | data = data << 24; |
e857a5bd | 890 | else if (size == 2) |
81a8824f | 891 | data = data << 16; |
81a8824f WD |
892 | data = be32_to_cpu(data); |
893 | nbytes = endp - console_buffer; | |
894 | if (nbytes) { | |
81a8824f WD |
895 | /* |
896 | * good enough to not time out | |
897 | */ | |
b26440f1 | 898 | bootretry_reset_cmd_timeout(); |
63656b76 | 899 | #ifdef CONFIG_DM_I2C |
f9a4c2da SG |
900 | ret = dm_i2c_write(dev, addr, (uchar *)&data, |
901 | size); | |
63656b76 SG |
902 | #else |
903 | ret = i2c_write(chip, addr, alen, | |
904 | (uchar *)&data, size); | |
905 | #endif | |
906 | if (ret) | |
9e533cb0 MY |
907 | return i2c_report_err(ret, |
908 | I2C_ERR_WRITE); | |
6d0f6bcf JCPV |
909 | #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS |
910 | udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); | |
2535d602 | 911 | #endif |
81a8824f WD |
912 | if (incrflag) |
913 | addr += size; | |
914 | } | |
915 | } | |
916 | } while (nbytes); | |
917 | ||
0800707b PT |
918 | i2c_mm_last_chip = chip; |
919 | i2c_mm_last_addr = addr; | |
920 | i2c_mm_last_alen = alen; | |
81a8824f WD |
921 | |
922 | return 0; | |
923 | } | |
924 | ||
06afa388 MV |
925 | /** |
926 | * do_i2c_probe() - Handle the "i2c probe" command-line command | |
927 | * @cmdtp: Command data struct pointer | |
928 | * @flag: Command flag | |
929 | * @argc: Command-line argument count | |
930 | * @argv: Array of command-line arguments | |
931 | * | |
932 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
933 | * on error. | |
934 | * | |
81a8824f | 935 | * Syntax: |
54b99e51 EN |
936 | * i2c probe {addr} |
937 | * | |
938 | * Returns zero (success) if one or more I2C devices was found | |
81a8824f | 939 | */ |
54841ab5 | 940 | static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
941 | { |
942 | int j; | |
54b99e51 EN |
943 | int addr = -1; |
944 | int found = 0; | |
6d0f6bcf | 945 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 946 | int k, skip; |
3f4978c7 | 947 | unsigned int bus = GET_BUS_NUM; |
bb99ad6d | 948 | #endif /* NOPROBES */ |
63656b76 SG |
949 | int ret; |
950 | #ifdef CONFIG_DM_I2C | |
951 | struct udevice *bus, *dev; | |
952 | ||
953 | if (i2c_get_cur_bus(&bus)) | |
954 | return CMD_RET_FAILURE; | |
955 | #endif | |
81a8824f | 956 | |
54b99e51 EN |
957 | if (argc == 2) |
958 | addr = simple_strtol(argv[1], 0, 16); | |
959 | ||
4b9206ed | 960 | puts ("Valid chip addresses:"); |
e857a5bd | 961 | for (j = 0; j < 128; j++) { |
54b99e51 EN |
962 | if ((0 <= addr) && (j != addr)) |
963 | continue; | |
964 | ||
6d0f6bcf | 965 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 966 | skip = 0; |
cfb25cc4 | 967 | for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { |
e857a5bd | 968 | if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) { |
81a8824f WD |
969 | skip = 1; |
970 | break; | |
971 | } | |
972 | } | |
973 | if (skip) | |
974 | continue; | |
975 | #endif | |
63656b76 | 976 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 977 | ret = dm_i2c_probe(bus, j, 0, &dev); |
63656b76 SG |
978 | #else |
979 | ret = i2c_probe(j); | |
980 | #endif | |
981 | if (ret == 0) { | |
81a8824f | 982 | printf(" %02X", j); |
54b99e51 EN |
983 | found++; |
984 | } | |
81a8824f | 985 | } |
4b9206ed | 986 | putc ('\n'); |
81a8824f | 987 | |
6d0f6bcf | 988 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 989 | puts ("Excluded chip addresses:"); |
cfb25cc4 | 990 | for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { |
e857a5bd | 991 | if (COMPARE_BUS(bus,k)) |
bb99ad6d BW |
992 | printf(" %02X", NO_PROBE_ADDR(k)); |
993 | } | |
4b9206ed | 994 | putc ('\n'); |
81a8824f WD |
995 | #endif |
996 | ||
54b99e51 | 997 | return (0 == found); |
81a8824f WD |
998 | } |
999 | ||
06afa388 MV |
1000 | /** |
1001 | * do_i2c_loop() - Handle the "i2c loop" command-line command | |
1002 | * @cmdtp: Command data struct pointer | |
1003 | * @flag: Command flag | |
1004 | * @argc: Command-line argument count | |
1005 | * @argv: Array of command-line arguments | |
1006 | * | |
1007 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1008 | * on error. | |
1009 | * | |
81a8824f | 1010 | * Syntax: |
0f89c54b | 1011 | * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] |
81a8824f WD |
1012 | * {length} - Number of bytes to read |
1013 | * {delay} - A DECIMAL number and defaults to 1000 uSec | |
1014 | */ | |
54841ab5 | 1015 | static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 1016 | { |
5468461d | 1017 | uint chip; |
63656b76 | 1018 | int alen; |
81a8824f WD |
1019 | uint addr; |
1020 | uint length; | |
1021 | u_char bytes[16]; | |
1022 | int delay; | |
63656b76 SG |
1023 | int ret; |
1024 | #ifdef CONFIG_DM_I2C | |
1025 | struct udevice *dev; | |
1026 | #endif | |
81a8824f | 1027 | |
47e26b1b | 1028 | if (argc < 3) |
4c12eeb8 | 1029 | return CMD_RET_USAGE; |
81a8824f WD |
1030 | |
1031 | /* | |
1032 | * Chip is always specified. | |
1033 | */ | |
1034 | chip = simple_strtoul(argv[1], NULL, 16); | |
1035 | ||
1036 | /* | |
1037 | * Address is always specified. | |
1038 | */ | |
1039 | addr = simple_strtoul(argv[2], NULL, 16); | |
63656b76 | 1040 | alen = get_alen(argv[2], DEFAULT_ADDR_LEN); |
7a92e53c | 1041 | if (alen > 3) |
4c12eeb8 | 1042 | return CMD_RET_USAGE; |
63656b76 SG |
1043 | #ifdef CONFIG_DM_I2C |
1044 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
1045 | if (!ret && alen != -1) | |
1046 | ret = i2c_set_chip_offset_len(dev, alen); | |
1047 | if (ret) | |
1048 | return i2c_report_err(ret, I2C_ERR_WRITE); | |
1049 | #endif | |
81a8824f WD |
1050 | |
1051 | /* | |
1052 | * Length is the number of objects, not number of bytes. | |
1053 | */ | |
1054 | length = 1; | |
1055 | length = simple_strtoul(argv[3], NULL, 16); | |
e857a5bd | 1056 | if (length > sizeof(bytes)) |
81a8824f | 1057 | length = sizeof(bytes); |
81a8824f WD |
1058 | |
1059 | /* | |
1060 | * The delay time (uSec) is optional. | |
1061 | */ | |
1062 | delay = 1000; | |
e857a5bd | 1063 | if (argc > 3) |
81a8824f | 1064 | delay = simple_strtoul(argv[4], NULL, 10); |
81a8824f WD |
1065 | /* |
1066 | * Run the loop... | |
1067 | */ | |
e857a5bd | 1068 | while (1) { |
63656b76 | 1069 | #ifdef CONFIG_DM_I2C |
f9a4c2da | 1070 | ret = dm_i2c_read(dev, addr, bytes, length); |
63656b76 SG |
1071 | #else |
1072 | ret = i2c_read(chip, addr, alen, bytes, length); | |
1073 | #endif | |
1074 | if (ret) | |
1075 | i2c_report_err(ret, I2C_ERR_READ); | |
81a8824f WD |
1076 | udelay(delay); |
1077 | } | |
1078 | ||
1079 | /* NOTREACHED */ | |
1080 | return 0; | |
1081 | } | |
1082 | ||
81a8824f WD |
1083 | /* |
1084 | * The SDRAM command is separately configured because many | |
1085 | * (most?) embedded boards don't use SDRAM DIMMs. | |
06afa388 MV |
1086 | * |
1087 | * FIXME: Document and probably move elsewhere! | |
81a8824f | 1088 | */ |
c76fe474 | 1089 | #if defined(CONFIG_CMD_SDRAM) |
632de067 LJ |
1090 | static void print_ddr2_tcyc (u_char const b) |
1091 | { | |
1092 | printf ("%d.", (b >> 4) & 0x0F); | |
1093 | switch (b & 0x0F) { | |
1094 | case 0x0: | |
1095 | case 0x1: | |
1096 | case 0x2: | |
1097 | case 0x3: | |
1098 | case 0x4: | |
1099 | case 0x5: | |
1100 | case 0x6: | |
1101 | case 0x7: | |
1102 | case 0x8: | |
1103 | case 0x9: | |
1104 | printf ("%d ns\n", b & 0x0F); | |
1105 | break; | |
1106 | case 0xA: | |
1107 | puts ("25 ns\n"); | |
1108 | break; | |
1109 | case 0xB: | |
1110 | puts ("33 ns\n"); | |
1111 | break; | |
1112 | case 0xC: | |
1113 | puts ("66 ns\n"); | |
1114 | break; | |
1115 | case 0xD: | |
1116 | puts ("75 ns\n"); | |
1117 | break; | |
1118 | default: | |
1119 | puts ("?? ns\n"); | |
1120 | break; | |
1121 | } | |
1122 | } | |
1123 | ||
1124 | static void decode_bits (u_char const b, char const *str[], int const do_once) | |
1125 | { | |
1126 | u_char mask; | |
1127 | ||
1128 | for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) { | |
1129 | if (b & mask) { | |
1130 | puts (*str); | |
1131 | if (do_once) | |
1132 | return; | |
1133 | } | |
1134 | } | |
1135 | } | |
81a8824f WD |
1136 | |
1137 | /* | |
1138 | * Syntax: | |
0f89c54b | 1139 | * i2c sdram {i2c_chip} |
81a8824f | 1140 | */ |
54841ab5 | 1141 | static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 1142 | { |
632de067 LJ |
1143 | enum { unknown, EDO, SDRAM, DDR2 } type; |
1144 | ||
5468461d | 1145 | uint chip; |
81a8824f WD |
1146 | u_char data[128]; |
1147 | u_char cksum; | |
1148 | int j; | |
1149 | ||
632de067 LJ |
1150 | static const char *decode_CAS_DDR2[] = { |
1151 | " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD" | |
1152 | }; | |
1153 | ||
1154 | static const char *decode_CAS_default[] = { | |
1155 | " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1" | |
1156 | }; | |
1157 | ||
1158 | static const char *decode_CS_WE_default[] = { | |
1159 | " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0" | |
1160 | }; | |
1161 | ||
1162 | static const char *decode_byte21_default[] = { | |
1163 | " TBD (bit 7)\n", | |
1164 | " Redundant row address\n", | |
1165 | " Differential clock input\n", | |
1166 | " Registerd DQMB inputs\n", | |
1167 | " Buffered DQMB inputs\n", | |
1168 | " On-card PLL\n", | |
1169 | " Registered address/control lines\n", | |
1170 | " Buffered address/control lines\n" | |
1171 | }; | |
1172 | ||
1173 | static const char *decode_byte22_DDR2[] = { | |
1174 | " TBD (bit 7)\n", | |
1175 | " TBD (bit 6)\n", | |
1176 | " TBD (bit 5)\n", | |
1177 | " TBD (bit 4)\n", | |
1178 | " TBD (bit 3)\n", | |
1179 | " Supports partial array self refresh\n", | |
1180 | " Supports 50 ohm ODT\n", | |
1181 | " Supports weak driver\n" | |
1182 | }; | |
1183 | ||
1184 | static const char *decode_row_density_DDR2[] = { | |
1185 | "512 MiB", "256 MiB", "128 MiB", "16 GiB", | |
1186 | "8 GiB", "4 GiB", "2 GiB", "1 GiB" | |
1187 | }; | |
1188 | ||
1189 | static const char *decode_row_density_default[] = { | |
1190 | "512 MiB", "256 MiB", "128 MiB", "64 MiB", | |
1191 | "32 MiB", "16 MiB", "8 MiB", "4 MiB" | |
1192 | }; | |
1193 | ||
47e26b1b | 1194 | if (argc < 2) |
4c12eeb8 | 1195 | return CMD_RET_USAGE; |
47e26b1b | 1196 | |
81a8824f WD |
1197 | /* |
1198 | * Chip is always specified. | |
632de067 LJ |
1199 | */ |
1200 | chip = simple_strtoul (argv[1], NULL, 16); | |
81a8824f | 1201 | |
632de067 | 1202 | if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) { |
4b9206ed | 1203 | puts ("No SDRAM Serial Presence Detect found.\n"); |
81a8824f WD |
1204 | return 1; |
1205 | } | |
1206 | ||
1207 | cksum = 0; | |
1208 | for (j = 0; j < 63; j++) { | |
1209 | cksum += data[j]; | |
1210 | } | |
e857a5bd | 1211 | if (cksum != data[63]) { |
81a8824f | 1212 | printf ("WARNING: Configuration data checksum failure:\n" |
632de067 | 1213 | " is 0x%02x, calculated 0x%02x\n", data[63], cksum); |
81a8824f | 1214 | } |
632de067 | 1215 | printf ("SPD data revision %d.%d\n", |
81a8824f | 1216 | (data[62] >> 4) & 0x0F, data[62] & 0x0F); |
632de067 LJ |
1217 | printf ("Bytes used 0x%02X\n", data[0]); |
1218 | printf ("Serial memory size 0x%02X\n", 1 << data[1]); | |
1219 | ||
4b9206ed | 1220 | puts ("Memory type "); |
632de067 | 1221 | switch (data[2]) { |
0df6b844 LJ |
1222 | case 2: |
1223 | type = EDO; | |
1224 | puts ("EDO\n"); | |
1225 | break; | |
1226 | case 4: | |
1227 | type = SDRAM; | |
1228 | puts ("SDRAM\n"); | |
1229 | break; | |
1230 | case 8: | |
1231 | type = DDR2; | |
1232 | puts ("DDR2\n"); | |
1233 | break; | |
1234 | default: | |
1235 | type = unknown; | |
1236 | puts ("unknown\n"); | |
1237 | break; | |
81a8824f | 1238 | } |
632de067 | 1239 | |
4b9206ed | 1240 | puts ("Row address bits "); |
e857a5bd | 1241 | if ((data[3] & 0x00F0) == 0) |
632de067 | 1242 | printf ("%d\n", data[3] & 0x0F); |
e857a5bd | 1243 | else |
632de067 LJ |
1244 | printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F); |
1245 | ||
4b9206ed | 1246 | puts ("Column address bits "); |
e857a5bd | 1247 | if ((data[4] & 0x00F0) == 0) |
632de067 | 1248 | printf ("%d\n", data[4] & 0x0F); |
e857a5bd | 1249 | else |
632de067 | 1250 | printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F); |
0df6b844 LJ |
1251 | |
1252 | switch (type) { | |
1253 | case DDR2: | |
632de067 LJ |
1254 | printf ("Number of ranks %d\n", |
1255 | (data[5] & 0x07) + 1); | |
0df6b844 LJ |
1256 | break; |
1257 | default: | |
632de067 | 1258 | printf ("Module rows %d\n", data[5]); |
0df6b844 LJ |
1259 | break; |
1260 | } | |
1261 | ||
1262 | switch (type) { | |
1263 | case DDR2: | |
632de067 | 1264 | printf ("Module data width %d bits\n", data[6]); |
0df6b844 LJ |
1265 | break; |
1266 | default: | |
632de067 LJ |
1267 | printf ("Module data width %d bits\n", |
1268 | (data[7] << 8) | data[6]); | |
0df6b844 LJ |
1269 | break; |
1270 | } | |
1271 | ||
4b9206ed | 1272 | puts ("Interface signal levels "); |
81a8824f | 1273 | switch(data[8]) { |
0df6b844 | 1274 | case 0: puts ("TTL 5.0 V\n"); break; |
4b9206ed | 1275 | case 1: puts ("LVTTL\n"); break; |
0df6b844 LJ |
1276 | case 2: puts ("HSTL 1.5 V\n"); break; |
1277 | case 3: puts ("SSTL 3.3 V\n"); break; | |
1278 | case 4: puts ("SSTL 2.5 V\n"); break; | |
1279 | case 5: puts ("SSTL 1.8 V\n"); break; | |
4b9206ed | 1280 | default: puts ("unknown\n"); break; |
81a8824f | 1281 | } |
0df6b844 LJ |
1282 | |
1283 | switch (type) { | |
1284 | case DDR2: | |
632de067 LJ |
1285 | printf ("SDRAM cycle time "); |
1286 | print_ddr2_tcyc (data[9]); | |
0df6b844 LJ |
1287 | break; |
1288 | default: | |
632de067 LJ |
1289 | printf ("SDRAM cycle time %d.%d ns\n", |
1290 | (data[9] >> 4) & 0x0F, data[9] & 0x0F); | |
0df6b844 LJ |
1291 | break; |
1292 | } | |
1293 | ||
1294 | switch (type) { | |
1295 | case DDR2: | |
632de067 LJ |
1296 | printf ("SDRAM access time 0.%d%d ns\n", |
1297 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
1298 | break; |
1299 | default: | |
632de067 LJ |
1300 | printf ("SDRAM access time %d.%d ns\n", |
1301 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
1302 | break; |
1303 | } | |
1304 | ||
4b9206ed | 1305 | puts ("EDC configuration "); |
632de067 | 1306 | switch (data[11]) { |
4b9206ed WD |
1307 | case 0: puts ("None\n"); break; |
1308 | case 1: puts ("Parity\n"); break; | |
1309 | case 2: puts ("ECC\n"); break; | |
1310 | default: puts ("unknown\n"); break; | |
81a8824f | 1311 | } |
632de067 | 1312 | |
e857a5bd | 1313 | if ((data[12] & 0x80) == 0) |
4b9206ed | 1314 | puts ("No self refresh, rate "); |
e857a5bd | 1315 | else |
4b9206ed | 1316 | puts ("Self refresh, rate "); |
632de067 | 1317 | |
81a8824f | 1318 | switch(data[12] & 0x7F) { |
632de067 LJ |
1319 | case 0: puts ("15.625 us\n"); break; |
1320 | case 1: puts ("3.9 us\n"); break; | |
1321 | case 2: puts ("7.8 us\n"); break; | |
1322 | case 3: puts ("31.3 us\n"); break; | |
1323 | case 4: puts ("62.5 us\n"); break; | |
1324 | case 5: puts ("125 us\n"); break; | |
4b9206ed | 1325 | default: puts ("unknown\n"); break; |
81a8824f | 1326 | } |
0df6b844 LJ |
1327 | |
1328 | switch (type) { | |
1329 | case DDR2: | |
632de067 | 1330 | printf ("SDRAM width (primary) %d\n", data[13]); |
0df6b844 LJ |
1331 | break; |
1332 | default: | |
632de067 | 1333 | printf ("SDRAM width (primary) %d\n", data[13] & 0x7F); |
0df6b844 | 1334 | if ((data[13] & 0x80) != 0) { |
632de067 LJ |
1335 | printf (" (second bank) %d\n", |
1336 | 2 * (data[13] & 0x7F)); | |
0df6b844 LJ |
1337 | } |
1338 | break; | |
1339 | } | |
1340 | ||
1341 | switch (type) { | |
1342 | case DDR2: | |
1343 | if (data[14] != 0) | |
632de067 | 1344 | printf ("EDC width %d\n", data[14]); |
0df6b844 LJ |
1345 | break; |
1346 | default: | |
1347 | if (data[14] != 0) { | |
632de067 LJ |
1348 | printf ("EDC width %d\n", |
1349 | data[14] & 0x7F); | |
0df6b844 LJ |
1350 | |
1351 | if ((data[14] & 0x80) != 0) { | |
632de067 LJ |
1352 | printf (" (second bank) %d\n", |
1353 | 2 * (data[14] & 0x7F)); | |
0df6b844 LJ |
1354 | } |
1355 | } | |
1356 | break; | |
81a8824f | 1357 | } |
0df6b844 | 1358 | |
632de067 LJ |
1359 | if (DDR2 != type) { |
1360 | printf ("Min clock delay, back-to-back random column addresses " | |
1361 | "%d\n", data[15]); | |
0df6b844 LJ |
1362 | } |
1363 | ||
4b9206ed WD |
1364 | puts ("Burst length(s) "); |
1365 | if (data[16] & 0x80) puts (" Page"); | |
1366 | if (data[16] & 0x08) puts (" 8"); | |
1367 | if (data[16] & 0x04) puts (" 4"); | |
1368 | if (data[16] & 0x02) puts (" 2"); | |
1369 | if (data[16] & 0x01) puts (" 1"); | |
1370 | putc ('\n'); | |
632de067 | 1371 | printf ("Number of banks %d\n", data[17]); |
0df6b844 LJ |
1372 | |
1373 | switch (type) { | |
1374 | case DDR2: | |
1375 | puts ("CAS latency(s) "); | |
632de067 | 1376 | decode_bits (data[18], decode_CAS_DDR2, 0); |
0df6b844 LJ |
1377 | putc ('\n'); |
1378 | break; | |
1379 | default: | |
1380 | puts ("CAS latency(s) "); | |
632de067 | 1381 | decode_bits (data[18], decode_CAS_default, 0); |
0df6b844 LJ |
1382 | putc ('\n'); |
1383 | break; | |
1384 | } | |
1385 | ||
1386 | if (DDR2 != type) { | |
1387 | puts ("CS latency(s) "); | |
632de067 | 1388 | decode_bits (data[19], decode_CS_WE_default, 0); |
0df6b844 LJ |
1389 | putc ('\n'); |
1390 | } | |
1391 | ||
1392 | if (DDR2 != type) { | |
1393 | puts ("WE latency(s) "); | |
632de067 | 1394 | decode_bits (data[20], decode_CS_WE_default, 0); |
0df6b844 LJ |
1395 | putc ('\n'); |
1396 | } | |
1397 | ||
1398 | switch (type) { | |
1399 | case DDR2: | |
1400 | puts ("Module attributes:\n"); | |
1401 | if (data[21] & 0x80) | |
1402 | puts (" TBD (bit 7)\n"); | |
1403 | if (data[21] & 0x40) | |
1404 | puts (" Analysis probe installed\n"); | |
1405 | if (data[21] & 0x20) | |
1406 | puts (" TBD (bit 5)\n"); | |
1407 | if (data[21] & 0x10) | |
1408 | puts (" FET switch external enable\n"); | |
632de067 | 1409 | printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03); |
0df6b844 | 1410 | if (data[20] & 0x11) { |
632de067 LJ |
1411 | printf (" %d active registers on DIMM\n", |
1412 | (data[21] & 0x03) + 1); | |
0df6b844 LJ |
1413 | } |
1414 | break; | |
1415 | default: | |
1416 | puts ("Module attributes:\n"); | |
1417 | if (!data[21]) | |
1418 | puts (" (none)\n"); | |
632de067 LJ |
1419 | else |
1420 | decode_bits (data[21], decode_byte21_default, 0); | |
0df6b844 LJ |
1421 | break; |
1422 | } | |
1423 | ||
1424 | switch (type) { | |
1425 | case DDR2: | |
632de067 | 1426 | decode_bits (data[22], decode_byte22_DDR2, 0); |
0df6b844 LJ |
1427 | break; |
1428 | default: | |
1429 | puts ("Device attributes:\n"); | |
1430 | if (data[22] & 0x80) puts (" TBD (bit 7)\n"); | |
1431 | if (data[22] & 0x40) puts (" TBD (bit 6)\n"); | |
1432 | if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n"); | |
1433 | else puts (" Upper Vcc tolerance 10%\n"); | |
1434 | if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n"); | |
1435 | else puts (" Lower Vcc tolerance 10%\n"); | |
1436 | if (data[22] & 0x08) puts (" Supports write1/read burst\n"); | |
1437 | if (data[22] & 0x04) puts (" Supports precharge all\n"); | |
1438 | if (data[22] & 0x02) puts (" Supports auto precharge\n"); | |
1439 | if (data[22] & 0x01) puts (" Supports early RAS# precharge\n"); | |
1440 | break; | |
1441 | } | |
1442 | ||
1443 | switch (type) { | |
1444 | case DDR2: | |
632de067 LJ |
1445 | printf ("SDRAM cycle time (2nd highest CAS latency) "); |
1446 | print_ddr2_tcyc (data[23]); | |
0df6b844 LJ |
1447 | break; |
1448 | default: | |
632de067 LJ |
1449 | printf ("SDRAM cycle time (2nd highest CAS latency) %d." |
1450 | "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F); | |
0df6b844 LJ |
1451 | break; |
1452 | } | |
1453 | ||
1454 | switch (type) { | |
1455 | case DDR2: | |
632de067 LJ |
1456 | printf ("SDRAM access from clock (2nd highest CAS latency) 0." |
1457 | "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1458 | break; |
1459 | default: | |
632de067 LJ |
1460 | printf ("SDRAM access from clock (2nd highest CAS latency) %d." |
1461 | "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1462 | break; |
1463 | } | |
1464 | ||
1465 | switch (type) { | |
1466 | case DDR2: | |
632de067 LJ |
1467 | printf ("SDRAM cycle time (3rd highest CAS latency) "); |
1468 | print_ddr2_tcyc (data[25]); | |
0df6b844 LJ |
1469 | break; |
1470 | default: | |
632de067 LJ |
1471 | printf ("SDRAM cycle time (3rd highest CAS latency) %d." |
1472 | "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F); | |
0df6b844 LJ |
1473 | break; |
1474 | } | |
1475 | ||
1476 | switch (type) { | |
1477 | case DDR2: | |
632de067 LJ |
1478 | printf ("SDRAM access from clock (3rd highest CAS latency) 0." |
1479 | "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1480 | break; |
1481 | default: | |
632de067 LJ |
1482 | printf ("SDRAM access from clock (3rd highest CAS latency) %d." |
1483 | "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1484 | break; |
1485 | } | |
1486 | ||
1487 | switch (type) { | |
1488 | case DDR2: | |
632de067 LJ |
1489 | printf ("Minimum row precharge %d.%02d ns\n", |
1490 | (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03)); | |
0df6b844 LJ |
1491 | break; |
1492 | default: | |
632de067 | 1493 | printf ("Minimum row precharge %d ns\n", data[27]); |
0df6b844 LJ |
1494 | break; |
1495 | } | |
1496 | ||
1497 | switch (type) { | |
1498 | case DDR2: | |
632de067 LJ |
1499 | printf ("Row active to row active min %d.%02d ns\n", |
1500 | (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03)); | |
0df6b844 LJ |
1501 | break; |
1502 | default: | |
632de067 | 1503 | printf ("Row active to row active min %d ns\n", data[28]); |
0df6b844 LJ |
1504 | break; |
1505 | } | |
1506 | ||
1507 | switch (type) { | |
1508 | case DDR2: | |
632de067 LJ |
1509 | printf ("RAS to CAS delay min %d.%02d ns\n", |
1510 | (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03)); | |
0df6b844 LJ |
1511 | break; |
1512 | default: | |
632de067 | 1513 | printf ("RAS to CAS delay min %d ns\n", data[29]); |
0df6b844 LJ |
1514 | break; |
1515 | } | |
1516 | ||
632de067 | 1517 | printf ("Minimum RAS pulse width %d ns\n", data[30]); |
0df6b844 LJ |
1518 | |
1519 | switch (type) { | |
1520 | case DDR2: | |
632de067 LJ |
1521 | puts ("Density of each row "); |
1522 | decode_bits (data[31], decode_row_density_DDR2, 1); | |
1523 | putc ('\n'); | |
0df6b844 LJ |
1524 | break; |
1525 | default: | |
632de067 LJ |
1526 | puts ("Density of each row "); |
1527 | decode_bits (data[31], decode_row_density_default, 1); | |
1528 | putc ('\n'); | |
0df6b844 LJ |
1529 | break; |
1530 | } | |
1531 | ||
1532 | switch (type) { | |
1533 | case DDR2: | |
632de067 | 1534 | puts ("Command and Address setup "); |
0df6b844 | 1535 | if (data[32] >= 0xA0) { |
632de067 LJ |
1536 | printf ("1.%d%d ns\n", |
1537 | ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F); | |
0df6b844 | 1538 | } else { |
632de067 LJ |
1539 | printf ("0.%d%d ns\n", |
1540 | ((data[32] >> 4) & 0x0F), data[32] & 0x0F); | |
0df6b844 LJ |
1541 | } |
1542 | break; | |
1543 | default: | |
632de067 LJ |
1544 | printf ("Command and Address setup %c%d.%d ns\n", |
1545 | (data[32] & 0x80) ? '-' : '+', | |
1546 | (data[32] >> 4) & 0x07, data[32] & 0x0F); | |
0df6b844 LJ |
1547 | break; |
1548 | } | |
1549 | ||
1550 | switch (type) { | |
1551 | case DDR2: | |
632de067 | 1552 | puts ("Command and Address hold "); |
0df6b844 | 1553 | if (data[33] >= 0xA0) { |
632de067 LJ |
1554 | printf ("1.%d%d ns\n", |
1555 | ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F); | |
0df6b844 | 1556 | } else { |
632de067 LJ |
1557 | printf ("0.%d%d ns\n", |
1558 | ((data[33] >> 4) & 0x0F), data[33] & 0x0F); | |
0df6b844 LJ |
1559 | } |
1560 | break; | |
1561 | default: | |
632de067 LJ |
1562 | printf ("Command and Address hold %c%d.%d ns\n", |
1563 | (data[33] & 0x80) ? '-' : '+', | |
1564 | (data[33] >> 4) & 0x07, data[33] & 0x0F); | |
0df6b844 LJ |
1565 | break; |
1566 | } | |
1567 | ||
1568 | switch (type) { | |
1569 | case DDR2: | |
632de067 LJ |
1570 | printf ("Data signal input setup 0.%d%d ns\n", |
1571 | (data[34] >> 4) & 0x0F, data[34] & 0x0F); | |
0df6b844 LJ |
1572 | break; |
1573 | default: | |
632de067 LJ |
1574 | printf ("Data signal input setup %c%d.%d ns\n", |
1575 | (data[34] & 0x80) ? '-' : '+', | |
1576 | (data[34] >> 4) & 0x07, data[34] & 0x0F); | |
0df6b844 LJ |
1577 | break; |
1578 | } | |
1579 | ||
1580 | switch (type) { | |
1581 | case DDR2: | |
632de067 LJ |
1582 | printf ("Data signal input hold 0.%d%d ns\n", |
1583 | (data[35] >> 4) & 0x0F, data[35] & 0x0F); | |
0df6b844 LJ |
1584 | break; |
1585 | default: | |
632de067 LJ |
1586 | printf ("Data signal input hold %c%d.%d ns\n", |
1587 | (data[35] & 0x80) ? '-' : '+', | |
1588 | (data[35] >> 4) & 0x07, data[35] & 0x0F); | |
0df6b844 LJ |
1589 | break; |
1590 | } | |
1591 | ||
4b9206ed | 1592 | puts ("Manufacturer's JEDEC ID "); |
e857a5bd | 1593 | for (j = 64; j <= 71; j++) |
632de067 | 1594 | printf ("%02X ", data[j]); |
4b9206ed | 1595 | putc ('\n'); |
632de067 | 1596 | printf ("Manufacturing Location %02X\n", data[72]); |
4b9206ed | 1597 | puts ("Manufacturer's Part Number "); |
e857a5bd | 1598 | for (j = 73; j <= 90; j++) |
632de067 | 1599 | printf ("%02X ", data[j]); |
4b9206ed | 1600 | putc ('\n'); |
632de067 LJ |
1601 | printf ("Revision Code %02X %02X\n", data[91], data[92]); |
1602 | printf ("Manufacturing Date %02X %02X\n", data[93], data[94]); | |
4b9206ed | 1603 | puts ("Assembly Serial Number "); |
e857a5bd | 1604 | for (j = 95; j <= 98; j++) |
632de067 | 1605 | printf ("%02X ", data[j]); |
4b9206ed | 1606 | putc ('\n'); |
81a8824f | 1607 | |
0df6b844 | 1608 | if (DDR2 != type) { |
632de067 LJ |
1609 | printf ("Speed rating PC%d\n", |
1610 | data[126] == 0x66 ? 66 : data[126]); | |
0df6b844 | 1611 | } |
81a8824f WD |
1612 | return 0; |
1613 | } | |
90253178 | 1614 | #endif |
81a8824f | 1615 | |
735987c5 TWHT |
1616 | /* |
1617 | * Syntax: | |
1618 | * i2c edid {i2c_chip} | |
1619 | */ | |
1620 | #if defined(CONFIG_I2C_EDID) | |
1621 | int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) | |
1622 | { | |
5468461d | 1623 | uint chip; |
735987c5 | 1624 | struct edid1_info edid; |
63656b76 SG |
1625 | int ret; |
1626 | #ifdef CONFIG_DM_I2C | |
1627 | struct udevice *dev; | |
1628 | #endif | |
735987c5 TWHT |
1629 | |
1630 | if (argc < 2) { | |
1631 | cmd_usage(cmdtp); | |
1632 | return 1; | |
1633 | } | |
1634 | ||
1635 | chip = simple_strtoul(argv[1], NULL, 16); | |
63656b76 SG |
1636 | #ifdef CONFIG_DM_I2C |
1637 | ret = i2c_get_cur_bus_chip(chip, &dev); | |
1638 | if (!ret) | |
f9a4c2da | 1639 | ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid)); |
63656b76 SG |
1640 | #else |
1641 | ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid)); | |
1642 | #endif | |
1643 | if (ret) | |
1644 | return i2c_report_err(ret, I2C_ERR_READ); | |
735987c5 TWHT |
1645 | |
1646 | if (edid_check_info(&edid)) { | |
1647 | puts("Content isn't valid EDID.\n"); | |
1648 | return 1; | |
1649 | } | |
1650 | ||
1651 | edid_print_info(&edid); | |
1652 | return 0; | |
1653 | ||
1654 | } | |
1655 | #endif /* CONFIG_I2C_EDID */ | |
1656 | ||
59aa9df3 SG |
1657 | #ifdef CONFIG_DM_I2C |
1658 | static void show_bus(struct udevice *bus) | |
1659 | { | |
1660 | struct udevice *dev; | |
1661 | ||
1662 | printf("Bus %d:\t%s", bus->req_seq, bus->name); | |
1663 | if (device_active(bus)) | |
1664 | printf(" (active %d)", bus->seq); | |
1665 | printf("\n"); | |
1666 | for (device_find_first_child(bus, &dev); | |
1667 | dev; | |
1668 | device_find_next_child(&dev)) { | |
1669 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); | |
1670 | ||
1671 | printf(" %02x: %s, offset len %x, flags %x\n", | |
1672 | chip->chip_addr, dev->name, chip->offset_len, | |
1673 | chip->flags); | |
1674 | } | |
1675 | } | |
1676 | #endif | |
1677 | ||
06afa388 | 1678 | /** |
3f4978c7 | 1679 | * do_i2c_show_bus() - Handle the "i2c bus" command-line command |
06afa388 MV |
1680 | * @cmdtp: Command data struct pointer |
1681 | * @flag: Command flag | |
1682 | * @argc: Command-line argument count | |
1683 | * @argv: Array of command-line arguments | |
1684 | * | |
1685 | * Returns zero always. | |
1686 | */ | |
59aa9df3 | 1687 | #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) |
0e350f81 JH |
1688 | static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc, |
1689 | char * const argv[]) | |
67b23a32 | 1690 | { |
67b23a32 HS |
1691 | if (argc == 1) { |
1692 | /* show all busses */ | |
59aa9df3 SG |
1693 | #ifdef CONFIG_DM_I2C |
1694 | struct udevice *bus; | |
1695 | struct uclass *uc; | |
1696 | int ret; | |
1697 | ||
1698 | ret = uclass_get(UCLASS_I2C, &uc); | |
1699 | if (ret) | |
1700 | return CMD_RET_FAILURE; | |
1701 | uclass_foreach_dev(bus, uc) | |
1702 | show_bus(bus); | |
1703 | #else | |
1704 | int i; | |
1705 | ||
3f4978c7 HS |
1706 | for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) { |
1707 | printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); | |
1708 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
59aa9df3 SG |
1709 | int j; |
1710 | ||
3f4978c7 HS |
1711 | for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { |
1712 | if (i2c_bus[i].next_hop[j].chip == 0) | |
1713 | break; | |
1714 | printf("->%s@0x%2x:%d", | |
1715 | i2c_bus[i].next_hop[j].mux.name, | |
1716 | i2c_bus[i].next_hop[j].chip, | |
1717 | i2c_bus[i].next_hop[j].channel); | |
67b23a32 | 1718 | } |
3f4978c7 HS |
1719 | #endif |
1720 | printf("\n"); | |
67b23a32 | 1721 | } |
59aa9df3 | 1722 | #endif |
67b23a32 | 1723 | } else { |
59aa9df3 SG |
1724 | int i; |
1725 | ||
3f4978c7 HS |
1726 | /* show specific bus */ |
1727 | i = simple_strtoul(argv[1], NULL, 10); | |
59aa9df3 SG |
1728 | #ifdef CONFIG_DM_I2C |
1729 | struct udevice *bus; | |
1730 | int ret; | |
1731 | ||
1732 | ret = uclass_get_device_by_seq(UCLASS_I2C, i, &bus); | |
1733 | if (ret) { | |
1734 | printf("Invalid bus %d: err=%d\n", i, ret); | |
1735 | return CMD_RET_FAILURE; | |
1736 | } | |
1737 | show_bus(bus); | |
1738 | #else | |
3f4978c7 HS |
1739 | if (i >= CONFIG_SYS_NUM_I2C_BUSES) { |
1740 | printf("Invalid bus %d\n", i); | |
1741 | return -1; | |
1742 | } | |
1743 | printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); | |
1744 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
59aa9df3 | 1745 | int j; |
3f4978c7 HS |
1746 | for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { |
1747 | if (i2c_bus[i].next_hop[j].chip == 0) | |
1748 | break; | |
1749 | printf("->%s@0x%2x:%d", | |
1750 | i2c_bus[i].next_hop[j].mux.name, | |
1751 | i2c_bus[i].next_hop[j].chip, | |
1752 | i2c_bus[i].next_hop[j].channel); | |
1753 | } | |
1754 | #endif | |
1755 | printf("\n"); | |
59aa9df3 | 1756 | #endif |
67b23a32 | 1757 | } |
3f4978c7 HS |
1758 | |
1759 | return 0; | |
67b23a32 | 1760 | } |
3f4978c7 | 1761 | #endif |
67b23a32 | 1762 | |
06afa388 MV |
1763 | /** |
1764 | * do_i2c_bus_num() - Handle the "i2c dev" command-line command | |
1765 | * @cmdtp: Command data struct pointer | |
1766 | * @flag: Command flag | |
1767 | * @argc: Command-line argument count | |
1768 | * @argv: Array of command-line arguments | |
1769 | * | |
1770 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1771 | * on error. | |
1772 | */ | |
63656b76 SG |
1773 | #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \ |
1774 | defined(CONFIG_DM_I2C) | |
0e350f81 JH |
1775 | static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc, |
1776 | char * const argv[]) | |
bb99ad6d | 1777 | { |
3f4978c7 | 1778 | int ret = 0; |
63656b76 | 1779 | int bus_no; |
bb99ad6d | 1780 | |
63656b76 | 1781 | if (argc == 1) { |
e857a5bd | 1782 | /* querying current setting */ |
63656b76 SG |
1783 | #ifdef CONFIG_DM_I2C |
1784 | struct udevice *bus; | |
1785 | ||
1786 | if (!i2c_get_cur_bus(&bus)) | |
1787 | bus_no = bus->seq; | |
1788 | else | |
1789 | bus_no = -1; | |
1790 | #else | |
1791 | bus_no = i2c_get_bus_num(); | |
1792 | #endif | |
1793 | printf("Current bus is %d\n", bus_no); | |
1794 | } else { | |
3f4978c7 | 1795 | bus_no = simple_strtoul(argv[1], NULL, 10); |
880a4127 | 1796 | #if defined(CONFIG_SYS_I2C) |
3f4978c7 HS |
1797 | if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) { |
1798 | printf("Invalid bus %d\n", bus_no); | |
1799 | return -1; | |
1800 | } | |
880a4127 | 1801 | #endif |
3f4978c7 | 1802 | printf("Setting bus to %d\n", bus_no); |
f9a4c2da SG |
1803 | #ifdef CONFIG_DM_I2C |
1804 | ret = cmd_i2c_set_bus_num(bus_no); | |
1805 | #else | |
3f4978c7 | 1806 | ret = i2c_set_bus_num(bus_no); |
f9a4c2da | 1807 | #endif |
e857a5bd | 1808 | if (ret) |
bb99ad6d | 1809 | printf("Failure changing bus number (%d)\n", ret); |
bb99ad6d BW |
1810 | } |
1811 | return ret; | |
1812 | } | |
3f4978c7 | 1813 | #endif /* defined(CONFIG_SYS_I2C) */ |
bb99ad6d | 1814 | |
06afa388 MV |
1815 | /** |
1816 | * do_i2c_bus_speed() - Handle the "i2c speed" command-line command | |
1817 | * @cmdtp: Command data struct pointer | |
1818 | * @flag: Command flag | |
1819 | * @argc: Command-line argument count | |
1820 | * @argv: Array of command-line arguments | |
1821 | * | |
1822 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1823 | * on error. | |
1824 | */ | |
54841ab5 | 1825 | static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d BW |
1826 | { |
1827 | int speed, ret=0; | |
1828 | ||
63656b76 SG |
1829 | #ifdef CONFIG_DM_I2C |
1830 | struct udevice *bus; | |
1831 | ||
1832 | if (i2c_get_cur_bus(&bus)) | |
1833 | return 1; | |
1834 | #endif | |
1835 | if (argc == 1) { | |
1836 | #ifdef CONFIG_DM_I2C | |
ca88b9b9 | 1837 | speed = dm_i2c_get_bus_speed(bus); |
63656b76 SG |
1838 | #else |
1839 | speed = i2c_get_bus_speed(); | |
1840 | #endif | |
e857a5bd | 1841 | /* querying current speed */ |
63656b76 SG |
1842 | printf("Current bus speed=%d\n", speed); |
1843 | } else { | |
bb99ad6d BW |
1844 | speed = simple_strtoul(argv[1], NULL, 10); |
1845 | printf("Setting bus speed to %d Hz\n", speed); | |
63656b76 | 1846 | #ifdef CONFIG_DM_I2C |
ca88b9b9 | 1847 | ret = dm_i2c_set_bus_speed(bus, speed); |
63656b76 | 1848 | #else |
bb99ad6d | 1849 | ret = i2c_set_bus_speed(speed); |
63656b76 | 1850 | #endif |
e857a5bd | 1851 | if (ret) |
bb99ad6d | 1852 | printf("Failure changing bus speed (%d)\n", ret); |
bb99ad6d BW |
1853 | } |
1854 | return ret; | |
1855 | } | |
1856 | ||
06afa388 MV |
1857 | /** |
1858 | * do_i2c_mm() - Handle the "i2c mm" command-line command | |
1859 | * @cmdtp: Command data struct pointer | |
1860 | * @flag: Command flag | |
1861 | * @argc: Command-line argument count | |
1862 | * @argv: Array of command-line arguments | |
1863 | * | |
1864 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1865 | * on error. | |
1866 | */ | |
54841ab5 | 1867 | static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d | 1868 | { |
bfc3b77e FM |
1869 | return mod_i2c_mem (cmdtp, 1, flag, argc, argv); |
1870 | } | |
1871 | ||
06afa388 MV |
1872 | /** |
1873 | * do_i2c_nm() - Handle the "i2c nm" command-line command | |
1874 | * @cmdtp: Command data struct pointer | |
1875 | * @flag: Command flag | |
1876 | * @argc: Command-line argument count | |
1877 | * @argv: Array of command-line arguments | |
1878 | * | |
1879 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1880 | * on error. | |
1881 | */ | |
54841ab5 | 1882 | static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1883 | { |
1884 | return mod_i2c_mem (cmdtp, 0, flag, argc, argv); | |
1885 | } | |
e96ad5d3 | 1886 | |
06afa388 MV |
1887 | /** |
1888 | * do_i2c_reset() - Handle the "i2c reset" command-line command | |
1889 | * @cmdtp: Command data struct pointer | |
1890 | * @flag: Command flag | |
1891 | * @argc: Command-line argument count | |
1892 | * @argv: Array of command-line arguments | |
1893 | * | |
1894 | * Returns zero always. | |
1895 | */ | |
54841ab5 | 1896 | static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e | 1897 | { |
63656b76 SG |
1898 | #if defined(CONFIG_DM_I2C) |
1899 | struct udevice *bus; | |
1900 | ||
1901 | if (i2c_get_cur_bus(&bus)) | |
1902 | return CMD_RET_FAILURE; | |
1903 | if (i2c_deblock(bus)) { | |
1904 | printf("Error: Not supported by the driver\n"); | |
1905 | return CMD_RET_FAILURE; | |
1906 | } | |
1907 | #elif defined(CONFIG_SYS_I2C) | |
3f4978c7 HS |
1908 | i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr); |
1909 | #else | |
bfc3b77e | 1910 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
3f4978c7 | 1911 | #endif |
bfc3b77e FM |
1912 | return 0; |
1913 | } | |
1914 | ||
1915 | static cmd_tbl_t cmd_i2c_sub[] = { | |
59aa9df3 | 1916 | #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) |
3f4978c7 | 1917 | U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""), |
9a2accb4 | 1918 | #endif |
bfc3b77e | 1919 | U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), |
3f4978c7 | 1920 | #if defined(CONFIG_SYS_I2C) || \ |
63656b76 | 1921 | defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C) |
bfc3b77e | 1922 | U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), |
bb99ad6d | 1923 | #endif /* CONFIG_I2C_MULTI_BUS */ |
735987c5 TWHT |
1924 | #if defined(CONFIG_I2C_EDID) |
1925 | U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""), | |
1926 | #endif /* CONFIG_I2C_EDID */ | |
bfc3b77e FM |
1927 | U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""), |
1928 | U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""), | |
1929 | U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""), | |
1930 | U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""), | |
1931 | U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), | |
1932 | U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), | |
652e5354 | 1933 | U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), |
ed16f146 | 1934 | U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""), |
63656b76 SG |
1935 | #ifdef CONFIG_DM_I2C |
1936 | U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""), | |
c10c8e31 | 1937 | U_BOOT_CMD_MKENT(olen, 2, 1, do_i2c_olen, "", ""), |
63656b76 | 1938 | #endif |
bfc3b77e | 1939 | U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""), |
c76fe474 | 1940 | #if defined(CONFIG_CMD_SDRAM) |
bfc3b77e | 1941 | U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""), |
90253178 | 1942 | #endif |
bfc3b77e FM |
1943 | U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), |
1944 | }; | |
1945 | ||
2e5167cc | 1946 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
f1d2b313 HS |
1947 | void i2c_reloc(void) { |
1948 | fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); | |
1949 | } | |
1950 | #endif | |
1951 | ||
06afa388 MV |
1952 | /** |
1953 | * do_i2c() - Handle the "i2c" command-line command | |
1954 | * @cmdtp: Command data struct pointer | |
1955 | * @flag: Command flag | |
1956 | * @argc: Command-line argument count | |
1957 | * @argv: Array of command-line arguments | |
1958 | * | |
1959 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1960 | * on error. | |
1961 | */ | |
54841ab5 | 1962 | static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1963 | { |
1964 | cmd_tbl_t *c; | |
1965 | ||
4444b221 | 1966 | if (argc < 2) |
4c12eeb8 | 1967 | return CMD_RET_USAGE; |
4444b221 | 1968 | |
bfc3b77e FM |
1969 | /* Strip off leading 'i2c' command argument */ |
1970 | argc--; | |
1971 | argv++; | |
1972 | ||
1973 | c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub)); | |
1974 | ||
47e26b1b | 1975 | if (c) |
4c12eeb8 | 1976 | return c->cmd(cmdtp, flag, argc, argv); |
47e26b1b | 1977 | else |
4c12eeb8 | 1978 | return CMD_RET_USAGE; |
bb99ad6d | 1979 | } |
8bde7f77 WD |
1980 | |
1981 | /***************************************************/ | |
088f1b19 KP |
1982 | #ifdef CONFIG_SYS_LONGHELP |
1983 | static char i2c_help_text[] = | |
59aa9df3 | 1984 | #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C) |
3f4978c7 | 1985 | "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n" |
9a2accb4 | 1986 | #endif |
fb0070e9 | 1987 | "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" |
3f4978c7 | 1988 | #if defined(CONFIG_SYS_I2C) || \ |
63656b76 | 1989 | defined(CONFIG_I2C_MULTI_BUS) || defined(CONFIG_DM_I2C) |
9bc2e4ee | 1990 | "i2c dev [dev] - show or set current I2C bus\n" |
d9fc7032 | 1991 | #endif /* CONFIG_I2C_MULTI_BUS */ |
735987c5 TWHT |
1992 | #if defined(CONFIG_I2C_EDID) |
1993 | "i2c edid chip - print EDID configuration information\n" | |
1994 | #endif /* CONFIG_I2C_EDID */ | |
fb0070e9 | 1995 | "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n" |
d9fc7032 MF |
1996 | "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n" |
1997 | "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n" | |
1998 | "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n" | |
1999 | "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" | |
54b99e51 | 2000 | "i2c probe [address] - test for and show device(s) on the I2C bus\n" |
63656b76 | 2001 | "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n" |
ed16f146 LP |
2002 | "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n" |
2003 | " to I2C; the -s option selects bulk write in a single transaction\n" | |
63656b76 SG |
2004 | #ifdef CONFIG_DM_I2C |
2005 | "i2c flags chip [flags] - set or get chip flags\n" | |
c10c8e31 | 2006 | "i2c olen chip [offset_length] - set or get chip offset length\n" |
63656b76 | 2007 | #endif |
e43a27c4 | 2008 | "i2c reset - re-init the I2C Controller\n" |
c76fe474 | 2009 | #if defined(CONFIG_CMD_SDRAM) |
fb0070e9 | 2010 | "i2c sdram chip - print SDRAM configuration information\n" |
90253178 | 2011 | #endif |
088f1b19 KP |
2012 | "i2c speed [speed] - show or set I2C bus speed"; |
2013 | #endif | |
2014 | ||
2015 | U_BOOT_CMD( | |
ed16f146 | 2016 | i2c, 7, 1, do_i2c, |
088f1b19 KP |
2017 | "I2C sub-system", |
2018 | i2c_help_text | |
d9fc7032 | 2019 | ); |