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81a8824f 1/*
3f4978c7
HS
2 * (C) Copyright 2009
3 * Sergey Kubushyn, himself, ksi@koi8.net
4 *
5 * Changes for unified multibus/multiadapter I2C support.
6 *
81a8824f
WD
7 * (C) Copyright 2001
8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
9 *
1a459660 10 * SPDX-License-Identifier: GPL-2.0+
81a8824f
WD
11 */
12
13/*
14 * I2C Functions similar to the standard memory functions.
15 *
16 * There are several parameters in many of the commands that bear further
17 * explanations:
18 *
81a8824f
WD
19 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
20 * Each I2C chip on the bus has a unique address. On the I2C data bus,
21 * the address is the upper seven bits and the LSB is the "read/write"
22 * bit. Note that the {i2c_chip} address specified on the command
23 * line is not shifted up: e.g. a typical EEPROM memory chip may have
24 * an I2C address of 0x50, but the data put on the bus will be 0xA0
25 * for write and 0xA1 for read. This "non shifted" address notation
26 * matches at least half of the data sheets :-/.
27 *
28 * {addr} is the address (or offset) within the chip. Small memory
29 * chips have 8 bit addresses. Large memory chips have 16 bit
30 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
31 * Many non-memory chips have multiple registers and {addr} is used
32 * as the register index. Some non-memory chips have only one register
33 * and therefore don't need any {addr} parameter.
34 *
35 * The default {addr} parameter is one byte (.1) which works well for
36 * memories and registers with 8 bits of address space.
37 *
38 * You can specify the length of the {addr} field with the optional .0,
39 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
40 * manipulating a single register device which doesn't use an address
41 * field, use "0.0" for the address and the ".0" length field will
42 * suppress the address in the I2C data stream. This also works for
43 * successive reads using the I2C auto-incrementing memory pointer.
44 *
45 * If you are manipulating a large memory with 2-byte addresses, use
46 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
47 *
48 * Then there are the unfortunate memory chips that spill the most
49 * significant 1, 2, or 3 bits of address into the chip address byte.
50 * This effectively makes one chip (logically) look like 2, 4, or
51 * 8 chips. This is handled (awkwardly) by #defining
6d0f6bcf 52 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
81a8824f
WD
53 * {addr} field (since .1 is the default, it doesn't actually have to
54 * be specified). Examples: given a memory chip at I2C chip address
55 * 0x50, the following would happen...
0f89c54b 56 * i2c md 50 0 10 display 16 bytes starting at 0x000
81a8824f 57 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
0f89c54b 58 * i2c md 50 100 10 display 16 bytes starting at 0x100
81a8824f 59 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
0f89c54b 60 * i2c md 50 210 10 display 16 bytes starting at 0x210
81a8824f
WD
61 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
62 * This is awfully ugly. It would be nice if someone would think up
63 * a better way of handling this.
64 *
65 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
66 */
67
68#include <common.h>
0098e179 69#include <bootretry.h>
18d66533 70#include <cli.h>
81a8824f 71#include <command.h>
735987c5 72#include <edid.h>
67b23a32 73#include <environment.h>
81a8824f 74#include <i2c.h>
67b23a32 75#include <malloc.h>
81a8824f 76#include <asm/byteorder.h>
2515d843 77#include <linux/compiler.h>
81a8824f 78
3f4978c7
HS
79DECLARE_GLOBAL_DATA_PTR;
80
81a8824f
WD
81/* Display values from last command.
82 * Memory modify remembered values are different from display memory.
83 */
84static uchar i2c_dp_last_chip;
85static uint i2c_dp_last_addr;
86static uint i2c_dp_last_alen;
87static uint i2c_dp_last_length = 0x10;
88
89static uchar i2c_mm_last_chip;
90static uint i2c_mm_last_addr;
91static uint i2c_mm_last_alen;
92
bb99ad6d
BW
93/* If only one I2C bus is present, the list of devices to ignore when
94 * the probe command is issued is represented by a 1D array of addresses.
95 * When multiple buses are present, the list is an array of bus-address
96 * pairs. The following macros take care of this */
97
6d0f6bcf 98#if defined(CONFIG_SYS_I2C_NOPROBES)
9a2accb4 99#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
bb99ad6d
BW
100static struct
101{
102 uchar bus;
103 uchar addr;
6d0f6bcf 104} i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
bb99ad6d
BW
105#define GET_BUS_NUM i2c_get_bus_num()
106#define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
107#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
108#define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
109#else /* single bus */
6d0f6bcf 110static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
bb99ad6d
BW
111#define GET_BUS_NUM 0
112#define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
113#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
114#define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
3f4978c7 115#endif /* defined(CONFIG_SYS_I2C) */
67b23a32
HS
116#endif
117
a266fe95
FM
118#define DISP_LINE_LEN 16
119
06afa388
MV
120/**
121 * i2c_init_board() - Board-specific I2C bus init
122 *
123 * This function is the default no-op implementation of I2C bus
124 * initialization. This function can be overriden by board-specific
125 * implementation if needed.
126 */
2515d843
MV
127__weak
128void i2c_init_board(void)
c649dda5 129{
c649dda5 130}
c649dda5 131
655b34a7 132/* TODO: Implement architecture-specific get/set functions */
06afa388
MV
133
134/**
135 * i2c_get_bus_speed() - Return I2C bus speed
136 *
137 * This function is the default implementation of function for retrieveing
138 * the current I2C bus speed in Hz.
139 *
140 * A driver implementing runtime switching of I2C bus speed must override
141 * this function to report the speed correctly. Simple or legacy drivers
142 * can use this fallback.
143 *
144 * Returns I2C bus speed in Hz.
145 */
3f4978c7
HS
146#if !defined(CONFIG_SYS_I2C)
147/*
148 * TODO: Implement architecture-specific get/set functions
149 * Should go away, if we switched completely to new multibus support
150 */
2515d843
MV
151__weak
152unsigned int i2c_get_bus_speed(void)
655b34a7
PT
153{
154 return CONFIG_SYS_I2C_SPEED;
155}
655b34a7 156
06afa388
MV
157/**
158 * i2c_set_bus_speed() - Configure I2C bus speed
159 * @speed: Newly set speed of the I2C bus in Hz
160 *
161 * This function is the default implementation of function for setting
162 * the I2C bus speed in Hz.
163 *
164 * A driver implementing runtime switching of I2C bus speed must override
165 * this function to report the speed correctly. Simple or legacy drivers
166 * can use this fallback.
167 *
168 * Returns zero on success, negative value on error.
169 */
2515d843
MV
170__weak
171int i2c_set_bus_speed(unsigned int speed)
655b34a7
PT
172{
173 if (speed != CONFIG_SYS_I2C_SPEED)
174 return -1;
175
176 return 0;
177}
3f4978c7 178#endif
655b34a7 179
06afa388
MV
180/**
181 * get_alen() - Small parser helper function to get address length
182 *
183 * Returns the address length.
2c0dc990
FM
184 */
185static uint get_alen(char *arg)
186{
187 int j;
188 int alen;
189
190 alen = 1;
191 for (j = 0; j < 8; j++) {
192 if (arg[j] == '.') {
193 alen = arg[j+1] - '0';
2c0dc990
FM
194 break;
195 } else if (arg[j] == '\0')
196 break;
197 }
198 return alen;
199}
200
06afa388
MV
201/**
202 * do_i2c_read() - Handle the "i2c read" command-line command
203 * @cmdtp: Command data struct pointer
204 * @flag: Command flag
205 * @argc: Command-line argument count
206 * @argv: Array of command-line arguments
207 *
208 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
209 * on error.
210 *
652e5354
FM
211 * Syntax:
212 * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
213 */
54841ab5 214static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
652e5354
FM
215{
216 u_char chip;
217 uint devaddr, alen, length;
218 u_char *memaddr;
652e5354 219
47e26b1b 220 if (argc != 5)
4c12eeb8 221 return CMD_RET_USAGE;
652e5354
FM
222
223 /*
224 * I2C chip address
225 */
226 chip = simple_strtoul(argv[1], NULL, 16);
227
228 /*
229 * I2C data address within the chip. This can be 1 or
230 * 2 bytes long. Some day it might be 3 bytes long :-).
231 */
232 devaddr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 233 alen = get_alen(argv[2]);
7a92e53c 234 if (alen > 3)
4c12eeb8 235 return CMD_RET_USAGE;
652e5354
FM
236
237 /*
238 * Length is the number of objects, not number of bytes.
239 */
240 length = simple_strtoul(argv[3], NULL, 16);
241
242 /*
243 * memaddr is the address where to store things in memory
244 */
245 memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16);
246
247 if (i2c_read(chip, devaddr, alen, memaddr, length) != 0) {
248 puts ("Error reading the chip.\n");
249 return 1;
250 }
251 return 0;
252}
253
ff5d2dce
YS
254static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
255{
256 u_char chip;
257 uint devaddr, alen, length;
258 u_char *memaddr;
259
260 if (argc != 5)
261 return cmd_usage(cmdtp);
262
263 /*
264 * memaddr is the address where to store things in memory
265 */
266 memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16);
267
268 /*
269 * I2C chip address
270 */
271 chip = simple_strtoul(argv[2], NULL, 16);
272
273 /*
274 * I2C data address within the chip. This can be 1 or
275 * 2 bytes long. Some day it might be 3 bytes long :-).
276 */
277 devaddr = simple_strtoul(argv[3], NULL, 16);
278 alen = get_alen(argv[3]);
279 if (alen > 3)
280 return cmd_usage(cmdtp);
281
282 /*
283 * Length is the number of objects, not number of bytes.
284 */
285 length = simple_strtoul(argv[4], NULL, 16);
286
287 while (length-- > 0) {
288 if (i2c_write(chip, devaddr++, alen, memaddr++, 1) != 0) {
289 puts("Error writing to the chip.\n");
290 return 1;
291 }
292/*
293 * No write delay with FRAM devices.
294 */
295#if !defined(CONFIG_SYS_I2C_FRAM)
296 udelay(11000);
297#endif
298 }
299 return 0;
300}
301
06afa388
MV
302/**
303 * do_i2c_md() - Handle the "i2c md" command-line command
304 * @cmdtp: Command data struct pointer
305 * @flag: Command flag
306 * @argc: Command-line argument count
307 * @argv: Array of command-line arguments
308 *
309 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
310 * on error.
311 *
4a8cf338
FM
312 * Syntax:
313 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
314 */
54841ab5 315static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
81a8824f
WD
316{
317 u_char chip;
318 uint addr, alen, length;
319 int j, nbytes, linebytes;
320
321 /* We use the last specified parameters, unless new ones are
322 * entered.
323 */
324 chip = i2c_dp_last_chip;
325 addr = i2c_dp_last_addr;
326 alen = i2c_dp_last_alen;
327 length = i2c_dp_last_length;
328
47e26b1b 329 if (argc < 3)
4c12eeb8 330 return CMD_RET_USAGE;
81a8824f
WD
331
332 if ((flag & CMD_FLAG_REPEAT) == 0) {
333 /*
334 * New command specified.
335 */
81a8824f
WD
336
337 /*
338 * I2C chip address
339 */
340 chip = simple_strtoul(argv[1], NULL, 16);
341
342 /*
343 * I2C data address within the chip. This can be 1 or
344 * 2 bytes long. Some day it might be 3 bytes long :-).
345 */
346 addr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 347 alen = get_alen(argv[2]);
7a92e53c 348 if (alen > 3)
4c12eeb8 349 return CMD_RET_USAGE;
81a8824f
WD
350
351 /*
352 * If another parameter, it is the length to display.
353 * Length is the number of objects, not number of bytes.
354 */
355 if (argc > 3)
356 length = simple_strtoul(argv[3], NULL, 16);
357 }
358
359 /*
360 * Print the lines.
361 *
362 * We buffer all read data, so we can make sure data is read only
363 * once.
364 */
365 nbytes = length;
366 do {
367 unsigned char linebuf[DISP_LINE_LEN];
368 unsigned char *cp;
369
370 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
371
e857a5bd 372 if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
4b9206ed 373 puts ("Error reading the chip.\n");
e857a5bd 374 else {
81a8824f
WD
375 printf("%04x:", addr);
376 cp = linebuf;
377 for (j=0; j<linebytes; j++) {
378 printf(" %02x", *cp++);
379 addr++;
380 }
4b9206ed 381 puts (" ");
81a8824f
WD
382 cp = linebuf;
383 for (j=0; j<linebytes; j++) {
384 if ((*cp < 0x20) || (*cp > 0x7e))
4b9206ed 385 puts (".");
81a8824f
WD
386 else
387 printf("%c", *cp);
388 cp++;
389 }
4b9206ed 390 putc ('\n');
81a8824f
WD
391 }
392 nbytes -= linebytes;
393 } while (nbytes > 0);
394
395 i2c_dp_last_chip = chip;
396 i2c_dp_last_addr = addr;
397 i2c_dp_last_alen = alen;
398 i2c_dp_last_length = length;
399
400 return 0;
401}
402
06afa388
MV
403/**
404 * do_i2c_mw() - Handle the "i2c mw" command-line command
405 * @cmdtp: Command data struct pointer
406 * @flag: Command flag
407 * @argc: Command-line argument count
408 * @argv: Array of command-line arguments
409 *
410 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
411 * on error.
81a8824f
WD
412 *
413 * Syntax:
0f89c54b 414 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
81a8824f 415 */
54841ab5 416static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
81a8824f
WD
417{
418 uchar chip;
419 ulong addr;
420 uint alen;
421 uchar byte;
422 int count;
81a8824f 423
47e26b1b 424 if ((argc < 4) || (argc > 5))
4c12eeb8 425 return CMD_RET_USAGE;
81a8824f
WD
426
427 /*
53677ef1
WD
428 * Chip is always specified.
429 */
81a8824f
WD
430 chip = simple_strtoul(argv[1], NULL, 16);
431
432 /*
433 * Address is always specified.
434 */
435 addr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 436 alen = get_alen(argv[2]);
7a92e53c 437 if (alen > 3)
4c12eeb8 438 return CMD_RET_USAGE;
81a8824f
WD
439
440 /*
441 * Value to write is always specified.
442 */
443 byte = simple_strtoul(argv[3], NULL, 16);
444
445 /*
446 * Optional count
447 */
e857a5bd 448 if (argc == 5)
81a8824f 449 count = simple_strtoul(argv[4], NULL, 16);
e857a5bd 450 else
81a8824f 451 count = 1;
81a8824f
WD
452
453 while (count-- > 0) {
e857a5bd 454 if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
4b9206ed 455 puts ("Error writing the chip.\n");
81a8824f
WD
456 /*
457 * Wait for the write to complete. The write can take
458 * up to 10mSec (we allow a little more time).
81a8824f 459 */
d4f5c728 460/*
461 * No write delay with FRAM devices.
462 */
6d0f6bcf 463#if !defined(CONFIG_SYS_I2C_FRAM)
81a8824f 464 udelay(11000);
d4f5c728 465#endif
81a8824f
WD
466 }
467
06afa388 468 return 0;
81a8824f
WD
469}
470
06afa388
MV
471/**
472 * do_i2c_crc() - Handle the "i2c crc32" command-line command
473 * @cmdtp: Command data struct pointer
474 * @flag: Command flag
475 * @argc: Command-line argument count
476 * @argv: Array of command-line arguments
477 *
478 * Calculate a CRC on memory
479 *
480 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
481 * on error.
81a8824f
WD
482 *
483 * Syntax:
0f89c54b 484 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
81a8824f 485 */
54841ab5 486static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
81a8824f
WD
487{
488 uchar chip;
489 ulong addr;
490 uint alen;
491 int count;
492 uchar byte;
493 ulong crc;
494 ulong err;
81a8824f 495
47e26b1b 496 if (argc < 4)
4c12eeb8 497 return CMD_RET_USAGE;
81a8824f
WD
498
499 /*
53677ef1
WD
500 * Chip is always specified.
501 */
81a8824f
WD
502 chip = simple_strtoul(argv[1], NULL, 16);
503
504 /*
505 * Address is always specified.
506 */
507 addr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 508 alen = get_alen(argv[2]);
7a92e53c 509 if (alen > 3)
4c12eeb8 510 return CMD_RET_USAGE;
81a8824f
WD
511
512 /*
513 * Count is always specified
514 */
515 count = simple_strtoul(argv[3], NULL, 16);
516
517 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
518 /*
519 * CRC a byte at a time. This is going to be slooow, but hey, the
520 * memories are small and slow too so hopefully nobody notices.
521 */
522 crc = 0;
523 err = 0;
e857a5bd
TT
524 while (count-- > 0) {
525 if (i2c_read(chip, addr, alen, &byte, 1) != 0)
81a8824f 526 err++;
81a8824f
WD
527 crc = crc32 (crc, &byte, 1);
528 addr++;
529 }
e857a5bd 530 if (err > 0)
4b9206ed 531 puts ("Error reading the chip,\n");
e857a5bd 532 else
81a8824f 533 printf ("%08lx\n", crc);
81a8824f
WD
534
535 return 0;
536}
537
06afa388
MV
538/**
539 * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command
540 * @cmdtp: Command data struct pointer
541 * @flag: Command flag
542 * @argc: Command-line argument count
543 * @argv: Array of command-line arguments
544 *
545 * Modify memory.
546 *
547 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
548 * on error.
81a8824f
WD
549 *
550 * Syntax:
0f89c54b
PT
551 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
552 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
81a8824f 553 */
81a8824f 554static int
54841ab5 555mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
81a8824f
WD
556{
557 uchar chip;
558 ulong addr;
559 uint alen;
560 ulong data;
561 int size = 1;
562 int nbytes;
81a8824f 563
47e26b1b 564 if (argc != 3)
4c12eeb8 565 return CMD_RET_USAGE;
81a8824f
WD
566
567#ifdef CONFIG_BOOT_RETRY_TIME
568 reset_cmd_timeout(); /* got a good command to get here */
569#endif
570 /*
571 * We use the last specified parameters, unless new ones are
572 * entered.
573 */
574 chip = i2c_mm_last_chip;
575 addr = i2c_mm_last_addr;
576 alen = i2c_mm_last_alen;
577
578 if ((flag & CMD_FLAG_REPEAT) == 0) {
579 /*
580 * New command specified. Check for a size specification.
581 * Defaults to byte if no or incorrect specification.
582 */
583 size = cmd_get_data_size(argv[0], 1);
584
585 /*
53677ef1
WD
586 * Chip is always specified.
587 */
81a8824f
WD
588 chip = simple_strtoul(argv[1], NULL, 16);
589
590 /*
591 * Address is always specified.
592 */
593 addr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 594 alen = get_alen(argv[2]);
7a92e53c 595 if (alen > 3)
4c12eeb8 596 return CMD_RET_USAGE;
81a8824f
WD
597 }
598
599 /*
600 * Print the address, followed by value. Then accept input for
601 * the next value. A non-converted value exits.
602 */
603 do {
604 printf("%08lx:", addr);
e857a5bd 605 if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0)
4b9206ed 606 puts ("\nError reading the chip,\n");
e857a5bd 607 else {
81a8824f 608 data = cpu_to_be32(data);
e857a5bd 609 if (size == 1)
81a8824f 610 printf(" %02lx", (data >> 24) & 0x000000FF);
e857a5bd 611 else if (size == 2)
81a8824f 612 printf(" %04lx", (data >> 16) & 0x0000FFFF);
e857a5bd 613 else
81a8824f 614 printf(" %08lx", data);
81a8824f
WD
615 }
616
e1bf824d 617 nbytes = cli_readline(" ? ");
81a8824f
WD
618 if (nbytes == 0) {
619 /*
620 * <CR> pressed as only input, don't modify current
621 * location and move to next.
622 */
623 if (incrflag)
624 addr += size;
625 nbytes = size;
626#ifdef CONFIG_BOOT_RETRY_TIME
627 reset_cmd_timeout(); /* good enough to not time out */
628#endif
629 }
630#ifdef CONFIG_BOOT_RETRY_TIME
e857a5bd 631 else if (nbytes == -2)
81a8824f 632 break; /* timed out, exit the command */
81a8824f
WD
633#endif
634 else {
635 char *endp;
636
637 data = simple_strtoul(console_buffer, &endp, 16);
e857a5bd 638 if (size == 1)
81a8824f 639 data = data << 24;
e857a5bd 640 else if (size == 2)
81a8824f 641 data = data << 16;
81a8824f
WD
642 data = be32_to_cpu(data);
643 nbytes = endp - console_buffer;
644 if (nbytes) {
645#ifdef CONFIG_BOOT_RETRY_TIME
646 /*
647 * good enough to not time out
648 */
649 reset_cmd_timeout();
650#endif
e857a5bd 651 if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0)
4b9206ed 652 puts ("Error writing the chip.\n");
6d0f6bcf
JCPV
653#ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
654 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
2535d602 655#endif
81a8824f
WD
656 if (incrflag)
657 addr += size;
658 }
659 }
660 } while (nbytes);
661
0800707b
PT
662 i2c_mm_last_chip = chip;
663 i2c_mm_last_addr = addr;
664 i2c_mm_last_alen = alen;
81a8824f
WD
665
666 return 0;
667}
668
06afa388
MV
669/**
670 * do_i2c_probe() - Handle the "i2c probe" command-line command
671 * @cmdtp: Command data struct pointer
672 * @flag: Command flag
673 * @argc: Command-line argument count
674 * @argv: Array of command-line arguments
675 *
676 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
677 * on error.
678 *
81a8824f 679 * Syntax:
54b99e51
EN
680 * i2c probe {addr}
681 *
682 * Returns zero (success) if one or more I2C devices was found
81a8824f 683 */
54841ab5 684static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
81a8824f
WD
685{
686 int j;
54b99e51
EN
687 int addr = -1;
688 int found = 0;
6d0f6bcf 689#if defined(CONFIG_SYS_I2C_NOPROBES)
81a8824f 690 int k, skip;
3f4978c7 691 unsigned int bus = GET_BUS_NUM;
bb99ad6d 692#endif /* NOPROBES */
81a8824f 693
54b99e51
EN
694 if (argc == 2)
695 addr = simple_strtol(argv[1], 0, 16);
696
4b9206ed 697 puts ("Valid chip addresses:");
e857a5bd 698 for (j = 0; j < 128; j++) {
54b99e51
EN
699 if ((0 <= addr) && (j != addr))
700 continue;
701
6d0f6bcf 702#if defined(CONFIG_SYS_I2C_NOPROBES)
81a8824f 703 skip = 0;
cfb25cc4 704 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
e857a5bd 705 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
81a8824f
WD
706 skip = 1;
707 break;
708 }
709 }
710 if (skip)
711 continue;
712#endif
54b99e51 713 if (i2c_probe(j) == 0) {
81a8824f 714 printf(" %02X", j);
54b99e51
EN
715 found++;
716 }
81a8824f 717 }
4b9206ed 718 putc ('\n');
81a8824f 719
6d0f6bcf 720#if defined(CONFIG_SYS_I2C_NOPROBES)
81a8824f 721 puts ("Excluded chip addresses:");
cfb25cc4 722 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
e857a5bd 723 if (COMPARE_BUS(bus,k))
bb99ad6d
BW
724 printf(" %02X", NO_PROBE_ADDR(k));
725 }
4b9206ed 726 putc ('\n');
81a8824f
WD
727#endif
728
54b99e51 729 return (0 == found);
81a8824f
WD
730}
731
06afa388
MV
732/**
733 * do_i2c_loop() - Handle the "i2c loop" command-line command
734 * @cmdtp: Command data struct pointer
735 * @flag: Command flag
736 * @argc: Command-line argument count
737 * @argv: Array of command-line arguments
738 *
739 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
740 * on error.
741 *
81a8824f 742 * Syntax:
0f89c54b 743 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
81a8824f
WD
744 * {length} - Number of bytes to read
745 * {delay} - A DECIMAL number and defaults to 1000 uSec
746 */
54841ab5 747static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
81a8824f
WD
748{
749 u_char chip;
750 ulong alen;
751 uint addr;
752 uint length;
753 u_char bytes[16];
754 int delay;
81a8824f 755
47e26b1b 756 if (argc < 3)
4c12eeb8 757 return CMD_RET_USAGE;
81a8824f
WD
758
759 /*
760 * Chip is always specified.
761 */
762 chip = simple_strtoul(argv[1], NULL, 16);
763
764 /*
765 * Address is always specified.
766 */
767 addr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 768 alen = get_alen(argv[2]);
7a92e53c 769 if (alen > 3)
4c12eeb8 770 return CMD_RET_USAGE;
81a8824f
WD
771
772 /*
773 * Length is the number of objects, not number of bytes.
774 */
775 length = 1;
776 length = simple_strtoul(argv[3], NULL, 16);
e857a5bd 777 if (length > sizeof(bytes))
81a8824f 778 length = sizeof(bytes);
81a8824f
WD
779
780 /*
781 * The delay time (uSec) is optional.
782 */
783 delay = 1000;
e857a5bd 784 if (argc > 3)
81a8824f 785 delay = simple_strtoul(argv[4], NULL, 10);
81a8824f
WD
786 /*
787 * Run the loop...
788 */
e857a5bd
TT
789 while (1) {
790 if (i2c_read(chip, addr, alen, bytes, length) != 0)
4b9206ed 791 puts ("Error reading the chip.\n");
81a8824f
WD
792 udelay(delay);
793 }
794
795 /* NOTREACHED */
796 return 0;
797}
798
81a8824f
WD
799/*
800 * The SDRAM command is separately configured because many
801 * (most?) embedded boards don't use SDRAM DIMMs.
06afa388
MV
802 *
803 * FIXME: Document and probably move elsewhere!
81a8824f 804 */
c76fe474 805#if defined(CONFIG_CMD_SDRAM)
632de067
LJ
806static void print_ddr2_tcyc (u_char const b)
807{
808 printf ("%d.", (b >> 4) & 0x0F);
809 switch (b & 0x0F) {
810 case 0x0:
811 case 0x1:
812 case 0x2:
813 case 0x3:
814 case 0x4:
815 case 0x5:
816 case 0x6:
817 case 0x7:
818 case 0x8:
819 case 0x9:
820 printf ("%d ns\n", b & 0x0F);
821 break;
822 case 0xA:
823 puts ("25 ns\n");
824 break;
825 case 0xB:
826 puts ("33 ns\n");
827 break;
828 case 0xC:
829 puts ("66 ns\n");
830 break;
831 case 0xD:
832 puts ("75 ns\n");
833 break;
834 default:
835 puts ("?? ns\n");
836 break;
837 }
838}
839
840static void decode_bits (u_char const b, char const *str[], int const do_once)
841{
842 u_char mask;
843
844 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
845 if (b & mask) {
846 puts (*str);
847 if (do_once)
848 return;
849 }
850 }
851}
81a8824f
WD
852
853/*
854 * Syntax:
0f89c54b 855 * i2c sdram {i2c_chip}
81a8824f 856 */
54841ab5 857static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
81a8824f 858{
632de067
LJ
859 enum { unknown, EDO, SDRAM, DDR2 } type;
860
81a8824f
WD
861 u_char chip;
862 u_char data[128];
863 u_char cksum;
864 int j;
865
632de067
LJ
866 static const char *decode_CAS_DDR2[] = {
867 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
868 };
869
870 static const char *decode_CAS_default[] = {
871 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
872 };
873
874 static const char *decode_CS_WE_default[] = {
875 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
876 };
877
878 static const char *decode_byte21_default[] = {
879 " TBD (bit 7)\n",
880 " Redundant row address\n",
881 " Differential clock input\n",
882 " Registerd DQMB inputs\n",
883 " Buffered DQMB inputs\n",
884 " On-card PLL\n",
885 " Registered address/control lines\n",
886 " Buffered address/control lines\n"
887 };
888
889 static const char *decode_byte22_DDR2[] = {
890 " TBD (bit 7)\n",
891 " TBD (bit 6)\n",
892 " TBD (bit 5)\n",
893 " TBD (bit 4)\n",
894 " TBD (bit 3)\n",
895 " Supports partial array self refresh\n",
896 " Supports 50 ohm ODT\n",
897 " Supports weak driver\n"
898 };
899
900 static const char *decode_row_density_DDR2[] = {
901 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
902 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
903 };
904
905 static const char *decode_row_density_default[] = {
906 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
907 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
908 };
909
47e26b1b 910 if (argc < 2)
4c12eeb8 911 return CMD_RET_USAGE;
47e26b1b 912
81a8824f
WD
913 /*
914 * Chip is always specified.
632de067
LJ
915 */
916 chip = simple_strtoul (argv[1], NULL, 16);
81a8824f 917
632de067 918 if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
4b9206ed 919 puts ("No SDRAM Serial Presence Detect found.\n");
81a8824f
WD
920 return 1;
921 }
922
923 cksum = 0;
924 for (j = 0; j < 63; j++) {
925 cksum += data[j];
926 }
e857a5bd 927 if (cksum != data[63]) {
81a8824f 928 printf ("WARNING: Configuration data checksum failure:\n"
632de067 929 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
81a8824f 930 }
632de067 931 printf ("SPD data revision %d.%d\n",
81a8824f 932 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
632de067
LJ
933 printf ("Bytes used 0x%02X\n", data[0]);
934 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
935
4b9206ed 936 puts ("Memory type ");
632de067 937 switch (data[2]) {
0df6b844
LJ
938 case 2:
939 type = EDO;
940 puts ("EDO\n");
941 break;
942 case 4:
943 type = SDRAM;
944 puts ("SDRAM\n");
945 break;
946 case 8:
947 type = DDR2;
948 puts ("DDR2\n");
949 break;
950 default:
951 type = unknown;
952 puts ("unknown\n");
953 break;
81a8824f 954 }
632de067 955
4b9206ed 956 puts ("Row address bits ");
e857a5bd 957 if ((data[3] & 0x00F0) == 0)
632de067 958 printf ("%d\n", data[3] & 0x0F);
e857a5bd 959 else
632de067
LJ
960 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
961
4b9206ed 962 puts ("Column address bits ");
e857a5bd 963 if ((data[4] & 0x00F0) == 0)
632de067 964 printf ("%d\n", data[4] & 0x0F);
e857a5bd 965 else
632de067 966 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
0df6b844
LJ
967
968 switch (type) {
969 case DDR2:
632de067
LJ
970 printf ("Number of ranks %d\n",
971 (data[5] & 0x07) + 1);
0df6b844
LJ
972 break;
973 default:
632de067 974 printf ("Module rows %d\n", data[5]);
0df6b844
LJ
975 break;
976 }
977
978 switch (type) {
979 case DDR2:
632de067 980 printf ("Module data width %d bits\n", data[6]);
0df6b844
LJ
981 break;
982 default:
632de067
LJ
983 printf ("Module data width %d bits\n",
984 (data[7] << 8) | data[6]);
0df6b844
LJ
985 break;
986 }
987
4b9206ed 988 puts ("Interface signal levels ");
81a8824f 989 switch(data[8]) {
0df6b844 990 case 0: puts ("TTL 5.0 V\n"); break;
4b9206ed 991 case 1: puts ("LVTTL\n"); break;
0df6b844
LJ
992 case 2: puts ("HSTL 1.5 V\n"); break;
993 case 3: puts ("SSTL 3.3 V\n"); break;
994 case 4: puts ("SSTL 2.5 V\n"); break;
995 case 5: puts ("SSTL 1.8 V\n"); break;
4b9206ed 996 default: puts ("unknown\n"); break;
81a8824f 997 }
0df6b844
LJ
998
999 switch (type) {
1000 case DDR2:
632de067
LJ
1001 printf ("SDRAM cycle time ");
1002 print_ddr2_tcyc (data[9]);
0df6b844
LJ
1003 break;
1004 default:
632de067
LJ
1005 printf ("SDRAM cycle time %d.%d ns\n",
1006 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
0df6b844
LJ
1007 break;
1008 }
1009
1010 switch (type) {
1011 case DDR2:
632de067
LJ
1012 printf ("SDRAM access time 0.%d%d ns\n",
1013 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
0df6b844
LJ
1014 break;
1015 default:
632de067
LJ
1016 printf ("SDRAM access time %d.%d ns\n",
1017 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
0df6b844
LJ
1018 break;
1019 }
1020
4b9206ed 1021 puts ("EDC configuration ");
632de067 1022 switch (data[11]) {
4b9206ed
WD
1023 case 0: puts ("None\n"); break;
1024 case 1: puts ("Parity\n"); break;
1025 case 2: puts ("ECC\n"); break;
1026 default: puts ("unknown\n"); break;
81a8824f 1027 }
632de067 1028
e857a5bd 1029 if ((data[12] & 0x80) == 0)
4b9206ed 1030 puts ("No self refresh, rate ");
e857a5bd 1031 else
4b9206ed 1032 puts ("Self refresh, rate ");
632de067 1033
81a8824f 1034 switch(data[12] & 0x7F) {
632de067
LJ
1035 case 0: puts ("15.625 us\n"); break;
1036 case 1: puts ("3.9 us\n"); break;
1037 case 2: puts ("7.8 us\n"); break;
1038 case 3: puts ("31.3 us\n"); break;
1039 case 4: puts ("62.5 us\n"); break;
1040 case 5: puts ("125 us\n"); break;
4b9206ed 1041 default: puts ("unknown\n"); break;
81a8824f 1042 }
0df6b844
LJ
1043
1044 switch (type) {
1045 case DDR2:
632de067 1046 printf ("SDRAM width (primary) %d\n", data[13]);
0df6b844
LJ
1047 break;
1048 default:
632de067 1049 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
0df6b844 1050 if ((data[13] & 0x80) != 0) {
632de067
LJ
1051 printf (" (second bank) %d\n",
1052 2 * (data[13] & 0x7F));
0df6b844
LJ
1053 }
1054 break;
1055 }
1056
1057 switch (type) {
1058 case DDR2:
1059 if (data[14] != 0)
632de067 1060 printf ("EDC width %d\n", data[14]);
0df6b844
LJ
1061 break;
1062 default:
1063 if (data[14] != 0) {
632de067
LJ
1064 printf ("EDC width %d\n",
1065 data[14] & 0x7F);
0df6b844
LJ
1066
1067 if ((data[14] & 0x80) != 0) {
632de067
LJ
1068 printf (" (second bank) %d\n",
1069 2 * (data[14] & 0x7F));
0df6b844
LJ
1070 }
1071 }
1072 break;
81a8824f 1073 }
0df6b844 1074
632de067
LJ
1075 if (DDR2 != type) {
1076 printf ("Min clock delay, back-to-back random column addresses "
1077 "%d\n", data[15]);
0df6b844
LJ
1078 }
1079
4b9206ed
WD
1080 puts ("Burst length(s) ");
1081 if (data[16] & 0x80) puts (" Page");
1082 if (data[16] & 0x08) puts (" 8");
1083 if (data[16] & 0x04) puts (" 4");
1084 if (data[16] & 0x02) puts (" 2");
1085 if (data[16] & 0x01) puts (" 1");
1086 putc ('\n');
632de067 1087 printf ("Number of banks %d\n", data[17]);
0df6b844
LJ
1088
1089 switch (type) {
1090 case DDR2:
1091 puts ("CAS latency(s) ");
632de067 1092 decode_bits (data[18], decode_CAS_DDR2, 0);
0df6b844
LJ
1093 putc ('\n');
1094 break;
1095 default:
1096 puts ("CAS latency(s) ");
632de067 1097 decode_bits (data[18], decode_CAS_default, 0);
0df6b844
LJ
1098 putc ('\n');
1099 break;
1100 }
1101
1102 if (DDR2 != type) {
1103 puts ("CS latency(s) ");
632de067 1104 decode_bits (data[19], decode_CS_WE_default, 0);
0df6b844
LJ
1105 putc ('\n');
1106 }
1107
1108 if (DDR2 != type) {
1109 puts ("WE latency(s) ");
632de067 1110 decode_bits (data[20], decode_CS_WE_default, 0);
0df6b844
LJ
1111 putc ('\n');
1112 }
1113
1114 switch (type) {
1115 case DDR2:
1116 puts ("Module attributes:\n");
1117 if (data[21] & 0x80)
1118 puts (" TBD (bit 7)\n");
1119 if (data[21] & 0x40)
1120 puts (" Analysis probe installed\n");
1121 if (data[21] & 0x20)
1122 puts (" TBD (bit 5)\n");
1123 if (data[21] & 0x10)
1124 puts (" FET switch external enable\n");
632de067 1125 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
0df6b844 1126 if (data[20] & 0x11) {
632de067
LJ
1127 printf (" %d active registers on DIMM\n",
1128 (data[21] & 0x03) + 1);
0df6b844
LJ
1129 }
1130 break;
1131 default:
1132 puts ("Module attributes:\n");
1133 if (!data[21])
1134 puts (" (none)\n");
632de067
LJ
1135 else
1136 decode_bits (data[21], decode_byte21_default, 0);
0df6b844
LJ
1137 break;
1138 }
1139
1140 switch (type) {
1141 case DDR2:
632de067 1142 decode_bits (data[22], decode_byte22_DDR2, 0);
0df6b844
LJ
1143 break;
1144 default:
1145 puts ("Device attributes:\n");
1146 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
1147 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
1148 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1149 else puts (" Upper Vcc tolerance 10%\n");
1150 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1151 else puts (" Lower Vcc tolerance 10%\n");
1152 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1153 if (data[22] & 0x04) puts (" Supports precharge all\n");
1154 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1155 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1156 break;
1157 }
1158
1159 switch (type) {
1160 case DDR2:
632de067
LJ
1161 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1162 print_ddr2_tcyc (data[23]);
0df6b844
LJ
1163 break;
1164 default:
632de067
LJ
1165 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1166 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
0df6b844
LJ
1167 break;
1168 }
1169
1170 switch (type) {
1171 case DDR2:
632de067
LJ
1172 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1173 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
0df6b844
LJ
1174 break;
1175 default:
632de067
LJ
1176 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1177 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
0df6b844
LJ
1178 break;
1179 }
1180
1181 switch (type) {
1182 case DDR2:
632de067
LJ
1183 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1184 print_ddr2_tcyc (data[25]);
0df6b844
LJ
1185 break;
1186 default:
632de067
LJ
1187 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1188 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
0df6b844
LJ
1189 break;
1190 }
1191
1192 switch (type) {
1193 case DDR2:
632de067
LJ
1194 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1195 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
0df6b844
LJ
1196 break;
1197 default:
632de067
LJ
1198 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1199 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
0df6b844
LJ
1200 break;
1201 }
1202
1203 switch (type) {
1204 case DDR2:
632de067
LJ
1205 printf ("Minimum row precharge %d.%02d ns\n",
1206 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
0df6b844
LJ
1207 break;
1208 default:
632de067 1209 printf ("Minimum row precharge %d ns\n", data[27]);
0df6b844
LJ
1210 break;
1211 }
1212
1213 switch (type) {
1214 case DDR2:
632de067
LJ
1215 printf ("Row active to row active min %d.%02d ns\n",
1216 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
0df6b844
LJ
1217 break;
1218 default:
632de067 1219 printf ("Row active to row active min %d ns\n", data[28]);
0df6b844
LJ
1220 break;
1221 }
1222
1223 switch (type) {
1224 case DDR2:
632de067
LJ
1225 printf ("RAS to CAS delay min %d.%02d ns\n",
1226 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
0df6b844
LJ
1227 break;
1228 default:
632de067 1229 printf ("RAS to CAS delay min %d ns\n", data[29]);
0df6b844
LJ
1230 break;
1231 }
1232
632de067 1233 printf ("Minimum RAS pulse width %d ns\n", data[30]);
0df6b844
LJ
1234
1235 switch (type) {
1236 case DDR2:
632de067
LJ
1237 puts ("Density of each row ");
1238 decode_bits (data[31], decode_row_density_DDR2, 1);
1239 putc ('\n');
0df6b844
LJ
1240 break;
1241 default:
632de067
LJ
1242 puts ("Density of each row ");
1243 decode_bits (data[31], decode_row_density_default, 1);
1244 putc ('\n');
0df6b844
LJ
1245 break;
1246 }
1247
1248 switch (type) {
1249 case DDR2:
632de067 1250 puts ("Command and Address setup ");
0df6b844 1251 if (data[32] >= 0xA0) {
632de067
LJ
1252 printf ("1.%d%d ns\n",
1253 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
0df6b844 1254 } else {
632de067
LJ
1255 printf ("0.%d%d ns\n",
1256 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
0df6b844
LJ
1257 }
1258 break;
1259 default:
632de067
LJ
1260 printf ("Command and Address setup %c%d.%d ns\n",
1261 (data[32] & 0x80) ? '-' : '+',
1262 (data[32] >> 4) & 0x07, data[32] & 0x0F);
0df6b844
LJ
1263 break;
1264 }
1265
1266 switch (type) {
1267 case DDR2:
632de067 1268 puts ("Command and Address hold ");
0df6b844 1269 if (data[33] >= 0xA0) {
632de067
LJ
1270 printf ("1.%d%d ns\n",
1271 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
0df6b844 1272 } else {
632de067
LJ
1273 printf ("0.%d%d ns\n",
1274 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
0df6b844
LJ
1275 }
1276 break;
1277 default:
632de067
LJ
1278 printf ("Command and Address hold %c%d.%d ns\n",
1279 (data[33] & 0x80) ? '-' : '+',
1280 (data[33] >> 4) & 0x07, data[33] & 0x0F);
0df6b844
LJ
1281 break;
1282 }
1283
1284 switch (type) {
1285 case DDR2:
632de067
LJ
1286 printf ("Data signal input setup 0.%d%d ns\n",
1287 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
0df6b844
LJ
1288 break;
1289 default:
632de067
LJ
1290 printf ("Data signal input setup %c%d.%d ns\n",
1291 (data[34] & 0x80) ? '-' : '+',
1292 (data[34] >> 4) & 0x07, data[34] & 0x0F);
0df6b844
LJ
1293 break;
1294 }
1295
1296 switch (type) {
1297 case DDR2:
632de067
LJ
1298 printf ("Data signal input hold 0.%d%d ns\n",
1299 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
0df6b844
LJ
1300 break;
1301 default:
632de067
LJ
1302 printf ("Data signal input hold %c%d.%d ns\n",
1303 (data[35] & 0x80) ? '-' : '+',
1304 (data[35] >> 4) & 0x07, data[35] & 0x0F);
0df6b844
LJ
1305 break;
1306 }
1307
4b9206ed 1308 puts ("Manufacturer's JEDEC ID ");
e857a5bd 1309 for (j = 64; j <= 71; j++)
632de067 1310 printf ("%02X ", data[j]);
4b9206ed 1311 putc ('\n');
632de067 1312 printf ("Manufacturing Location %02X\n", data[72]);
4b9206ed 1313 puts ("Manufacturer's Part Number ");
e857a5bd 1314 for (j = 73; j <= 90; j++)
632de067 1315 printf ("%02X ", data[j]);
4b9206ed 1316 putc ('\n');
632de067
LJ
1317 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1318 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
4b9206ed 1319 puts ("Assembly Serial Number ");
e857a5bd 1320 for (j = 95; j <= 98; j++)
632de067 1321 printf ("%02X ", data[j]);
4b9206ed 1322 putc ('\n');
81a8824f 1323
0df6b844 1324 if (DDR2 != type) {
632de067
LJ
1325 printf ("Speed rating PC%d\n",
1326 data[126] == 0x66 ? 66 : data[126]);
0df6b844 1327 }
81a8824f
WD
1328 return 0;
1329}
90253178 1330#endif
81a8824f 1331
735987c5
TWHT
1332/*
1333 * Syntax:
1334 * i2c edid {i2c_chip}
1335 */
1336#if defined(CONFIG_I2C_EDID)
1337int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1338{
1339 u_char chip;
1340 struct edid1_info edid;
1341
1342 if (argc < 2) {
1343 cmd_usage(cmdtp);
1344 return 1;
1345 }
1346
1347 chip = simple_strtoul(argv[1], NULL, 16);
1348 if (i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid)) != 0) {
1349 puts("Error reading EDID content.\n");
1350 return 1;
1351 }
1352
1353 if (edid_check_info(&edid)) {
1354 puts("Content isn't valid EDID.\n");
1355 return 1;
1356 }
1357
1358 edid_print_info(&edid);
1359 return 0;
1360
1361}
1362#endif /* CONFIG_I2C_EDID */
1363
06afa388 1364/**
3f4978c7 1365 * do_i2c_show_bus() - Handle the "i2c bus" command-line command
06afa388
MV
1366 * @cmdtp: Command data struct pointer
1367 * @flag: Command flag
1368 * @argc: Command-line argument count
1369 * @argv: Array of command-line arguments
1370 *
1371 * Returns zero always.
1372 */
3f4978c7
HS
1373#if defined(CONFIG_SYS_I2C)
1374int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
67b23a32 1375{
3f4978c7
HS
1376 int i;
1377#ifndef CONFIG_SYS_I2C_DIRECT_BUS
1378 int j;
1379#endif
67b23a32
HS
1380
1381 if (argc == 1) {
1382 /* show all busses */
3f4978c7
HS
1383 for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) {
1384 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
1385#ifndef CONFIG_SYS_I2C_DIRECT_BUS
1386 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
1387 if (i2c_bus[i].next_hop[j].chip == 0)
1388 break;
1389 printf("->%s@0x%2x:%d",
1390 i2c_bus[i].next_hop[j].mux.name,
1391 i2c_bus[i].next_hop[j].chip,
1392 i2c_bus[i].next_hop[j].channel);
67b23a32 1393 }
3f4978c7
HS
1394#endif
1395 printf("\n");
67b23a32
HS
1396 }
1397 } else {
3f4978c7
HS
1398 /* show specific bus */
1399 i = simple_strtoul(argv[1], NULL, 10);
1400 if (i >= CONFIG_SYS_NUM_I2C_BUSES) {
1401 printf("Invalid bus %d\n", i);
1402 return -1;
1403 }
1404 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
1405#ifndef CONFIG_SYS_I2C_DIRECT_BUS
1406 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
1407 if (i2c_bus[i].next_hop[j].chip == 0)
1408 break;
1409 printf("->%s@0x%2x:%d",
1410 i2c_bus[i].next_hop[j].mux.name,
1411 i2c_bus[i].next_hop[j].chip,
1412 i2c_bus[i].next_hop[j].channel);
1413 }
1414#endif
1415 printf("\n");
67b23a32 1416 }
3f4978c7
HS
1417
1418 return 0;
67b23a32 1419}
3f4978c7 1420#endif
67b23a32 1421
06afa388
MV
1422/**
1423 * do_i2c_bus_num() - Handle the "i2c dev" command-line command
1424 * @cmdtp: Command data struct pointer
1425 * @flag: Command flag
1426 * @argc: Command-line argument count
1427 * @argv: Array of command-line arguments
1428 *
1429 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1430 * on error.
1431 */
3f4978c7
HS
1432#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
1433int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
bb99ad6d 1434{
3f4978c7
HS
1435 int ret = 0;
1436 unsigned int bus_no;
bb99ad6d 1437
e857a5bd
TT
1438 if (argc == 1)
1439 /* querying current setting */
bb99ad6d 1440 printf("Current bus is %d\n", i2c_get_bus_num());
e857a5bd 1441 else {
3f4978c7 1442 bus_no = simple_strtoul(argv[1], NULL, 10);
880a4127 1443#if defined(CONFIG_SYS_I2C)
3f4978c7
HS
1444 if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
1445 printf("Invalid bus %d\n", bus_no);
1446 return -1;
1447 }
880a4127 1448#endif
3f4978c7
HS
1449 printf("Setting bus to %d\n", bus_no);
1450 ret = i2c_set_bus_num(bus_no);
e857a5bd 1451 if (ret)
bb99ad6d 1452 printf("Failure changing bus number (%d)\n", ret);
bb99ad6d
BW
1453 }
1454 return ret;
1455}
3f4978c7 1456#endif /* defined(CONFIG_SYS_I2C) */
bb99ad6d 1457
06afa388
MV
1458/**
1459 * do_i2c_bus_speed() - Handle the "i2c speed" command-line command
1460 * @cmdtp: Command data struct pointer
1461 * @flag: Command flag
1462 * @argc: Command-line argument count
1463 * @argv: Array of command-line arguments
1464 *
1465 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1466 * on error.
1467 */
54841ab5 1468static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
bb99ad6d
BW
1469{
1470 int speed, ret=0;
1471
e857a5bd
TT
1472 if (argc == 1)
1473 /* querying current speed */
bb99ad6d 1474 printf("Current bus speed=%d\n", i2c_get_bus_speed());
e857a5bd 1475 else {
bb99ad6d
BW
1476 speed = simple_strtoul(argv[1], NULL, 10);
1477 printf("Setting bus speed to %d Hz\n", speed);
1478 ret = i2c_set_bus_speed(speed);
e857a5bd 1479 if (ret)
bb99ad6d 1480 printf("Failure changing bus speed (%d)\n", ret);
bb99ad6d
BW
1481 }
1482 return ret;
1483}
1484
06afa388
MV
1485/**
1486 * do_i2c_mm() - Handle the "i2c mm" command-line command
1487 * @cmdtp: Command data struct pointer
1488 * @flag: Command flag
1489 * @argc: Command-line argument count
1490 * @argv: Array of command-line arguments
1491 *
1492 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1493 * on error.
1494 */
54841ab5 1495static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
bb99ad6d 1496{
bfc3b77e
FM
1497 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
1498}
1499
06afa388
MV
1500/**
1501 * do_i2c_nm() - Handle the "i2c nm" command-line command
1502 * @cmdtp: Command data struct pointer
1503 * @flag: Command flag
1504 * @argc: Command-line argument count
1505 * @argv: Array of command-line arguments
1506 *
1507 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1508 * on error.
1509 */
54841ab5 1510static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
bfc3b77e
FM
1511{
1512 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
1513}
e96ad5d3 1514
06afa388
MV
1515/**
1516 * do_i2c_reset() - Handle the "i2c reset" command-line command
1517 * @cmdtp: Command data struct pointer
1518 * @flag: Command flag
1519 * @argc: Command-line argument count
1520 * @argv: Array of command-line arguments
1521 *
1522 * Returns zero always.
1523 */
54841ab5 1524static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
bfc3b77e 1525{
3f4978c7
HS
1526#if defined(CONFIG_SYS_I2C)
1527 i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
1528#else
bfc3b77e 1529 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
3f4978c7 1530#endif
bfc3b77e
FM
1531 return 0;
1532}
1533
1534static cmd_tbl_t cmd_i2c_sub[] = {
3f4978c7
HS
1535#if defined(CONFIG_SYS_I2C)
1536 U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
9a2accb4 1537#endif
bfc3b77e 1538 U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
3f4978c7
HS
1539#if defined(CONFIG_SYS_I2C) || \
1540 defined(CONFIG_I2C_MULTI_BUS)
bfc3b77e 1541 U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
bb99ad6d 1542#endif /* CONFIG_I2C_MULTI_BUS */
735987c5
TWHT
1543#if defined(CONFIG_I2C_EDID)
1544 U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""),
1545#endif /* CONFIG_I2C_EDID */
bfc3b77e
FM
1546 U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
1547 U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
1548 U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
1549 U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
1550 U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
1551 U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
652e5354 1552 U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
ff5d2dce 1553 U_BOOT_CMD_MKENT(write, 5, 0, do_i2c_write, "", ""),
bfc3b77e 1554 U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
c76fe474 1555#if defined(CONFIG_CMD_SDRAM)
bfc3b77e 1556 U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
90253178 1557#endif
bfc3b77e
FM
1558 U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
1559};
1560
2e5167cc 1561#ifdef CONFIG_NEEDS_MANUAL_RELOC
f1d2b313
HS
1562void i2c_reloc(void) {
1563 fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub));
1564}
1565#endif
1566
06afa388
MV
1567/**
1568 * do_i2c() - Handle the "i2c" command-line command
1569 * @cmdtp: Command data struct pointer
1570 * @flag: Command flag
1571 * @argc: Command-line argument count
1572 * @argv: Array of command-line arguments
1573 *
1574 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1575 * on error.
1576 */
54841ab5 1577static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
bfc3b77e
FM
1578{
1579 cmd_tbl_t *c;
1580
4444b221 1581 if (argc < 2)
4c12eeb8 1582 return CMD_RET_USAGE;
4444b221 1583
bfc3b77e
FM
1584 /* Strip off leading 'i2c' command argument */
1585 argc--;
1586 argv++;
1587
1588 c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
1589
47e26b1b 1590 if (c)
4c12eeb8 1591 return c->cmd(cmdtp, flag, argc, argv);
47e26b1b 1592 else
4c12eeb8 1593 return CMD_RET_USAGE;
bb99ad6d 1594}
8bde7f77
WD
1595
1596/***************************************************/
088f1b19
KP
1597#ifdef CONFIG_SYS_LONGHELP
1598static char i2c_help_text[] =
3f4978c7
HS
1599#if defined(CONFIG_SYS_I2C)
1600 "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
9a2accb4 1601#endif
fb0070e9 1602 "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
3f4978c7
HS
1603#if defined(CONFIG_SYS_I2C) || \
1604 defined(CONFIG_I2C_MULTI_BUS)
9bc2e4ee 1605 "i2c dev [dev] - show or set current I2C bus\n"
d9fc7032 1606#endif /* CONFIG_I2C_MULTI_BUS */
735987c5
TWHT
1607#if defined(CONFIG_I2C_EDID)
1608 "i2c edid chip - print EDID configuration information\n"
1609#endif /* CONFIG_I2C_EDID */
fb0070e9 1610 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
d9fc7032
MF
1611 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1612 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1613 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1614 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
54b99e51 1615 "i2c probe [address] - test for and show device(s) on the I2C bus\n"
652e5354 1616 "i2c read chip address[.0, .1, .2] length memaddress - read to memory \n"
ff5d2dce 1617 "i2c write memaddress chip address[.0, .1, .2] length - write memory to i2c\n"
e43a27c4 1618 "i2c reset - re-init the I2C Controller\n"
c76fe474 1619#if defined(CONFIG_CMD_SDRAM)
fb0070e9 1620 "i2c sdram chip - print SDRAM configuration information\n"
90253178 1621#endif
088f1b19
KP
1622 "i2c speed [speed] - show or set I2C bus speed";
1623#endif
1624
1625U_BOOT_CMD(
1626 i2c, 6, 1, do_i2c,
1627 "I2C sub-system",
1628 i2c_help_text
d9fc7032 1629);