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81a8824f 1/*
3f4978c7
HS
2 * (C) Copyright 2009
3 * Sergey Kubushyn, himself, ksi@koi8.net
4 *
5 * Changes for unified multibus/multiadapter I2C support.
6 *
81a8824f
WD
7 * (C) Copyright 2001
8 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
9 *
1a459660 10 * SPDX-License-Identifier: GPL-2.0+
81a8824f
WD
11 */
12
13/*
14 * I2C Functions similar to the standard memory functions.
15 *
16 * There are several parameters in many of the commands that bear further
17 * explanations:
18 *
81a8824f
WD
19 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
20 * Each I2C chip on the bus has a unique address. On the I2C data bus,
21 * the address is the upper seven bits and the LSB is the "read/write"
22 * bit. Note that the {i2c_chip} address specified on the command
23 * line is not shifted up: e.g. a typical EEPROM memory chip may have
24 * an I2C address of 0x50, but the data put on the bus will be 0xA0
25 * for write and 0xA1 for read. This "non shifted" address notation
26 * matches at least half of the data sheets :-/.
27 *
28 * {addr} is the address (or offset) within the chip. Small memory
29 * chips have 8 bit addresses. Large memory chips have 16 bit
30 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
31 * Many non-memory chips have multiple registers and {addr} is used
32 * as the register index. Some non-memory chips have only one register
33 * and therefore don't need any {addr} parameter.
34 *
35 * The default {addr} parameter is one byte (.1) which works well for
36 * memories and registers with 8 bits of address space.
37 *
38 * You can specify the length of the {addr} field with the optional .0,
39 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
40 * manipulating a single register device which doesn't use an address
41 * field, use "0.0" for the address and the ".0" length field will
42 * suppress the address in the I2C data stream. This also works for
43 * successive reads using the I2C auto-incrementing memory pointer.
44 *
45 * If you are manipulating a large memory with 2-byte addresses, use
46 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
47 *
48 * Then there are the unfortunate memory chips that spill the most
49 * significant 1, 2, or 3 bits of address into the chip address byte.
50 * This effectively makes one chip (logically) look like 2, 4, or
51 * 8 chips. This is handled (awkwardly) by #defining
6d0f6bcf 52 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
81a8824f
WD
53 * {addr} field (since .1 is the default, it doesn't actually have to
54 * be specified). Examples: given a memory chip at I2C chip address
55 * 0x50, the following would happen...
0f89c54b 56 * i2c md 50 0 10 display 16 bytes starting at 0x000
81a8824f 57 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
0f89c54b 58 * i2c md 50 100 10 display 16 bytes starting at 0x100
81a8824f 59 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
0f89c54b 60 * i2c md 50 210 10 display 16 bytes starting at 0x210
81a8824f
WD
61 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
62 * This is awfully ugly. It would be nice if someone would think up
63 * a better way of handling this.
64 *
65 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
66 */
67
68#include <common.h>
0098e179 69#include <bootretry.h>
18d66533 70#include <cli.h>
81a8824f 71#include <command.h>
735987c5 72#include <edid.h>
67b23a32 73#include <environment.h>
81a8824f 74#include <i2c.h>
67b23a32 75#include <malloc.h>
81a8824f 76#include <asm/byteorder.h>
2515d843 77#include <linux/compiler.h>
81a8824f 78
3f4978c7
HS
79DECLARE_GLOBAL_DATA_PTR;
80
81a8824f
WD
81/* Display values from last command.
82 * Memory modify remembered values are different from display memory.
83 */
84static uchar i2c_dp_last_chip;
85static uint i2c_dp_last_addr;
86static uint i2c_dp_last_alen;
87static uint i2c_dp_last_length = 0x10;
88
89static uchar i2c_mm_last_chip;
90static uint i2c_mm_last_addr;
91static uint i2c_mm_last_alen;
92
bb99ad6d
BW
93/* If only one I2C bus is present, the list of devices to ignore when
94 * the probe command is issued is represented by a 1D array of addresses.
95 * When multiple buses are present, the list is an array of bus-address
96 * pairs. The following macros take care of this */
97
6d0f6bcf 98#if defined(CONFIG_SYS_I2C_NOPROBES)
9a2accb4 99#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
bb99ad6d
BW
100static struct
101{
102 uchar bus;
103 uchar addr;
6d0f6bcf 104} i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
bb99ad6d
BW
105#define GET_BUS_NUM i2c_get_bus_num()
106#define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
107#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
108#define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
109#else /* single bus */
6d0f6bcf 110static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
bb99ad6d
BW
111#define GET_BUS_NUM 0
112#define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
113#define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
114#define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
3f4978c7 115#endif /* defined(CONFIG_SYS_I2C) */
67b23a32
HS
116#endif
117
a266fe95
FM
118#define DISP_LINE_LEN 16
119
06afa388
MV
120/**
121 * i2c_init_board() - Board-specific I2C bus init
122 *
123 * This function is the default no-op implementation of I2C bus
124 * initialization. This function can be overriden by board-specific
125 * implementation if needed.
126 */
2515d843
MV
127__weak
128void i2c_init_board(void)
c649dda5 129{
c649dda5 130}
c649dda5 131
655b34a7 132/* TODO: Implement architecture-specific get/set functions */
06afa388
MV
133
134/**
135 * i2c_get_bus_speed() - Return I2C bus speed
136 *
137 * This function is the default implementation of function for retrieveing
138 * the current I2C bus speed in Hz.
139 *
140 * A driver implementing runtime switching of I2C bus speed must override
141 * this function to report the speed correctly. Simple or legacy drivers
142 * can use this fallback.
143 *
144 * Returns I2C bus speed in Hz.
145 */
3f4978c7
HS
146#if !defined(CONFIG_SYS_I2C)
147/*
148 * TODO: Implement architecture-specific get/set functions
149 * Should go away, if we switched completely to new multibus support
150 */
2515d843
MV
151__weak
152unsigned int i2c_get_bus_speed(void)
655b34a7
PT
153{
154 return CONFIG_SYS_I2C_SPEED;
155}
655b34a7 156
06afa388
MV
157/**
158 * i2c_set_bus_speed() - Configure I2C bus speed
159 * @speed: Newly set speed of the I2C bus in Hz
160 *
161 * This function is the default implementation of function for setting
162 * the I2C bus speed in Hz.
163 *
164 * A driver implementing runtime switching of I2C bus speed must override
165 * this function to report the speed correctly. Simple or legacy drivers
166 * can use this fallback.
167 *
168 * Returns zero on success, negative value on error.
169 */
2515d843
MV
170__weak
171int i2c_set_bus_speed(unsigned int speed)
655b34a7
PT
172{
173 if (speed != CONFIG_SYS_I2C_SPEED)
174 return -1;
175
176 return 0;
177}
3f4978c7 178#endif
655b34a7 179
06afa388
MV
180/**
181 * get_alen() - Small parser helper function to get address length
182 *
183 * Returns the address length.
2c0dc990
FM
184 */
185static uint get_alen(char *arg)
186{
187 int j;
188 int alen;
189
190 alen = 1;
191 for (j = 0; j < 8; j++) {
192 if (arg[j] == '.') {
193 alen = arg[j+1] - '0';
2c0dc990
FM
194 break;
195 } else if (arg[j] == '\0')
196 break;
197 }
198 return alen;
199}
200
06afa388
MV
201/**
202 * do_i2c_read() - Handle the "i2c read" command-line command
203 * @cmdtp: Command data struct pointer
204 * @flag: Command flag
205 * @argc: Command-line argument count
206 * @argv: Array of command-line arguments
207 *
208 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
209 * on error.
210 *
652e5354
FM
211 * Syntax:
212 * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
213 */
54841ab5 214static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
652e5354
FM
215{
216 u_char chip;
217 uint devaddr, alen, length;
218 u_char *memaddr;
652e5354 219
47e26b1b 220 if (argc != 5)
4c12eeb8 221 return CMD_RET_USAGE;
652e5354
FM
222
223 /*
224 * I2C chip address
225 */
226 chip = simple_strtoul(argv[1], NULL, 16);
227
228 /*
229 * I2C data address within the chip. This can be 1 or
230 * 2 bytes long. Some day it might be 3 bytes long :-).
231 */
232 devaddr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 233 alen = get_alen(argv[2]);
7a92e53c 234 if (alen > 3)
4c12eeb8 235 return CMD_RET_USAGE;
652e5354
FM
236
237 /*
238 * Length is the number of objects, not number of bytes.
239 */
240 length = simple_strtoul(argv[3], NULL, 16);
241
242 /*
243 * memaddr is the address where to store things in memory
244 */
245 memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16);
246
247 if (i2c_read(chip, devaddr, alen, memaddr, length) != 0) {
248 puts ("Error reading the chip.\n");
249 return 1;
250 }
251 return 0;
252}
253
ff5d2dce
YS
254static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
255{
256 u_char chip;
257 uint devaddr, alen, length;
258 u_char *memaddr;
259
260 if (argc != 5)
261 return cmd_usage(cmdtp);
262
263 /*
264 * memaddr is the address where to store things in memory
265 */
266 memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16);
267
268 /*
269 * I2C chip address
270 */
271 chip = simple_strtoul(argv[2], NULL, 16);
272
273 /*
274 * I2C data address within the chip. This can be 1 or
275 * 2 bytes long. Some day it might be 3 bytes long :-).
276 */
277 devaddr = simple_strtoul(argv[3], NULL, 16);
278 alen = get_alen(argv[3]);
279 if (alen > 3)
280 return cmd_usage(cmdtp);
281
282 /*
283 * Length is the number of objects, not number of bytes.
284 */
285 length = simple_strtoul(argv[4], NULL, 16);
286
287 while (length-- > 0) {
288 if (i2c_write(chip, devaddr++, alen, memaddr++, 1) != 0) {
289 puts("Error writing to the chip.\n");
290 return 1;
291 }
292/*
293 * No write delay with FRAM devices.
294 */
295#if !defined(CONFIG_SYS_I2C_FRAM)
296 udelay(11000);
297#endif
298 }
299 return 0;
300}
301
06afa388
MV
302/**
303 * do_i2c_md() - Handle the "i2c md" command-line command
304 * @cmdtp: Command data struct pointer
305 * @flag: Command flag
306 * @argc: Command-line argument count
307 * @argv: Array of command-line arguments
308 *
309 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
310 * on error.
311 *
4a8cf338
FM
312 * Syntax:
313 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
314 */
54841ab5 315static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
81a8824f
WD
316{
317 u_char chip;
318 uint addr, alen, length;
319 int j, nbytes, linebytes;
320
321 /* We use the last specified parameters, unless new ones are
322 * entered.
323 */
324 chip = i2c_dp_last_chip;
325 addr = i2c_dp_last_addr;
326 alen = i2c_dp_last_alen;
327 length = i2c_dp_last_length;
328
47e26b1b 329 if (argc < 3)
4c12eeb8 330 return CMD_RET_USAGE;
81a8824f
WD
331
332 if ((flag & CMD_FLAG_REPEAT) == 0) {
333 /*
334 * New command specified.
335 */
81a8824f
WD
336
337 /*
338 * I2C chip address
339 */
340 chip = simple_strtoul(argv[1], NULL, 16);
341
342 /*
343 * I2C data address within the chip. This can be 1 or
344 * 2 bytes long. Some day it might be 3 bytes long :-).
345 */
346 addr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 347 alen = get_alen(argv[2]);
7a92e53c 348 if (alen > 3)
4c12eeb8 349 return CMD_RET_USAGE;
81a8824f
WD
350
351 /*
352 * If another parameter, it is the length to display.
353 * Length is the number of objects, not number of bytes.
354 */
355 if (argc > 3)
356 length = simple_strtoul(argv[3], NULL, 16);
357 }
358
359 /*
360 * Print the lines.
361 *
362 * We buffer all read data, so we can make sure data is read only
363 * once.
364 */
365 nbytes = length;
366 do {
367 unsigned char linebuf[DISP_LINE_LEN];
368 unsigned char *cp;
369
370 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
371
e857a5bd 372 if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
4b9206ed 373 puts ("Error reading the chip.\n");
e857a5bd 374 else {
81a8824f
WD
375 printf("%04x:", addr);
376 cp = linebuf;
377 for (j=0; j<linebytes; j++) {
378 printf(" %02x", *cp++);
379 addr++;
380 }
4b9206ed 381 puts (" ");
81a8824f
WD
382 cp = linebuf;
383 for (j=0; j<linebytes; j++) {
384 if ((*cp < 0x20) || (*cp > 0x7e))
4b9206ed 385 puts (".");
81a8824f
WD
386 else
387 printf("%c", *cp);
388 cp++;
389 }
4b9206ed 390 putc ('\n');
81a8824f
WD
391 }
392 nbytes -= linebytes;
393 } while (nbytes > 0);
394
395 i2c_dp_last_chip = chip;
396 i2c_dp_last_addr = addr;
397 i2c_dp_last_alen = alen;
398 i2c_dp_last_length = length;
399
400 return 0;
401}
402
06afa388
MV
403/**
404 * do_i2c_mw() - Handle the "i2c mw" command-line command
405 * @cmdtp: Command data struct pointer
406 * @flag: Command flag
407 * @argc: Command-line argument count
408 * @argv: Array of command-line arguments
409 *
410 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
411 * on error.
81a8824f
WD
412 *
413 * Syntax:
0f89c54b 414 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
81a8824f 415 */
54841ab5 416static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
81a8824f
WD
417{
418 uchar chip;
419 ulong addr;
420 uint alen;
421 uchar byte;
422 int count;
81a8824f 423
47e26b1b 424 if ((argc < 4) || (argc > 5))
4c12eeb8 425 return CMD_RET_USAGE;
81a8824f
WD
426
427 /*
53677ef1
WD
428 * Chip is always specified.
429 */
81a8824f
WD
430 chip = simple_strtoul(argv[1], NULL, 16);
431
432 /*
433 * Address is always specified.
434 */
435 addr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 436 alen = get_alen(argv[2]);
7a92e53c 437 if (alen > 3)
4c12eeb8 438 return CMD_RET_USAGE;
81a8824f
WD
439
440 /*
441 * Value to write is always specified.
442 */
443 byte = simple_strtoul(argv[3], NULL, 16);
444
445 /*
446 * Optional count
447 */
e857a5bd 448 if (argc == 5)
81a8824f 449 count = simple_strtoul(argv[4], NULL, 16);
e857a5bd 450 else
81a8824f 451 count = 1;
81a8824f
WD
452
453 while (count-- > 0) {
e857a5bd 454 if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
4b9206ed 455 puts ("Error writing the chip.\n");
81a8824f
WD
456 /*
457 * Wait for the write to complete. The write can take
458 * up to 10mSec (we allow a little more time).
81a8824f 459 */
d4f5c728 460/*
461 * No write delay with FRAM devices.
462 */
6d0f6bcf 463#if !defined(CONFIG_SYS_I2C_FRAM)
81a8824f 464 udelay(11000);
d4f5c728 465#endif
81a8824f
WD
466 }
467
06afa388 468 return 0;
81a8824f
WD
469}
470
06afa388
MV
471/**
472 * do_i2c_crc() - Handle the "i2c crc32" command-line command
473 * @cmdtp: Command data struct pointer
474 * @flag: Command flag
475 * @argc: Command-line argument count
476 * @argv: Array of command-line arguments
477 *
478 * Calculate a CRC on memory
479 *
480 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
481 * on error.
81a8824f
WD
482 *
483 * Syntax:
0f89c54b 484 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
81a8824f 485 */
54841ab5 486static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
81a8824f
WD
487{
488 uchar chip;
489 ulong addr;
490 uint alen;
491 int count;
492 uchar byte;
493 ulong crc;
494 ulong err;
81a8824f 495
47e26b1b 496 if (argc < 4)
4c12eeb8 497 return CMD_RET_USAGE;
81a8824f
WD
498
499 /*
53677ef1
WD
500 * Chip is always specified.
501 */
81a8824f
WD
502 chip = simple_strtoul(argv[1], NULL, 16);
503
504 /*
505 * Address is always specified.
506 */
507 addr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 508 alen = get_alen(argv[2]);
7a92e53c 509 if (alen > 3)
4c12eeb8 510 return CMD_RET_USAGE;
81a8824f
WD
511
512 /*
513 * Count is always specified
514 */
515 count = simple_strtoul(argv[3], NULL, 16);
516
517 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
518 /*
519 * CRC a byte at a time. This is going to be slooow, but hey, the
520 * memories are small and slow too so hopefully nobody notices.
521 */
522 crc = 0;
523 err = 0;
e857a5bd
TT
524 while (count-- > 0) {
525 if (i2c_read(chip, addr, alen, &byte, 1) != 0)
81a8824f 526 err++;
81a8824f
WD
527 crc = crc32 (crc, &byte, 1);
528 addr++;
529 }
e857a5bd 530 if (err > 0)
4b9206ed 531 puts ("Error reading the chip,\n");
e857a5bd 532 else
81a8824f 533 printf ("%08lx\n", crc);
81a8824f
WD
534
535 return 0;
536}
537
06afa388
MV
538/**
539 * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command
540 * @cmdtp: Command data struct pointer
541 * @flag: Command flag
542 * @argc: Command-line argument count
543 * @argv: Array of command-line arguments
544 *
545 * Modify memory.
546 *
547 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
548 * on error.
81a8824f
WD
549 *
550 * Syntax:
0f89c54b
PT
551 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
552 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
81a8824f 553 */
81a8824f 554static int
54841ab5 555mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
81a8824f
WD
556{
557 uchar chip;
558 ulong addr;
559 uint alen;
560 ulong data;
561 int size = 1;
562 int nbytes;
81a8824f 563
47e26b1b 564 if (argc != 3)
4c12eeb8 565 return CMD_RET_USAGE;
81a8824f 566
b26440f1 567 bootretry_reset_cmd_timeout(); /* got a good command to get here */
81a8824f
WD
568 /*
569 * We use the last specified parameters, unless new ones are
570 * entered.
571 */
572 chip = i2c_mm_last_chip;
573 addr = i2c_mm_last_addr;
574 alen = i2c_mm_last_alen;
575
576 if ((flag & CMD_FLAG_REPEAT) == 0) {
577 /*
578 * New command specified. Check for a size specification.
579 * Defaults to byte if no or incorrect specification.
580 */
581 size = cmd_get_data_size(argv[0], 1);
582
583 /*
53677ef1
WD
584 * Chip is always specified.
585 */
81a8824f
WD
586 chip = simple_strtoul(argv[1], NULL, 16);
587
588 /*
589 * Address is always specified.
590 */
591 addr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 592 alen = get_alen(argv[2]);
7a92e53c 593 if (alen > 3)
4c12eeb8 594 return CMD_RET_USAGE;
81a8824f
WD
595 }
596
597 /*
598 * Print the address, followed by value. Then accept input for
599 * the next value. A non-converted value exits.
600 */
601 do {
602 printf("%08lx:", addr);
e857a5bd 603 if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0)
4b9206ed 604 puts ("\nError reading the chip,\n");
e857a5bd 605 else {
81a8824f 606 data = cpu_to_be32(data);
e857a5bd 607 if (size == 1)
81a8824f 608 printf(" %02lx", (data >> 24) & 0x000000FF);
e857a5bd 609 else if (size == 2)
81a8824f 610 printf(" %04lx", (data >> 16) & 0x0000FFFF);
e857a5bd 611 else
81a8824f 612 printf(" %08lx", data);
81a8824f
WD
613 }
614
e1bf824d 615 nbytes = cli_readline(" ? ");
81a8824f
WD
616 if (nbytes == 0) {
617 /*
618 * <CR> pressed as only input, don't modify current
619 * location and move to next.
620 */
621 if (incrflag)
622 addr += size;
623 nbytes = size;
b26440f1
SG
624 /* good enough to not time out */
625 bootretry_reset_cmd_timeout();
81a8824f
WD
626 }
627#ifdef CONFIG_BOOT_RETRY_TIME
e857a5bd 628 else if (nbytes == -2)
81a8824f 629 break; /* timed out, exit the command */
81a8824f
WD
630#endif
631 else {
632 char *endp;
633
634 data = simple_strtoul(console_buffer, &endp, 16);
e857a5bd 635 if (size == 1)
81a8824f 636 data = data << 24;
e857a5bd 637 else if (size == 2)
81a8824f 638 data = data << 16;
81a8824f
WD
639 data = be32_to_cpu(data);
640 nbytes = endp - console_buffer;
641 if (nbytes) {
81a8824f
WD
642 /*
643 * good enough to not time out
644 */
b26440f1 645 bootretry_reset_cmd_timeout();
e857a5bd 646 if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0)
4b9206ed 647 puts ("Error writing the chip.\n");
6d0f6bcf
JCPV
648#ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
649 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
2535d602 650#endif
81a8824f
WD
651 if (incrflag)
652 addr += size;
653 }
654 }
655 } while (nbytes);
656
0800707b
PT
657 i2c_mm_last_chip = chip;
658 i2c_mm_last_addr = addr;
659 i2c_mm_last_alen = alen;
81a8824f
WD
660
661 return 0;
662}
663
06afa388
MV
664/**
665 * do_i2c_probe() - Handle the "i2c probe" command-line command
666 * @cmdtp: Command data struct pointer
667 * @flag: Command flag
668 * @argc: Command-line argument count
669 * @argv: Array of command-line arguments
670 *
671 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
672 * on error.
673 *
81a8824f 674 * Syntax:
54b99e51
EN
675 * i2c probe {addr}
676 *
677 * Returns zero (success) if one or more I2C devices was found
81a8824f 678 */
54841ab5 679static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
81a8824f
WD
680{
681 int j;
54b99e51
EN
682 int addr = -1;
683 int found = 0;
6d0f6bcf 684#if defined(CONFIG_SYS_I2C_NOPROBES)
81a8824f 685 int k, skip;
3f4978c7 686 unsigned int bus = GET_BUS_NUM;
bb99ad6d 687#endif /* NOPROBES */
81a8824f 688
54b99e51
EN
689 if (argc == 2)
690 addr = simple_strtol(argv[1], 0, 16);
691
4b9206ed 692 puts ("Valid chip addresses:");
e857a5bd 693 for (j = 0; j < 128; j++) {
54b99e51
EN
694 if ((0 <= addr) && (j != addr))
695 continue;
696
6d0f6bcf 697#if defined(CONFIG_SYS_I2C_NOPROBES)
81a8824f 698 skip = 0;
cfb25cc4 699 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
e857a5bd 700 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
81a8824f
WD
701 skip = 1;
702 break;
703 }
704 }
705 if (skip)
706 continue;
707#endif
54b99e51 708 if (i2c_probe(j) == 0) {
81a8824f 709 printf(" %02X", j);
54b99e51
EN
710 found++;
711 }
81a8824f 712 }
4b9206ed 713 putc ('\n');
81a8824f 714
6d0f6bcf 715#if defined(CONFIG_SYS_I2C_NOPROBES)
81a8824f 716 puts ("Excluded chip addresses:");
cfb25cc4 717 for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
e857a5bd 718 if (COMPARE_BUS(bus,k))
bb99ad6d
BW
719 printf(" %02X", NO_PROBE_ADDR(k));
720 }
4b9206ed 721 putc ('\n');
81a8824f
WD
722#endif
723
54b99e51 724 return (0 == found);
81a8824f
WD
725}
726
06afa388
MV
727/**
728 * do_i2c_loop() - Handle the "i2c loop" command-line command
729 * @cmdtp: Command data struct pointer
730 * @flag: Command flag
731 * @argc: Command-line argument count
732 * @argv: Array of command-line arguments
733 *
734 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
735 * on error.
736 *
81a8824f 737 * Syntax:
0f89c54b 738 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
81a8824f
WD
739 * {length} - Number of bytes to read
740 * {delay} - A DECIMAL number and defaults to 1000 uSec
741 */
54841ab5 742static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
81a8824f
WD
743{
744 u_char chip;
745 ulong alen;
746 uint addr;
747 uint length;
748 u_char bytes[16];
749 int delay;
81a8824f 750
47e26b1b 751 if (argc < 3)
4c12eeb8 752 return CMD_RET_USAGE;
81a8824f
WD
753
754 /*
755 * Chip is always specified.
756 */
757 chip = simple_strtoul(argv[1], NULL, 16);
758
759 /*
760 * Address is always specified.
761 */
762 addr = simple_strtoul(argv[2], NULL, 16);
2c0dc990 763 alen = get_alen(argv[2]);
7a92e53c 764 if (alen > 3)
4c12eeb8 765 return CMD_RET_USAGE;
81a8824f
WD
766
767 /*
768 * Length is the number of objects, not number of bytes.
769 */
770 length = 1;
771 length = simple_strtoul(argv[3], NULL, 16);
e857a5bd 772 if (length > sizeof(bytes))
81a8824f 773 length = sizeof(bytes);
81a8824f
WD
774
775 /*
776 * The delay time (uSec) is optional.
777 */
778 delay = 1000;
e857a5bd 779 if (argc > 3)
81a8824f 780 delay = simple_strtoul(argv[4], NULL, 10);
81a8824f
WD
781 /*
782 * Run the loop...
783 */
e857a5bd
TT
784 while (1) {
785 if (i2c_read(chip, addr, alen, bytes, length) != 0)
4b9206ed 786 puts ("Error reading the chip.\n");
81a8824f
WD
787 udelay(delay);
788 }
789
790 /* NOTREACHED */
791 return 0;
792}
793
81a8824f
WD
794/*
795 * The SDRAM command is separately configured because many
796 * (most?) embedded boards don't use SDRAM DIMMs.
06afa388
MV
797 *
798 * FIXME: Document and probably move elsewhere!
81a8824f 799 */
c76fe474 800#if defined(CONFIG_CMD_SDRAM)
632de067
LJ
801static void print_ddr2_tcyc (u_char const b)
802{
803 printf ("%d.", (b >> 4) & 0x0F);
804 switch (b & 0x0F) {
805 case 0x0:
806 case 0x1:
807 case 0x2:
808 case 0x3:
809 case 0x4:
810 case 0x5:
811 case 0x6:
812 case 0x7:
813 case 0x8:
814 case 0x9:
815 printf ("%d ns\n", b & 0x0F);
816 break;
817 case 0xA:
818 puts ("25 ns\n");
819 break;
820 case 0xB:
821 puts ("33 ns\n");
822 break;
823 case 0xC:
824 puts ("66 ns\n");
825 break;
826 case 0xD:
827 puts ("75 ns\n");
828 break;
829 default:
830 puts ("?? ns\n");
831 break;
832 }
833}
834
835static void decode_bits (u_char const b, char const *str[], int const do_once)
836{
837 u_char mask;
838
839 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
840 if (b & mask) {
841 puts (*str);
842 if (do_once)
843 return;
844 }
845 }
846}
81a8824f
WD
847
848/*
849 * Syntax:
0f89c54b 850 * i2c sdram {i2c_chip}
81a8824f 851 */
54841ab5 852static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
81a8824f 853{
632de067
LJ
854 enum { unknown, EDO, SDRAM, DDR2 } type;
855
81a8824f
WD
856 u_char chip;
857 u_char data[128];
858 u_char cksum;
859 int j;
860
632de067
LJ
861 static const char *decode_CAS_DDR2[] = {
862 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
863 };
864
865 static const char *decode_CAS_default[] = {
866 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
867 };
868
869 static const char *decode_CS_WE_default[] = {
870 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
871 };
872
873 static const char *decode_byte21_default[] = {
874 " TBD (bit 7)\n",
875 " Redundant row address\n",
876 " Differential clock input\n",
877 " Registerd DQMB inputs\n",
878 " Buffered DQMB inputs\n",
879 " On-card PLL\n",
880 " Registered address/control lines\n",
881 " Buffered address/control lines\n"
882 };
883
884 static const char *decode_byte22_DDR2[] = {
885 " TBD (bit 7)\n",
886 " TBD (bit 6)\n",
887 " TBD (bit 5)\n",
888 " TBD (bit 4)\n",
889 " TBD (bit 3)\n",
890 " Supports partial array self refresh\n",
891 " Supports 50 ohm ODT\n",
892 " Supports weak driver\n"
893 };
894
895 static const char *decode_row_density_DDR2[] = {
896 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
897 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
898 };
899
900 static const char *decode_row_density_default[] = {
901 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
902 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
903 };
904
47e26b1b 905 if (argc < 2)
4c12eeb8 906 return CMD_RET_USAGE;
47e26b1b 907
81a8824f
WD
908 /*
909 * Chip is always specified.
632de067
LJ
910 */
911 chip = simple_strtoul (argv[1], NULL, 16);
81a8824f 912
632de067 913 if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
4b9206ed 914 puts ("No SDRAM Serial Presence Detect found.\n");
81a8824f
WD
915 return 1;
916 }
917
918 cksum = 0;
919 for (j = 0; j < 63; j++) {
920 cksum += data[j];
921 }
e857a5bd 922 if (cksum != data[63]) {
81a8824f 923 printf ("WARNING: Configuration data checksum failure:\n"
632de067 924 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
81a8824f 925 }
632de067 926 printf ("SPD data revision %d.%d\n",
81a8824f 927 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
632de067
LJ
928 printf ("Bytes used 0x%02X\n", data[0]);
929 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
930
4b9206ed 931 puts ("Memory type ");
632de067 932 switch (data[2]) {
0df6b844
LJ
933 case 2:
934 type = EDO;
935 puts ("EDO\n");
936 break;
937 case 4:
938 type = SDRAM;
939 puts ("SDRAM\n");
940 break;
941 case 8:
942 type = DDR2;
943 puts ("DDR2\n");
944 break;
945 default:
946 type = unknown;
947 puts ("unknown\n");
948 break;
81a8824f 949 }
632de067 950
4b9206ed 951 puts ("Row address bits ");
e857a5bd 952 if ((data[3] & 0x00F0) == 0)
632de067 953 printf ("%d\n", data[3] & 0x0F);
e857a5bd 954 else
632de067
LJ
955 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
956
4b9206ed 957 puts ("Column address bits ");
e857a5bd 958 if ((data[4] & 0x00F0) == 0)
632de067 959 printf ("%d\n", data[4] & 0x0F);
e857a5bd 960 else
632de067 961 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
0df6b844
LJ
962
963 switch (type) {
964 case DDR2:
632de067
LJ
965 printf ("Number of ranks %d\n",
966 (data[5] & 0x07) + 1);
0df6b844
LJ
967 break;
968 default:
632de067 969 printf ("Module rows %d\n", data[5]);
0df6b844
LJ
970 break;
971 }
972
973 switch (type) {
974 case DDR2:
632de067 975 printf ("Module data width %d bits\n", data[6]);
0df6b844
LJ
976 break;
977 default:
632de067
LJ
978 printf ("Module data width %d bits\n",
979 (data[7] << 8) | data[6]);
0df6b844
LJ
980 break;
981 }
982
4b9206ed 983 puts ("Interface signal levels ");
81a8824f 984 switch(data[8]) {
0df6b844 985 case 0: puts ("TTL 5.0 V\n"); break;
4b9206ed 986 case 1: puts ("LVTTL\n"); break;
0df6b844
LJ
987 case 2: puts ("HSTL 1.5 V\n"); break;
988 case 3: puts ("SSTL 3.3 V\n"); break;
989 case 4: puts ("SSTL 2.5 V\n"); break;
990 case 5: puts ("SSTL 1.8 V\n"); break;
4b9206ed 991 default: puts ("unknown\n"); break;
81a8824f 992 }
0df6b844
LJ
993
994 switch (type) {
995 case DDR2:
632de067
LJ
996 printf ("SDRAM cycle time ");
997 print_ddr2_tcyc (data[9]);
0df6b844
LJ
998 break;
999 default:
632de067
LJ
1000 printf ("SDRAM cycle time %d.%d ns\n",
1001 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
0df6b844
LJ
1002 break;
1003 }
1004
1005 switch (type) {
1006 case DDR2:
632de067
LJ
1007 printf ("SDRAM access time 0.%d%d ns\n",
1008 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
0df6b844
LJ
1009 break;
1010 default:
632de067
LJ
1011 printf ("SDRAM access time %d.%d ns\n",
1012 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
0df6b844
LJ
1013 break;
1014 }
1015
4b9206ed 1016 puts ("EDC configuration ");
632de067 1017 switch (data[11]) {
4b9206ed
WD
1018 case 0: puts ("None\n"); break;
1019 case 1: puts ("Parity\n"); break;
1020 case 2: puts ("ECC\n"); break;
1021 default: puts ("unknown\n"); break;
81a8824f 1022 }
632de067 1023
e857a5bd 1024 if ((data[12] & 0x80) == 0)
4b9206ed 1025 puts ("No self refresh, rate ");
e857a5bd 1026 else
4b9206ed 1027 puts ("Self refresh, rate ");
632de067 1028
81a8824f 1029 switch(data[12] & 0x7F) {
632de067
LJ
1030 case 0: puts ("15.625 us\n"); break;
1031 case 1: puts ("3.9 us\n"); break;
1032 case 2: puts ("7.8 us\n"); break;
1033 case 3: puts ("31.3 us\n"); break;
1034 case 4: puts ("62.5 us\n"); break;
1035 case 5: puts ("125 us\n"); break;
4b9206ed 1036 default: puts ("unknown\n"); break;
81a8824f 1037 }
0df6b844
LJ
1038
1039 switch (type) {
1040 case DDR2:
632de067 1041 printf ("SDRAM width (primary) %d\n", data[13]);
0df6b844
LJ
1042 break;
1043 default:
632de067 1044 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
0df6b844 1045 if ((data[13] & 0x80) != 0) {
632de067
LJ
1046 printf (" (second bank) %d\n",
1047 2 * (data[13] & 0x7F));
0df6b844
LJ
1048 }
1049 break;
1050 }
1051
1052 switch (type) {
1053 case DDR2:
1054 if (data[14] != 0)
632de067 1055 printf ("EDC width %d\n", data[14]);
0df6b844
LJ
1056 break;
1057 default:
1058 if (data[14] != 0) {
632de067
LJ
1059 printf ("EDC width %d\n",
1060 data[14] & 0x7F);
0df6b844
LJ
1061
1062 if ((data[14] & 0x80) != 0) {
632de067
LJ
1063 printf (" (second bank) %d\n",
1064 2 * (data[14] & 0x7F));
0df6b844
LJ
1065 }
1066 }
1067 break;
81a8824f 1068 }
0df6b844 1069
632de067
LJ
1070 if (DDR2 != type) {
1071 printf ("Min clock delay, back-to-back random column addresses "
1072 "%d\n", data[15]);
0df6b844
LJ
1073 }
1074
4b9206ed
WD
1075 puts ("Burst length(s) ");
1076 if (data[16] & 0x80) puts (" Page");
1077 if (data[16] & 0x08) puts (" 8");
1078 if (data[16] & 0x04) puts (" 4");
1079 if (data[16] & 0x02) puts (" 2");
1080 if (data[16] & 0x01) puts (" 1");
1081 putc ('\n');
632de067 1082 printf ("Number of banks %d\n", data[17]);
0df6b844
LJ
1083
1084 switch (type) {
1085 case DDR2:
1086 puts ("CAS latency(s) ");
632de067 1087 decode_bits (data[18], decode_CAS_DDR2, 0);
0df6b844
LJ
1088 putc ('\n');
1089 break;
1090 default:
1091 puts ("CAS latency(s) ");
632de067 1092 decode_bits (data[18], decode_CAS_default, 0);
0df6b844
LJ
1093 putc ('\n');
1094 break;
1095 }
1096
1097 if (DDR2 != type) {
1098 puts ("CS latency(s) ");
632de067 1099 decode_bits (data[19], decode_CS_WE_default, 0);
0df6b844
LJ
1100 putc ('\n');
1101 }
1102
1103 if (DDR2 != type) {
1104 puts ("WE latency(s) ");
632de067 1105 decode_bits (data[20], decode_CS_WE_default, 0);
0df6b844
LJ
1106 putc ('\n');
1107 }
1108
1109 switch (type) {
1110 case DDR2:
1111 puts ("Module attributes:\n");
1112 if (data[21] & 0x80)
1113 puts (" TBD (bit 7)\n");
1114 if (data[21] & 0x40)
1115 puts (" Analysis probe installed\n");
1116 if (data[21] & 0x20)
1117 puts (" TBD (bit 5)\n");
1118 if (data[21] & 0x10)
1119 puts (" FET switch external enable\n");
632de067 1120 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
0df6b844 1121 if (data[20] & 0x11) {
632de067
LJ
1122 printf (" %d active registers on DIMM\n",
1123 (data[21] & 0x03) + 1);
0df6b844
LJ
1124 }
1125 break;
1126 default:
1127 puts ("Module attributes:\n");
1128 if (!data[21])
1129 puts (" (none)\n");
632de067
LJ
1130 else
1131 decode_bits (data[21], decode_byte21_default, 0);
0df6b844
LJ
1132 break;
1133 }
1134
1135 switch (type) {
1136 case DDR2:
632de067 1137 decode_bits (data[22], decode_byte22_DDR2, 0);
0df6b844
LJ
1138 break;
1139 default:
1140 puts ("Device attributes:\n");
1141 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
1142 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
1143 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1144 else puts (" Upper Vcc tolerance 10%\n");
1145 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1146 else puts (" Lower Vcc tolerance 10%\n");
1147 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1148 if (data[22] & 0x04) puts (" Supports precharge all\n");
1149 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1150 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1151 break;
1152 }
1153
1154 switch (type) {
1155 case DDR2:
632de067
LJ
1156 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1157 print_ddr2_tcyc (data[23]);
0df6b844
LJ
1158 break;
1159 default:
632de067
LJ
1160 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1161 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
0df6b844
LJ
1162 break;
1163 }
1164
1165 switch (type) {
1166 case DDR2:
632de067
LJ
1167 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1168 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
0df6b844
LJ
1169 break;
1170 default:
632de067
LJ
1171 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1172 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
0df6b844
LJ
1173 break;
1174 }
1175
1176 switch (type) {
1177 case DDR2:
632de067
LJ
1178 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1179 print_ddr2_tcyc (data[25]);
0df6b844
LJ
1180 break;
1181 default:
632de067
LJ
1182 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1183 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
0df6b844
LJ
1184 break;
1185 }
1186
1187 switch (type) {
1188 case DDR2:
632de067
LJ
1189 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1190 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
0df6b844
LJ
1191 break;
1192 default:
632de067
LJ
1193 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1194 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
0df6b844
LJ
1195 break;
1196 }
1197
1198 switch (type) {
1199 case DDR2:
632de067
LJ
1200 printf ("Minimum row precharge %d.%02d ns\n",
1201 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
0df6b844
LJ
1202 break;
1203 default:
632de067 1204 printf ("Minimum row precharge %d ns\n", data[27]);
0df6b844
LJ
1205 break;
1206 }
1207
1208 switch (type) {
1209 case DDR2:
632de067
LJ
1210 printf ("Row active to row active min %d.%02d ns\n",
1211 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
0df6b844
LJ
1212 break;
1213 default:
632de067 1214 printf ("Row active to row active min %d ns\n", data[28]);
0df6b844
LJ
1215 break;
1216 }
1217
1218 switch (type) {
1219 case DDR2:
632de067
LJ
1220 printf ("RAS to CAS delay min %d.%02d ns\n",
1221 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
0df6b844
LJ
1222 break;
1223 default:
632de067 1224 printf ("RAS to CAS delay min %d ns\n", data[29]);
0df6b844
LJ
1225 break;
1226 }
1227
632de067 1228 printf ("Minimum RAS pulse width %d ns\n", data[30]);
0df6b844
LJ
1229
1230 switch (type) {
1231 case DDR2:
632de067
LJ
1232 puts ("Density of each row ");
1233 decode_bits (data[31], decode_row_density_DDR2, 1);
1234 putc ('\n');
0df6b844
LJ
1235 break;
1236 default:
632de067
LJ
1237 puts ("Density of each row ");
1238 decode_bits (data[31], decode_row_density_default, 1);
1239 putc ('\n');
0df6b844
LJ
1240 break;
1241 }
1242
1243 switch (type) {
1244 case DDR2:
632de067 1245 puts ("Command and Address setup ");
0df6b844 1246 if (data[32] >= 0xA0) {
632de067
LJ
1247 printf ("1.%d%d ns\n",
1248 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
0df6b844 1249 } else {
632de067
LJ
1250 printf ("0.%d%d ns\n",
1251 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
0df6b844
LJ
1252 }
1253 break;
1254 default:
632de067
LJ
1255 printf ("Command and Address setup %c%d.%d ns\n",
1256 (data[32] & 0x80) ? '-' : '+',
1257 (data[32] >> 4) & 0x07, data[32] & 0x0F);
0df6b844
LJ
1258 break;
1259 }
1260
1261 switch (type) {
1262 case DDR2:
632de067 1263 puts ("Command and Address hold ");
0df6b844 1264 if (data[33] >= 0xA0) {
632de067
LJ
1265 printf ("1.%d%d ns\n",
1266 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
0df6b844 1267 } else {
632de067
LJ
1268 printf ("0.%d%d ns\n",
1269 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
0df6b844
LJ
1270 }
1271 break;
1272 default:
632de067
LJ
1273 printf ("Command and Address hold %c%d.%d ns\n",
1274 (data[33] & 0x80) ? '-' : '+',
1275 (data[33] >> 4) & 0x07, data[33] & 0x0F);
0df6b844
LJ
1276 break;
1277 }
1278
1279 switch (type) {
1280 case DDR2:
632de067
LJ
1281 printf ("Data signal input setup 0.%d%d ns\n",
1282 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
0df6b844
LJ
1283 break;
1284 default:
632de067
LJ
1285 printf ("Data signal input setup %c%d.%d ns\n",
1286 (data[34] & 0x80) ? '-' : '+',
1287 (data[34] >> 4) & 0x07, data[34] & 0x0F);
0df6b844
LJ
1288 break;
1289 }
1290
1291 switch (type) {
1292 case DDR2:
632de067
LJ
1293 printf ("Data signal input hold 0.%d%d ns\n",
1294 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
0df6b844
LJ
1295 break;
1296 default:
632de067
LJ
1297 printf ("Data signal input hold %c%d.%d ns\n",
1298 (data[35] & 0x80) ? '-' : '+',
1299 (data[35] >> 4) & 0x07, data[35] & 0x0F);
0df6b844
LJ
1300 break;
1301 }
1302
4b9206ed 1303 puts ("Manufacturer's JEDEC ID ");
e857a5bd 1304 for (j = 64; j <= 71; j++)
632de067 1305 printf ("%02X ", data[j]);
4b9206ed 1306 putc ('\n');
632de067 1307 printf ("Manufacturing Location %02X\n", data[72]);
4b9206ed 1308 puts ("Manufacturer's Part Number ");
e857a5bd 1309 for (j = 73; j <= 90; j++)
632de067 1310 printf ("%02X ", data[j]);
4b9206ed 1311 putc ('\n');
632de067
LJ
1312 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1313 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
4b9206ed 1314 puts ("Assembly Serial Number ");
e857a5bd 1315 for (j = 95; j <= 98; j++)
632de067 1316 printf ("%02X ", data[j]);
4b9206ed 1317 putc ('\n');
81a8824f 1318
0df6b844 1319 if (DDR2 != type) {
632de067
LJ
1320 printf ("Speed rating PC%d\n",
1321 data[126] == 0x66 ? 66 : data[126]);
0df6b844 1322 }
81a8824f
WD
1323 return 0;
1324}
90253178 1325#endif
81a8824f 1326
735987c5
TWHT
1327/*
1328 * Syntax:
1329 * i2c edid {i2c_chip}
1330 */
1331#if defined(CONFIG_I2C_EDID)
1332int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
1333{
1334 u_char chip;
1335 struct edid1_info edid;
1336
1337 if (argc < 2) {
1338 cmd_usage(cmdtp);
1339 return 1;
1340 }
1341
1342 chip = simple_strtoul(argv[1], NULL, 16);
1343 if (i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid)) != 0) {
1344 puts("Error reading EDID content.\n");
1345 return 1;
1346 }
1347
1348 if (edid_check_info(&edid)) {
1349 puts("Content isn't valid EDID.\n");
1350 return 1;
1351 }
1352
1353 edid_print_info(&edid);
1354 return 0;
1355
1356}
1357#endif /* CONFIG_I2C_EDID */
1358
06afa388 1359/**
3f4978c7 1360 * do_i2c_show_bus() - Handle the "i2c bus" command-line command
06afa388
MV
1361 * @cmdtp: Command data struct pointer
1362 * @flag: Command flag
1363 * @argc: Command-line argument count
1364 * @argv: Array of command-line arguments
1365 *
1366 * Returns zero always.
1367 */
3f4978c7 1368#if defined(CONFIG_SYS_I2C)
0e350f81
JH
1369static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc,
1370 char * const argv[])
67b23a32 1371{
3f4978c7
HS
1372 int i;
1373#ifndef CONFIG_SYS_I2C_DIRECT_BUS
1374 int j;
1375#endif
67b23a32
HS
1376
1377 if (argc == 1) {
1378 /* show all busses */
3f4978c7
HS
1379 for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) {
1380 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
1381#ifndef CONFIG_SYS_I2C_DIRECT_BUS
1382 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
1383 if (i2c_bus[i].next_hop[j].chip == 0)
1384 break;
1385 printf("->%s@0x%2x:%d",
1386 i2c_bus[i].next_hop[j].mux.name,
1387 i2c_bus[i].next_hop[j].chip,
1388 i2c_bus[i].next_hop[j].channel);
67b23a32 1389 }
3f4978c7
HS
1390#endif
1391 printf("\n");
67b23a32
HS
1392 }
1393 } else {
3f4978c7
HS
1394 /* show specific bus */
1395 i = simple_strtoul(argv[1], NULL, 10);
1396 if (i >= CONFIG_SYS_NUM_I2C_BUSES) {
1397 printf("Invalid bus %d\n", i);
1398 return -1;
1399 }
1400 printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
1401#ifndef CONFIG_SYS_I2C_DIRECT_BUS
1402 for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
1403 if (i2c_bus[i].next_hop[j].chip == 0)
1404 break;
1405 printf("->%s@0x%2x:%d",
1406 i2c_bus[i].next_hop[j].mux.name,
1407 i2c_bus[i].next_hop[j].chip,
1408 i2c_bus[i].next_hop[j].channel);
1409 }
1410#endif
1411 printf("\n");
67b23a32 1412 }
3f4978c7
HS
1413
1414 return 0;
67b23a32 1415}
3f4978c7 1416#endif
67b23a32 1417
06afa388
MV
1418/**
1419 * do_i2c_bus_num() - Handle the "i2c dev" command-line command
1420 * @cmdtp: Command data struct pointer
1421 * @flag: Command flag
1422 * @argc: Command-line argument count
1423 * @argv: Array of command-line arguments
1424 *
1425 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1426 * on error.
1427 */
3f4978c7 1428#if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
0e350f81
JH
1429static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc,
1430 char * const argv[])
bb99ad6d 1431{
3f4978c7
HS
1432 int ret = 0;
1433 unsigned int bus_no;
bb99ad6d 1434
e857a5bd
TT
1435 if (argc == 1)
1436 /* querying current setting */
bb99ad6d 1437 printf("Current bus is %d\n", i2c_get_bus_num());
e857a5bd 1438 else {
3f4978c7 1439 bus_no = simple_strtoul(argv[1], NULL, 10);
880a4127 1440#if defined(CONFIG_SYS_I2C)
3f4978c7
HS
1441 if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
1442 printf("Invalid bus %d\n", bus_no);
1443 return -1;
1444 }
880a4127 1445#endif
3f4978c7
HS
1446 printf("Setting bus to %d\n", bus_no);
1447 ret = i2c_set_bus_num(bus_no);
e857a5bd 1448 if (ret)
bb99ad6d 1449 printf("Failure changing bus number (%d)\n", ret);
bb99ad6d
BW
1450 }
1451 return ret;
1452}
3f4978c7 1453#endif /* defined(CONFIG_SYS_I2C) */
bb99ad6d 1454
06afa388
MV
1455/**
1456 * do_i2c_bus_speed() - Handle the "i2c speed" command-line command
1457 * @cmdtp: Command data struct pointer
1458 * @flag: Command flag
1459 * @argc: Command-line argument count
1460 * @argv: Array of command-line arguments
1461 *
1462 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1463 * on error.
1464 */
54841ab5 1465static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
bb99ad6d
BW
1466{
1467 int speed, ret=0;
1468
e857a5bd
TT
1469 if (argc == 1)
1470 /* querying current speed */
bb99ad6d 1471 printf("Current bus speed=%d\n", i2c_get_bus_speed());
e857a5bd 1472 else {
bb99ad6d
BW
1473 speed = simple_strtoul(argv[1], NULL, 10);
1474 printf("Setting bus speed to %d Hz\n", speed);
1475 ret = i2c_set_bus_speed(speed);
e857a5bd 1476 if (ret)
bb99ad6d 1477 printf("Failure changing bus speed (%d)\n", ret);
bb99ad6d
BW
1478 }
1479 return ret;
1480}
1481
06afa388
MV
1482/**
1483 * do_i2c_mm() - Handle the "i2c mm" command-line command
1484 * @cmdtp: Command data struct pointer
1485 * @flag: Command flag
1486 * @argc: Command-line argument count
1487 * @argv: Array of command-line arguments
1488 *
1489 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1490 * on error.
1491 */
54841ab5 1492static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
bb99ad6d 1493{
bfc3b77e
FM
1494 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
1495}
1496
06afa388
MV
1497/**
1498 * do_i2c_nm() - Handle the "i2c nm" command-line command
1499 * @cmdtp: Command data struct pointer
1500 * @flag: Command flag
1501 * @argc: Command-line argument count
1502 * @argv: Array of command-line arguments
1503 *
1504 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1505 * on error.
1506 */
54841ab5 1507static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
bfc3b77e
FM
1508{
1509 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
1510}
e96ad5d3 1511
06afa388
MV
1512/**
1513 * do_i2c_reset() - Handle the "i2c reset" command-line command
1514 * @cmdtp: Command data struct pointer
1515 * @flag: Command flag
1516 * @argc: Command-line argument count
1517 * @argv: Array of command-line arguments
1518 *
1519 * Returns zero always.
1520 */
54841ab5 1521static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
bfc3b77e 1522{
3f4978c7
HS
1523#if defined(CONFIG_SYS_I2C)
1524 i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
1525#else
bfc3b77e 1526 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
3f4978c7 1527#endif
bfc3b77e
FM
1528 return 0;
1529}
1530
1531static cmd_tbl_t cmd_i2c_sub[] = {
3f4978c7
HS
1532#if defined(CONFIG_SYS_I2C)
1533 U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
9a2accb4 1534#endif
bfc3b77e 1535 U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
3f4978c7
HS
1536#if defined(CONFIG_SYS_I2C) || \
1537 defined(CONFIG_I2C_MULTI_BUS)
bfc3b77e 1538 U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
bb99ad6d 1539#endif /* CONFIG_I2C_MULTI_BUS */
735987c5
TWHT
1540#if defined(CONFIG_I2C_EDID)
1541 U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""),
1542#endif /* CONFIG_I2C_EDID */
bfc3b77e
FM
1543 U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
1544 U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
1545 U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
1546 U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
1547 U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
1548 U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
652e5354 1549 U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
ff5d2dce 1550 U_BOOT_CMD_MKENT(write, 5, 0, do_i2c_write, "", ""),
bfc3b77e 1551 U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
c76fe474 1552#if defined(CONFIG_CMD_SDRAM)
bfc3b77e 1553 U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
90253178 1554#endif
bfc3b77e
FM
1555 U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
1556};
1557
2e5167cc 1558#ifdef CONFIG_NEEDS_MANUAL_RELOC
f1d2b313
HS
1559void i2c_reloc(void) {
1560 fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub));
1561}
1562#endif
1563
06afa388
MV
1564/**
1565 * do_i2c() - Handle the "i2c" command-line command
1566 * @cmdtp: Command data struct pointer
1567 * @flag: Command flag
1568 * @argc: Command-line argument count
1569 * @argv: Array of command-line arguments
1570 *
1571 * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
1572 * on error.
1573 */
54841ab5 1574static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
bfc3b77e
FM
1575{
1576 cmd_tbl_t *c;
1577
4444b221 1578 if (argc < 2)
4c12eeb8 1579 return CMD_RET_USAGE;
4444b221 1580
bfc3b77e
FM
1581 /* Strip off leading 'i2c' command argument */
1582 argc--;
1583 argv++;
1584
1585 c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
1586
47e26b1b 1587 if (c)
4c12eeb8 1588 return c->cmd(cmdtp, flag, argc, argv);
47e26b1b 1589 else
4c12eeb8 1590 return CMD_RET_USAGE;
bb99ad6d 1591}
8bde7f77
WD
1592
1593/***************************************************/
088f1b19
KP
1594#ifdef CONFIG_SYS_LONGHELP
1595static char i2c_help_text[] =
3f4978c7
HS
1596#if defined(CONFIG_SYS_I2C)
1597 "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
9a2accb4 1598#endif
fb0070e9 1599 "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
3f4978c7
HS
1600#if defined(CONFIG_SYS_I2C) || \
1601 defined(CONFIG_I2C_MULTI_BUS)
9bc2e4ee 1602 "i2c dev [dev] - show or set current I2C bus\n"
d9fc7032 1603#endif /* CONFIG_I2C_MULTI_BUS */
735987c5
TWHT
1604#if defined(CONFIG_I2C_EDID)
1605 "i2c edid chip - print EDID configuration information\n"
1606#endif /* CONFIG_I2C_EDID */
fb0070e9 1607 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
d9fc7032
MF
1608 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1609 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1610 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1611 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
54b99e51 1612 "i2c probe [address] - test for and show device(s) on the I2C bus\n"
652e5354 1613 "i2c read chip address[.0, .1, .2] length memaddress - read to memory \n"
ff5d2dce 1614 "i2c write memaddress chip address[.0, .1, .2] length - write memory to i2c\n"
e43a27c4 1615 "i2c reset - re-init the I2C Controller\n"
c76fe474 1616#if defined(CONFIG_CMD_SDRAM)
fb0070e9 1617 "i2c sdram chip - print SDRAM configuration information\n"
90253178 1618#endif
088f1b19
KP
1619 "i2c speed [speed] - show or set I2C bus speed";
1620#endif
1621
1622U_BOOT_CMD(
1623 i2c, 6, 1, do_i2c,
1624 "I2C sub-system",
1625 i2c_help_text
d9fc7032 1626);