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81a8824f WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * I2C Functions similar to the standard memory functions. | |
26 | * | |
27 | * There are several parameters in many of the commands that bear further | |
28 | * explanations: | |
29 | * | |
30 | * Two of the commands (imm and imw) take a byte/word/long modifier | |
31 | * (e.g. imm.w specifies the word-length modifier). This was done to | |
32 | * allow manipulating word-length registers. It was not done on any other | |
33 | * commands because it was not deemed useful. | |
34 | * | |
35 | * {i2c_chip} is the I2C chip address (the first byte sent on the bus). | |
36 | * Each I2C chip on the bus has a unique address. On the I2C data bus, | |
37 | * the address is the upper seven bits and the LSB is the "read/write" | |
38 | * bit. Note that the {i2c_chip} address specified on the command | |
39 | * line is not shifted up: e.g. a typical EEPROM memory chip may have | |
40 | * an I2C address of 0x50, but the data put on the bus will be 0xA0 | |
41 | * for write and 0xA1 for read. This "non shifted" address notation | |
42 | * matches at least half of the data sheets :-/. | |
43 | * | |
44 | * {addr} is the address (or offset) within the chip. Small memory | |
45 | * chips have 8 bit addresses. Large memory chips have 16 bit | |
46 | * addresses. Other memory chips have 9, 10, or 11 bit addresses. | |
47 | * Many non-memory chips have multiple registers and {addr} is used | |
48 | * as the register index. Some non-memory chips have only one register | |
49 | * and therefore don't need any {addr} parameter. | |
50 | * | |
51 | * The default {addr} parameter is one byte (.1) which works well for | |
52 | * memories and registers with 8 bits of address space. | |
53 | * | |
54 | * You can specify the length of the {addr} field with the optional .0, | |
55 | * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are | |
56 | * manipulating a single register device which doesn't use an address | |
57 | * field, use "0.0" for the address and the ".0" length field will | |
58 | * suppress the address in the I2C data stream. This also works for | |
59 | * successive reads using the I2C auto-incrementing memory pointer. | |
60 | * | |
61 | * If you are manipulating a large memory with 2-byte addresses, use | |
62 | * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal). | |
63 | * | |
64 | * Then there are the unfortunate memory chips that spill the most | |
65 | * significant 1, 2, or 3 bits of address into the chip address byte. | |
66 | * This effectively makes one chip (logically) look like 2, 4, or | |
67 | * 8 chips. This is handled (awkwardly) by #defining | |
6d0f6bcf | 68 | * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the |
81a8824f WD |
69 | * {addr} field (since .1 is the default, it doesn't actually have to |
70 | * be specified). Examples: given a memory chip at I2C chip address | |
71 | * 0x50, the following would happen... | |
72 | * imd 50 0 10 display 16 bytes starting at 0x000 | |
73 | * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd> | |
74 | * imd 50 100 10 display 16 bytes starting at 0x100 | |
75 | * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd> | |
76 | * imd 50 210 10 display 16 bytes starting at 0x210 | |
77 | * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd> | |
78 | * This is awfully ugly. It would be nice if someone would think up | |
79 | * a better way of handling this. | |
80 | * | |
81 | * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). | |
82 | */ | |
83 | ||
84 | #include <common.h> | |
85 | #include <command.h> | |
67b23a32 | 86 | #include <environment.h> |
81a8824f | 87 | #include <i2c.h> |
67b23a32 | 88 | #include <malloc.h> |
81a8824f WD |
89 | #include <asm/byteorder.h> |
90 | ||
81a8824f WD |
91 | /* Display values from last command. |
92 | * Memory modify remembered values are different from display memory. | |
93 | */ | |
94 | static uchar i2c_dp_last_chip; | |
95 | static uint i2c_dp_last_addr; | |
96 | static uint i2c_dp_last_alen; | |
97 | static uint i2c_dp_last_length = 0x10; | |
98 | ||
99 | static uchar i2c_mm_last_chip; | |
100 | static uint i2c_mm_last_addr; | |
101 | static uint i2c_mm_last_alen; | |
102 | ||
bb99ad6d BW |
103 | /* If only one I2C bus is present, the list of devices to ignore when |
104 | * the probe command is issued is represented by a 1D array of addresses. | |
105 | * When multiple buses are present, the list is an array of bus-address | |
106 | * pairs. The following macros take care of this */ | |
107 | ||
6d0f6bcf | 108 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
bb99ad6d BW |
109 | #if defined(CONFIG_I2C_MULTI_BUS) |
110 | static struct | |
111 | { | |
112 | uchar bus; | |
113 | uchar addr; | |
6d0f6bcf | 114 | } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
115 | #define GET_BUS_NUM i2c_get_bus_num() |
116 | #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b)) | |
117 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a)) | |
118 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr | |
119 | #else /* single bus */ | |
6d0f6bcf | 120 | static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
121 | #define GET_BUS_NUM 0 |
122 | #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ | |
123 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) | |
124 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)] | |
125 | #endif /* CONFIG_MULTI_BUS */ | |
126 | ||
127 | #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0])) | |
81a8824f WD |
128 | #endif |
129 | ||
67b23a32 HS |
130 | #if defined(CONFIG_I2C_MUX) |
131 | static I2C_MUX_DEVICE *i2c_mux_devices = NULL; | |
6d0f6bcf | 132 | static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS; |
67b23a32 HS |
133 | |
134 | DECLARE_GLOBAL_DATA_PTR; | |
135 | ||
136 | #endif | |
137 | ||
81a8824f WD |
138 | static int |
139 | mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[]); | |
81a8824f WD |
140 | |
141 | /* | |
142 | * Syntax: | |
143 | * imd {i2c_chip} {addr}{.0, .1, .2} {len} | |
144 | */ | |
145 | #define DISP_LINE_LEN 16 | |
146 | ||
147 | int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
148 | { | |
149 | u_char chip; | |
150 | uint addr, alen, length; | |
151 | int j, nbytes, linebytes; | |
152 | ||
153 | /* We use the last specified parameters, unless new ones are | |
154 | * entered. | |
155 | */ | |
156 | chip = i2c_dp_last_chip; | |
157 | addr = i2c_dp_last_addr; | |
158 | alen = i2c_dp_last_alen; | |
159 | length = i2c_dp_last_length; | |
160 | ||
161 | if (argc < 3) { | |
162 | printf ("Usage:\n%s\n", cmdtp->usage); | |
163 | return 1; | |
164 | } | |
165 | ||
166 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
167 | /* | |
168 | * New command specified. | |
169 | */ | |
170 | alen = 1; | |
171 | ||
172 | /* | |
173 | * I2C chip address | |
174 | */ | |
175 | chip = simple_strtoul(argv[1], NULL, 16); | |
176 | ||
177 | /* | |
178 | * I2C data address within the chip. This can be 1 or | |
179 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
180 | */ | |
181 | addr = simple_strtoul(argv[2], NULL, 16); | |
182 | alen = 1; | |
e857a5bd | 183 | for (j = 0; j < 8; j++) { |
81a8824f WD |
184 | if (argv[2][j] == '.') { |
185 | alen = argv[2][j+1] - '0'; | |
186 | if (alen > 4) { | |
187 | printf ("Usage:\n%s\n", cmdtp->usage); | |
188 | return 1; | |
189 | } | |
190 | break; | |
e857a5bd | 191 | } else if (argv[2][j] == '\0') |
81a8824f | 192 | break; |
81a8824f WD |
193 | } |
194 | ||
195 | /* | |
196 | * If another parameter, it is the length to display. | |
197 | * Length is the number of objects, not number of bytes. | |
198 | */ | |
199 | if (argc > 3) | |
200 | length = simple_strtoul(argv[3], NULL, 16); | |
201 | } | |
202 | ||
203 | /* | |
204 | * Print the lines. | |
205 | * | |
206 | * We buffer all read data, so we can make sure data is read only | |
207 | * once. | |
208 | */ | |
209 | nbytes = length; | |
210 | do { | |
211 | unsigned char linebuf[DISP_LINE_LEN]; | |
212 | unsigned char *cp; | |
213 | ||
214 | linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; | |
215 | ||
e857a5bd | 216 | if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0) |
4b9206ed | 217 | puts ("Error reading the chip.\n"); |
e857a5bd | 218 | else { |
81a8824f WD |
219 | printf("%04x:", addr); |
220 | cp = linebuf; | |
221 | for (j=0; j<linebytes; j++) { | |
222 | printf(" %02x", *cp++); | |
223 | addr++; | |
224 | } | |
4b9206ed | 225 | puts (" "); |
81a8824f WD |
226 | cp = linebuf; |
227 | for (j=0; j<linebytes; j++) { | |
228 | if ((*cp < 0x20) || (*cp > 0x7e)) | |
4b9206ed | 229 | puts ("."); |
81a8824f WD |
230 | else |
231 | printf("%c", *cp); | |
232 | cp++; | |
233 | } | |
4b9206ed | 234 | putc ('\n'); |
81a8824f WD |
235 | } |
236 | nbytes -= linebytes; | |
237 | } while (nbytes > 0); | |
238 | ||
239 | i2c_dp_last_chip = chip; | |
240 | i2c_dp_last_addr = addr; | |
241 | i2c_dp_last_alen = alen; | |
242 | i2c_dp_last_length = length; | |
243 | ||
244 | return 0; | |
245 | } | |
246 | ||
247 | int do_i2c_mm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
248 | { | |
249 | return mod_i2c_mem (cmdtp, 1, flag, argc, argv); | |
250 | } | |
251 | ||
252 | ||
253 | int do_i2c_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
254 | { | |
255 | return mod_i2c_mem (cmdtp, 0, flag, argc, argv); | |
256 | } | |
257 | ||
258 | /* Write (fill) memory | |
259 | * | |
260 | * Syntax: | |
261 | * imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] | |
262 | */ | |
263 | int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
264 | { | |
265 | uchar chip; | |
266 | ulong addr; | |
267 | uint alen; | |
268 | uchar byte; | |
269 | int count; | |
270 | int j; | |
271 | ||
272 | if ((argc < 4) || (argc > 5)) { | |
273 | printf ("Usage:\n%s\n", cmdtp->usage); | |
274 | return 1; | |
275 | } | |
276 | ||
277 | /* | |
53677ef1 WD |
278 | * Chip is always specified. |
279 | */ | |
81a8824f WD |
280 | chip = simple_strtoul(argv[1], NULL, 16); |
281 | ||
282 | /* | |
283 | * Address is always specified. | |
284 | */ | |
285 | addr = simple_strtoul(argv[2], NULL, 16); | |
286 | alen = 1; | |
e857a5bd | 287 | for (j = 0; j < 8; j++) { |
81a8824f WD |
288 | if (argv[2][j] == '.') { |
289 | alen = argv[2][j+1] - '0'; | |
e857a5bd | 290 | if (alen > 4) { |
81a8824f WD |
291 | printf ("Usage:\n%s\n", cmdtp->usage); |
292 | return 1; | |
293 | } | |
294 | break; | |
e857a5bd | 295 | } else if (argv[2][j] == '\0') |
81a8824f | 296 | break; |
81a8824f WD |
297 | } |
298 | ||
299 | /* | |
300 | * Value to write is always specified. | |
301 | */ | |
302 | byte = simple_strtoul(argv[3], NULL, 16); | |
303 | ||
304 | /* | |
305 | * Optional count | |
306 | */ | |
e857a5bd | 307 | if (argc == 5) |
81a8824f | 308 | count = simple_strtoul(argv[4], NULL, 16); |
e857a5bd | 309 | else |
81a8824f | 310 | count = 1; |
81a8824f WD |
311 | |
312 | while (count-- > 0) { | |
e857a5bd | 313 | if (i2c_write(chip, addr++, alen, &byte, 1) != 0) |
4b9206ed | 314 | puts ("Error writing the chip.\n"); |
81a8824f WD |
315 | /* |
316 | * Wait for the write to complete. The write can take | |
317 | * up to 10mSec (we allow a little more time). | |
318 | * | |
319 | * On some chips, while the write is in progress, the | |
320 | * chip doesn't respond. This apparently isn't a | |
321 | * universal feature so we don't take advantage of it. | |
322 | */ | |
d4f5c728 | 323 | /* |
324 | * No write delay with FRAM devices. | |
325 | */ | |
6d0f6bcf | 326 | #if !defined(CONFIG_SYS_I2C_FRAM) |
81a8824f | 327 | udelay(11000); |
d4f5c728 | 328 | #endif |
329 | ||
81a8824f | 330 | #if 0 |
e857a5bd | 331 | for (timeout = 0; timeout < 10; timeout++) { |
81a8824f | 332 | udelay(2000); |
e857a5bd | 333 | if (i2c_probe(chip) == 0) |
81a8824f WD |
334 | break; |
335 | } | |
336 | #endif | |
337 | } | |
338 | ||
339 | return (0); | |
340 | } | |
341 | ||
342 | ||
343 | /* Calculate a CRC on memory | |
344 | * | |
345 | * Syntax: | |
346 | * icrc32 {i2c_chip} {addr}{.0, .1, .2} {count} | |
347 | */ | |
348 | int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
349 | { | |
350 | uchar chip; | |
351 | ulong addr; | |
352 | uint alen; | |
353 | int count; | |
354 | uchar byte; | |
355 | ulong crc; | |
356 | ulong err; | |
357 | int j; | |
358 | ||
359 | if (argc < 4) { | |
360 | printf ("Usage:\n%s\n", cmdtp->usage); | |
361 | return 1; | |
362 | } | |
363 | ||
364 | /* | |
53677ef1 WD |
365 | * Chip is always specified. |
366 | */ | |
81a8824f WD |
367 | chip = simple_strtoul(argv[1], NULL, 16); |
368 | ||
369 | /* | |
370 | * Address is always specified. | |
371 | */ | |
372 | addr = simple_strtoul(argv[2], NULL, 16); | |
373 | alen = 1; | |
e857a5bd | 374 | for (j = 0; j < 8; j++) { |
81a8824f WD |
375 | if (argv[2][j] == '.') { |
376 | alen = argv[2][j+1] - '0'; | |
e857a5bd | 377 | if (alen > 4) { |
81a8824f WD |
378 | printf ("Usage:\n%s\n", cmdtp->usage); |
379 | return 1; | |
380 | } | |
381 | break; | |
e857a5bd | 382 | } else if (argv[2][j] == '\0') |
81a8824f | 383 | break; |
81a8824f WD |
384 | } |
385 | ||
386 | /* | |
387 | * Count is always specified | |
388 | */ | |
389 | count = simple_strtoul(argv[3], NULL, 16); | |
390 | ||
391 | printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1); | |
392 | /* | |
393 | * CRC a byte at a time. This is going to be slooow, but hey, the | |
394 | * memories are small and slow too so hopefully nobody notices. | |
395 | */ | |
396 | crc = 0; | |
397 | err = 0; | |
e857a5bd TT |
398 | while (count-- > 0) { |
399 | if (i2c_read(chip, addr, alen, &byte, 1) != 0) | |
81a8824f | 400 | err++; |
81a8824f WD |
401 | crc = crc32 (crc, &byte, 1); |
402 | addr++; | |
403 | } | |
e857a5bd | 404 | if (err > 0) |
4b9206ed | 405 | puts ("Error reading the chip,\n"); |
e857a5bd | 406 | else |
81a8824f | 407 | printf ("%08lx\n", crc); |
81a8824f WD |
408 | |
409 | return 0; | |
410 | } | |
411 | ||
412 | ||
413 | /* Modify memory. | |
414 | * | |
415 | * Syntax: | |
416 | * imm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} | |
417 | * inm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} | |
418 | */ | |
419 | ||
420 | static int | |
421 | mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[]) | |
422 | { | |
423 | uchar chip; | |
424 | ulong addr; | |
425 | uint alen; | |
426 | ulong data; | |
427 | int size = 1; | |
428 | int nbytes; | |
429 | int j; | |
430 | extern char console_buffer[]; | |
431 | ||
432 | if (argc != 3) { | |
433 | printf ("Usage:\n%s\n", cmdtp->usage); | |
434 | return 1; | |
435 | } | |
436 | ||
437 | #ifdef CONFIG_BOOT_RETRY_TIME | |
438 | reset_cmd_timeout(); /* got a good command to get here */ | |
439 | #endif | |
440 | /* | |
441 | * We use the last specified parameters, unless new ones are | |
442 | * entered. | |
443 | */ | |
444 | chip = i2c_mm_last_chip; | |
445 | addr = i2c_mm_last_addr; | |
446 | alen = i2c_mm_last_alen; | |
447 | ||
448 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
449 | /* | |
450 | * New command specified. Check for a size specification. | |
451 | * Defaults to byte if no or incorrect specification. | |
452 | */ | |
453 | size = cmd_get_data_size(argv[0], 1); | |
454 | ||
455 | /* | |
53677ef1 WD |
456 | * Chip is always specified. |
457 | */ | |
81a8824f WD |
458 | chip = simple_strtoul(argv[1], NULL, 16); |
459 | ||
460 | /* | |
461 | * Address is always specified. | |
462 | */ | |
463 | addr = simple_strtoul(argv[2], NULL, 16); | |
464 | alen = 1; | |
e857a5bd | 465 | for (j = 0; j < 8; j++) { |
81a8824f WD |
466 | if (argv[2][j] == '.') { |
467 | alen = argv[2][j+1] - '0'; | |
e857a5bd | 468 | if (alen > 4) { |
81a8824f WD |
469 | printf ("Usage:\n%s\n", cmdtp->usage); |
470 | return 1; | |
471 | } | |
472 | break; | |
e857a5bd | 473 | } else if (argv[2][j] == '\0') |
81a8824f | 474 | break; |
81a8824f WD |
475 | } |
476 | } | |
477 | ||
478 | /* | |
479 | * Print the address, followed by value. Then accept input for | |
480 | * the next value. A non-converted value exits. | |
481 | */ | |
482 | do { | |
483 | printf("%08lx:", addr); | |
e857a5bd | 484 | if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0) |
4b9206ed | 485 | puts ("\nError reading the chip,\n"); |
e857a5bd | 486 | else { |
81a8824f | 487 | data = cpu_to_be32(data); |
e857a5bd | 488 | if (size == 1) |
81a8824f | 489 | printf(" %02lx", (data >> 24) & 0x000000FF); |
e857a5bd | 490 | else if (size == 2) |
81a8824f | 491 | printf(" %04lx", (data >> 16) & 0x0000FFFF); |
e857a5bd | 492 | else |
81a8824f | 493 | printf(" %08lx", data); |
81a8824f WD |
494 | } |
495 | ||
496 | nbytes = readline (" ? "); | |
497 | if (nbytes == 0) { | |
498 | /* | |
499 | * <CR> pressed as only input, don't modify current | |
500 | * location and move to next. | |
501 | */ | |
502 | if (incrflag) | |
503 | addr += size; | |
504 | nbytes = size; | |
505 | #ifdef CONFIG_BOOT_RETRY_TIME | |
506 | reset_cmd_timeout(); /* good enough to not time out */ | |
507 | #endif | |
508 | } | |
509 | #ifdef CONFIG_BOOT_RETRY_TIME | |
e857a5bd | 510 | else if (nbytes == -2) |
81a8824f | 511 | break; /* timed out, exit the command */ |
81a8824f WD |
512 | #endif |
513 | else { | |
514 | char *endp; | |
515 | ||
516 | data = simple_strtoul(console_buffer, &endp, 16); | |
e857a5bd | 517 | if (size == 1) |
81a8824f | 518 | data = data << 24; |
e857a5bd | 519 | else if (size == 2) |
81a8824f | 520 | data = data << 16; |
81a8824f WD |
521 | data = be32_to_cpu(data); |
522 | nbytes = endp - console_buffer; | |
523 | if (nbytes) { | |
524 | #ifdef CONFIG_BOOT_RETRY_TIME | |
525 | /* | |
526 | * good enough to not time out | |
527 | */ | |
528 | reset_cmd_timeout(); | |
529 | #endif | |
e857a5bd | 530 | if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0) |
4b9206ed | 531 | puts ("Error writing the chip.\n"); |
6d0f6bcf JCPV |
532 | #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS |
533 | udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); | |
2535d602 | 534 | #endif |
81a8824f WD |
535 | if (incrflag) |
536 | addr += size; | |
537 | } | |
538 | } | |
539 | } while (nbytes); | |
540 | ||
0800707b PT |
541 | i2c_mm_last_chip = chip; |
542 | i2c_mm_last_addr = addr; | |
543 | i2c_mm_last_alen = alen; | |
81a8824f WD |
544 | |
545 | return 0; | |
546 | } | |
547 | ||
548 | /* | |
549 | * Syntax: | |
550 | * iprobe {addr}{.0, .1, .2} | |
551 | */ | |
552 | int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
553 | { | |
554 | int j; | |
6d0f6bcf | 555 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 556 | int k, skip; |
bb99ad6d BW |
557 | uchar bus = GET_BUS_NUM; |
558 | #endif /* NOPROBES */ | |
81a8824f | 559 | |
4b9206ed | 560 | puts ("Valid chip addresses:"); |
e857a5bd | 561 | for (j = 0; j < 128; j++) { |
6d0f6bcf | 562 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 563 | skip = 0; |
e857a5bd TT |
564 | for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) { |
565 | if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) { | |
81a8824f WD |
566 | skip = 1; |
567 | break; | |
568 | } | |
569 | } | |
570 | if (skip) | |
571 | continue; | |
572 | #endif | |
e857a5bd | 573 | if (i2c_probe(j) == 0) |
81a8824f | 574 | printf(" %02X", j); |
81a8824f | 575 | } |
4b9206ed | 576 | putc ('\n'); |
81a8824f | 577 | |
6d0f6bcf | 578 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 579 | puts ("Excluded chip addresses:"); |
e857a5bd TT |
580 | for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) { |
581 | if (COMPARE_BUS(bus,k)) | |
bb99ad6d BW |
582 | printf(" %02X", NO_PROBE_ADDR(k)); |
583 | } | |
4b9206ed | 584 | putc ('\n'); |
81a8824f WD |
585 | #endif |
586 | ||
587 | return 0; | |
588 | } | |
589 | ||
590 | ||
591 | /* | |
592 | * Syntax: | |
593 | * iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] | |
594 | * {length} - Number of bytes to read | |
595 | * {delay} - A DECIMAL number and defaults to 1000 uSec | |
596 | */ | |
597 | int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) | |
598 | { | |
599 | u_char chip; | |
600 | ulong alen; | |
601 | uint addr; | |
602 | uint length; | |
603 | u_char bytes[16]; | |
604 | int delay; | |
605 | int j; | |
606 | ||
607 | if (argc < 3) { | |
608 | printf ("Usage:\n%s\n", cmdtp->usage); | |
609 | return 1; | |
610 | } | |
611 | ||
612 | /* | |
613 | * Chip is always specified. | |
614 | */ | |
615 | chip = simple_strtoul(argv[1], NULL, 16); | |
616 | ||
617 | /* | |
618 | * Address is always specified. | |
619 | */ | |
620 | addr = simple_strtoul(argv[2], NULL, 16); | |
621 | alen = 1; | |
e857a5bd | 622 | for (j = 0; j < 8; j++) { |
81a8824f WD |
623 | if (argv[2][j] == '.') { |
624 | alen = argv[2][j+1] - '0'; | |
625 | if (alen > 4) { | |
626 | printf ("Usage:\n%s\n", cmdtp->usage); | |
627 | return 1; | |
628 | } | |
629 | break; | |
e857a5bd | 630 | } else if (argv[2][j] == '\0') |
81a8824f | 631 | break; |
81a8824f WD |
632 | } |
633 | ||
634 | /* | |
635 | * Length is the number of objects, not number of bytes. | |
636 | */ | |
637 | length = 1; | |
638 | length = simple_strtoul(argv[3], NULL, 16); | |
e857a5bd | 639 | if (length > sizeof(bytes)) |
81a8824f | 640 | length = sizeof(bytes); |
81a8824f WD |
641 | |
642 | /* | |
643 | * The delay time (uSec) is optional. | |
644 | */ | |
645 | delay = 1000; | |
e857a5bd | 646 | if (argc > 3) |
81a8824f | 647 | delay = simple_strtoul(argv[4], NULL, 10); |
81a8824f WD |
648 | /* |
649 | * Run the loop... | |
650 | */ | |
e857a5bd TT |
651 | while (1) { |
652 | if (i2c_read(chip, addr, alen, bytes, length) != 0) | |
4b9206ed | 653 | puts ("Error reading the chip.\n"); |
81a8824f WD |
654 | udelay(delay); |
655 | } | |
656 | ||
657 | /* NOTREACHED */ | |
658 | return 0; | |
659 | } | |
660 | ||
661 | ||
662 | /* | |
663 | * The SDRAM command is separately configured because many | |
664 | * (most?) embedded boards don't use SDRAM DIMMs. | |
665 | */ | |
c76fe474 | 666 | #if defined(CONFIG_CMD_SDRAM) |
632de067 LJ |
667 | static void print_ddr2_tcyc (u_char const b) |
668 | { | |
669 | printf ("%d.", (b >> 4) & 0x0F); | |
670 | switch (b & 0x0F) { | |
671 | case 0x0: | |
672 | case 0x1: | |
673 | case 0x2: | |
674 | case 0x3: | |
675 | case 0x4: | |
676 | case 0x5: | |
677 | case 0x6: | |
678 | case 0x7: | |
679 | case 0x8: | |
680 | case 0x9: | |
681 | printf ("%d ns\n", b & 0x0F); | |
682 | break; | |
683 | case 0xA: | |
684 | puts ("25 ns\n"); | |
685 | break; | |
686 | case 0xB: | |
687 | puts ("33 ns\n"); | |
688 | break; | |
689 | case 0xC: | |
690 | puts ("66 ns\n"); | |
691 | break; | |
692 | case 0xD: | |
693 | puts ("75 ns\n"); | |
694 | break; | |
695 | default: | |
696 | puts ("?? ns\n"); | |
697 | break; | |
698 | } | |
699 | } | |
700 | ||
701 | static void decode_bits (u_char const b, char const *str[], int const do_once) | |
702 | { | |
703 | u_char mask; | |
704 | ||
705 | for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) { | |
706 | if (b & mask) { | |
707 | puts (*str); | |
708 | if (do_once) | |
709 | return; | |
710 | } | |
711 | } | |
712 | } | |
81a8824f WD |
713 | |
714 | /* | |
715 | * Syntax: | |
716 | * sdram {i2c_chip} | |
717 | */ | |
632de067 | 718 | int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) |
81a8824f | 719 | { |
632de067 LJ |
720 | enum { unknown, EDO, SDRAM, DDR2 } type; |
721 | ||
81a8824f WD |
722 | u_char chip; |
723 | u_char data[128]; | |
724 | u_char cksum; | |
725 | int j; | |
726 | ||
632de067 LJ |
727 | static const char *decode_CAS_DDR2[] = { |
728 | " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD" | |
729 | }; | |
730 | ||
731 | static const char *decode_CAS_default[] = { | |
732 | " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1" | |
733 | }; | |
734 | ||
735 | static const char *decode_CS_WE_default[] = { | |
736 | " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0" | |
737 | }; | |
738 | ||
739 | static const char *decode_byte21_default[] = { | |
740 | " TBD (bit 7)\n", | |
741 | " Redundant row address\n", | |
742 | " Differential clock input\n", | |
743 | " Registerd DQMB inputs\n", | |
744 | " Buffered DQMB inputs\n", | |
745 | " On-card PLL\n", | |
746 | " Registered address/control lines\n", | |
747 | " Buffered address/control lines\n" | |
748 | }; | |
749 | ||
750 | static const char *decode_byte22_DDR2[] = { | |
751 | " TBD (bit 7)\n", | |
752 | " TBD (bit 6)\n", | |
753 | " TBD (bit 5)\n", | |
754 | " TBD (bit 4)\n", | |
755 | " TBD (bit 3)\n", | |
756 | " Supports partial array self refresh\n", | |
757 | " Supports 50 ohm ODT\n", | |
758 | " Supports weak driver\n" | |
759 | }; | |
760 | ||
761 | static const char *decode_row_density_DDR2[] = { | |
762 | "512 MiB", "256 MiB", "128 MiB", "16 GiB", | |
763 | "8 GiB", "4 GiB", "2 GiB", "1 GiB" | |
764 | }; | |
765 | ||
766 | static const char *decode_row_density_default[] = { | |
767 | "512 MiB", "256 MiB", "128 MiB", "64 MiB", | |
768 | "32 MiB", "16 MiB", "8 MiB", "4 MiB" | |
769 | }; | |
770 | ||
81a8824f WD |
771 | if (argc < 2) { |
772 | printf ("Usage:\n%s\n", cmdtp->usage); | |
773 | return 1; | |
774 | } | |
775 | /* | |
776 | * Chip is always specified. | |
632de067 LJ |
777 | */ |
778 | chip = simple_strtoul (argv[1], NULL, 16); | |
81a8824f | 779 | |
632de067 | 780 | if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) { |
4b9206ed | 781 | puts ("No SDRAM Serial Presence Detect found.\n"); |
81a8824f WD |
782 | return 1; |
783 | } | |
784 | ||
785 | cksum = 0; | |
786 | for (j = 0; j < 63; j++) { | |
787 | cksum += data[j]; | |
788 | } | |
e857a5bd | 789 | if (cksum != data[63]) { |
81a8824f | 790 | printf ("WARNING: Configuration data checksum failure:\n" |
632de067 | 791 | " is 0x%02x, calculated 0x%02x\n", data[63], cksum); |
81a8824f | 792 | } |
632de067 | 793 | printf ("SPD data revision %d.%d\n", |
81a8824f | 794 | (data[62] >> 4) & 0x0F, data[62] & 0x0F); |
632de067 LJ |
795 | printf ("Bytes used 0x%02X\n", data[0]); |
796 | printf ("Serial memory size 0x%02X\n", 1 << data[1]); | |
797 | ||
4b9206ed | 798 | puts ("Memory type "); |
632de067 | 799 | switch (data[2]) { |
0df6b844 LJ |
800 | case 2: |
801 | type = EDO; | |
802 | puts ("EDO\n"); | |
803 | break; | |
804 | case 4: | |
805 | type = SDRAM; | |
806 | puts ("SDRAM\n"); | |
807 | break; | |
808 | case 8: | |
809 | type = DDR2; | |
810 | puts ("DDR2\n"); | |
811 | break; | |
812 | default: | |
813 | type = unknown; | |
814 | puts ("unknown\n"); | |
815 | break; | |
81a8824f | 816 | } |
632de067 | 817 | |
4b9206ed | 818 | puts ("Row address bits "); |
e857a5bd | 819 | if ((data[3] & 0x00F0) == 0) |
632de067 | 820 | printf ("%d\n", data[3] & 0x0F); |
e857a5bd | 821 | else |
632de067 LJ |
822 | printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F); |
823 | ||
4b9206ed | 824 | puts ("Column address bits "); |
e857a5bd | 825 | if ((data[4] & 0x00F0) == 0) |
632de067 | 826 | printf ("%d\n", data[4] & 0x0F); |
e857a5bd | 827 | else |
632de067 | 828 | printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F); |
0df6b844 LJ |
829 | |
830 | switch (type) { | |
831 | case DDR2: | |
632de067 LJ |
832 | printf ("Number of ranks %d\n", |
833 | (data[5] & 0x07) + 1); | |
0df6b844 LJ |
834 | break; |
835 | default: | |
632de067 | 836 | printf ("Module rows %d\n", data[5]); |
0df6b844 LJ |
837 | break; |
838 | } | |
839 | ||
840 | switch (type) { | |
841 | case DDR2: | |
632de067 | 842 | printf ("Module data width %d bits\n", data[6]); |
0df6b844 LJ |
843 | break; |
844 | default: | |
632de067 LJ |
845 | printf ("Module data width %d bits\n", |
846 | (data[7] << 8) | data[6]); | |
0df6b844 LJ |
847 | break; |
848 | } | |
849 | ||
4b9206ed | 850 | puts ("Interface signal levels "); |
81a8824f | 851 | switch(data[8]) { |
0df6b844 | 852 | case 0: puts ("TTL 5.0 V\n"); break; |
4b9206ed | 853 | case 1: puts ("LVTTL\n"); break; |
0df6b844 LJ |
854 | case 2: puts ("HSTL 1.5 V\n"); break; |
855 | case 3: puts ("SSTL 3.3 V\n"); break; | |
856 | case 4: puts ("SSTL 2.5 V\n"); break; | |
857 | case 5: puts ("SSTL 1.8 V\n"); break; | |
4b9206ed | 858 | default: puts ("unknown\n"); break; |
81a8824f | 859 | } |
0df6b844 LJ |
860 | |
861 | switch (type) { | |
862 | case DDR2: | |
632de067 LJ |
863 | printf ("SDRAM cycle time "); |
864 | print_ddr2_tcyc (data[9]); | |
0df6b844 LJ |
865 | break; |
866 | default: | |
632de067 LJ |
867 | printf ("SDRAM cycle time %d.%d ns\n", |
868 | (data[9] >> 4) & 0x0F, data[9] & 0x0F); | |
0df6b844 LJ |
869 | break; |
870 | } | |
871 | ||
872 | switch (type) { | |
873 | case DDR2: | |
632de067 LJ |
874 | printf ("SDRAM access time 0.%d%d ns\n", |
875 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
876 | break; |
877 | default: | |
632de067 LJ |
878 | printf ("SDRAM access time %d.%d ns\n", |
879 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
880 | break; |
881 | } | |
882 | ||
4b9206ed | 883 | puts ("EDC configuration "); |
632de067 | 884 | switch (data[11]) { |
4b9206ed WD |
885 | case 0: puts ("None\n"); break; |
886 | case 1: puts ("Parity\n"); break; | |
887 | case 2: puts ("ECC\n"); break; | |
888 | default: puts ("unknown\n"); break; | |
81a8824f | 889 | } |
632de067 | 890 | |
e857a5bd | 891 | if ((data[12] & 0x80) == 0) |
4b9206ed | 892 | puts ("No self refresh, rate "); |
e857a5bd | 893 | else |
4b9206ed | 894 | puts ("Self refresh, rate "); |
632de067 | 895 | |
81a8824f | 896 | switch(data[12] & 0x7F) { |
632de067 LJ |
897 | case 0: puts ("15.625 us\n"); break; |
898 | case 1: puts ("3.9 us\n"); break; | |
899 | case 2: puts ("7.8 us\n"); break; | |
900 | case 3: puts ("31.3 us\n"); break; | |
901 | case 4: puts ("62.5 us\n"); break; | |
902 | case 5: puts ("125 us\n"); break; | |
4b9206ed | 903 | default: puts ("unknown\n"); break; |
81a8824f | 904 | } |
0df6b844 LJ |
905 | |
906 | switch (type) { | |
907 | case DDR2: | |
632de067 | 908 | printf ("SDRAM width (primary) %d\n", data[13]); |
0df6b844 LJ |
909 | break; |
910 | default: | |
632de067 | 911 | printf ("SDRAM width (primary) %d\n", data[13] & 0x7F); |
0df6b844 | 912 | if ((data[13] & 0x80) != 0) { |
632de067 LJ |
913 | printf (" (second bank) %d\n", |
914 | 2 * (data[13] & 0x7F)); | |
0df6b844 LJ |
915 | } |
916 | break; | |
917 | } | |
918 | ||
919 | switch (type) { | |
920 | case DDR2: | |
921 | if (data[14] != 0) | |
632de067 | 922 | printf ("EDC width %d\n", data[14]); |
0df6b844 LJ |
923 | break; |
924 | default: | |
925 | if (data[14] != 0) { | |
632de067 LJ |
926 | printf ("EDC width %d\n", |
927 | data[14] & 0x7F); | |
0df6b844 LJ |
928 | |
929 | if ((data[14] & 0x80) != 0) { | |
632de067 LJ |
930 | printf (" (second bank) %d\n", |
931 | 2 * (data[14] & 0x7F)); | |
0df6b844 LJ |
932 | } |
933 | } | |
934 | break; | |
81a8824f | 935 | } |
0df6b844 | 936 | |
632de067 LJ |
937 | if (DDR2 != type) { |
938 | printf ("Min clock delay, back-to-back random column addresses " | |
939 | "%d\n", data[15]); | |
0df6b844 LJ |
940 | } |
941 | ||
4b9206ed WD |
942 | puts ("Burst length(s) "); |
943 | if (data[16] & 0x80) puts (" Page"); | |
944 | if (data[16] & 0x08) puts (" 8"); | |
945 | if (data[16] & 0x04) puts (" 4"); | |
946 | if (data[16] & 0x02) puts (" 2"); | |
947 | if (data[16] & 0x01) puts (" 1"); | |
948 | putc ('\n'); | |
632de067 | 949 | printf ("Number of banks %d\n", data[17]); |
0df6b844 LJ |
950 | |
951 | switch (type) { | |
952 | case DDR2: | |
953 | puts ("CAS latency(s) "); | |
632de067 | 954 | decode_bits (data[18], decode_CAS_DDR2, 0); |
0df6b844 LJ |
955 | putc ('\n'); |
956 | break; | |
957 | default: | |
958 | puts ("CAS latency(s) "); | |
632de067 | 959 | decode_bits (data[18], decode_CAS_default, 0); |
0df6b844 LJ |
960 | putc ('\n'); |
961 | break; | |
962 | } | |
963 | ||
964 | if (DDR2 != type) { | |
965 | puts ("CS latency(s) "); | |
632de067 | 966 | decode_bits (data[19], decode_CS_WE_default, 0); |
0df6b844 LJ |
967 | putc ('\n'); |
968 | } | |
969 | ||
970 | if (DDR2 != type) { | |
971 | puts ("WE latency(s) "); | |
632de067 | 972 | decode_bits (data[20], decode_CS_WE_default, 0); |
0df6b844 LJ |
973 | putc ('\n'); |
974 | } | |
975 | ||
976 | switch (type) { | |
977 | case DDR2: | |
978 | puts ("Module attributes:\n"); | |
979 | if (data[21] & 0x80) | |
980 | puts (" TBD (bit 7)\n"); | |
981 | if (data[21] & 0x40) | |
982 | puts (" Analysis probe installed\n"); | |
983 | if (data[21] & 0x20) | |
984 | puts (" TBD (bit 5)\n"); | |
985 | if (data[21] & 0x10) | |
986 | puts (" FET switch external enable\n"); | |
632de067 | 987 | printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03); |
0df6b844 | 988 | if (data[20] & 0x11) { |
632de067 LJ |
989 | printf (" %d active registers on DIMM\n", |
990 | (data[21] & 0x03) + 1); | |
0df6b844 LJ |
991 | } |
992 | break; | |
993 | default: | |
994 | puts ("Module attributes:\n"); | |
995 | if (!data[21]) | |
996 | puts (" (none)\n"); | |
632de067 LJ |
997 | else |
998 | decode_bits (data[21], decode_byte21_default, 0); | |
0df6b844 LJ |
999 | break; |
1000 | } | |
1001 | ||
1002 | switch (type) { | |
1003 | case DDR2: | |
632de067 | 1004 | decode_bits (data[22], decode_byte22_DDR2, 0); |
0df6b844 LJ |
1005 | break; |
1006 | default: | |
1007 | puts ("Device attributes:\n"); | |
1008 | if (data[22] & 0x80) puts (" TBD (bit 7)\n"); | |
1009 | if (data[22] & 0x40) puts (" TBD (bit 6)\n"); | |
1010 | if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n"); | |
1011 | else puts (" Upper Vcc tolerance 10%\n"); | |
1012 | if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n"); | |
1013 | else puts (" Lower Vcc tolerance 10%\n"); | |
1014 | if (data[22] & 0x08) puts (" Supports write1/read burst\n"); | |
1015 | if (data[22] & 0x04) puts (" Supports precharge all\n"); | |
1016 | if (data[22] & 0x02) puts (" Supports auto precharge\n"); | |
1017 | if (data[22] & 0x01) puts (" Supports early RAS# precharge\n"); | |
1018 | break; | |
1019 | } | |
1020 | ||
1021 | switch (type) { | |
1022 | case DDR2: | |
632de067 LJ |
1023 | printf ("SDRAM cycle time (2nd highest CAS latency) "); |
1024 | print_ddr2_tcyc (data[23]); | |
0df6b844 LJ |
1025 | break; |
1026 | default: | |
632de067 LJ |
1027 | printf ("SDRAM cycle time (2nd highest CAS latency) %d." |
1028 | "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F); | |
0df6b844 LJ |
1029 | break; |
1030 | } | |
1031 | ||
1032 | switch (type) { | |
1033 | case DDR2: | |
632de067 LJ |
1034 | printf ("SDRAM access from clock (2nd highest CAS latency) 0." |
1035 | "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1036 | break; |
1037 | default: | |
632de067 LJ |
1038 | printf ("SDRAM access from clock (2nd highest CAS latency) %d." |
1039 | "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1040 | break; |
1041 | } | |
1042 | ||
1043 | switch (type) { | |
1044 | case DDR2: | |
632de067 LJ |
1045 | printf ("SDRAM cycle time (3rd highest CAS latency) "); |
1046 | print_ddr2_tcyc (data[25]); | |
0df6b844 LJ |
1047 | break; |
1048 | default: | |
632de067 LJ |
1049 | printf ("SDRAM cycle time (3rd highest CAS latency) %d." |
1050 | "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F); | |
0df6b844 LJ |
1051 | break; |
1052 | } | |
1053 | ||
1054 | switch (type) { | |
1055 | case DDR2: | |
632de067 LJ |
1056 | printf ("SDRAM access from clock (3rd highest CAS latency) 0." |
1057 | "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1058 | break; |
1059 | default: | |
632de067 LJ |
1060 | printf ("SDRAM access from clock (3rd highest CAS latency) %d." |
1061 | "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1062 | break; |
1063 | } | |
1064 | ||
1065 | switch (type) { | |
1066 | case DDR2: | |
632de067 LJ |
1067 | printf ("Minimum row precharge %d.%02d ns\n", |
1068 | (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03)); | |
0df6b844 LJ |
1069 | break; |
1070 | default: | |
632de067 | 1071 | printf ("Minimum row precharge %d ns\n", data[27]); |
0df6b844 LJ |
1072 | break; |
1073 | } | |
1074 | ||
1075 | switch (type) { | |
1076 | case DDR2: | |
632de067 LJ |
1077 | printf ("Row active to row active min %d.%02d ns\n", |
1078 | (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03)); | |
0df6b844 LJ |
1079 | break; |
1080 | default: | |
632de067 | 1081 | printf ("Row active to row active min %d ns\n", data[28]); |
0df6b844 LJ |
1082 | break; |
1083 | } | |
1084 | ||
1085 | switch (type) { | |
1086 | case DDR2: | |
632de067 LJ |
1087 | printf ("RAS to CAS delay min %d.%02d ns\n", |
1088 | (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03)); | |
0df6b844 LJ |
1089 | break; |
1090 | default: | |
632de067 | 1091 | printf ("RAS to CAS delay min %d ns\n", data[29]); |
0df6b844 LJ |
1092 | break; |
1093 | } | |
1094 | ||
632de067 | 1095 | printf ("Minimum RAS pulse width %d ns\n", data[30]); |
0df6b844 LJ |
1096 | |
1097 | switch (type) { | |
1098 | case DDR2: | |
632de067 LJ |
1099 | puts ("Density of each row "); |
1100 | decode_bits (data[31], decode_row_density_DDR2, 1); | |
1101 | putc ('\n'); | |
0df6b844 LJ |
1102 | break; |
1103 | default: | |
632de067 LJ |
1104 | puts ("Density of each row "); |
1105 | decode_bits (data[31], decode_row_density_default, 1); | |
1106 | putc ('\n'); | |
0df6b844 LJ |
1107 | break; |
1108 | } | |
1109 | ||
1110 | switch (type) { | |
1111 | case DDR2: | |
632de067 | 1112 | puts ("Command and Address setup "); |
0df6b844 | 1113 | if (data[32] >= 0xA0) { |
632de067 LJ |
1114 | printf ("1.%d%d ns\n", |
1115 | ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F); | |
0df6b844 | 1116 | } else { |
632de067 LJ |
1117 | printf ("0.%d%d ns\n", |
1118 | ((data[32] >> 4) & 0x0F), data[32] & 0x0F); | |
0df6b844 LJ |
1119 | } |
1120 | break; | |
1121 | default: | |
632de067 LJ |
1122 | printf ("Command and Address setup %c%d.%d ns\n", |
1123 | (data[32] & 0x80) ? '-' : '+', | |
1124 | (data[32] >> 4) & 0x07, data[32] & 0x0F); | |
0df6b844 LJ |
1125 | break; |
1126 | } | |
1127 | ||
1128 | switch (type) { | |
1129 | case DDR2: | |
632de067 | 1130 | puts ("Command and Address hold "); |
0df6b844 | 1131 | if (data[33] >= 0xA0) { |
632de067 LJ |
1132 | printf ("1.%d%d ns\n", |
1133 | ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F); | |
0df6b844 | 1134 | } else { |
632de067 LJ |
1135 | printf ("0.%d%d ns\n", |
1136 | ((data[33] >> 4) & 0x0F), data[33] & 0x0F); | |
0df6b844 LJ |
1137 | } |
1138 | break; | |
1139 | default: | |
632de067 LJ |
1140 | printf ("Command and Address hold %c%d.%d ns\n", |
1141 | (data[33] & 0x80) ? '-' : '+', | |
1142 | (data[33] >> 4) & 0x07, data[33] & 0x0F); | |
0df6b844 LJ |
1143 | break; |
1144 | } | |
1145 | ||
1146 | switch (type) { | |
1147 | case DDR2: | |
632de067 LJ |
1148 | printf ("Data signal input setup 0.%d%d ns\n", |
1149 | (data[34] >> 4) & 0x0F, data[34] & 0x0F); | |
0df6b844 LJ |
1150 | break; |
1151 | default: | |
632de067 LJ |
1152 | printf ("Data signal input setup %c%d.%d ns\n", |
1153 | (data[34] & 0x80) ? '-' : '+', | |
1154 | (data[34] >> 4) & 0x07, data[34] & 0x0F); | |
0df6b844 LJ |
1155 | break; |
1156 | } | |
1157 | ||
1158 | switch (type) { | |
1159 | case DDR2: | |
632de067 LJ |
1160 | printf ("Data signal input hold 0.%d%d ns\n", |
1161 | (data[35] >> 4) & 0x0F, data[35] & 0x0F); | |
0df6b844 LJ |
1162 | break; |
1163 | default: | |
632de067 LJ |
1164 | printf ("Data signal input hold %c%d.%d ns\n", |
1165 | (data[35] & 0x80) ? '-' : '+', | |
1166 | (data[35] >> 4) & 0x07, data[35] & 0x0F); | |
0df6b844 LJ |
1167 | break; |
1168 | } | |
1169 | ||
4b9206ed | 1170 | puts ("Manufacturer's JEDEC ID "); |
e857a5bd | 1171 | for (j = 64; j <= 71; j++) |
632de067 | 1172 | printf ("%02X ", data[j]); |
4b9206ed | 1173 | putc ('\n'); |
632de067 | 1174 | printf ("Manufacturing Location %02X\n", data[72]); |
4b9206ed | 1175 | puts ("Manufacturer's Part Number "); |
e857a5bd | 1176 | for (j = 73; j <= 90; j++) |
632de067 | 1177 | printf ("%02X ", data[j]); |
4b9206ed | 1178 | putc ('\n'); |
632de067 LJ |
1179 | printf ("Revision Code %02X %02X\n", data[91], data[92]); |
1180 | printf ("Manufacturing Date %02X %02X\n", data[93], data[94]); | |
4b9206ed | 1181 | puts ("Assembly Serial Number "); |
e857a5bd | 1182 | for (j = 95; j <= 98; j++) |
632de067 | 1183 | printf ("%02X ", data[j]); |
4b9206ed | 1184 | putc ('\n'); |
81a8824f | 1185 | |
0df6b844 | 1186 | if (DDR2 != type) { |
632de067 LJ |
1187 | printf ("Speed rating PC%d\n", |
1188 | data[126] == 0x66 ? 66 : data[126]); | |
0df6b844 | 1189 | } |
81a8824f WD |
1190 | return 0; |
1191 | } | |
90253178 | 1192 | #endif |
81a8824f | 1193 | |
bb99ad6d | 1194 | #if defined(CONFIG_I2C_CMD_TREE) |
e43a27c4 HS |
1195 | int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) |
1196 | { | |
6d0f6bcf | 1197 | i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
e43a27c4 HS |
1198 | return 0; |
1199 | } | |
1200 | ||
67b23a32 HS |
1201 | #if defined(CONFIG_I2C_MUX) |
1202 | int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) | |
1203 | { | |
1204 | int ret=0; | |
1205 | ||
1206 | if (argc == 1) { | |
1207 | /* show all busses */ | |
1208 | I2C_MUX *mux; | |
1209 | I2C_MUX_DEVICE *device = i2c_mux_devices; | |
1210 | ||
1211 | printf ("Busses reached over muxes:\n"); | |
1212 | while (device != NULL) { | |
1213 | printf ("Bus ID: %x\n", device->busid); | |
1214 | printf (" reached over Mux(es):\n"); | |
1215 | mux = device->mux; | |
1216 | while (mux != NULL) { | |
1217 | printf (" %s@%x ch: %x\n", mux->name, mux->chip, mux->channel); | |
1218 | mux = mux->next; | |
1219 | } | |
1220 | device = device->next; | |
1221 | } | |
1222 | } else { | |
1223 | I2C_MUX_DEVICE *dev; | |
1224 | ||
1225 | dev = i2c_mux_ident_muxstring ((uchar *)argv[1]); | |
1226 | ret = 0; | |
1227 | } | |
1228 | return ret; | |
1229 | } | |
1230 | #endif /* CONFIG_I2C_MUX */ | |
1231 | ||
bb99ad6d BW |
1232 | #if defined(CONFIG_I2C_MULTI_BUS) |
1233 | int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) | |
1234 | { | |
1235 | int bus_idx, ret=0; | |
1236 | ||
e857a5bd TT |
1237 | if (argc == 1) |
1238 | /* querying current setting */ | |
bb99ad6d | 1239 | printf("Current bus is %d\n", i2c_get_bus_num()); |
e857a5bd | 1240 | else { |
bb99ad6d BW |
1241 | bus_idx = simple_strtoul(argv[1], NULL, 10); |
1242 | printf("Setting bus to %d\n", bus_idx); | |
1243 | ret = i2c_set_bus_num(bus_idx); | |
e857a5bd | 1244 | if (ret) |
bb99ad6d | 1245 | printf("Failure changing bus number (%d)\n", ret); |
bb99ad6d BW |
1246 | } |
1247 | return ret; | |
1248 | } | |
1249 | #endif /* CONFIG_I2C_MULTI_BUS */ | |
1250 | ||
1251 | int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) | |
1252 | { | |
1253 | int speed, ret=0; | |
1254 | ||
e857a5bd TT |
1255 | if (argc == 1) |
1256 | /* querying current speed */ | |
bb99ad6d | 1257 | printf("Current bus speed=%d\n", i2c_get_bus_speed()); |
e857a5bd | 1258 | else { |
bb99ad6d BW |
1259 | speed = simple_strtoul(argv[1], NULL, 10); |
1260 | printf("Setting bus speed to %d Hz\n", speed); | |
1261 | ret = i2c_set_bus_speed(speed); | |
e857a5bd | 1262 | if (ret) |
bb99ad6d | 1263 | printf("Failure changing bus speed (%d)\n", ret); |
bb99ad6d BW |
1264 | } |
1265 | return ret; | |
1266 | } | |
1267 | ||
1268 | int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) | |
1269 | { | |
67b23a32 HS |
1270 | #if defined(CONFIG_I2C_MUX) |
1271 | if (!strncmp(argv[1], "bu", 2)) | |
1272 | return do_i2c_add_bus(cmdtp, flag, --argc, ++argv); | |
1273 | #endif /* CONFIG_I2C_MUX */ | |
9bc2e4ee PT |
1274 | if (!strncmp(argv[1], "sp", 2)) |
1275 | return do_i2c_bus_speed(cmdtp, flag, --argc, ++argv); | |
bb99ad6d | 1276 | #if defined(CONFIG_I2C_MULTI_BUS) |
e857a5bd | 1277 | if (!strncmp(argv[1], "de", 2)) |
bb99ad6d | 1278 | return do_i2c_bus_num(cmdtp, flag, --argc, ++argv); |
bb99ad6d | 1279 | #endif /* CONFIG_I2C_MULTI_BUS */ |
e857a5bd | 1280 | if (!strncmp(argv[1], "md", 2)) |
bb99ad6d | 1281 | return do_i2c_md(cmdtp, flag, --argc, ++argv); |
e857a5bd | 1282 | if (!strncmp(argv[1], "mm", 2)) |
bb99ad6d | 1283 | return do_i2c_mm(cmdtp, flag, --argc, ++argv); |
e857a5bd | 1284 | if (!strncmp(argv[1], "mw", 2)) |
bb99ad6d | 1285 | return do_i2c_mw(cmdtp, flag, --argc, ++argv); |
e857a5bd | 1286 | if (!strncmp(argv[1], "nm", 2)) |
bb99ad6d | 1287 | return do_i2c_nm(cmdtp, flag, --argc, ++argv); |
e857a5bd | 1288 | if (!strncmp(argv[1], "cr", 2)) |
bb99ad6d | 1289 | return do_i2c_crc(cmdtp, flag, --argc, ++argv); |
e857a5bd | 1290 | if (!strncmp(argv[1], "pr", 2)) |
bb99ad6d | 1291 | return do_i2c_probe(cmdtp, flag, --argc, ++argv); |
e43a27c4 HS |
1292 | if (!strncmp(argv[1], "re", 2)) |
1293 | return do_i2c_reset(cmdtp, flag, --argc, ++argv); | |
e857a5bd | 1294 | if (!strncmp(argv[1], "lo", 2)) |
bb99ad6d | 1295 | return do_i2c_loop(cmdtp, flag, --argc, ++argv); |
c76fe474 | 1296 | #if defined(CONFIG_CMD_SDRAM) |
e857a5bd | 1297 | if (!strncmp(argv[1], "sd", 2)) |
bb99ad6d | 1298 | return do_sdram(cmdtp, flag, --argc, ++argv); |
90253178 | 1299 | #endif |
bb99ad6d | 1300 | else |
bb99ad6d | 1301 | printf ("Usage:\n%s\n", cmdtp->usage); |
bb99ad6d BW |
1302 | return 0; |
1303 | } | |
1304 | #endif /* CONFIG_I2C_CMD_TREE */ | |
8bde7f77 WD |
1305 | |
1306 | /***************************************************/ | |
1307 | ||
d9fc7032 MF |
1308 | #if defined(CONFIG_I2C_CMD_TREE) |
1309 | U_BOOT_CMD( | |
1310 | i2c, 6, 1, do_i2c, | |
53677ef1 | 1311 | "i2c - I2C sub-system\n", |
67b23a32 HS |
1312 | #if defined(CONFIG_I2C_MUX) |
1313 | "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes.\n" | |
1314 | #endif /* CONFIG_I2C_MUX */ | |
9bc2e4ee | 1315 | "speed [speed] - show or set I2C bus speed\n" |
d9fc7032 | 1316 | #if defined(CONFIG_I2C_MULTI_BUS) |
9bc2e4ee | 1317 | "i2c dev [dev] - show or set current I2C bus\n" |
d9fc7032 | 1318 | #endif /* CONFIG_I2C_MULTI_BUS */ |
d9fc7032 MF |
1319 | "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n" |
1320 | "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n" | |
1321 | "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n" | |
1322 | "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" | |
1323 | "i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" | |
1324 | "i2c probe - show devices on the I2C bus\n" | |
e43a27c4 | 1325 | "i2c reset - re-init the I2C Controller\n" |
d9fc7032 | 1326 | "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n" |
c76fe474 | 1327 | #if defined(CONFIG_CMD_SDRAM) |
d9fc7032 | 1328 | "i2c sdram chip - print SDRAM configuration information\n" |
90253178 | 1329 | #endif |
d9fc7032 | 1330 | ); |
0c75c9d8 | 1331 | #endif /* CONFIG_I2C_CMD_TREE */ |
0d498393 WD |
1332 | U_BOOT_CMD( |
1333 | imd, 4, 1, do_i2c_md, \ | |
8bde7f77 WD |
1334 | "imd - i2c memory display\n", \ |
1335 | "chip address[.0, .1, .2] [# of objects]\n - i2c memory display\n" \ | |
1336 | ); | |
1337 | ||
0d498393 | 1338 | U_BOOT_CMD( |
53677ef1 | 1339 | imm, 3, 1, do_i2c_mm, |
8bde7f77 WD |
1340 | "imm - i2c memory modify (auto-incrementing)\n", |
1341 | "chip address[.0, .1, .2]\n" | |
1342 | " - memory modify, auto increment address\n" | |
1343 | ); | |
0d498393 WD |
1344 | U_BOOT_CMD( |
1345 | inm, 3, 1, do_i2c_nm, | |
8bde7f77 WD |
1346 | "inm - memory modify (constant address)\n", |
1347 | "chip address[.0, .1, .2]\n - memory modify, read and keep address\n" | |
1348 | ); | |
1349 | ||
0d498393 WD |
1350 | U_BOOT_CMD( |
1351 | imw, 5, 1, do_i2c_mw, | |
8bde7f77 WD |
1352 | "imw - memory write (fill)\n", |
1353 | "chip address[.0, .1, .2] value [count]\n - memory write (fill)\n" | |
1354 | ); | |
1355 | ||
0d498393 WD |
1356 | U_BOOT_CMD( |
1357 | icrc32, 5, 1, do_i2c_crc, | |
8bde7f77 WD |
1358 | "icrc32 - checksum calculation\n", |
1359 | "chip address[.0, .1, .2] count\n - compute CRC32 checksum\n" | |
1360 | ); | |
1361 | ||
0d498393 WD |
1362 | U_BOOT_CMD( |
1363 | iprobe, 1, 1, do_i2c_probe, | |
8bde7f77 WD |
1364 | "iprobe - probe to discover valid I2C chip addresses\n", |
1365 | "\n -discover valid I2C chip addresses\n" | |
1366 | ); | |
1367 | ||
1368 | /* | |
1369 | * Require full name for "iloop" because it is an infinite loop! | |
1370 | */ | |
0d498393 WD |
1371 | U_BOOT_CMD( |
1372 | iloop, 5, 1, do_i2c_loop, | |
8bde7f77 WD |
1373 | "iloop - infinite loop on address range\n", |
1374 | "chip address[.0, .1, .2] [# of objects]\n" | |
1375 | " - loop, reading a set of addresses\n" | |
1376 | ); | |
1377 | ||
c76fe474 | 1378 | #if defined(CONFIG_CMD_SDRAM) |
0d498393 WD |
1379 | U_BOOT_CMD( |
1380 | isdram, 2, 1, do_sdram, | |
8bde7f77 WD |
1381 | "isdram - print SDRAM configuration information\n", |
1382 | "chip\n - print SDRAM configuration information\n" | |
1383 | " (valid chip values 50..57)\n" | |
1384 | ); | |
1385 | #endif | |
67b23a32 HS |
1386 | |
1387 | #if defined(CONFIG_I2C_MUX) | |
1388 | ||
1389 | int i2c_mux_add_device(I2C_MUX_DEVICE *dev) | |
1390 | { | |
1391 | I2C_MUX_DEVICE *devtmp = i2c_mux_devices; | |
1392 | ||
1393 | if (i2c_mux_devices == NULL) { | |
1394 | i2c_mux_devices = dev; | |
1395 | return 0; | |
1396 | } | |
1397 | while (devtmp->next != NULL) | |
1398 | devtmp = devtmp->next; | |
1399 | ||
1400 | devtmp->next = dev; | |
1401 | return 0; | |
1402 | } | |
1403 | ||
1404 | I2C_MUX_DEVICE *i2c_mux_search_device(int id) | |
1405 | { | |
1406 | I2C_MUX_DEVICE *device = i2c_mux_devices; | |
1407 | ||
1408 | while (device != NULL) { | |
1409 | if (device->busid == id) | |
1410 | return device; | |
1411 | device = device->next; | |
1412 | } | |
1413 | return NULL; | |
1414 | } | |
1415 | ||
1416 | /* searches in the buf from *pos the next ':'. | |
1417 | * returns: | |
1418 | * 0 if found (with *pos = where) | |
1419 | * < 0 if an error occured | |
1420 | * > 0 if the end of buf is reached | |
1421 | */ | |
1422 | static int i2c_mux_search_next (int *pos, uchar *buf, int len) | |
1423 | { | |
1424 | while ((buf[*pos] != ':') && (*pos < len)) { | |
1425 | *pos += 1; | |
1426 | } | |
1427 | if (*pos >= len) | |
1428 | return 1; | |
1429 | if (buf[*pos] != ':') | |
1430 | return -1; | |
1431 | return 0; | |
1432 | } | |
1433 | ||
1434 | static int i2c_mux_get_busid (void) | |
1435 | { | |
1436 | int tmp = i2c_mux_busid; | |
1437 | ||
1438 | i2c_mux_busid ++; | |
1439 | return tmp; | |
1440 | } | |
1441 | ||
1442 | /* Analyses a Muxstring and sends immediately the | |
1443 | Commands to the Muxes. Runs from Flash. | |
1444 | */ | |
1445 | int i2c_mux_ident_muxstring_f (uchar *buf) | |
1446 | { | |
1447 | int pos = 0; | |
1448 | int oldpos; | |
1449 | int ret = 0; | |
1450 | int len = strlen((char *)buf); | |
1451 | int chip; | |
1452 | uchar channel; | |
1453 | int was = 0; | |
1454 | ||
1455 | while (ret == 0) { | |
1456 | oldpos = pos; | |
1457 | /* search name */ | |
1458 | ret = i2c_mux_search_next(&pos, buf, len); | |
1459 | if (ret != 0) | |
1460 | printf ("ERROR\n"); | |
1461 | /* search address */ | |
1462 | pos ++; | |
1463 | oldpos = pos; | |
1464 | ret = i2c_mux_search_next(&pos, buf, len); | |
1465 | if (ret != 0) | |
1466 | printf ("ERROR\n"); | |
1467 | buf[pos] = 0; | |
1468 | chip = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1469 | buf[pos] = ':'; | |
1470 | /* search channel */ | |
1471 | pos ++; | |
1472 | oldpos = pos; | |
1473 | ret = i2c_mux_search_next(&pos, buf, len); | |
1474 | if (ret < 0) | |
1475 | printf ("ERROR\n"); | |
1476 | was = 0; | |
1477 | if (buf[pos] != 0) { | |
1478 | buf[pos] = 0; | |
1479 | was = 1; | |
1480 | } | |
1481 | channel = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1482 | if (was) | |
1483 | buf[pos] = ':'; | |
1484 | if (i2c_write(chip, 0, 0, &channel, 1) != 0) { | |
1485 | printf ("Error setting Mux: chip:%x channel: \ | |
1486 | %x\n", chip, channel); | |
1487 | return -1; | |
1488 | } | |
1489 | pos ++; | |
1490 | oldpos = pos; | |
1491 | ||
1492 | } | |
1493 | ||
1494 | return 0; | |
1495 | } | |
1496 | ||
1497 | /* Analyses a Muxstring and if this String is correct | |
1498 | * adds a new I2C Bus. | |
1499 | */ | |
1500 | I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf) | |
1501 | { | |
1502 | I2C_MUX_DEVICE *device; | |
1503 | I2C_MUX *mux; | |
1504 | int pos = 0; | |
1505 | int oldpos; | |
1506 | int ret = 0; | |
1507 | int len = strlen((char *)buf); | |
1508 | int was = 0; | |
1509 | ||
1510 | device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE)); | |
1511 | device->mux = NULL; | |
1512 | device->busid = i2c_mux_get_busid (); | |
1513 | device->next = NULL; | |
1514 | while (ret == 0) { | |
1515 | mux = (I2C_MUX *)malloc (sizeof(I2C_MUX)); | |
1516 | mux->next = NULL; | |
1517 | /* search name of mux */ | |
1518 | oldpos = pos; | |
1519 | ret = i2c_mux_search_next(&pos, buf, len); | |
1520 | if (ret != 0) | |
1521 | printf ("%s no name.\n", __FUNCTION__); | |
1522 | mux->name = (char *)malloc (pos - oldpos + 1); | |
1523 | memcpy (mux->name, &buf[oldpos], pos - oldpos); | |
1524 | mux->name[pos - oldpos] = 0; | |
1525 | /* search address */ | |
1526 | pos ++; | |
1527 | oldpos = pos; | |
1528 | ret = i2c_mux_search_next(&pos, buf, len); | |
1529 | if (ret != 0) | |
1530 | printf ("%s no mux address.\n", __FUNCTION__); | |
1531 | buf[pos] = 0; | |
1532 | mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1533 | buf[pos] = ':'; | |
1534 | /* search channel */ | |
1535 | pos ++; | |
1536 | oldpos = pos; | |
1537 | ret = i2c_mux_search_next(&pos, buf, len); | |
1538 | if (ret < 0) | |
1539 | printf ("%s no mux channel.\n", __FUNCTION__); | |
1540 | was = 0; | |
1541 | if (buf[pos] != 0) { | |
1542 | buf[pos] = 0; | |
1543 | was = 1; | |
1544 | } | |
1545 | mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1546 | if (was) | |
1547 | buf[pos] = ':'; | |
1548 | if (device->mux == NULL) | |
1549 | device->mux = mux; | |
1550 | else { | |
1551 | I2C_MUX *muxtmp = device->mux; | |
1552 | while (muxtmp->next != NULL) { | |
1553 | muxtmp = muxtmp->next; | |
1554 | } | |
1555 | muxtmp->next = mux; | |
1556 | } | |
1557 | pos ++; | |
1558 | oldpos = pos; | |
1559 | } | |
1560 | if (ret > 0) { | |
1561 | /* Add Device */ | |
1562 | i2c_mux_add_device (device); | |
1563 | return device; | |
1564 | } | |
1565 | ||
1566 | return NULL; | |
1567 | } | |
1568 | ||
1569 | int i2x_mux_select_mux(int bus) | |
1570 | { | |
1571 | I2C_MUX_DEVICE *dev; | |
1572 | I2C_MUX *mux; | |
1573 | ||
1574 | if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) { | |
1575 | /* select Default Mux Bus */ | |
6d0f6bcf JCPV |
1576 | #if defined(CONFIG_SYS_I2C_IVM_BUS) |
1577 | i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS); | |
67b23a32 HS |
1578 | #else |
1579 | { | |
1580 | unsigned char *buf; | |
1581 | buf = (unsigned char *) getenv("EEprom_ivm"); | |
1582 | if (buf != NULL) | |
1583 | i2c_mux_ident_muxstring_f (buf); | |
1584 | } | |
1585 | #endif | |
1586 | return 0; | |
1587 | } | |
1588 | dev = i2c_mux_search_device(bus); | |
1589 | if (dev == NULL) | |
1590 | return -1; | |
1591 | ||
1592 | mux = dev->mux; | |
1593 | while (mux != NULL) { | |
1594 | if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) { | |
1595 | printf ("Error setting Mux: chip:%x channel: \ | |
1596 | %x\n", mux->chip, mux->channel); | |
1597 | return -1; | |
1598 | } | |
1599 | mux = mux->next; | |
1600 | } | |
1601 | return 0; | |
1602 | } | |
1603 | #endif /* CONFIG_I2C_MUX */ | |
1604 |