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81a8824f WD |
1 | /* |
2 | * (C) Copyright 2001 | |
3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * I2C Functions similar to the standard memory functions. | |
26 | * | |
27 | * There are several parameters in many of the commands that bear further | |
28 | * explanations: | |
29 | * | |
81a8824f WD |
30 | * {i2c_chip} is the I2C chip address (the first byte sent on the bus). |
31 | * Each I2C chip on the bus has a unique address. On the I2C data bus, | |
32 | * the address is the upper seven bits and the LSB is the "read/write" | |
33 | * bit. Note that the {i2c_chip} address specified on the command | |
34 | * line is not shifted up: e.g. a typical EEPROM memory chip may have | |
35 | * an I2C address of 0x50, but the data put on the bus will be 0xA0 | |
36 | * for write and 0xA1 for read. This "non shifted" address notation | |
37 | * matches at least half of the data sheets :-/. | |
38 | * | |
39 | * {addr} is the address (or offset) within the chip. Small memory | |
40 | * chips have 8 bit addresses. Large memory chips have 16 bit | |
41 | * addresses. Other memory chips have 9, 10, or 11 bit addresses. | |
42 | * Many non-memory chips have multiple registers and {addr} is used | |
43 | * as the register index. Some non-memory chips have only one register | |
44 | * and therefore don't need any {addr} parameter. | |
45 | * | |
46 | * The default {addr} parameter is one byte (.1) which works well for | |
47 | * memories and registers with 8 bits of address space. | |
48 | * | |
49 | * You can specify the length of the {addr} field with the optional .0, | |
50 | * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are | |
51 | * manipulating a single register device which doesn't use an address | |
52 | * field, use "0.0" for the address and the ".0" length field will | |
53 | * suppress the address in the I2C data stream. This also works for | |
54 | * successive reads using the I2C auto-incrementing memory pointer. | |
55 | * | |
56 | * If you are manipulating a large memory with 2-byte addresses, use | |
57 | * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal). | |
58 | * | |
59 | * Then there are the unfortunate memory chips that spill the most | |
60 | * significant 1, 2, or 3 bits of address into the chip address byte. | |
61 | * This effectively makes one chip (logically) look like 2, 4, or | |
62 | * 8 chips. This is handled (awkwardly) by #defining | |
6d0f6bcf | 63 | * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the |
81a8824f WD |
64 | * {addr} field (since .1 is the default, it doesn't actually have to |
65 | * be specified). Examples: given a memory chip at I2C chip address | |
66 | * 0x50, the following would happen... | |
0f89c54b | 67 | * i2c md 50 0 10 display 16 bytes starting at 0x000 |
81a8824f | 68 | * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd> |
0f89c54b | 69 | * i2c md 50 100 10 display 16 bytes starting at 0x100 |
81a8824f | 70 | * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd> |
0f89c54b | 71 | * i2c md 50 210 10 display 16 bytes starting at 0x210 |
81a8824f WD |
72 | * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd> |
73 | * This is awfully ugly. It would be nice if someone would think up | |
74 | * a better way of handling this. | |
75 | * | |
76 | * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). | |
77 | */ | |
78 | ||
79 | #include <common.h> | |
80 | #include <command.h> | |
67b23a32 | 81 | #include <environment.h> |
81a8824f | 82 | #include <i2c.h> |
67b23a32 | 83 | #include <malloc.h> |
81a8824f WD |
84 | #include <asm/byteorder.h> |
85 | ||
81a8824f WD |
86 | /* Display values from last command. |
87 | * Memory modify remembered values are different from display memory. | |
88 | */ | |
89 | static uchar i2c_dp_last_chip; | |
90 | static uint i2c_dp_last_addr; | |
91 | static uint i2c_dp_last_alen; | |
92 | static uint i2c_dp_last_length = 0x10; | |
93 | ||
94 | static uchar i2c_mm_last_chip; | |
95 | static uint i2c_mm_last_addr; | |
96 | static uint i2c_mm_last_alen; | |
97 | ||
bb99ad6d BW |
98 | /* If only one I2C bus is present, the list of devices to ignore when |
99 | * the probe command is issued is represented by a 1D array of addresses. | |
100 | * When multiple buses are present, the list is an array of bus-address | |
101 | * pairs. The following macros take care of this */ | |
102 | ||
6d0f6bcf | 103 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
bb99ad6d BW |
104 | #if defined(CONFIG_I2C_MULTI_BUS) |
105 | static struct | |
106 | { | |
107 | uchar bus; | |
108 | uchar addr; | |
6d0f6bcf | 109 | } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
110 | #define GET_BUS_NUM i2c_get_bus_num() |
111 | #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b)) | |
112 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a)) | |
113 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr | |
114 | #else /* single bus */ | |
6d0f6bcf | 115 | static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
116 | #define GET_BUS_NUM 0 |
117 | #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ | |
118 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) | |
119 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)] | |
120 | #endif /* CONFIG_MULTI_BUS */ | |
121 | ||
122 | #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0])) | |
81a8824f WD |
123 | #endif |
124 | ||
67b23a32 HS |
125 | #if defined(CONFIG_I2C_MUX) |
126 | static I2C_MUX_DEVICE *i2c_mux_devices = NULL; | |
6d0f6bcf | 127 | static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS; |
67b23a32 HS |
128 | |
129 | DECLARE_GLOBAL_DATA_PTR; | |
130 | ||
131 | #endif | |
132 | ||
a266fe95 FM |
133 | #define DISP_LINE_LEN 16 |
134 | ||
655b34a7 PT |
135 | /* TODO: Implement architecture-specific get/set functions */ |
136 | unsigned int __def_i2c_get_bus_speed(void) | |
137 | { | |
138 | return CONFIG_SYS_I2C_SPEED; | |
139 | } | |
140 | unsigned int i2c_get_bus_speed(void) | |
141 | __attribute__((weak, alias("__def_i2c_get_bus_speed"))); | |
142 | ||
143 | int __def_i2c_set_bus_speed(unsigned int speed) | |
144 | { | |
145 | if (speed != CONFIG_SYS_I2C_SPEED) | |
146 | return -1; | |
147 | ||
148 | return 0; | |
149 | } | |
150 | int i2c_set_bus_speed(unsigned int) | |
151 | __attribute__((weak, alias("__def_i2c_set_bus_speed"))); | |
152 | ||
2c0dc990 FM |
153 | /* |
154 | * get_alen: small parser helper function to get address length | |
7a92e53c | 155 | * returns the address length |
2c0dc990 FM |
156 | */ |
157 | static uint get_alen(char *arg) | |
158 | { | |
159 | int j; | |
160 | int alen; | |
161 | ||
162 | alen = 1; | |
163 | for (j = 0; j < 8; j++) { | |
164 | if (arg[j] == '.') { | |
165 | alen = arg[j+1] - '0'; | |
2c0dc990 FM |
166 | break; |
167 | } else if (arg[j] == '\0') | |
168 | break; | |
169 | } | |
170 | return alen; | |
171 | } | |
172 | ||
652e5354 FM |
173 | /* |
174 | * Syntax: | |
175 | * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr} | |
176 | */ | |
177 | ||
54841ab5 | 178 | static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
652e5354 FM |
179 | { |
180 | u_char chip; | |
181 | uint devaddr, alen, length; | |
182 | u_char *memaddr; | |
652e5354 | 183 | |
47e26b1b WD |
184 | if (argc != 5) |
185 | return cmd_usage(cmdtp); | |
652e5354 FM |
186 | |
187 | /* | |
188 | * I2C chip address | |
189 | */ | |
190 | chip = simple_strtoul(argv[1], NULL, 16); | |
191 | ||
192 | /* | |
193 | * I2C data address within the chip. This can be 1 or | |
194 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
195 | */ | |
196 | devaddr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 197 | alen = get_alen(argv[2]); |
7a92e53c | 198 | if (alen > 3) |
47e26b1b | 199 | return cmd_usage(cmdtp); |
652e5354 FM |
200 | |
201 | /* | |
202 | * Length is the number of objects, not number of bytes. | |
203 | */ | |
204 | length = simple_strtoul(argv[3], NULL, 16); | |
205 | ||
206 | /* | |
207 | * memaddr is the address where to store things in memory | |
208 | */ | |
209 | memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16); | |
210 | ||
211 | if (i2c_read(chip, devaddr, alen, memaddr, length) != 0) { | |
212 | puts ("Error reading the chip.\n"); | |
213 | return 1; | |
214 | } | |
215 | return 0; | |
216 | } | |
217 | ||
4a8cf338 FM |
218 | /* |
219 | * Syntax: | |
220 | * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} | |
221 | */ | |
54841ab5 | 222 | static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
223 | { |
224 | u_char chip; | |
225 | uint addr, alen, length; | |
226 | int j, nbytes, linebytes; | |
227 | ||
228 | /* We use the last specified parameters, unless new ones are | |
229 | * entered. | |
230 | */ | |
231 | chip = i2c_dp_last_chip; | |
232 | addr = i2c_dp_last_addr; | |
233 | alen = i2c_dp_last_alen; | |
234 | length = i2c_dp_last_length; | |
235 | ||
47e26b1b WD |
236 | if (argc < 3) |
237 | return cmd_usage(cmdtp); | |
81a8824f WD |
238 | |
239 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
240 | /* | |
241 | * New command specified. | |
242 | */ | |
81a8824f WD |
243 | |
244 | /* | |
245 | * I2C chip address | |
246 | */ | |
247 | chip = simple_strtoul(argv[1], NULL, 16); | |
248 | ||
249 | /* | |
250 | * I2C data address within the chip. This can be 1 or | |
251 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
252 | */ | |
253 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 254 | alen = get_alen(argv[2]); |
7a92e53c | 255 | if (alen > 3) |
47e26b1b | 256 | return cmd_usage(cmdtp); |
81a8824f WD |
257 | |
258 | /* | |
259 | * If another parameter, it is the length to display. | |
260 | * Length is the number of objects, not number of bytes. | |
261 | */ | |
262 | if (argc > 3) | |
263 | length = simple_strtoul(argv[3], NULL, 16); | |
264 | } | |
265 | ||
266 | /* | |
267 | * Print the lines. | |
268 | * | |
269 | * We buffer all read data, so we can make sure data is read only | |
270 | * once. | |
271 | */ | |
272 | nbytes = length; | |
273 | do { | |
274 | unsigned char linebuf[DISP_LINE_LEN]; | |
275 | unsigned char *cp; | |
276 | ||
277 | linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; | |
278 | ||
e857a5bd | 279 | if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0) |
4b9206ed | 280 | puts ("Error reading the chip.\n"); |
e857a5bd | 281 | else { |
81a8824f WD |
282 | printf("%04x:", addr); |
283 | cp = linebuf; | |
284 | for (j=0; j<linebytes; j++) { | |
285 | printf(" %02x", *cp++); | |
286 | addr++; | |
287 | } | |
4b9206ed | 288 | puts (" "); |
81a8824f WD |
289 | cp = linebuf; |
290 | for (j=0; j<linebytes; j++) { | |
291 | if ((*cp < 0x20) || (*cp > 0x7e)) | |
4b9206ed | 292 | puts ("."); |
81a8824f WD |
293 | else |
294 | printf("%c", *cp); | |
295 | cp++; | |
296 | } | |
4b9206ed | 297 | putc ('\n'); |
81a8824f WD |
298 | } |
299 | nbytes -= linebytes; | |
300 | } while (nbytes > 0); | |
301 | ||
302 | i2c_dp_last_chip = chip; | |
303 | i2c_dp_last_addr = addr; | |
304 | i2c_dp_last_alen = alen; | |
305 | i2c_dp_last_length = length; | |
306 | ||
307 | return 0; | |
308 | } | |
309 | ||
81a8824f WD |
310 | |
311 | /* Write (fill) memory | |
312 | * | |
313 | * Syntax: | |
0f89c54b | 314 | * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] |
81a8824f | 315 | */ |
54841ab5 | 316 | static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
317 | { |
318 | uchar chip; | |
319 | ulong addr; | |
320 | uint alen; | |
321 | uchar byte; | |
322 | int count; | |
81a8824f | 323 | |
47e26b1b WD |
324 | if ((argc < 4) || (argc > 5)) |
325 | return cmd_usage(cmdtp); | |
81a8824f WD |
326 | |
327 | /* | |
53677ef1 WD |
328 | * Chip is always specified. |
329 | */ | |
81a8824f WD |
330 | chip = simple_strtoul(argv[1], NULL, 16); |
331 | ||
332 | /* | |
333 | * Address is always specified. | |
334 | */ | |
335 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 336 | alen = get_alen(argv[2]); |
7a92e53c | 337 | if (alen > 3) |
47e26b1b | 338 | return cmd_usage(cmdtp); |
81a8824f WD |
339 | |
340 | /* | |
341 | * Value to write is always specified. | |
342 | */ | |
343 | byte = simple_strtoul(argv[3], NULL, 16); | |
344 | ||
345 | /* | |
346 | * Optional count | |
347 | */ | |
e857a5bd | 348 | if (argc == 5) |
81a8824f | 349 | count = simple_strtoul(argv[4], NULL, 16); |
e857a5bd | 350 | else |
81a8824f | 351 | count = 1; |
81a8824f WD |
352 | |
353 | while (count-- > 0) { | |
e857a5bd | 354 | if (i2c_write(chip, addr++, alen, &byte, 1) != 0) |
4b9206ed | 355 | puts ("Error writing the chip.\n"); |
81a8824f WD |
356 | /* |
357 | * Wait for the write to complete. The write can take | |
358 | * up to 10mSec (we allow a little more time). | |
81a8824f | 359 | */ |
d4f5c728 | 360 | /* |
361 | * No write delay with FRAM devices. | |
362 | */ | |
6d0f6bcf | 363 | #if !defined(CONFIG_SYS_I2C_FRAM) |
81a8824f | 364 | udelay(11000); |
d4f5c728 | 365 | #endif |
81a8824f WD |
366 | } |
367 | ||
368 | return (0); | |
369 | } | |
370 | ||
81a8824f WD |
371 | /* Calculate a CRC on memory |
372 | * | |
373 | * Syntax: | |
0f89c54b | 374 | * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} |
81a8824f | 375 | */ |
54841ab5 | 376 | static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
377 | { |
378 | uchar chip; | |
379 | ulong addr; | |
380 | uint alen; | |
381 | int count; | |
382 | uchar byte; | |
383 | ulong crc; | |
384 | ulong err; | |
81a8824f | 385 | |
47e26b1b WD |
386 | if (argc < 4) |
387 | return cmd_usage(cmdtp); | |
81a8824f WD |
388 | |
389 | /* | |
53677ef1 WD |
390 | * Chip is always specified. |
391 | */ | |
81a8824f WD |
392 | chip = simple_strtoul(argv[1], NULL, 16); |
393 | ||
394 | /* | |
395 | * Address is always specified. | |
396 | */ | |
397 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 398 | alen = get_alen(argv[2]); |
7a92e53c | 399 | if (alen > 3) |
47e26b1b | 400 | return cmd_usage(cmdtp); |
81a8824f WD |
401 | |
402 | /* | |
403 | * Count is always specified | |
404 | */ | |
405 | count = simple_strtoul(argv[3], NULL, 16); | |
406 | ||
407 | printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1); | |
408 | /* | |
409 | * CRC a byte at a time. This is going to be slooow, but hey, the | |
410 | * memories are small and slow too so hopefully nobody notices. | |
411 | */ | |
412 | crc = 0; | |
413 | err = 0; | |
e857a5bd TT |
414 | while (count-- > 0) { |
415 | if (i2c_read(chip, addr, alen, &byte, 1) != 0) | |
81a8824f | 416 | err++; |
81a8824f WD |
417 | crc = crc32 (crc, &byte, 1); |
418 | addr++; | |
419 | } | |
e857a5bd | 420 | if (err > 0) |
4b9206ed | 421 | puts ("Error reading the chip,\n"); |
e857a5bd | 422 | else |
81a8824f | 423 | printf ("%08lx\n", crc); |
81a8824f WD |
424 | |
425 | return 0; | |
426 | } | |
427 | ||
81a8824f WD |
428 | /* Modify memory. |
429 | * | |
430 | * Syntax: | |
0f89c54b PT |
431 | * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} |
432 | * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} | |
81a8824f WD |
433 | */ |
434 | ||
435 | static int | |
54841ab5 | 436 | mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) |
81a8824f WD |
437 | { |
438 | uchar chip; | |
439 | ulong addr; | |
440 | uint alen; | |
441 | ulong data; | |
442 | int size = 1; | |
443 | int nbytes; | |
81a8824f WD |
444 | extern char console_buffer[]; |
445 | ||
47e26b1b WD |
446 | if (argc != 3) |
447 | return cmd_usage(cmdtp); | |
81a8824f WD |
448 | |
449 | #ifdef CONFIG_BOOT_RETRY_TIME | |
450 | reset_cmd_timeout(); /* got a good command to get here */ | |
451 | #endif | |
452 | /* | |
453 | * We use the last specified parameters, unless new ones are | |
454 | * entered. | |
455 | */ | |
456 | chip = i2c_mm_last_chip; | |
457 | addr = i2c_mm_last_addr; | |
458 | alen = i2c_mm_last_alen; | |
459 | ||
460 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
461 | /* | |
462 | * New command specified. Check for a size specification. | |
463 | * Defaults to byte if no or incorrect specification. | |
464 | */ | |
465 | size = cmd_get_data_size(argv[0], 1); | |
466 | ||
467 | /* | |
53677ef1 WD |
468 | * Chip is always specified. |
469 | */ | |
81a8824f WD |
470 | chip = simple_strtoul(argv[1], NULL, 16); |
471 | ||
472 | /* | |
473 | * Address is always specified. | |
474 | */ | |
475 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 476 | alen = get_alen(argv[2]); |
7a92e53c | 477 | if (alen > 3) |
47e26b1b | 478 | return cmd_usage(cmdtp); |
81a8824f WD |
479 | } |
480 | ||
481 | /* | |
482 | * Print the address, followed by value. Then accept input for | |
483 | * the next value. A non-converted value exits. | |
484 | */ | |
485 | do { | |
486 | printf("%08lx:", addr); | |
e857a5bd | 487 | if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0) |
4b9206ed | 488 | puts ("\nError reading the chip,\n"); |
e857a5bd | 489 | else { |
81a8824f | 490 | data = cpu_to_be32(data); |
e857a5bd | 491 | if (size == 1) |
81a8824f | 492 | printf(" %02lx", (data >> 24) & 0x000000FF); |
e857a5bd | 493 | else if (size == 2) |
81a8824f | 494 | printf(" %04lx", (data >> 16) & 0x0000FFFF); |
e857a5bd | 495 | else |
81a8824f | 496 | printf(" %08lx", data); |
81a8824f WD |
497 | } |
498 | ||
499 | nbytes = readline (" ? "); | |
500 | if (nbytes == 0) { | |
501 | /* | |
502 | * <CR> pressed as only input, don't modify current | |
503 | * location and move to next. | |
504 | */ | |
505 | if (incrflag) | |
506 | addr += size; | |
507 | nbytes = size; | |
508 | #ifdef CONFIG_BOOT_RETRY_TIME | |
509 | reset_cmd_timeout(); /* good enough to not time out */ | |
510 | #endif | |
511 | } | |
512 | #ifdef CONFIG_BOOT_RETRY_TIME | |
e857a5bd | 513 | else if (nbytes == -2) |
81a8824f | 514 | break; /* timed out, exit the command */ |
81a8824f WD |
515 | #endif |
516 | else { | |
517 | char *endp; | |
518 | ||
519 | data = simple_strtoul(console_buffer, &endp, 16); | |
e857a5bd | 520 | if (size == 1) |
81a8824f | 521 | data = data << 24; |
e857a5bd | 522 | else if (size == 2) |
81a8824f | 523 | data = data << 16; |
81a8824f WD |
524 | data = be32_to_cpu(data); |
525 | nbytes = endp - console_buffer; | |
526 | if (nbytes) { | |
527 | #ifdef CONFIG_BOOT_RETRY_TIME | |
528 | /* | |
529 | * good enough to not time out | |
530 | */ | |
531 | reset_cmd_timeout(); | |
532 | #endif | |
e857a5bd | 533 | if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0) |
4b9206ed | 534 | puts ("Error writing the chip.\n"); |
6d0f6bcf JCPV |
535 | #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS |
536 | udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); | |
2535d602 | 537 | #endif |
81a8824f WD |
538 | if (incrflag) |
539 | addr += size; | |
540 | } | |
541 | } | |
542 | } while (nbytes); | |
543 | ||
0800707b PT |
544 | i2c_mm_last_chip = chip; |
545 | i2c_mm_last_addr = addr; | |
546 | i2c_mm_last_alen = alen; | |
81a8824f WD |
547 | |
548 | return 0; | |
549 | } | |
550 | ||
551 | /* | |
552 | * Syntax: | |
0f89c54b | 553 | * i2c probe {addr}{.0, .1, .2} |
81a8824f | 554 | */ |
54841ab5 | 555 | static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
556 | { |
557 | int j; | |
6d0f6bcf | 558 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 559 | int k, skip; |
bb99ad6d BW |
560 | uchar bus = GET_BUS_NUM; |
561 | #endif /* NOPROBES */ | |
81a8824f | 562 | |
4b9206ed | 563 | puts ("Valid chip addresses:"); |
e857a5bd | 564 | for (j = 0; j < 128; j++) { |
6d0f6bcf | 565 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 566 | skip = 0; |
e857a5bd TT |
567 | for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) { |
568 | if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) { | |
81a8824f WD |
569 | skip = 1; |
570 | break; | |
571 | } | |
572 | } | |
573 | if (skip) | |
574 | continue; | |
575 | #endif | |
e857a5bd | 576 | if (i2c_probe(j) == 0) |
81a8824f | 577 | printf(" %02X", j); |
81a8824f | 578 | } |
4b9206ed | 579 | putc ('\n'); |
81a8824f | 580 | |
6d0f6bcf | 581 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 582 | puts ("Excluded chip addresses:"); |
e857a5bd TT |
583 | for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) { |
584 | if (COMPARE_BUS(bus,k)) | |
bb99ad6d BW |
585 | printf(" %02X", NO_PROBE_ADDR(k)); |
586 | } | |
4b9206ed | 587 | putc ('\n'); |
81a8824f WD |
588 | #endif |
589 | ||
590 | return 0; | |
591 | } | |
592 | ||
81a8824f WD |
593 | /* |
594 | * Syntax: | |
0f89c54b | 595 | * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] |
81a8824f WD |
596 | * {length} - Number of bytes to read |
597 | * {delay} - A DECIMAL number and defaults to 1000 uSec | |
598 | */ | |
54841ab5 | 599 | static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
600 | { |
601 | u_char chip; | |
602 | ulong alen; | |
603 | uint addr; | |
604 | uint length; | |
605 | u_char bytes[16]; | |
606 | int delay; | |
81a8824f | 607 | |
47e26b1b WD |
608 | if (argc < 3) |
609 | return cmd_usage(cmdtp); | |
81a8824f WD |
610 | |
611 | /* | |
612 | * Chip is always specified. | |
613 | */ | |
614 | chip = simple_strtoul(argv[1], NULL, 16); | |
615 | ||
616 | /* | |
617 | * Address is always specified. | |
618 | */ | |
619 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 620 | alen = get_alen(argv[2]); |
7a92e53c | 621 | if (alen > 3) |
47e26b1b | 622 | return cmd_usage(cmdtp); |
81a8824f WD |
623 | |
624 | /* | |
625 | * Length is the number of objects, not number of bytes. | |
626 | */ | |
627 | length = 1; | |
628 | length = simple_strtoul(argv[3], NULL, 16); | |
e857a5bd | 629 | if (length > sizeof(bytes)) |
81a8824f | 630 | length = sizeof(bytes); |
81a8824f WD |
631 | |
632 | /* | |
633 | * The delay time (uSec) is optional. | |
634 | */ | |
635 | delay = 1000; | |
e857a5bd | 636 | if (argc > 3) |
81a8824f | 637 | delay = simple_strtoul(argv[4], NULL, 10); |
81a8824f WD |
638 | /* |
639 | * Run the loop... | |
640 | */ | |
e857a5bd TT |
641 | while (1) { |
642 | if (i2c_read(chip, addr, alen, bytes, length) != 0) | |
4b9206ed | 643 | puts ("Error reading the chip.\n"); |
81a8824f WD |
644 | udelay(delay); |
645 | } | |
646 | ||
647 | /* NOTREACHED */ | |
648 | return 0; | |
649 | } | |
650 | ||
81a8824f WD |
651 | /* |
652 | * The SDRAM command is separately configured because many | |
653 | * (most?) embedded boards don't use SDRAM DIMMs. | |
654 | */ | |
c76fe474 | 655 | #if defined(CONFIG_CMD_SDRAM) |
632de067 LJ |
656 | static void print_ddr2_tcyc (u_char const b) |
657 | { | |
658 | printf ("%d.", (b >> 4) & 0x0F); | |
659 | switch (b & 0x0F) { | |
660 | case 0x0: | |
661 | case 0x1: | |
662 | case 0x2: | |
663 | case 0x3: | |
664 | case 0x4: | |
665 | case 0x5: | |
666 | case 0x6: | |
667 | case 0x7: | |
668 | case 0x8: | |
669 | case 0x9: | |
670 | printf ("%d ns\n", b & 0x0F); | |
671 | break; | |
672 | case 0xA: | |
673 | puts ("25 ns\n"); | |
674 | break; | |
675 | case 0xB: | |
676 | puts ("33 ns\n"); | |
677 | break; | |
678 | case 0xC: | |
679 | puts ("66 ns\n"); | |
680 | break; | |
681 | case 0xD: | |
682 | puts ("75 ns\n"); | |
683 | break; | |
684 | default: | |
685 | puts ("?? ns\n"); | |
686 | break; | |
687 | } | |
688 | } | |
689 | ||
690 | static void decode_bits (u_char const b, char const *str[], int const do_once) | |
691 | { | |
692 | u_char mask; | |
693 | ||
694 | for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) { | |
695 | if (b & mask) { | |
696 | puts (*str); | |
697 | if (do_once) | |
698 | return; | |
699 | } | |
700 | } | |
701 | } | |
81a8824f WD |
702 | |
703 | /* | |
704 | * Syntax: | |
0f89c54b | 705 | * i2c sdram {i2c_chip} |
81a8824f | 706 | */ |
54841ab5 | 707 | static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 708 | { |
632de067 LJ |
709 | enum { unknown, EDO, SDRAM, DDR2 } type; |
710 | ||
81a8824f WD |
711 | u_char chip; |
712 | u_char data[128]; | |
713 | u_char cksum; | |
714 | int j; | |
715 | ||
632de067 LJ |
716 | static const char *decode_CAS_DDR2[] = { |
717 | " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD" | |
718 | }; | |
719 | ||
720 | static const char *decode_CAS_default[] = { | |
721 | " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1" | |
722 | }; | |
723 | ||
724 | static const char *decode_CS_WE_default[] = { | |
725 | " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0" | |
726 | }; | |
727 | ||
728 | static const char *decode_byte21_default[] = { | |
729 | " TBD (bit 7)\n", | |
730 | " Redundant row address\n", | |
731 | " Differential clock input\n", | |
732 | " Registerd DQMB inputs\n", | |
733 | " Buffered DQMB inputs\n", | |
734 | " On-card PLL\n", | |
735 | " Registered address/control lines\n", | |
736 | " Buffered address/control lines\n" | |
737 | }; | |
738 | ||
739 | static const char *decode_byte22_DDR2[] = { | |
740 | " TBD (bit 7)\n", | |
741 | " TBD (bit 6)\n", | |
742 | " TBD (bit 5)\n", | |
743 | " TBD (bit 4)\n", | |
744 | " TBD (bit 3)\n", | |
745 | " Supports partial array self refresh\n", | |
746 | " Supports 50 ohm ODT\n", | |
747 | " Supports weak driver\n" | |
748 | }; | |
749 | ||
750 | static const char *decode_row_density_DDR2[] = { | |
751 | "512 MiB", "256 MiB", "128 MiB", "16 GiB", | |
752 | "8 GiB", "4 GiB", "2 GiB", "1 GiB" | |
753 | }; | |
754 | ||
755 | static const char *decode_row_density_default[] = { | |
756 | "512 MiB", "256 MiB", "128 MiB", "64 MiB", | |
757 | "32 MiB", "16 MiB", "8 MiB", "4 MiB" | |
758 | }; | |
759 | ||
47e26b1b WD |
760 | if (argc < 2) |
761 | return cmd_usage(cmdtp); | |
762 | ||
81a8824f WD |
763 | /* |
764 | * Chip is always specified. | |
632de067 LJ |
765 | */ |
766 | chip = simple_strtoul (argv[1], NULL, 16); | |
81a8824f | 767 | |
632de067 | 768 | if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) { |
4b9206ed | 769 | puts ("No SDRAM Serial Presence Detect found.\n"); |
81a8824f WD |
770 | return 1; |
771 | } | |
772 | ||
773 | cksum = 0; | |
774 | for (j = 0; j < 63; j++) { | |
775 | cksum += data[j]; | |
776 | } | |
e857a5bd | 777 | if (cksum != data[63]) { |
81a8824f | 778 | printf ("WARNING: Configuration data checksum failure:\n" |
632de067 | 779 | " is 0x%02x, calculated 0x%02x\n", data[63], cksum); |
81a8824f | 780 | } |
632de067 | 781 | printf ("SPD data revision %d.%d\n", |
81a8824f | 782 | (data[62] >> 4) & 0x0F, data[62] & 0x0F); |
632de067 LJ |
783 | printf ("Bytes used 0x%02X\n", data[0]); |
784 | printf ("Serial memory size 0x%02X\n", 1 << data[1]); | |
785 | ||
4b9206ed | 786 | puts ("Memory type "); |
632de067 | 787 | switch (data[2]) { |
0df6b844 LJ |
788 | case 2: |
789 | type = EDO; | |
790 | puts ("EDO\n"); | |
791 | break; | |
792 | case 4: | |
793 | type = SDRAM; | |
794 | puts ("SDRAM\n"); | |
795 | break; | |
796 | case 8: | |
797 | type = DDR2; | |
798 | puts ("DDR2\n"); | |
799 | break; | |
800 | default: | |
801 | type = unknown; | |
802 | puts ("unknown\n"); | |
803 | break; | |
81a8824f | 804 | } |
632de067 | 805 | |
4b9206ed | 806 | puts ("Row address bits "); |
e857a5bd | 807 | if ((data[3] & 0x00F0) == 0) |
632de067 | 808 | printf ("%d\n", data[3] & 0x0F); |
e857a5bd | 809 | else |
632de067 LJ |
810 | printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F); |
811 | ||
4b9206ed | 812 | puts ("Column address bits "); |
e857a5bd | 813 | if ((data[4] & 0x00F0) == 0) |
632de067 | 814 | printf ("%d\n", data[4] & 0x0F); |
e857a5bd | 815 | else |
632de067 | 816 | printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F); |
0df6b844 LJ |
817 | |
818 | switch (type) { | |
819 | case DDR2: | |
632de067 LJ |
820 | printf ("Number of ranks %d\n", |
821 | (data[5] & 0x07) + 1); | |
0df6b844 LJ |
822 | break; |
823 | default: | |
632de067 | 824 | printf ("Module rows %d\n", data[5]); |
0df6b844 LJ |
825 | break; |
826 | } | |
827 | ||
828 | switch (type) { | |
829 | case DDR2: | |
632de067 | 830 | printf ("Module data width %d bits\n", data[6]); |
0df6b844 LJ |
831 | break; |
832 | default: | |
632de067 LJ |
833 | printf ("Module data width %d bits\n", |
834 | (data[7] << 8) | data[6]); | |
0df6b844 LJ |
835 | break; |
836 | } | |
837 | ||
4b9206ed | 838 | puts ("Interface signal levels "); |
81a8824f | 839 | switch(data[8]) { |
0df6b844 | 840 | case 0: puts ("TTL 5.0 V\n"); break; |
4b9206ed | 841 | case 1: puts ("LVTTL\n"); break; |
0df6b844 LJ |
842 | case 2: puts ("HSTL 1.5 V\n"); break; |
843 | case 3: puts ("SSTL 3.3 V\n"); break; | |
844 | case 4: puts ("SSTL 2.5 V\n"); break; | |
845 | case 5: puts ("SSTL 1.8 V\n"); break; | |
4b9206ed | 846 | default: puts ("unknown\n"); break; |
81a8824f | 847 | } |
0df6b844 LJ |
848 | |
849 | switch (type) { | |
850 | case DDR2: | |
632de067 LJ |
851 | printf ("SDRAM cycle time "); |
852 | print_ddr2_tcyc (data[9]); | |
0df6b844 LJ |
853 | break; |
854 | default: | |
632de067 LJ |
855 | printf ("SDRAM cycle time %d.%d ns\n", |
856 | (data[9] >> 4) & 0x0F, data[9] & 0x0F); | |
0df6b844 LJ |
857 | break; |
858 | } | |
859 | ||
860 | switch (type) { | |
861 | case DDR2: | |
632de067 LJ |
862 | printf ("SDRAM access time 0.%d%d ns\n", |
863 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
864 | break; |
865 | default: | |
632de067 LJ |
866 | printf ("SDRAM access time %d.%d ns\n", |
867 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
868 | break; |
869 | } | |
870 | ||
4b9206ed | 871 | puts ("EDC configuration "); |
632de067 | 872 | switch (data[11]) { |
4b9206ed WD |
873 | case 0: puts ("None\n"); break; |
874 | case 1: puts ("Parity\n"); break; | |
875 | case 2: puts ("ECC\n"); break; | |
876 | default: puts ("unknown\n"); break; | |
81a8824f | 877 | } |
632de067 | 878 | |
e857a5bd | 879 | if ((data[12] & 0x80) == 0) |
4b9206ed | 880 | puts ("No self refresh, rate "); |
e857a5bd | 881 | else |
4b9206ed | 882 | puts ("Self refresh, rate "); |
632de067 | 883 | |
81a8824f | 884 | switch(data[12] & 0x7F) { |
632de067 LJ |
885 | case 0: puts ("15.625 us\n"); break; |
886 | case 1: puts ("3.9 us\n"); break; | |
887 | case 2: puts ("7.8 us\n"); break; | |
888 | case 3: puts ("31.3 us\n"); break; | |
889 | case 4: puts ("62.5 us\n"); break; | |
890 | case 5: puts ("125 us\n"); break; | |
4b9206ed | 891 | default: puts ("unknown\n"); break; |
81a8824f | 892 | } |
0df6b844 LJ |
893 | |
894 | switch (type) { | |
895 | case DDR2: | |
632de067 | 896 | printf ("SDRAM width (primary) %d\n", data[13]); |
0df6b844 LJ |
897 | break; |
898 | default: | |
632de067 | 899 | printf ("SDRAM width (primary) %d\n", data[13] & 0x7F); |
0df6b844 | 900 | if ((data[13] & 0x80) != 0) { |
632de067 LJ |
901 | printf (" (second bank) %d\n", |
902 | 2 * (data[13] & 0x7F)); | |
0df6b844 LJ |
903 | } |
904 | break; | |
905 | } | |
906 | ||
907 | switch (type) { | |
908 | case DDR2: | |
909 | if (data[14] != 0) | |
632de067 | 910 | printf ("EDC width %d\n", data[14]); |
0df6b844 LJ |
911 | break; |
912 | default: | |
913 | if (data[14] != 0) { | |
632de067 LJ |
914 | printf ("EDC width %d\n", |
915 | data[14] & 0x7F); | |
0df6b844 LJ |
916 | |
917 | if ((data[14] & 0x80) != 0) { | |
632de067 LJ |
918 | printf (" (second bank) %d\n", |
919 | 2 * (data[14] & 0x7F)); | |
0df6b844 LJ |
920 | } |
921 | } | |
922 | break; | |
81a8824f | 923 | } |
0df6b844 | 924 | |
632de067 LJ |
925 | if (DDR2 != type) { |
926 | printf ("Min clock delay, back-to-back random column addresses " | |
927 | "%d\n", data[15]); | |
0df6b844 LJ |
928 | } |
929 | ||
4b9206ed WD |
930 | puts ("Burst length(s) "); |
931 | if (data[16] & 0x80) puts (" Page"); | |
932 | if (data[16] & 0x08) puts (" 8"); | |
933 | if (data[16] & 0x04) puts (" 4"); | |
934 | if (data[16] & 0x02) puts (" 2"); | |
935 | if (data[16] & 0x01) puts (" 1"); | |
936 | putc ('\n'); | |
632de067 | 937 | printf ("Number of banks %d\n", data[17]); |
0df6b844 LJ |
938 | |
939 | switch (type) { | |
940 | case DDR2: | |
941 | puts ("CAS latency(s) "); | |
632de067 | 942 | decode_bits (data[18], decode_CAS_DDR2, 0); |
0df6b844 LJ |
943 | putc ('\n'); |
944 | break; | |
945 | default: | |
946 | puts ("CAS latency(s) "); | |
632de067 | 947 | decode_bits (data[18], decode_CAS_default, 0); |
0df6b844 LJ |
948 | putc ('\n'); |
949 | break; | |
950 | } | |
951 | ||
952 | if (DDR2 != type) { | |
953 | puts ("CS latency(s) "); | |
632de067 | 954 | decode_bits (data[19], decode_CS_WE_default, 0); |
0df6b844 LJ |
955 | putc ('\n'); |
956 | } | |
957 | ||
958 | if (DDR2 != type) { | |
959 | puts ("WE latency(s) "); | |
632de067 | 960 | decode_bits (data[20], decode_CS_WE_default, 0); |
0df6b844 LJ |
961 | putc ('\n'); |
962 | } | |
963 | ||
964 | switch (type) { | |
965 | case DDR2: | |
966 | puts ("Module attributes:\n"); | |
967 | if (data[21] & 0x80) | |
968 | puts (" TBD (bit 7)\n"); | |
969 | if (data[21] & 0x40) | |
970 | puts (" Analysis probe installed\n"); | |
971 | if (data[21] & 0x20) | |
972 | puts (" TBD (bit 5)\n"); | |
973 | if (data[21] & 0x10) | |
974 | puts (" FET switch external enable\n"); | |
632de067 | 975 | printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03); |
0df6b844 | 976 | if (data[20] & 0x11) { |
632de067 LJ |
977 | printf (" %d active registers on DIMM\n", |
978 | (data[21] & 0x03) + 1); | |
0df6b844 LJ |
979 | } |
980 | break; | |
981 | default: | |
982 | puts ("Module attributes:\n"); | |
983 | if (!data[21]) | |
984 | puts (" (none)\n"); | |
632de067 LJ |
985 | else |
986 | decode_bits (data[21], decode_byte21_default, 0); | |
0df6b844 LJ |
987 | break; |
988 | } | |
989 | ||
990 | switch (type) { | |
991 | case DDR2: | |
632de067 | 992 | decode_bits (data[22], decode_byte22_DDR2, 0); |
0df6b844 LJ |
993 | break; |
994 | default: | |
995 | puts ("Device attributes:\n"); | |
996 | if (data[22] & 0x80) puts (" TBD (bit 7)\n"); | |
997 | if (data[22] & 0x40) puts (" TBD (bit 6)\n"); | |
998 | if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n"); | |
999 | else puts (" Upper Vcc tolerance 10%\n"); | |
1000 | if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n"); | |
1001 | else puts (" Lower Vcc tolerance 10%\n"); | |
1002 | if (data[22] & 0x08) puts (" Supports write1/read burst\n"); | |
1003 | if (data[22] & 0x04) puts (" Supports precharge all\n"); | |
1004 | if (data[22] & 0x02) puts (" Supports auto precharge\n"); | |
1005 | if (data[22] & 0x01) puts (" Supports early RAS# precharge\n"); | |
1006 | break; | |
1007 | } | |
1008 | ||
1009 | switch (type) { | |
1010 | case DDR2: | |
632de067 LJ |
1011 | printf ("SDRAM cycle time (2nd highest CAS latency) "); |
1012 | print_ddr2_tcyc (data[23]); | |
0df6b844 LJ |
1013 | break; |
1014 | default: | |
632de067 LJ |
1015 | printf ("SDRAM cycle time (2nd highest CAS latency) %d." |
1016 | "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F); | |
0df6b844 LJ |
1017 | break; |
1018 | } | |
1019 | ||
1020 | switch (type) { | |
1021 | case DDR2: | |
632de067 LJ |
1022 | printf ("SDRAM access from clock (2nd highest CAS latency) 0." |
1023 | "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1024 | break; |
1025 | default: | |
632de067 LJ |
1026 | printf ("SDRAM access from clock (2nd highest CAS latency) %d." |
1027 | "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1028 | break; |
1029 | } | |
1030 | ||
1031 | switch (type) { | |
1032 | case DDR2: | |
632de067 LJ |
1033 | printf ("SDRAM cycle time (3rd highest CAS latency) "); |
1034 | print_ddr2_tcyc (data[25]); | |
0df6b844 LJ |
1035 | break; |
1036 | default: | |
632de067 LJ |
1037 | printf ("SDRAM cycle time (3rd highest CAS latency) %d." |
1038 | "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F); | |
0df6b844 LJ |
1039 | break; |
1040 | } | |
1041 | ||
1042 | switch (type) { | |
1043 | case DDR2: | |
632de067 LJ |
1044 | printf ("SDRAM access from clock (3rd highest CAS latency) 0." |
1045 | "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1046 | break; |
1047 | default: | |
632de067 LJ |
1048 | printf ("SDRAM access from clock (3rd highest CAS latency) %d." |
1049 | "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1050 | break; |
1051 | } | |
1052 | ||
1053 | switch (type) { | |
1054 | case DDR2: | |
632de067 LJ |
1055 | printf ("Minimum row precharge %d.%02d ns\n", |
1056 | (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03)); | |
0df6b844 LJ |
1057 | break; |
1058 | default: | |
632de067 | 1059 | printf ("Minimum row precharge %d ns\n", data[27]); |
0df6b844 LJ |
1060 | break; |
1061 | } | |
1062 | ||
1063 | switch (type) { | |
1064 | case DDR2: | |
632de067 LJ |
1065 | printf ("Row active to row active min %d.%02d ns\n", |
1066 | (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03)); | |
0df6b844 LJ |
1067 | break; |
1068 | default: | |
632de067 | 1069 | printf ("Row active to row active min %d ns\n", data[28]); |
0df6b844 LJ |
1070 | break; |
1071 | } | |
1072 | ||
1073 | switch (type) { | |
1074 | case DDR2: | |
632de067 LJ |
1075 | printf ("RAS to CAS delay min %d.%02d ns\n", |
1076 | (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03)); | |
0df6b844 LJ |
1077 | break; |
1078 | default: | |
632de067 | 1079 | printf ("RAS to CAS delay min %d ns\n", data[29]); |
0df6b844 LJ |
1080 | break; |
1081 | } | |
1082 | ||
632de067 | 1083 | printf ("Minimum RAS pulse width %d ns\n", data[30]); |
0df6b844 LJ |
1084 | |
1085 | switch (type) { | |
1086 | case DDR2: | |
632de067 LJ |
1087 | puts ("Density of each row "); |
1088 | decode_bits (data[31], decode_row_density_DDR2, 1); | |
1089 | putc ('\n'); | |
0df6b844 LJ |
1090 | break; |
1091 | default: | |
632de067 LJ |
1092 | puts ("Density of each row "); |
1093 | decode_bits (data[31], decode_row_density_default, 1); | |
1094 | putc ('\n'); | |
0df6b844 LJ |
1095 | break; |
1096 | } | |
1097 | ||
1098 | switch (type) { | |
1099 | case DDR2: | |
632de067 | 1100 | puts ("Command and Address setup "); |
0df6b844 | 1101 | if (data[32] >= 0xA0) { |
632de067 LJ |
1102 | printf ("1.%d%d ns\n", |
1103 | ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F); | |
0df6b844 | 1104 | } else { |
632de067 LJ |
1105 | printf ("0.%d%d ns\n", |
1106 | ((data[32] >> 4) & 0x0F), data[32] & 0x0F); | |
0df6b844 LJ |
1107 | } |
1108 | break; | |
1109 | default: | |
632de067 LJ |
1110 | printf ("Command and Address setup %c%d.%d ns\n", |
1111 | (data[32] & 0x80) ? '-' : '+', | |
1112 | (data[32] >> 4) & 0x07, data[32] & 0x0F); | |
0df6b844 LJ |
1113 | break; |
1114 | } | |
1115 | ||
1116 | switch (type) { | |
1117 | case DDR2: | |
632de067 | 1118 | puts ("Command and Address hold "); |
0df6b844 | 1119 | if (data[33] >= 0xA0) { |
632de067 LJ |
1120 | printf ("1.%d%d ns\n", |
1121 | ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F); | |
0df6b844 | 1122 | } else { |
632de067 LJ |
1123 | printf ("0.%d%d ns\n", |
1124 | ((data[33] >> 4) & 0x0F), data[33] & 0x0F); | |
0df6b844 LJ |
1125 | } |
1126 | break; | |
1127 | default: | |
632de067 LJ |
1128 | printf ("Command and Address hold %c%d.%d ns\n", |
1129 | (data[33] & 0x80) ? '-' : '+', | |
1130 | (data[33] >> 4) & 0x07, data[33] & 0x0F); | |
0df6b844 LJ |
1131 | break; |
1132 | } | |
1133 | ||
1134 | switch (type) { | |
1135 | case DDR2: | |
632de067 LJ |
1136 | printf ("Data signal input setup 0.%d%d ns\n", |
1137 | (data[34] >> 4) & 0x0F, data[34] & 0x0F); | |
0df6b844 LJ |
1138 | break; |
1139 | default: | |
632de067 LJ |
1140 | printf ("Data signal input setup %c%d.%d ns\n", |
1141 | (data[34] & 0x80) ? '-' : '+', | |
1142 | (data[34] >> 4) & 0x07, data[34] & 0x0F); | |
0df6b844 LJ |
1143 | break; |
1144 | } | |
1145 | ||
1146 | switch (type) { | |
1147 | case DDR2: | |
632de067 LJ |
1148 | printf ("Data signal input hold 0.%d%d ns\n", |
1149 | (data[35] >> 4) & 0x0F, data[35] & 0x0F); | |
0df6b844 LJ |
1150 | break; |
1151 | default: | |
632de067 LJ |
1152 | printf ("Data signal input hold %c%d.%d ns\n", |
1153 | (data[35] & 0x80) ? '-' : '+', | |
1154 | (data[35] >> 4) & 0x07, data[35] & 0x0F); | |
0df6b844 LJ |
1155 | break; |
1156 | } | |
1157 | ||
4b9206ed | 1158 | puts ("Manufacturer's JEDEC ID "); |
e857a5bd | 1159 | for (j = 64; j <= 71; j++) |
632de067 | 1160 | printf ("%02X ", data[j]); |
4b9206ed | 1161 | putc ('\n'); |
632de067 | 1162 | printf ("Manufacturing Location %02X\n", data[72]); |
4b9206ed | 1163 | puts ("Manufacturer's Part Number "); |
e857a5bd | 1164 | for (j = 73; j <= 90; j++) |
632de067 | 1165 | printf ("%02X ", data[j]); |
4b9206ed | 1166 | putc ('\n'); |
632de067 LJ |
1167 | printf ("Revision Code %02X %02X\n", data[91], data[92]); |
1168 | printf ("Manufacturing Date %02X %02X\n", data[93], data[94]); | |
4b9206ed | 1169 | puts ("Assembly Serial Number "); |
e857a5bd | 1170 | for (j = 95; j <= 98; j++) |
632de067 | 1171 | printf ("%02X ", data[j]); |
4b9206ed | 1172 | putc ('\n'); |
81a8824f | 1173 | |
0df6b844 | 1174 | if (DDR2 != type) { |
632de067 LJ |
1175 | printf ("Speed rating PC%d\n", |
1176 | data[126] == 0x66 ? 66 : data[126]); | |
0df6b844 | 1177 | } |
81a8824f WD |
1178 | return 0; |
1179 | } | |
90253178 | 1180 | #endif |
81a8824f | 1181 | |
67b23a32 | 1182 | #if defined(CONFIG_I2C_MUX) |
54841ab5 | 1183 | static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
67b23a32 HS |
1184 | { |
1185 | int ret=0; | |
1186 | ||
1187 | if (argc == 1) { | |
1188 | /* show all busses */ | |
1189 | I2C_MUX *mux; | |
1190 | I2C_MUX_DEVICE *device = i2c_mux_devices; | |
1191 | ||
1192 | printf ("Busses reached over muxes:\n"); | |
1193 | while (device != NULL) { | |
1194 | printf ("Bus ID: %x\n", device->busid); | |
1195 | printf (" reached over Mux(es):\n"); | |
1196 | mux = device->mux; | |
1197 | while (mux != NULL) { | |
1198 | printf (" %s@%x ch: %x\n", mux->name, mux->chip, mux->channel); | |
1199 | mux = mux->next; | |
1200 | } | |
1201 | device = device->next; | |
1202 | } | |
1203 | } else { | |
1204 | I2C_MUX_DEVICE *dev; | |
1205 | ||
1206 | dev = i2c_mux_ident_muxstring ((uchar *)argv[1]); | |
1207 | ret = 0; | |
1208 | } | |
1209 | return ret; | |
1210 | } | |
1211 | #endif /* CONFIG_I2C_MUX */ | |
1212 | ||
bb99ad6d | 1213 | #if defined(CONFIG_I2C_MULTI_BUS) |
54841ab5 | 1214 | static int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d BW |
1215 | { |
1216 | int bus_idx, ret=0; | |
1217 | ||
e857a5bd TT |
1218 | if (argc == 1) |
1219 | /* querying current setting */ | |
bb99ad6d | 1220 | printf("Current bus is %d\n", i2c_get_bus_num()); |
e857a5bd | 1221 | else { |
bb99ad6d BW |
1222 | bus_idx = simple_strtoul(argv[1], NULL, 10); |
1223 | printf("Setting bus to %d\n", bus_idx); | |
1224 | ret = i2c_set_bus_num(bus_idx); | |
e857a5bd | 1225 | if (ret) |
bb99ad6d | 1226 | printf("Failure changing bus number (%d)\n", ret); |
bb99ad6d BW |
1227 | } |
1228 | return ret; | |
1229 | } | |
1230 | #endif /* CONFIG_I2C_MULTI_BUS */ | |
1231 | ||
54841ab5 | 1232 | static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d BW |
1233 | { |
1234 | int speed, ret=0; | |
1235 | ||
e857a5bd TT |
1236 | if (argc == 1) |
1237 | /* querying current speed */ | |
bb99ad6d | 1238 | printf("Current bus speed=%d\n", i2c_get_bus_speed()); |
e857a5bd | 1239 | else { |
bb99ad6d BW |
1240 | speed = simple_strtoul(argv[1], NULL, 10); |
1241 | printf("Setting bus speed to %d Hz\n", speed); | |
1242 | ret = i2c_set_bus_speed(speed); | |
e857a5bd | 1243 | if (ret) |
bb99ad6d | 1244 | printf("Failure changing bus speed (%d)\n", ret); |
bb99ad6d BW |
1245 | } |
1246 | return ret; | |
1247 | } | |
1248 | ||
54841ab5 | 1249 | static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d | 1250 | { |
bfc3b77e FM |
1251 | return mod_i2c_mem (cmdtp, 1, flag, argc, argv); |
1252 | } | |
1253 | ||
54841ab5 | 1254 | static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1255 | { |
1256 | return mod_i2c_mem (cmdtp, 0, flag, argc, argv); | |
1257 | } | |
e96ad5d3 | 1258 | |
54841ab5 | 1259 | static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1260 | { |
1261 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); | |
1262 | return 0; | |
1263 | } | |
1264 | ||
1265 | static cmd_tbl_t cmd_i2c_sub[] = { | |
67b23a32 | 1266 | #if defined(CONFIG_I2C_MUX) |
bfc3b77e | 1267 | U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_add_bus, "", ""), |
67b23a32 | 1268 | #endif /* CONFIG_I2C_MUX */ |
bfc3b77e | 1269 | U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), |
bb99ad6d | 1270 | #if defined(CONFIG_I2C_MULTI_BUS) |
bfc3b77e | 1271 | U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), |
bb99ad6d | 1272 | #endif /* CONFIG_I2C_MULTI_BUS */ |
bfc3b77e FM |
1273 | U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""), |
1274 | U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""), | |
1275 | U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""), | |
1276 | U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""), | |
1277 | U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), | |
1278 | U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), | |
652e5354 | 1279 | U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), |
bfc3b77e | 1280 | U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""), |
c76fe474 | 1281 | #if defined(CONFIG_CMD_SDRAM) |
bfc3b77e | 1282 | U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""), |
90253178 | 1283 | #endif |
bfc3b77e FM |
1284 | U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), |
1285 | }; | |
1286 | ||
2e5167cc | 1287 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
f1d2b313 HS |
1288 | void i2c_reloc(void) { |
1289 | fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); | |
1290 | } | |
1291 | #endif | |
1292 | ||
54841ab5 | 1293 | static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1294 | { |
1295 | cmd_tbl_t *c; | |
1296 | ||
4444b221 HS |
1297 | if (argc < 2) |
1298 | return cmd_usage(cmdtp); | |
1299 | ||
bfc3b77e FM |
1300 | /* Strip off leading 'i2c' command argument */ |
1301 | argc--; | |
1302 | argv++; | |
1303 | ||
1304 | c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub)); | |
1305 | ||
47e26b1b | 1306 | if (c) |
bfc3b77e | 1307 | return c->cmd(cmdtp, flag, argc, argv); |
47e26b1b WD |
1308 | else |
1309 | return cmd_usage(cmdtp); | |
bb99ad6d | 1310 | } |
8bde7f77 WD |
1311 | |
1312 | /***************************************************/ | |
1313 | ||
d9fc7032 MF |
1314 | U_BOOT_CMD( |
1315 | i2c, 6, 1, do_i2c, | |
2fb2604d | 1316 | "I2C sub-system", |
67b23a32 | 1317 | #if defined(CONFIG_I2C_MUX) |
fb0070e9 | 1318 | "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes\ni2c " |
67b23a32 | 1319 | #endif /* CONFIG_I2C_MUX */ |
fb0070e9 | 1320 | "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" |
d9fc7032 | 1321 | #if defined(CONFIG_I2C_MULTI_BUS) |
9bc2e4ee | 1322 | "i2c dev [dev] - show or set current I2C bus\n" |
d9fc7032 | 1323 | #endif /* CONFIG_I2C_MULTI_BUS */ |
fb0070e9 | 1324 | "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n" |
d9fc7032 MF |
1325 | "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n" |
1326 | "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n" | |
1327 | "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n" | |
1328 | "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" | |
d9fc7032 | 1329 | "i2c probe - show devices on the I2C bus\n" |
652e5354 | 1330 | "i2c read chip address[.0, .1, .2] length memaddress - read to memory \n" |
e43a27c4 | 1331 | "i2c reset - re-init the I2C Controller\n" |
c76fe474 | 1332 | #if defined(CONFIG_CMD_SDRAM) |
fb0070e9 | 1333 | "i2c sdram chip - print SDRAM configuration information\n" |
90253178 | 1334 | #endif |
fb0070e9 | 1335 | "i2c speed [speed] - show or set I2C bus speed" |
d9fc7032 | 1336 | ); |
67b23a32 HS |
1337 | |
1338 | #if defined(CONFIG_I2C_MUX) | |
fd03ea89 | 1339 | static int i2c_mux_add_device(I2C_MUX_DEVICE *dev) |
67b23a32 HS |
1340 | { |
1341 | I2C_MUX_DEVICE *devtmp = i2c_mux_devices; | |
1342 | ||
1343 | if (i2c_mux_devices == NULL) { | |
1344 | i2c_mux_devices = dev; | |
1345 | return 0; | |
1346 | } | |
1347 | while (devtmp->next != NULL) | |
1348 | devtmp = devtmp->next; | |
1349 | ||
1350 | devtmp->next = dev; | |
1351 | return 0; | |
1352 | } | |
1353 | ||
1354 | I2C_MUX_DEVICE *i2c_mux_search_device(int id) | |
1355 | { | |
1356 | I2C_MUX_DEVICE *device = i2c_mux_devices; | |
1357 | ||
1358 | while (device != NULL) { | |
1359 | if (device->busid == id) | |
1360 | return device; | |
1361 | device = device->next; | |
1362 | } | |
1363 | return NULL; | |
1364 | } | |
1365 | ||
1366 | /* searches in the buf from *pos the next ':'. | |
1367 | * returns: | |
1368 | * 0 if found (with *pos = where) | |
1369 | * < 0 if an error occured | |
1370 | * > 0 if the end of buf is reached | |
1371 | */ | |
1372 | static int i2c_mux_search_next (int *pos, uchar *buf, int len) | |
1373 | { | |
1374 | while ((buf[*pos] != ':') && (*pos < len)) { | |
1375 | *pos += 1; | |
1376 | } | |
1377 | if (*pos >= len) | |
1378 | return 1; | |
1379 | if (buf[*pos] != ':') | |
1380 | return -1; | |
1381 | return 0; | |
1382 | } | |
1383 | ||
1384 | static int i2c_mux_get_busid (void) | |
1385 | { | |
1386 | int tmp = i2c_mux_busid; | |
1387 | ||
1388 | i2c_mux_busid ++; | |
1389 | return tmp; | |
1390 | } | |
1391 | ||
1392 | /* Analyses a Muxstring and sends immediately the | |
1393 | Commands to the Muxes. Runs from Flash. | |
1394 | */ | |
1395 | int i2c_mux_ident_muxstring_f (uchar *buf) | |
1396 | { | |
1397 | int pos = 0; | |
1398 | int oldpos; | |
1399 | int ret = 0; | |
1400 | int len = strlen((char *)buf); | |
1401 | int chip; | |
1402 | uchar channel; | |
1403 | int was = 0; | |
1404 | ||
1405 | while (ret == 0) { | |
1406 | oldpos = pos; | |
1407 | /* search name */ | |
1408 | ret = i2c_mux_search_next(&pos, buf, len); | |
1409 | if (ret != 0) | |
1410 | printf ("ERROR\n"); | |
1411 | /* search address */ | |
1412 | pos ++; | |
1413 | oldpos = pos; | |
1414 | ret = i2c_mux_search_next(&pos, buf, len); | |
1415 | if (ret != 0) | |
1416 | printf ("ERROR\n"); | |
1417 | buf[pos] = 0; | |
1418 | chip = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1419 | buf[pos] = ':'; | |
1420 | /* search channel */ | |
1421 | pos ++; | |
1422 | oldpos = pos; | |
1423 | ret = i2c_mux_search_next(&pos, buf, len); | |
1424 | if (ret < 0) | |
1425 | printf ("ERROR\n"); | |
1426 | was = 0; | |
1427 | if (buf[pos] != 0) { | |
1428 | buf[pos] = 0; | |
1429 | was = 1; | |
1430 | } | |
1431 | channel = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1432 | if (was) | |
1433 | buf[pos] = ':'; | |
1434 | if (i2c_write(chip, 0, 0, &channel, 1) != 0) { | |
1435 | printf ("Error setting Mux: chip:%x channel: \ | |
1436 | %x\n", chip, channel); | |
1437 | return -1; | |
1438 | } | |
1439 | pos ++; | |
1440 | oldpos = pos; | |
1441 | ||
1442 | } | |
1443 | ||
1444 | return 0; | |
1445 | } | |
1446 | ||
1447 | /* Analyses a Muxstring and if this String is correct | |
1448 | * adds a new I2C Bus. | |
1449 | */ | |
1450 | I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf) | |
1451 | { | |
1452 | I2C_MUX_DEVICE *device; | |
1453 | I2C_MUX *mux; | |
1454 | int pos = 0; | |
1455 | int oldpos; | |
1456 | int ret = 0; | |
1457 | int len = strlen((char *)buf); | |
1458 | int was = 0; | |
1459 | ||
1460 | device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE)); | |
1461 | device->mux = NULL; | |
1462 | device->busid = i2c_mux_get_busid (); | |
1463 | device->next = NULL; | |
1464 | while (ret == 0) { | |
1465 | mux = (I2C_MUX *)malloc (sizeof(I2C_MUX)); | |
1466 | mux->next = NULL; | |
1467 | /* search name of mux */ | |
1468 | oldpos = pos; | |
1469 | ret = i2c_mux_search_next(&pos, buf, len); | |
1470 | if (ret != 0) | |
1471 | printf ("%s no name.\n", __FUNCTION__); | |
1472 | mux->name = (char *)malloc (pos - oldpos + 1); | |
1473 | memcpy (mux->name, &buf[oldpos], pos - oldpos); | |
1474 | mux->name[pos - oldpos] = 0; | |
1475 | /* search address */ | |
1476 | pos ++; | |
1477 | oldpos = pos; | |
1478 | ret = i2c_mux_search_next(&pos, buf, len); | |
1479 | if (ret != 0) | |
1480 | printf ("%s no mux address.\n", __FUNCTION__); | |
1481 | buf[pos] = 0; | |
1482 | mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1483 | buf[pos] = ':'; | |
1484 | /* search channel */ | |
1485 | pos ++; | |
1486 | oldpos = pos; | |
1487 | ret = i2c_mux_search_next(&pos, buf, len); | |
1488 | if (ret < 0) | |
1489 | printf ("%s no mux channel.\n", __FUNCTION__); | |
1490 | was = 0; | |
1491 | if (buf[pos] != 0) { | |
1492 | buf[pos] = 0; | |
1493 | was = 1; | |
1494 | } | |
1495 | mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16); | |
1496 | if (was) | |
1497 | buf[pos] = ':'; | |
1498 | if (device->mux == NULL) | |
1499 | device->mux = mux; | |
1500 | else { | |
1501 | I2C_MUX *muxtmp = device->mux; | |
1502 | while (muxtmp->next != NULL) { | |
1503 | muxtmp = muxtmp->next; | |
1504 | } | |
1505 | muxtmp->next = mux; | |
1506 | } | |
1507 | pos ++; | |
1508 | oldpos = pos; | |
1509 | } | |
1510 | if (ret > 0) { | |
1511 | /* Add Device */ | |
1512 | i2c_mux_add_device (device); | |
1513 | return device; | |
1514 | } | |
1515 | ||
1516 | return NULL; | |
1517 | } | |
1518 | ||
1519 | int i2x_mux_select_mux(int bus) | |
1520 | { | |
1521 | I2C_MUX_DEVICE *dev; | |
1522 | I2C_MUX *mux; | |
1523 | ||
1524 | if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) { | |
1525 | /* select Default Mux Bus */ | |
6d0f6bcf JCPV |
1526 | #if defined(CONFIG_SYS_I2C_IVM_BUS) |
1527 | i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS); | |
67b23a32 HS |
1528 | #else |
1529 | { | |
1530 | unsigned char *buf; | |
1531 | buf = (unsigned char *) getenv("EEprom_ivm"); | |
1532 | if (buf != NULL) | |
1533 | i2c_mux_ident_muxstring_f (buf); | |
1534 | } | |
1535 | #endif | |
1536 | return 0; | |
1537 | } | |
1538 | dev = i2c_mux_search_device(bus); | |
1539 | if (dev == NULL) | |
1540 | return -1; | |
1541 | ||
1542 | mux = dev->mux; | |
1543 | while (mux != NULL) { | |
1544 | if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) { | |
1545 | printf ("Error setting Mux: chip:%x channel: \ | |
1546 | %x\n", mux->chip, mux->channel); | |
1547 | return -1; | |
1548 | } | |
1549 | mux = mux->next; | |
1550 | } | |
1551 | return 0; | |
1552 | } | |
1553 | #endif /* CONFIG_I2C_MUX */ |