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Commit | Line | Data |
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81a8824f | 1 | /* |
3f4978c7 HS |
2 | * (C) Copyright 2009 |
3 | * Sergey Kubushyn, himself, ksi@koi8.net | |
4 | * | |
5 | * Changes for unified multibus/multiadapter I2C support. | |
6 | * | |
81a8824f WD |
7 | * (C) Copyright 2001 |
8 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. | |
9 | * | |
1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
81a8824f WD |
11 | */ |
12 | ||
13 | /* | |
14 | * I2C Functions similar to the standard memory functions. | |
15 | * | |
16 | * There are several parameters in many of the commands that bear further | |
17 | * explanations: | |
18 | * | |
81a8824f WD |
19 | * {i2c_chip} is the I2C chip address (the first byte sent on the bus). |
20 | * Each I2C chip on the bus has a unique address. On the I2C data bus, | |
21 | * the address is the upper seven bits and the LSB is the "read/write" | |
22 | * bit. Note that the {i2c_chip} address specified on the command | |
23 | * line is not shifted up: e.g. a typical EEPROM memory chip may have | |
24 | * an I2C address of 0x50, but the data put on the bus will be 0xA0 | |
25 | * for write and 0xA1 for read. This "non shifted" address notation | |
26 | * matches at least half of the data sheets :-/. | |
27 | * | |
28 | * {addr} is the address (or offset) within the chip. Small memory | |
29 | * chips have 8 bit addresses. Large memory chips have 16 bit | |
30 | * addresses. Other memory chips have 9, 10, or 11 bit addresses. | |
31 | * Many non-memory chips have multiple registers and {addr} is used | |
32 | * as the register index. Some non-memory chips have only one register | |
33 | * and therefore don't need any {addr} parameter. | |
34 | * | |
35 | * The default {addr} parameter is one byte (.1) which works well for | |
36 | * memories and registers with 8 bits of address space. | |
37 | * | |
38 | * You can specify the length of the {addr} field with the optional .0, | |
39 | * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are | |
40 | * manipulating a single register device which doesn't use an address | |
41 | * field, use "0.0" for the address and the ".0" length field will | |
42 | * suppress the address in the I2C data stream. This also works for | |
43 | * successive reads using the I2C auto-incrementing memory pointer. | |
44 | * | |
45 | * If you are manipulating a large memory with 2-byte addresses, use | |
46 | * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal). | |
47 | * | |
48 | * Then there are the unfortunate memory chips that spill the most | |
49 | * significant 1, 2, or 3 bits of address into the chip address byte. | |
50 | * This effectively makes one chip (logically) look like 2, 4, or | |
51 | * 8 chips. This is handled (awkwardly) by #defining | |
6d0f6bcf | 52 | * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the |
81a8824f WD |
53 | * {addr} field (since .1 is the default, it doesn't actually have to |
54 | * be specified). Examples: given a memory chip at I2C chip address | |
55 | * 0x50, the following would happen... | |
0f89c54b | 56 | * i2c md 50 0 10 display 16 bytes starting at 0x000 |
81a8824f | 57 | * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd> |
0f89c54b | 58 | * i2c md 50 100 10 display 16 bytes starting at 0x100 |
81a8824f | 59 | * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd> |
0f89c54b | 60 | * i2c md 50 210 10 display 16 bytes starting at 0x210 |
81a8824f WD |
61 | * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd> |
62 | * This is awfully ugly. It would be nice if someone would think up | |
63 | * a better way of handling this. | |
64 | * | |
65 | * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). | |
66 | */ | |
67 | ||
68 | #include <common.h> | |
69 | #include <command.h> | |
735987c5 | 70 | #include <edid.h> |
67b23a32 | 71 | #include <environment.h> |
81a8824f | 72 | #include <i2c.h> |
67b23a32 | 73 | #include <malloc.h> |
81a8824f | 74 | #include <asm/byteorder.h> |
2515d843 | 75 | #include <linux/compiler.h> |
81a8824f | 76 | |
3f4978c7 HS |
77 | DECLARE_GLOBAL_DATA_PTR; |
78 | ||
81a8824f WD |
79 | /* Display values from last command. |
80 | * Memory modify remembered values are different from display memory. | |
81 | */ | |
82 | static uchar i2c_dp_last_chip; | |
83 | static uint i2c_dp_last_addr; | |
84 | static uint i2c_dp_last_alen; | |
85 | static uint i2c_dp_last_length = 0x10; | |
86 | ||
87 | static uchar i2c_mm_last_chip; | |
88 | static uint i2c_mm_last_addr; | |
89 | static uint i2c_mm_last_alen; | |
90 | ||
bb99ad6d BW |
91 | /* If only one I2C bus is present, the list of devices to ignore when |
92 | * the probe command is issued is represented by a 1D array of addresses. | |
93 | * When multiple buses are present, the list is an array of bus-address | |
94 | * pairs. The following macros take care of this */ | |
95 | ||
6d0f6bcf | 96 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
9a2accb4 | 97 | #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) |
bb99ad6d BW |
98 | static struct |
99 | { | |
100 | uchar bus; | |
101 | uchar addr; | |
6d0f6bcf | 102 | } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
103 | #define GET_BUS_NUM i2c_get_bus_num() |
104 | #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b)) | |
105 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a)) | |
106 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr | |
107 | #else /* single bus */ | |
6d0f6bcf | 108 | static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d BW |
109 | #define GET_BUS_NUM 0 |
110 | #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ | |
111 | #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) | |
112 | #define NO_PROBE_ADDR(i) i2c_no_probes[(i)] | |
3f4978c7 | 113 | #endif /* defined(CONFIG_SYS_I2C) */ |
67b23a32 HS |
114 | #endif |
115 | ||
a266fe95 FM |
116 | #define DISP_LINE_LEN 16 |
117 | ||
06afa388 MV |
118 | /** |
119 | * i2c_init_board() - Board-specific I2C bus init | |
120 | * | |
121 | * This function is the default no-op implementation of I2C bus | |
122 | * initialization. This function can be overriden by board-specific | |
123 | * implementation if needed. | |
124 | */ | |
2515d843 MV |
125 | __weak |
126 | void i2c_init_board(void) | |
c649dda5 | 127 | { |
c649dda5 | 128 | } |
c649dda5 | 129 | |
655b34a7 | 130 | /* TODO: Implement architecture-specific get/set functions */ |
06afa388 MV |
131 | |
132 | /** | |
133 | * i2c_get_bus_speed() - Return I2C bus speed | |
134 | * | |
135 | * This function is the default implementation of function for retrieveing | |
136 | * the current I2C bus speed in Hz. | |
137 | * | |
138 | * A driver implementing runtime switching of I2C bus speed must override | |
139 | * this function to report the speed correctly. Simple or legacy drivers | |
140 | * can use this fallback. | |
141 | * | |
142 | * Returns I2C bus speed in Hz. | |
143 | */ | |
3f4978c7 HS |
144 | #if !defined(CONFIG_SYS_I2C) |
145 | /* | |
146 | * TODO: Implement architecture-specific get/set functions | |
147 | * Should go away, if we switched completely to new multibus support | |
148 | */ | |
2515d843 MV |
149 | __weak |
150 | unsigned int i2c_get_bus_speed(void) | |
655b34a7 PT |
151 | { |
152 | return CONFIG_SYS_I2C_SPEED; | |
153 | } | |
655b34a7 | 154 | |
06afa388 MV |
155 | /** |
156 | * i2c_set_bus_speed() - Configure I2C bus speed | |
157 | * @speed: Newly set speed of the I2C bus in Hz | |
158 | * | |
159 | * This function is the default implementation of function for setting | |
160 | * the I2C bus speed in Hz. | |
161 | * | |
162 | * A driver implementing runtime switching of I2C bus speed must override | |
163 | * this function to report the speed correctly. Simple or legacy drivers | |
164 | * can use this fallback. | |
165 | * | |
166 | * Returns zero on success, negative value on error. | |
167 | */ | |
2515d843 MV |
168 | __weak |
169 | int i2c_set_bus_speed(unsigned int speed) | |
655b34a7 PT |
170 | { |
171 | if (speed != CONFIG_SYS_I2C_SPEED) | |
172 | return -1; | |
173 | ||
174 | return 0; | |
175 | } | |
3f4978c7 | 176 | #endif |
655b34a7 | 177 | |
06afa388 MV |
178 | /** |
179 | * get_alen() - Small parser helper function to get address length | |
180 | * | |
181 | * Returns the address length. | |
2c0dc990 FM |
182 | */ |
183 | static uint get_alen(char *arg) | |
184 | { | |
185 | int j; | |
186 | int alen; | |
187 | ||
188 | alen = 1; | |
189 | for (j = 0; j < 8; j++) { | |
190 | if (arg[j] == '.') { | |
191 | alen = arg[j+1] - '0'; | |
2c0dc990 FM |
192 | break; |
193 | } else if (arg[j] == '\0') | |
194 | break; | |
195 | } | |
196 | return alen; | |
197 | } | |
198 | ||
06afa388 MV |
199 | /** |
200 | * do_i2c_read() - Handle the "i2c read" command-line command | |
201 | * @cmdtp: Command data struct pointer | |
202 | * @flag: Command flag | |
203 | * @argc: Command-line argument count | |
204 | * @argv: Array of command-line arguments | |
205 | * | |
206 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
207 | * on error. | |
208 | * | |
652e5354 FM |
209 | * Syntax: |
210 | * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr} | |
211 | */ | |
54841ab5 | 212 | static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
652e5354 FM |
213 | { |
214 | u_char chip; | |
215 | uint devaddr, alen, length; | |
216 | u_char *memaddr; | |
652e5354 | 217 | |
47e26b1b | 218 | if (argc != 5) |
4c12eeb8 | 219 | return CMD_RET_USAGE; |
652e5354 FM |
220 | |
221 | /* | |
222 | * I2C chip address | |
223 | */ | |
224 | chip = simple_strtoul(argv[1], NULL, 16); | |
225 | ||
226 | /* | |
227 | * I2C data address within the chip. This can be 1 or | |
228 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
229 | */ | |
230 | devaddr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 231 | alen = get_alen(argv[2]); |
7a92e53c | 232 | if (alen > 3) |
4c12eeb8 | 233 | return CMD_RET_USAGE; |
652e5354 FM |
234 | |
235 | /* | |
236 | * Length is the number of objects, not number of bytes. | |
237 | */ | |
238 | length = simple_strtoul(argv[3], NULL, 16); | |
239 | ||
240 | /* | |
241 | * memaddr is the address where to store things in memory | |
242 | */ | |
243 | memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16); | |
244 | ||
245 | if (i2c_read(chip, devaddr, alen, memaddr, length) != 0) { | |
246 | puts ("Error reading the chip.\n"); | |
247 | return 1; | |
248 | } | |
249 | return 0; | |
250 | } | |
251 | ||
ff5d2dce YS |
252 | static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
253 | { | |
254 | u_char chip; | |
255 | uint devaddr, alen, length; | |
256 | u_char *memaddr; | |
257 | ||
258 | if (argc != 5) | |
259 | return cmd_usage(cmdtp); | |
260 | ||
261 | /* | |
262 | * memaddr is the address where to store things in memory | |
263 | */ | |
264 | memaddr = (u_char *)simple_strtoul(argv[1], NULL, 16); | |
265 | ||
266 | /* | |
267 | * I2C chip address | |
268 | */ | |
269 | chip = simple_strtoul(argv[2], NULL, 16); | |
270 | ||
271 | /* | |
272 | * I2C data address within the chip. This can be 1 or | |
273 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
274 | */ | |
275 | devaddr = simple_strtoul(argv[3], NULL, 16); | |
276 | alen = get_alen(argv[3]); | |
277 | if (alen > 3) | |
278 | return cmd_usage(cmdtp); | |
279 | ||
280 | /* | |
281 | * Length is the number of objects, not number of bytes. | |
282 | */ | |
283 | length = simple_strtoul(argv[4], NULL, 16); | |
284 | ||
285 | while (length-- > 0) { | |
286 | if (i2c_write(chip, devaddr++, alen, memaddr++, 1) != 0) { | |
287 | puts("Error writing to the chip.\n"); | |
288 | return 1; | |
289 | } | |
290 | /* | |
291 | * No write delay with FRAM devices. | |
292 | */ | |
293 | #if !defined(CONFIG_SYS_I2C_FRAM) | |
294 | udelay(11000); | |
295 | #endif | |
296 | } | |
297 | return 0; | |
298 | } | |
299 | ||
06afa388 MV |
300 | /** |
301 | * do_i2c_md() - Handle the "i2c md" command-line command | |
302 | * @cmdtp: Command data struct pointer | |
303 | * @flag: Command flag | |
304 | * @argc: Command-line argument count | |
305 | * @argv: Array of command-line arguments | |
306 | * | |
307 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
308 | * on error. | |
309 | * | |
4a8cf338 FM |
310 | * Syntax: |
311 | * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} | |
312 | */ | |
54841ab5 | 313 | static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
314 | { |
315 | u_char chip; | |
316 | uint addr, alen, length; | |
317 | int j, nbytes, linebytes; | |
318 | ||
319 | /* We use the last specified parameters, unless new ones are | |
320 | * entered. | |
321 | */ | |
322 | chip = i2c_dp_last_chip; | |
323 | addr = i2c_dp_last_addr; | |
324 | alen = i2c_dp_last_alen; | |
325 | length = i2c_dp_last_length; | |
326 | ||
47e26b1b | 327 | if (argc < 3) |
4c12eeb8 | 328 | return CMD_RET_USAGE; |
81a8824f WD |
329 | |
330 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
331 | /* | |
332 | * New command specified. | |
333 | */ | |
81a8824f WD |
334 | |
335 | /* | |
336 | * I2C chip address | |
337 | */ | |
338 | chip = simple_strtoul(argv[1], NULL, 16); | |
339 | ||
340 | /* | |
341 | * I2C data address within the chip. This can be 1 or | |
342 | * 2 bytes long. Some day it might be 3 bytes long :-). | |
343 | */ | |
344 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 345 | alen = get_alen(argv[2]); |
7a92e53c | 346 | if (alen > 3) |
4c12eeb8 | 347 | return CMD_RET_USAGE; |
81a8824f WD |
348 | |
349 | /* | |
350 | * If another parameter, it is the length to display. | |
351 | * Length is the number of objects, not number of bytes. | |
352 | */ | |
353 | if (argc > 3) | |
354 | length = simple_strtoul(argv[3], NULL, 16); | |
355 | } | |
356 | ||
357 | /* | |
358 | * Print the lines. | |
359 | * | |
360 | * We buffer all read data, so we can make sure data is read only | |
361 | * once. | |
362 | */ | |
363 | nbytes = length; | |
364 | do { | |
365 | unsigned char linebuf[DISP_LINE_LEN]; | |
366 | unsigned char *cp; | |
367 | ||
368 | linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; | |
369 | ||
e857a5bd | 370 | if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0) |
4b9206ed | 371 | puts ("Error reading the chip.\n"); |
e857a5bd | 372 | else { |
81a8824f WD |
373 | printf("%04x:", addr); |
374 | cp = linebuf; | |
375 | for (j=0; j<linebytes; j++) { | |
376 | printf(" %02x", *cp++); | |
377 | addr++; | |
378 | } | |
4b9206ed | 379 | puts (" "); |
81a8824f WD |
380 | cp = linebuf; |
381 | for (j=0; j<linebytes; j++) { | |
382 | if ((*cp < 0x20) || (*cp > 0x7e)) | |
4b9206ed | 383 | puts ("."); |
81a8824f WD |
384 | else |
385 | printf("%c", *cp); | |
386 | cp++; | |
387 | } | |
4b9206ed | 388 | putc ('\n'); |
81a8824f WD |
389 | } |
390 | nbytes -= linebytes; | |
391 | } while (nbytes > 0); | |
392 | ||
393 | i2c_dp_last_chip = chip; | |
394 | i2c_dp_last_addr = addr; | |
395 | i2c_dp_last_alen = alen; | |
396 | i2c_dp_last_length = length; | |
397 | ||
398 | return 0; | |
399 | } | |
400 | ||
06afa388 MV |
401 | /** |
402 | * do_i2c_mw() - Handle the "i2c mw" command-line command | |
403 | * @cmdtp: Command data struct pointer | |
404 | * @flag: Command flag | |
405 | * @argc: Command-line argument count | |
406 | * @argv: Array of command-line arguments | |
407 | * | |
408 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
409 | * on error. | |
81a8824f WD |
410 | * |
411 | * Syntax: | |
0f89c54b | 412 | * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] |
81a8824f | 413 | */ |
54841ab5 | 414 | static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
415 | { |
416 | uchar chip; | |
417 | ulong addr; | |
418 | uint alen; | |
419 | uchar byte; | |
420 | int count; | |
81a8824f | 421 | |
47e26b1b | 422 | if ((argc < 4) || (argc > 5)) |
4c12eeb8 | 423 | return CMD_RET_USAGE; |
81a8824f WD |
424 | |
425 | /* | |
53677ef1 WD |
426 | * Chip is always specified. |
427 | */ | |
81a8824f WD |
428 | chip = simple_strtoul(argv[1], NULL, 16); |
429 | ||
430 | /* | |
431 | * Address is always specified. | |
432 | */ | |
433 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 434 | alen = get_alen(argv[2]); |
7a92e53c | 435 | if (alen > 3) |
4c12eeb8 | 436 | return CMD_RET_USAGE; |
81a8824f WD |
437 | |
438 | /* | |
439 | * Value to write is always specified. | |
440 | */ | |
441 | byte = simple_strtoul(argv[3], NULL, 16); | |
442 | ||
443 | /* | |
444 | * Optional count | |
445 | */ | |
e857a5bd | 446 | if (argc == 5) |
81a8824f | 447 | count = simple_strtoul(argv[4], NULL, 16); |
e857a5bd | 448 | else |
81a8824f | 449 | count = 1; |
81a8824f WD |
450 | |
451 | while (count-- > 0) { | |
e857a5bd | 452 | if (i2c_write(chip, addr++, alen, &byte, 1) != 0) |
4b9206ed | 453 | puts ("Error writing the chip.\n"); |
81a8824f WD |
454 | /* |
455 | * Wait for the write to complete. The write can take | |
456 | * up to 10mSec (we allow a little more time). | |
81a8824f | 457 | */ |
d4f5c728 | 458 | /* |
459 | * No write delay with FRAM devices. | |
460 | */ | |
6d0f6bcf | 461 | #if !defined(CONFIG_SYS_I2C_FRAM) |
81a8824f | 462 | udelay(11000); |
d4f5c728 | 463 | #endif |
81a8824f WD |
464 | } |
465 | ||
06afa388 | 466 | return 0; |
81a8824f WD |
467 | } |
468 | ||
06afa388 MV |
469 | /** |
470 | * do_i2c_crc() - Handle the "i2c crc32" command-line command | |
471 | * @cmdtp: Command data struct pointer | |
472 | * @flag: Command flag | |
473 | * @argc: Command-line argument count | |
474 | * @argv: Array of command-line arguments | |
475 | * | |
476 | * Calculate a CRC on memory | |
477 | * | |
478 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
479 | * on error. | |
81a8824f WD |
480 | * |
481 | * Syntax: | |
0f89c54b | 482 | * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} |
81a8824f | 483 | */ |
54841ab5 | 484 | static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
485 | { |
486 | uchar chip; | |
487 | ulong addr; | |
488 | uint alen; | |
489 | int count; | |
490 | uchar byte; | |
491 | ulong crc; | |
492 | ulong err; | |
81a8824f | 493 | |
47e26b1b | 494 | if (argc < 4) |
4c12eeb8 | 495 | return CMD_RET_USAGE; |
81a8824f WD |
496 | |
497 | /* | |
53677ef1 WD |
498 | * Chip is always specified. |
499 | */ | |
81a8824f WD |
500 | chip = simple_strtoul(argv[1], NULL, 16); |
501 | ||
502 | /* | |
503 | * Address is always specified. | |
504 | */ | |
505 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 506 | alen = get_alen(argv[2]); |
7a92e53c | 507 | if (alen > 3) |
4c12eeb8 | 508 | return CMD_RET_USAGE; |
81a8824f WD |
509 | |
510 | /* | |
511 | * Count is always specified | |
512 | */ | |
513 | count = simple_strtoul(argv[3], NULL, 16); | |
514 | ||
515 | printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1); | |
516 | /* | |
517 | * CRC a byte at a time. This is going to be slooow, but hey, the | |
518 | * memories are small and slow too so hopefully nobody notices. | |
519 | */ | |
520 | crc = 0; | |
521 | err = 0; | |
e857a5bd TT |
522 | while (count-- > 0) { |
523 | if (i2c_read(chip, addr, alen, &byte, 1) != 0) | |
81a8824f | 524 | err++; |
81a8824f WD |
525 | crc = crc32 (crc, &byte, 1); |
526 | addr++; | |
527 | } | |
e857a5bd | 528 | if (err > 0) |
4b9206ed | 529 | puts ("Error reading the chip,\n"); |
e857a5bd | 530 | else |
81a8824f | 531 | printf ("%08lx\n", crc); |
81a8824f WD |
532 | |
533 | return 0; | |
534 | } | |
535 | ||
06afa388 MV |
536 | /** |
537 | * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command | |
538 | * @cmdtp: Command data struct pointer | |
539 | * @flag: Command flag | |
540 | * @argc: Command-line argument count | |
541 | * @argv: Array of command-line arguments | |
542 | * | |
543 | * Modify memory. | |
544 | * | |
545 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
546 | * on error. | |
81a8824f WD |
547 | * |
548 | * Syntax: | |
0f89c54b PT |
549 | * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} |
550 | * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} | |
81a8824f | 551 | */ |
81a8824f | 552 | static int |
54841ab5 | 553 | mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) |
81a8824f WD |
554 | { |
555 | uchar chip; | |
556 | ulong addr; | |
557 | uint alen; | |
558 | ulong data; | |
559 | int size = 1; | |
560 | int nbytes; | |
81a8824f | 561 | |
47e26b1b | 562 | if (argc != 3) |
4c12eeb8 | 563 | return CMD_RET_USAGE; |
81a8824f WD |
564 | |
565 | #ifdef CONFIG_BOOT_RETRY_TIME | |
566 | reset_cmd_timeout(); /* got a good command to get here */ | |
567 | #endif | |
568 | /* | |
569 | * We use the last specified parameters, unless new ones are | |
570 | * entered. | |
571 | */ | |
572 | chip = i2c_mm_last_chip; | |
573 | addr = i2c_mm_last_addr; | |
574 | alen = i2c_mm_last_alen; | |
575 | ||
576 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
577 | /* | |
578 | * New command specified. Check for a size specification. | |
579 | * Defaults to byte if no or incorrect specification. | |
580 | */ | |
581 | size = cmd_get_data_size(argv[0], 1); | |
582 | ||
583 | /* | |
53677ef1 WD |
584 | * Chip is always specified. |
585 | */ | |
81a8824f WD |
586 | chip = simple_strtoul(argv[1], NULL, 16); |
587 | ||
588 | /* | |
589 | * Address is always specified. | |
590 | */ | |
591 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 592 | alen = get_alen(argv[2]); |
7a92e53c | 593 | if (alen > 3) |
4c12eeb8 | 594 | return CMD_RET_USAGE; |
81a8824f WD |
595 | } |
596 | ||
597 | /* | |
598 | * Print the address, followed by value. Then accept input for | |
599 | * the next value. A non-converted value exits. | |
600 | */ | |
601 | do { | |
602 | printf("%08lx:", addr); | |
e857a5bd | 603 | if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0) |
4b9206ed | 604 | puts ("\nError reading the chip,\n"); |
e857a5bd | 605 | else { |
81a8824f | 606 | data = cpu_to_be32(data); |
e857a5bd | 607 | if (size == 1) |
81a8824f | 608 | printf(" %02lx", (data >> 24) & 0x000000FF); |
e857a5bd | 609 | else if (size == 2) |
81a8824f | 610 | printf(" %04lx", (data >> 16) & 0x0000FFFF); |
e857a5bd | 611 | else |
81a8824f | 612 | printf(" %08lx", data); |
81a8824f WD |
613 | } |
614 | ||
615 | nbytes = readline (" ? "); | |
616 | if (nbytes == 0) { | |
617 | /* | |
618 | * <CR> pressed as only input, don't modify current | |
619 | * location and move to next. | |
620 | */ | |
621 | if (incrflag) | |
622 | addr += size; | |
623 | nbytes = size; | |
624 | #ifdef CONFIG_BOOT_RETRY_TIME | |
625 | reset_cmd_timeout(); /* good enough to not time out */ | |
626 | #endif | |
627 | } | |
628 | #ifdef CONFIG_BOOT_RETRY_TIME | |
e857a5bd | 629 | else if (nbytes == -2) |
81a8824f | 630 | break; /* timed out, exit the command */ |
81a8824f WD |
631 | #endif |
632 | else { | |
633 | char *endp; | |
634 | ||
635 | data = simple_strtoul(console_buffer, &endp, 16); | |
e857a5bd | 636 | if (size == 1) |
81a8824f | 637 | data = data << 24; |
e857a5bd | 638 | else if (size == 2) |
81a8824f | 639 | data = data << 16; |
81a8824f WD |
640 | data = be32_to_cpu(data); |
641 | nbytes = endp - console_buffer; | |
642 | if (nbytes) { | |
643 | #ifdef CONFIG_BOOT_RETRY_TIME | |
644 | /* | |
645 | * good enough to not time out | |
646 | */ | |
647 | reset_cmd_timeout(); | |
648 | #endif | |
e857a5bd | 649 | if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0) |
4b9206ed | 650 | puts ("Error writing the chip.\n"); |
6d0f6bcf JCPV |
651 | #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS |
652 | udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); | |
2535d602 | 653 | #endif |
81a8824f WD |
654 | if (incrflag) |
655 | addr += size; | |
656 | } | |
657 | } | |
658 | } while (nbytes); | |
659 | ||
0800707b PT |
660 | i2c_mm_last_chip = chip; |
661 | i2c_mm_last_addr = addr; | |
662 | i2c_mm_last_alen = alen; | |
81a8824f WD |
663 | |
664 | return 0; | |
665 | } | |
666 | ||
06afa388 MV |
667 | /** |
668 | * do_i2c_probe() - Handle the "i2c probe" command-line command | |
669 | * @cmdtp: Command data struct pointer | |
670 | * @flag: Command flag | |
671 | * @argc: Command-line argument count | |
672 | * @argv: Array of command-line arguments | |
673 | * | |
674 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
675 | * on error. | |
676 | * | |
81a8824f | 677 | * Syntax: |
54b99e51 EN |
678 | * i2c probe {addr} |
679 | * | |
680 | * Returns zero (success) if one or more I2C devices was found | |
81a8824f | 681 | */ |
54841ab5 | 682 | static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
683 | { |
684 | int j; | |
54b99e51 EN |
685 | int addr = -1; |
686 | int found = 0; | |
6d0f6bcf | 687 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 688 | int k, skip; |
3f4978c7 | 689 | unsigned int bus = GET_BUS_NUM; |
bb99ad6d | 690 | #endif /* NOPROBES */ |
81a8824f | 691 | |
54b99e51 EN |
692 | if (argc == 2) |
693 | addr = simple_strtol(argv[1], 0, 16); | |
694 | ||
4b9206ed | 695 | puts ("Valid chip addresses:"); |
e857a5bd | 696 | for (j = 0; j < 128; j++) { |
54b99e51 EN |
697 | if ((0 <= addr) && (j != addr)) |
698 | continue; | |
699 | ||
6d0f6bcf | 700 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 701 | skip = 0; |
cfb25cc4 | 702 | for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { |
e857a5bd | 703 | if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) { |
81a8824f WD |
704 | skip = 1; |
705 | break; | |
706 | } | |
707 | } | |
708 | if (skip) | |
709 | continue; | |
710 | #endif | |
54b99e51 | 711 | if (i2c_probe(j) == 0) { |
81a8824f | 712 | printf(" %02X", j); |
54b99e51 EN |
713 | found++; |
714 | } | |
81a8824f | 715 | } |
4b9206ed | 716 | putc ('\n'); |
81a8824f | 717 | |
6d0f6bcf | 718 | #if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f | 719 | puts ("Excluded chip addresses:"); |
cfb25cc4 | 720 | for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) { |
e857a5bd | 721 | if (COMPARE_BUS(bus,k)) |
bb99ad6d BW |
722 | printf(" %02X", NO_PROBE_ADDR(k)); |
723 | } | |
4b9206ed | 724 | putc ('\n'); |
81a8824f WD |
725 | #endif |
726 | ||
54b99e51 | 727 | return (0 == found); |
81a8824f WD |
728 | } |
729 | ||
06afa388 MV |
730 | /** |
731 | * do_i2c_loop() - Handle the "i2c loop" command-line command | |
732 | * @cmdtp: Command data struct pointer | |
733 | * @flag: Command flag | |
734 | * @argc: Command-line argument count | |
735 | * @argv: Array of command-line arguments | |
736 | * | |
737 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
738 | * on error. | |
739 | * | |
81a8824f | 740 | * Syntax: |
0f89c54b | 741 | * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] |
81a8824f WD |
742 | * {length} - Number of bytes to read |
743 | * {delay} - A DECIMAL number and defaults to 1000 uSec | |
744 | */ | |
54841ab5 | 745 | static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f WD |
746 | { |
747 | u_char chip; | |
748 | ulong alen; | |
749 | uint addr; | |
750 | uint length; | |
751 | u_char bytes[16]; | |
752 | int delay; | |
81a8824f | 753 | |
47e26b1b | 754 | if (argc < 3) |
4c12eeb8 | 755 | return CMD_RET_USAGE; |
81a8824f WD |
756 | |
757 | /* | |
758 | * Chip is always specified. | |
759 | */ | |
760 | chip = simple_strtoul(argv[1], NULL, 16); | |
761 | ||
762 | /* | |
763 | * Address is always specified. | |
764 | */ | |
765 | addr = simple_strtoul(argv[2], NULL, 16); | |
2c0dc990 | 766 | alen = get_alen(argv[2]); |
7a92e53c | 767 | if (alen > 3) |
4c12eeb8 | 768 | return CMD_RET_USAGE; |
81a8824f WD |
769 | |
770 | /* | |
771 | * Length is the number of objects, not number of bytes. | |
772 | */ | |
773 | length = 1; | |
774 | length = simple_strtoul(argv[3], NULL, 16); | |
e857a5bd | 775 | if (length > sizeof(bytes)) |
81a8824f | 776 | length = sizeof(bytes); |
81a8824f WD |
777 | |
778 | /* | |
779 | * The delay time (uSec) is optional. | |
780 | */ | |
781 | delay = 1000; | |
e857a5bd | 782 | if (argc > 3) |
81a8824f | 783 | delay = simple_strtoul(argv[4], NULL, 10); |
81a8824f WD |
784 | /* |
785 | * Run the loop... | |
786 | */ | |
e857a5bd TT |
787 | while (1) { |
788 | if (i2c_read(chip, addr, alen, bytes, length) != 0) | |
4b9206ed | 789 | puts ("Error reading the chip.\n"); |
81a8824f WD |
790 | udelay(delay); |
791 | } | |
792 | ||
793 | /* NOTREACHED */ | |
794 | return 0; | |
795 | } | |
796 | ||
81a8824f WD |
797 | /* |
798 | * The SDRAM command is separately configured because many | |
799 | * (most?) embedded boards don't use SDRAM DIMMs. | |
06afa388 MV |
800 | * |
801 | * FIXME: Document and probably move elsewhere! | |
81a8824f | 802 | */ |
c76fe474 | 803 | #if defined(CONFIG_CMD_SDRAM) |
632de067 LJ |
804 | static void print_ddr2_tcyc (u_char const b) |
805 | { | |
806 | printf ("%d.", (b >> 4) & 0x0F); | |
807 | switch (b & 0x0F) { | |
808 | case 0x0: | |
809 | case 0x1: | |
810 | case 0x2: | |
811 | case 0x3: | |
812 | case 0x4: | |
813 | case 0x5: | |
814 | case 0x6: | |
815 | case 0x7: | |
816 | case 0x8: | |
817 | case 0x9: | |
818 | printf ("%d ns\n", b & 0x0F); | |
819 | break; | |
820 | case 0xA: | |
821 | puts ("25 ns\n"); | |
822 | break; | |
823 | case 0xB: | |
824 | puts ("33 ns\n"); | |
825 | break; | |
826 | case 0xC: | |
827 | puts ("66 ns\n"); | |
828 | break; | |
829 | case 0xD: | |
830 | puts ("75 ns\n"); | |
831 | break; | |
832 | default: | |
833 | puts ("?? ns\n"); | |
834 | break; | |
835 | } | |
836 | } | |
837 | ||
838 | static void decode_bits (u_char const b, char const *str[], int const do_once) | |
839 | { | |
840 | u_char mask; | |
841 | ||
842 | for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) { | |
843 | if (b & mask) { | |
844 | puts (*str); | |
845 | if (do_once) | |
846 | return; | |
847 | } | |
848 | } | |
849 | } | |
81a8824f WD |
850 | |
851 | /* | |
852 | * Syntax: | |
0f89c54b | 853 | * i2c sdram {i2c_chip} |
81a8824f | 854 | */ |
54841ab5 | 855 | static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
81a8824f | 856 | { |
632de067 LJ |
857 | enum { unknown, EDO, SDRAM, DDR2 } type; |
858 | ||
81a8824f WD |
859 | u_char chip; |
860 | u_char data[128]; | |
861 | u_char cksum; | |
862 | int j; | |
863 | ||
632de067 LJ |
864 | static const char *decode_CAS_DDR2[] = { |
865 | " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD" | |
866 | }; | |
867 | ||
868 | static const char *decode_CAS_default[] = { | |
869 | " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1" | |
870 | }; | |
871 | ||
872 | static const char *decode_CS_WE_default[] = { | |
873 | " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0" | |
874 | }; | |
875 | ||
876 | static const char *decode_byte21_default[] = { | |
877 | " TBD (bit 7)\n", | |
878 | " Redundant row address\n", | |
879 | " Differential clock input\n", | |
880 | " Registerd DQMB inputs\n", | |
881 | " Buffered DQMB inputs\n", | |
882 | " On-card PLL\n", | |
883 | " Registered address/control lines\n", | |
884 | " Buffered address/control lines\n" | |
885 | }; | |
886 | ||
887 | static const char *decode_byte22_DDR2[] = { | |
888 | " TBD (bit 7)\n", | |
889 | " TBD (bit 6)\n", | |
890 | " TBD (bit 5)\n", | |
891 | " TBD (bit 4)\n", | |
892 | " TBD (bit 3)\n", | |
893 | " Supports partial array self refresh\n", | |
894 | " Supports 50 ohm ODT\n", | |
895 | " Supports weak driver\n" | |
896 | }; | |
897 | ||
898 | static const char *decode_row_density_DDR2[] = { | |
899 | "512 MiB", "256 MiB", "128 MiB", "16 GiB", | |
900 | "8 GiB", "4 GiB", "2 GiB", "1 GiB" | |
901 | }; | |
902 | ||
903 | static const char *decode_row_density_default[] = { | |
904 | "512 MiB", "256 MiB", "128 MiB", "64 MiB", | |
905 | "32 MiB", "16 MiB", "8 MiB", "4 MiB" | |
906 | }; | |
907 | ||
47e26b1b | 908 | if (argc < 2) |
4c12eeb8 | 909 | return CMD_RET_USAGE; |
47e26b1b | 910 | |
81a8824f WD |
911 | /* |
912 | * Chip is always specified. | |
632de067 LJ |
913 | */ |
914 | chip = simple_strtoul (argv[1], NULL, 16); | |
81a8824f | 915 | |
632de067 | 916 | if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) { |
4b9206ed | 917 | puts ("No SDRAM Serial Presence Detect found.\n"); |
81a8824f WD |
918 | return 1; |
919 | } | |
920 | ||
921 | cksum = 0; | |
922 | for (j = 0; j < 63; j++) { | |
923 | cksum += data[j]; | |
924 | } | |
e857a5bd | 925 | if (cksum != data[63]) { |
81a8824f | 926 | printf ("WARNING: Configuration data checksum failure:\n" |
632de067 | 927 | " is 0x%02x, calculated 0x%02x\n", data[63], cksum); |
81a8824f | 928 | } |
632de067 | 929 | printf ("SPD data revision %d.%d\n", |
81a8824f | 930 | (data[62] >> 4) & 0x0F, data[62] & 0x0F); |
632de067 LJ |
931 | printf ("Bytes used 0x%02X\n", data[0]); |
932 | printf ("Serial memory size 0x%02X\n", 1 << data[1]); | |
933 | ||
4b9206ed | 934 | puts ("Memory type "); |
632de067 | 935 | switch (data[2]) { |
0df6b844 LJ |
936 | case 2: |
937 | type = EDO; | |
938 | puts ("EDO\n"); | |
939 | break; | |
940 | case 4: | |
941 | type = SDRAM; | |
942 | puts ("SDRAM\n"); | |
943 | break; | |
944 | case 8: | |
945 | type = DDR2; | |
946 | puts ("DDR2\n"); | |
947 | break; | |
948 | default: | |
949 | type = unknown; | |
950 | puts ("unknown\n"); | |
951 | break; | |
81a8824f | 952 | } |
632de067 | 953 | |
4b9206ed | 954 | puts ("Row address bits "); |
e857a5bd | 955 | if ((data[3] & 0x00F0) == 0) |
632de067 | 956 | printf ("%d\n", data[3] & 0x0F); |
e857a5bd | 957 | else |
632de067 LJ |
958 | printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F); |
959 | ||
4b9206ed | 960 | puts ("Column address bits "); |
e857a5bd | 961 | if ((data[4] & 0x00F0) == 0) |
632de067 | 962 | printf ("%d\n", data[4] & 0x0F); |
e857a5bd | 963 | else |
632de067 | 964 | printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F); |
0df6b844 LJ |
965 | |
966 | switch (type) { | |
967 | case DDR2: | |
632de067 LJ |
968 | printf ("Number of ranks %d\n", |
969 | (data[5] & 0x07) + 1); | |
0df6b844 LJ |
970 | break; |
971 | default: | |
632de067 | 972 | printf ("Module rows %d\n", data[5]); |
0df6b844 LJ |
973 | break; |
974 | } | |
975 | ||
976 | switch (type) { | |
977 | case DDR2: | |
632de067 | 978 | printf ("Module data width %d bits\n", data[6]); |
0df6b844 LJ |
979 | break; |
980 | default: | |
632de067 LJ |
981 | printf ("Module data width %d bits\n", |
982 | (data[7] << 8) | data[6]); | |
0df6b844 LJ |
983 | break; |
984 | } | |
985 | ||
4b9206ed | 986 | puts ("Interface signal levels "); |
81a8824f | 987 | switch(data[8]) { |
0df6b844 | 988 | case 0: puts ("TTL 5.0 V\n"); break; |
4b9206ed | 989 | case 1: puts ("LVTTL\n"); break; |
0df6b844 LJ |
990 | case 2: puts ("HSTL 1.5 V\n"); break; |
991 | case 3: puts ("SSTL 3.3 V\n"); break; | |
992 | case 4: puts ("SSTL 2.5 V\n"); break; | |
993 | case 5: puts ("SSTL 1.8 V\n"); break; | |
4b9206ed | 994 | default: puts ("unknown\n"); break; |
81a8824f | 995 | } |
0df6b844 LJ |
996 | |
997 | switch (type) { | |
998 | case DDR2: | |
632de067 LJ |
999 | printf ("SDRAM cycle time "); |
1000 | print_ddr2_tcyc (data[9]); | |
0df6b844 LJ |
1001 | break; |
1002 | default: | |
632de067 LJ |
1003 | printf ("SDRAM cycle time %d.%d ns\n", |
1004 | (data[9] >> 4) & 0x0F, data[9] & 0x0F); | |
0df6b844 LJ |
1005 | break; |
1006 | } | |
1007 | ||
1008 | switch (type) { | |
1009 | case DDR2: | |
632de067 LJ |
1010 | printf ("SDRAM access time 0.%d%d ns\n", |
1011 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
1012 | break; |
1013 | default: | |
632de067 LJ |
1014 | printf ("SDRAM access time %d.%d ns\n", |
1015 | (data[10] >> 4) & 0x0F, data[10] & 0x0F); | |
0df6b844 LJ |
1016 | break; |
1017 | } | |
1018 | ||
4b9206ed | 1019 | puts ("EDC configuration "); |
632de067 | 1020 | switch (data[11]) { |
4b9206ed WD |
1021 | case 0: puts ("None\n"); break; |
1022 | case 1: puts ("Parity\n"); break; | |
1023 | case 2: puts ("ECC\n"); break; | |
1024 | default: puts ("unknown\n"); break; | |
81a8824f | 1025 | } |
632de067 | 1026 | |
e857a5bd | 1027 | if ((data[12] & 0x80) == 0) |
4b9206ed | 1028 | puts ("No self refresh, rate "); |
e857a5bd | 1029 | else |
4b9206ed | 1030 | puts ("Self refresh, rate "); |
632de067 | 1031 | |
81a8824f | 1032 | switch(data[12] & 0x7F) { |
632de067 LJ |
1033 | case 0: puts ("15.625 us\n"); break; |
1034 | case 1: puts ("3.9 us\n"); break; | |
1035 | case 2: puts ("7.8 us\n"); break; | |
1036 | case 3: puts ("31.3 us\n"); break; | |
1037 | case 4: puts ("62.5 us\n"); break; | |
1038 | case 5: puts ("125 us\n"); break; | |
4b9206ed | 1039 | default: puts ("unknown\n"); break; |
81a8824f | 1040 | } |
0df6b844 LJ |
1041 | |
1042 | switch (type) { | |
1043 | case DDR2: | |
632de067 | 1044 | printf ("SDRAM width (primary) %d\n", data[13]); |
0df6b844 LJ |
1045 | break; |
1046 | default: | |
632de067 | 1047 | printf ("SDRAM width (primary) %d\n", data[13] & 0x7F); |
0df6b844 | 1048 | if ((data[13] & 0x80) != 0) { |
632de067 LJ |
1049 | printf (" (second bank) %d\n", |
1050 | 2 * (data[13] & 0x7F)); | |
0df6b844 LJ |
1051 | } |
1052 | break; | |
1053 | } | |
1054 | ||
1055 | switch (type) { | |
1056 | case DDR2: | |
1057 | if (data[14] != 0) | |
632de067 | 1058 | printf ("EDC width %d\n", data[14]); |
0df6b844 LJ |
1059 | break; |
1060 | default: | |
1061 | if (data[14] != 0) { | |
632de067 LJ |
1062 | printf ("EDC width %d\n", |
1063 | data[14] & 0x7F); | |
0df6b844 LJ |
1064 | |
1065 | if ((data[14] & 0x80) != 0) { | |
632de067 LJ |
1066 | printf (" (second bank) %d\n", |
1067 | 2 * (data[14] & 0x7F)); | |
0df6b844 LJ |
1068 | } |
1069 | } | |
1070 | break; | |
81a8824f | 1071 | } |
0df6b844 | 1072 | |
632de067 LJ |
1073 | if (DDR2 != type) { |
1074 | printf ("Min clock delay, back-to-back random column addresses " | |
1075 | "%d\n", data[15]); | |
0df6b844 LJ |
1076 | } |
1077 | ||
4b9206ed WD |
1078 | puts ("Burst length(s) "); |
1079 | if (data[16] & 0x80) puts (" Page"); | |
1080 | if (data[16] & 0x08) puts (" 8"); | |
1081 | if (data[16] & 0x04) puts (" 4"); | |
1082 | if (data[16] & 0x02) puts (" 2"); | |
1083 | if (data[16] & 0x01) puts (" 1"); | |
1084 | putc ('\n'); | |
632de067 | 1085 | printf ("Number of banks %d\n", data[17]); |
0df6b844 LJ |
1086 | |
1087 | switch (type) { | |
1088 | case DDR2: | |
1089 | puts ("CAS latency(s) "); | |
632de067 | 1090 | decode_bits (data[18], decode_CAS_DDR2, 0); |
0df6b844 LJ |
1091 | putc ('\n'); |
1092 | break; | |
1093 | default: | |
1094 | puts ("CAS latency(s) "); | |
632de067 | 1095 | decode_bits (data[18], decode_CAS_default, 0); |
0df6b844 LJ |
1096 | putc ('\n'); |
1097 | break; | |
1098 | } | |
1099 | ||
1100 | if (DDR2 != type) { | |
1101 | puts ("CS latency(s) "); | |
632de067 | 1102 | decode_bits (data[19], decode_CS_WE_default, 0); |
0df6b844 LJ |
1103 | putc ('\n'); |
1104 | } | |
1105 | ||
1106 | if (DDR2 != type) { | |
1107 | puts ("WE latency(s) "); | |
632de067 | 1108 | decode_bits (data[20], decode_CS_WE_default, 0); |
0df6b844 LJ |
1109 | putc ('\n'); |
1110 | } | |
1111 | ||
1112 | switch (type) { | |
1113 | case DDR2: | |
1114 | puts ("Module attributes:\n"); | |
1115 | if (data[21] & 0x80) | |
1116 | puts (" TBD (bit 7)\n"); | |
1117 | if (data[21] & 0x40) | |
1118 | puts (" Analysis probe installed\n"); | |
1119 | if (data[21] & 0x20) | |
1120 | puts (" TBD (bit 5)\n"); | |
1121 | if (data[21] & 0x10) | |
1122 | puts (" FET switch external enable\n"); | |
632de067 | 1123 | printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03); |
0df6b844 | 1124 | if (data[20] & 0x11) { |
632de067 LJ |
1125 | printf (" %d active registers on DIMM\n", |
1126 | (data[21] & 0x03) + 1); | |
0df6b844 LJ |
1127 | } |
1128 | break; | |
1129 | default: | |
1130 | puts ("Module attributes:\n"); | |
1131 | if (!data[21]) | |
1132 | puts (" (none)\n"); | |
632de067 LJ |
1133 | else |
1134 | decode_bits (data[21], decode_byte21_default, 0); | |
0df6b844 LJ |
1135 | break; |
1136 | } | |
1137 | ||
1138 | switch (type) { | |
1139 | case DDR2: | |
632de067 | 1140 | decode_bits (data[22], decode_byte22_DDR2, 0); |
0df6b844 LJ |
1141 | break; |
1142 | default: | |
1143 | puts ("Device attributes:\n"); | |
1144 | if (data[22] & 0x80) puts (" TBD (bit 7)\n"); | |
1145 | if (data[22] & 0x40) puts (" TBD (bit 6)\n"); | |
1146 | if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n"); | |
1147 | else puts (" Upper Vcc tolerance 10%\n"); | |
1148 | if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n"); | |
1149 | else puts (" Lower Vcc tolerance 10%\n"); | |
1150 | if (data[22] & 0x08) puts (" Supports write1/read burst\n"); | |
1151 | if (data[22] & 0x04) puts (" Supports precharge all\n"); | |
1152 | if (data[22] & 0x02) puts (" Supports auto precharge\n"); | |
1153 | if (data[22] & 0x01) puts (" Supports early RAS# precharge\n"); | |
1154 | break; | |
1155 | } | |
1156 | ||
1157 | switch (type) { | |
1158 | case DDR2: | |
632de067 LJ |
1159 | printf ("SDRAM cycle time (2nd highest CAS latency) "); |
1160 | print_ddr2_tcyc (data[23]); | |
0df6b844 LJ |
1161 | break; |
1162 | default: | |
632de067 LJ |
1163 | printf ("SDRAM cycle time (2nd highest CAS latency) %d." |
1164 | "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F); | |
0df6b844 LJ |
1165 | break; |
1166 | } | |
1167 | ||
1168 | switch (type) { | |
1169 | case DDR2: | |
632de067 LJ |
1170 | printf ("SDRAM access from clock (2nd highest CAS latency) 0." |
1171 | "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1172 | break; |
1173 | default: | |
632de067 LJ |
1174 | printf ("SDRAM access from clock (2nd highest CAS latency) %d." |
1175 | "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); | |
0df6b844 LJ |
1176 | break; |
1177 | } | |
1178 | ||
1179 | switch (type) { | |
1180 | case DDR2: | |
632de067 LJ |
1181 | printf ("SDRAM cycle time (3rd highest CAS latency) "); |
1182 | print_ddr2_tcyc (data[25]); | |
0df6b844 LJ |
1183 | break; |
1184 | default: | |
632de067 LJ |
1185 | printf ("SDRAM cycle time (3rd highest CAS latency) %d." |
1186 | "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F); | |
0df6b844 LJ |
1187 | break; |
1188 | } | |
1189 | ||
1190 | switch (type) { | |
1191 | case DDR2: | |
632de067 LJ |
1192 | printf ("SDRAM access from clock (3rd highest CAS latency) 0." |
1193 | "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1194 | break; |
1195 | default: | |
632de067 LJ |
1196 | printf ("SDRAM access from clock (3rd highest CAS latency) %d." |
1197 | "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); | |
0df6b844 LJ |
1198 | break; |
1199 | } | |
1200 | ||
1201 | switch (type) { | |
1202 | case DDR2: | |
632de067 LJ |
1203 | printf ("Minimum row precharge %d.%02d ns\n", |
1204 | (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03)); | |
0df6b844 LJ |
1205 | break; |
1206 | default: | |
632de067 | 1207 | printf ("Minimum row precharge %d ns\n", data[27]); |
0df6b844 LJ |
1208 | break; |
1209 | } | |
1210 | ||
1211 | switch (type) { | |
1212 | case DDR2: | |
632de067 LJ |
1213 | printf ("Row active to row active min %d.%02d ns\n", |
1214 | (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03)); | |
0df6b844 LJ |
1215 | break; |
1216 | default: | |
632de067 | 1217 | printf ("Row active to row active min %d ns\n", data[28]); |
0df6b844 LJ |
1218 | break; |
1219 | } | |
1220 | ||
1221 | switch (type) { | |
1222 | case DDR2: | |
632de067 LJ |
1223 | printf ("RAS to CAS delay min %d.%02d ns\n", |
1224 | (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03)); | |
0df6b844 LJ |
1225 | break; |
1226 | default: | |
632de067 | 1227 | printf ("RAS to CAS delay min %d ns\n", data[29]); |
0df6b844 LJ |
1228 | break; |
1229 | } | |
1230 | ||
632de067 | 1231 | printf ("Minimum RAS pulse width %d ns\n", data[30]); |
0df6b844 LJ |
1232 | |
1233 | switch (type) { | |
1234 | case DDR2: | |
632de067 LJ |
1235 | puts ("Density of each row "); |
1236 | decode_bits (data[31], decode_row_density_DDR2, 1); | |
1237 | putc ('\n'); | |
0df6b844 LJ |
1238 | break; |
1239 | default: | |
632de067 LJ |
1240 | puts ("Density of each row "); |
1241 | decode_bits (data[31], decode_row_density_default, 1); | |
1242 | putc ('\n'); | |
0df6b844 LJ |
1243 | break; |
1244 | } | |
1245 | ||
1246 | switch (type) { | |
1247 | case DDR2: | |
632de067 | 1248 | puts ("Command and Address setup "); |
0df6b844 | 1249 | if (data[32] >= 0xA0) { |
632de067 LJ |
1250 | printf ("1.%d%d ns\n", |
1251 | ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F); | |
0df6b844 | 1252 | } else { |
632de067 LJ |
1253 | printf ("0.%d%d ns\n", |
1254 | ((data[32] >> 4) & 0x0F), data[32] & 0x0F); | |
0df6b844 LJ |
1255 | } |
1256 | break; | |
1257 | default: | |
632de067 LJ |
1258 | printf ("Command and Address setup %c%d.%d ns\n", |
1259 | (data[32] & 0x80) ? '-' : '+', | |
1260 | (data[32] >> 4) & 0x07, data[32] & 0x0F); | |
0df6b844 LJ |
1261 | break; |
1262 | } | |
1263 | ||
1264 | switch (type) { | |
1265 | case DDR2: | |
632de067 | 1266 | puts ("Command and Address hold "); |
0df6b844 | 1267 | if (data[33] >= 0xA0) { |
632de067 LJ |
1268 | printf ("1.%d%d ns\n", |
1269 | ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F); | |
0df6b844 | 1270 | } else { |
632de067 LJ |
1271 | printf ("0.%d%d ns\n", |
1272 | ((data[33] >> 4) & 0x0F), data[33] & 0x0F); | |
0df6b844 LJ |
1273 | } |
1274 | break; | |
1275 | default: | |
632de067 LJ |
1276 | printf ("Command and Address hold %c%d.%d ns\n", |
1277 | (data[33] & 0x80) ? '-' : '+', | |
1278 | (data[33] >> 4) & 0x07, data[33] & 0x0F); | |
0df6b844 LJ |
1279 | break; |
1280 | } | |
1281 | ||
1282 | switch (type) { | |
1283 | case DDR2: | |
632de067 LJ |
1284 | printf ("Data signal input setup 0.%d%d ns\n", |
1285 | (data[34] >> 4) & 0x0F, data[34] & 0x0F); | |
0df6b844 LJ |
1286 | break; |
1287 | default: | |
632de067 LJ |
1288 | printf ("Data signal input setup %c%d.%d ns\n", |
1289 | (data[34] & 0x80) ? '-' : '+', | |
1290 | (data[34] >> 4) & 0x07, data[34] & 0x0F); | |
0df6b844 LJ |
1291 | break; |
1292 | } | |
1293 | ||
1294 | switch (type) { | |
1295 | case DDR2: | |
632de067 LJ |
1296 | printf ("Data signal input hold 0.%d%d ns\n", |
1297 | (data[35] >> 4) & 0x0F, data[35] & 0x0F); | |
0df6b844 LJ |
1298 | break; |
1299 | default: | |
632de067 LJ |
1300 | printf ("Data signal input hold %c%d.%d ns\n", |
1301 | (data[35] & 0x80) ? '-' : '+', | |
1302 | (data[35] >> 4) & 0x07, data[35] & 0x0F); | |
0df6b844 LJ |
1303 | break; |
1304 | } | |
1305 | ||
4b9206ed | 1306 | puts ("Manufacturer's JEDEC ID "); |
e857a5bd | 1307 | for (j = 64; j <= 71; j++) |
632de067 | 1308 | printf ("%02X ", data[j]); |
4b9206ed | 1309 | putc ('\n'); |
632de067 | 1310 | printf ("Manufacturing Location %02X\n", data[72]); |
4b9206ed | 1311 | puts ("Manufacturer's Part Number "); |
e857a5bd | 1312 | for (j = 73; j <= 90; j++) |
632de067 | 1313 | printf ("%02X ", data[j]); |
4b9206ed | 1314 | putc ('\n'); |
632de067 LJ |
1315 | printf ("Revision Code %02X %02X\n", data[91], data[92]); |
1316 | printf ("Manufacturing Date %02X %02X\n", data[93], data[94]); | |
4b9206ed | 1317 | puts ("Assembly Serial Number "); |
e857a5bd | 1318 | for (j = 95; j <= 98; j++) |
632de067 | 1319 | printf ("%02X ", data[j]); |
4b9206ed | 1320 | putc ('\n'); |
81a8824f | 1321 | |
0df6b844 | 1322 | if (DDR2 != type) { |
632de067 LJ |
1323 | printf ("Speed rating PC%d\n", |
1324 | data[126] == 0x66 ? 66 : data[126]); | |
0df6b844 | 1325 | } |
81a8824f WD |
1326 | return 0; |
1327 | } | |
90253178 | 1328 | #endif |
81a8824f | 1329 | |
735987c5 TWHT |
1330 | /* |
1331 | * Syntax: | |
1332 | * i2c edid {i2c_chip} | |
1333 | */ | |
1334 | #if defined(CONFIG_I2C_EDID) | |
1335 | int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) | |
1336 | { | |
1337 | u_char chip; | |
1338 | struct edid1_info edid; | |
1339 | ||
1340 | if (argc < 2) { | |
1341 | cmd_usage(cmdtp); | |
1342 | return 1; | |
1343 | } | |
1344 | ||
1345 | chip = simple_strtoul(argv[1], NULL, 16); | |
1346 | if (i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid)) != 0) { | |
1347 | puts("Error reading EDID content.\n"); | |
1348 | return 1; | |
1349 | } | |
1350 | ||
1351 | if (edid_check_info(&edid)) { | |
1352 | puts("Content isn't valid EDID.\n"); | |
1353 | return 1; | |
1354 | } | |
1355 | ||
1356 | edid_print_info(&edid); | |
1357 | return 0; | |
1358 | ||
1359 | } | |
1360 | #endif /* CONFIG_I2C_EDID */ | |
1361 | ||
06afa388 | 1362 | /** |
3f4978c7 | 1363 | * do_i2c_show_bus() - Handle the "i2c bus" command-line command |
06afa388 MV |
1364 | * @cmdtp: Command data struct pointer |
1365 | * @flag: Command flag | |
1366 | * @argc: Command-line argument count | |
1367 | * @argv: Array of command-line arguments | |
1368 | * | |
1369 | * Returns zero always. | |
1370 | */ | |
3f4978c7 HS |
1371 | #if defined(CONFIG_SYS_I2C) |
1372 | int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
67b23a32 | 1373 | { |
3f4978c7 HS |
1374 | int i; |
1375 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
1376 | int j; | |
1377 | #endif | |
67b23a32 HS |
1378 | |
1379 | if (argc == 1) { | |
1380 | /* show all busses */ | |
3f4978c7 HS |
1381 | for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) { |
1382 | printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); | |
1383 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
1384 | for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { | |
1385 | if (i2c_bus[i].next_hop[j].chip == 0) | |
1386 | break; | |
1387 | printf("->%s@0x%2x:%d", | |
1388 | i2c_bus[i].next_hop[j].mux.name, | |
1389 | i2c_bus[i].next_hop[j].chip, | |
1390 | i2c_bus[i].next_hop[j].channel); | |
67b23a32 | 1391 | } |
3f4978c7 HS |
1392 | #endif |
1393 | printf("\n"); | |
67b23a32 HS |
1394 | } |
1395 | } else { | |
3f4978c7 HS |
1396 | /* show specific bus */ |
1397 | i = simple_strtoul(argv[1], NULL, 10); | |
1398 | if (i >= CONFIG_SYS_NUM_I2C_BUSES) { | |
1399 | printf("Invalid bus %d\n", i); | |
1400 | return -1; | |
1401 | } | |
1402 | printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name); | |
1403 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
1404 | for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) { | |
1405 | if (i2c_bus[i].next_hop[j].chip == 0) | |
1406 | break; | |
1407 | printf("->%s@0x%2x:%d", | |
1408 | i2c_bus[i].next_hop[j].mux.name, | |
1409 | i2c_bus[i].next_hop[j].chip, | |
1410 | i2c_bus[i].next_hop[j].channel); | |
1411 | } | |
1412 | #endif | |
1413 | printf("\n"); | |
67b23a32 | 1414 | } |
3f4978c7 HS |
1415 | |
1416 | return 0; | |
67b23a32 | 1417 | } |
3f4978c7 | 1418 | #endif |
67b23a32 | 1419 | |
06afa388 MV |
1420 | /** |
1421 | * do_i2c_bus_num() - Handle the "i2c dev" command-line command | |
1422 | * @cmdtp: Command data struct pointer | |
1423 | * @flag: Command flag | |
1424 | * @argc: Command-line argument count | |
1425 | * @argv: Array of command-line arguments | |
1426 | * | |
1427 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1428 | * on error. | |
1429 | */ | |
3f4978c7 HS |
1430 | #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) |
1431 | int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) | |
bb99ad6d | 1432 | { |
3f4978c7 HS |
1433 | int ret = 0; |
1434 | unsigned int bus_no; | |
bb99ad6d | 1435 | |
e857a5bd TT |
1436 | if (argc == 1) |
1437 | /* querying current setting */ | |
bb99ad6d | 1438 | printf("Current bus is %d\n", i2c_get_bus_num()); |
e857a5bd | 1439 | else { |
3f4978c7 | 1440 | bus_no = simple_strtoul(argv[1], NULL, 10); |
880a4127 | 1441 | #if defined(CONFIG_SYS_I2C) |
3f4978c7 HS |
1442 | if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) { |
1443 | printf("Invalid bus %d\n", bus_no); | |
1444 | return -1; | |
1445 | } | |
880a4127 | 1446 | #endif |
3f4978c7 HS |
1447 | printf("Setting bus to %d\n", bus_no); |
1448 | ret = i2c_set_bus_num(bus_no); | |
e857a5bd | 1449 | if (ret) |
bb99ad6d | 1450 | printf("Failure changing bus number (%d)\n", ret); |
bb99ad6d BW |
1451 | } |
1452 | return ret; | |
1453 | } | |
3f4978c7 | 1454 | #endif /* defined(CONFIG_SYS_I2C) */ |
bb99ad6d | 1455 | |
06afa388 MV |
1456 | /** |
1457 | * do_i2c_bus_speed() - Handle the "i2c speed" command-line command | |
1458 | * @cmdtp: Command data struct pointer | |
1459 | * @flag: Command flag | |
1460 | * @argc: Command-line argument count | |
1461 | * @argv: Array of command-line arguments | |
1462 | * | |
1463 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1464 | * on error. | |
1465 | */ | |
54841ab5 | 1466 | static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d BW |
1467 | { |
1468 | int speed, ret=0; | |
1469 | ||
e857a5bd TT |
1470 | if (argc == 1) |
1471 | /* querying current speed */ | |
bb99ad6d | 1472 | printf("Current bus speed=%d\n", i2c_get_bus_speed()); |
e857a5bd | 1473 | else { |
bb99ad6d BW |
1474 | speed = simple_strtoul(argv[1], NULL, 10); |
1475 | printf("Setting bus speed to %d Hz\n", speed); | |
1476 | ret = i2c_set_bus_speed(speed); | |
e857a5bd | 1477 | if (ret) |
bb99ad6d | 1478 | printf("Failure changing bus speed (%d)\n", ret); |
bb99ad6d BW |
1479 | } |
1480 | return ret; | |
1481 | } | |
1482 | ||
06afa388 MV |
1483 | /** |
1484 | * do_i2c_mm() - Handle the "i2c mm" command-line command | |
1485 | * @cmdtp: Command data struct pointer | |
1486 | * @flag: Command flag | |
1487 | * @argc: Command-line argument count | |
1488 | * @argv: Array of command-line arguments | |
1489 | * | |
1490 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1491 | * on error. | |
1492 | */ | |
54841ab5 | 1493 | static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d | 1494 | { |
bfc3b77e FM |
1495 | return mod_i2c_mem (cmdtp, 1, flag, argc, argv); |
1496 | } | |
1497 | ||
06afa388 MV |
1498 | /** |
1499 | * do_i2c_nm() - Handle the "i2c nm" command-line command | |
1500 | * @cmdtp: Command data struct pointer | |
1501 | * @flag: Command flag | |
1502 | * @argc: Command-line argument count | |
1503 | * @argv: Array of command-line arguments | |
1504 | * | |
1505 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1506 | * on error. | |
1507 | */ | |
54841ab5 | 1508 | static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1509 | { |
1510 | return mod_i2c_mem (cmdtp, 0, flag, argc, argv); | |
1511 | } | |
e96ad5d3 | 1512 | |
06afa388 MV |
1513 | /** |
1514 | * do_i2c_reset() - Handle the "i2c reset" command-line command | |
1515 | * @cmdtp: Command data struct pointer | |
1516 | * @flag: Command flag | |
1517 | * @argc: Command-line argument count | |
1518 | * @argv: Array of command-line arguments | |
1519 | * | |
1520 | * Returns zero always. | |
1521 | */ | |
54841ab5 | 1522 | static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e | 1523 | { |
3f4978c7 HS |
1524 | #if defined(CONFIG_SYS_I2C) |
1525 | i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr); | |
1526 | #else | |
bfc3b77e | 1527 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
3f4978c7 | 1528 | #endif |
bfc3b77e FM |
1529 | return 0; |
1530 | } | |
1531 | ||
1532 | static cmd_tbl_t cmd_i2c_sub[] = { | |
3f4978c7 HS |
1533 | #if defined(CONFIG_SYS_I2C) |
1534 | U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""), | |
9a2accb4 | 1535 | #endif |
bfc3b77e | 1536 | U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), |
3f4978c7 HS |
1537 | #if defined(CONFIG_SYS_I2C) || \ |
1538 | defined(CONFIG_I2C_MULTI_BUS) | |
bfc3b77e | 1539 | U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), |
bb99ad6d | 1540 | #endif /* CONFIG_I2C_MULTI_BUS */ |
735987c5 TWHT |
1541 | #if defined(CONFIG_I2C_EDID) |
1542 | U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""), | |
1543 | #endif /* CONFIG_I2C_EDID */ | |
bfc3b77e FM |
1544 | U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""), |
1545 | U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""), | |
1546 | U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""), | |
1547 | U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""), | |
1548 | U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), | |
1549 | U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), | |
652e5354 | 1550 | U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), |
ff5d2dce | 1551 | U_BOOT_CMD_MKENT(write, 5, 0, do_i2c_write, "", ""), |
bfc3b77e | 1552 | U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""), |
c76fe474 | 1553 | #if defined(CONFIG_CMD_SDRAM) |
bfc3b77e | 1554 | U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""), |
90253178 | 1555 | #endif |
bfc3b77e FM |
1556 | U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), |
1557 | }; | |
1558 | ||
2e5167cc | 1559 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
f1d2b313 HS |
1560 | void i2c_reloc(void) { |
1561 | fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); | |
1562 | } | |
1563 | #endif | |
1564 | ||
06afa388 MV |
1565 | /** |
1566 | * do_i2c() - Handle the "i2c" command-line command | |
1567 | * @cmdtp: Command data struct pointer | |
1568 | * @flag: Command flag | |
1569 | * @argc: Command-line argument count | |
1570 | * @argv: Array of command-line arguments | |
1571 | * | |
1572 | * Returns zero on success, CMD_RET_USAGE in case of misuse and negative | |
1573 | * on error. | |
1574 | */ | |
54841ab5 | 1575 | static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77e FM |
1576 | { |
1577 | cmd_tbl_t *c; | |
1578 | ||
4444b221 | 1579 | if (argc < 2) |
4c12eeb8 | 1580 | return CMD_RET_USAGE; |
4444b221 | 1581 | |
bfc3b77e FM |
1582 | /* Strip off leading 'i2c' command argument */ |
1583 | argc--; | |
1584 | argv++; | |
1585 | ||
1586 | c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub)); | |
1587 | ||
47e26b1b | 1588 | if (c) |
4c12eeb8 | 1589 | return c->cmd(cmdtp, flag, argc, argv); |
47e26b1b | 1590 | else |
4c12eeb8 | 1591 | return CMD_RET_USAGE; |
bb99ad6d | 1592 | } |
8bde7f77 WD |
1593 | |
1594 | /***************************************************/ | |
088f1b19 KP |
1595 | #ifdef CONFIG_SYS_LONGHELP |
1596 | static char i2c_help_text[] = | |
3f4978c7 HS |
1597 | #if defined(CONFIG_SYS_I2C) |
1598 | "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n" | |
9a2accb4 | 1599 | #endif |
fb0070e9 | 1600 | "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n" |
3f4978c7 HS |
1601 | #if defined(CONFIG_SYS_I2C) || \ |
1602 | defined(CONFIG_I2C_MULTI_BUS) | |
9bc2e4ee | 1603 | "i2c dev [dev] - show or set current I2C bus\n" |
d9fc7032 | 1604 | #endif /* CONFIG_I2C_MULTI_BUS */ |
735987c5 TWHT |
1605 | #if defined(CONFIG_I2C_EDID) |
1606 | "i2c edid chip - print EDID configuration information\n" | |
1607 | #endif /* CONFIG_I2C_EDID */ | |
fb0070e9 | 1608 | "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n" |
d9fc7032 MF |
1609 | "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n" |
1610 | "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n" | |
1611 | "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n" | |
1612 | "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n" | |
54b99e51 | 1613 | "i2c probe [address] - test for and show device(s) on the I2C bus\n" |
652e5354 | 1614 | "i2c read chip address[.0, .1, .2] length memaddress - read to memory \n" |
ff5d2dce | 1615 | "i2c write memaddress chip address[.0, .1, .2] length - write memory to i2c\n" |
e43a27c4 | 1616 | "i2c reset - re-init the I2C Controller\n" |
c76fe474 | 1617 | #if defined(CONFIG_CMD_SDRAM) |
fb0070e9 | 1618 | "i2c sdram chip - print SDRAM configuration information\n" |
90253178 | 1619 | #endif |
088f1b19 KP |
1620 | "i2c speed [speed] - show or set I2C bus speed"; |
1621 | #endif | |
1622 | ||
1623 | U_BOOT_CMD( | |
1624 | i2c, 6, 1, do_i2c, | |
1625 | "I2C sub-system", | |
1626 | i2c_help_text | |
d9fc7032 | 1627 | ); |