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c609719b 1/*
1a344f29 2 * (C) Copyright 2000-2005
c609719b
WD
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * IDE support
27 */
28#include <common.h>
29#include <config.h>
30#include <watchdog.h>
31#include <command.h>
32#include <image.h>
33#include <asm/byteorder.h>
735dd97b 34
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35#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
36# include <pcmcia.h>
37#endif
735dd97b 38
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39#ifdef CONFIG_8xx
40# include <mpc8xx.h>
41#endif
735dd97b 42
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43#ifdef CONFIG_MPC5xxx
44#include <mpc5xxx.h>
45#endif
735dd97b 46
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47#include <ide.h>
48#include <ata.h>
735dd97b 49
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50#ifdef CONFIG_STATUS_LED
51# include <status_led.h>
52#endif
735dd97b 53
15647dc7 54#ifndef __PPC__
2262cfee 55#include <asm/io.h>
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56#ifdef __MIPS__
57/* Macros depend on this variable */
c75eba3b 58unsigned long mips_io_port_base = 0;
15647dc7 59#endif
2262cfee 60#endif
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61
62#ifdef CONFIG_SHOW_BOOT_PROGRESS
63# include <status_led.h>
64# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
65#else
66# define SHOW_BOOT_PROGRESS(arg)
67#endif
68
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69#ifdef CONFIG_IDE_8xx_DIRECT
70DECLARE_GLOBAL_DATA_PTR;
71#endif
72
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73#ifdef __PPC__
74# define EIEIO __asm__ volatile ("eieio")
1a344f29 75# define SYNC __asm__ volatile ("sync")
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76#else
77# define EIEIO /* nothing */
1a344f29 78# define SYNC /* nothing */
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79#endif
80
81#if (CONFIG_COMMANDS & CFG_CMD_IDE)
82
15647dc7 83#ifdef CONFIG_IDE_8xx_DIRECT
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84/* Timings for IDE Interface
85 *
86 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
87 * 70 165 30 PIO-Mode 0, [ns]
88 * 4 9 2 [Cycles]
89 * 50 125 20 PIO-Mode 1, [ns]
90 * 3 7 2 [Cycles]
91 * 30 100 15 PIO-Mode 2, [ns]
92 * 2 6 1 [Cycles]
93 * 30 80 10 PIO-Mode 3, [ns]
94 * 2 5 1 [Cycles]
95 * 25 70 10 PIO-Mode 4, [ns]
96 * 2 4 1 [Cycles]
97 */
98
99const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
100{
101 /* Setup Length Hold */
102 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
103 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
104 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
105 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
106 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
107};
108
109static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
110
111#ifndef CFG_PIO_MODE
112#define CFG_PIO_MODE 0 /* use a relaxed default */
113#endif
114static int pio_mode = CFG_PIO_MODE;
115
116/* Make clock cycles and always round up */
117
118#define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
119
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120#endif /* CONFIG_IDE_8xx_DIRECT */
121
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122/* ------------------------------------------------------------------------- */
123
124/* Current I/O Device */
125static int curr_device = -1;
126
127/* Current offset for IDE0 / IDE1 bus access */
128ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
129#if defined(CFG_ATA_IDE0_OFFSET)
130 CFG_ATA_IDE0_OFFSET,
131#endif
132#if defined(CFG_ATA_IDE1_OFFSET) && (CFG_IDE_MAXBUS > 1)
133 CFG_ATA_IDE1_OFFSET,
134#endif
135};
136
15647dc7 137
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138#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
139
c7de829c 140#ifndef CONFIG_AMIGAONEG3SE
1a344f29 141static int ide_bus_ok[CFG_IDE_MAXBUS];
c7de829c 142#else
1a344f29 143static int ide_bus_ok[CFG_IDE_MAXBUS] = {0,};
c7de829c 144#endif
c609719b 145
fa838874 146block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
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147/* ------------------------------------------------------------------------- */
148
149#ifdef CONFIG_IDE_LED
e2ffd59b 150#if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
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151static void ide_led (uchar led, uchar status);
152#else
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153extern void ide_led (uchar led, uchar status);
154#endif
155#else
c7de829c 156#ifndef CONFIG_AMIGAONEG3SE
c609719b 157#define ide_led(a,b) /* dummy */
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158#else
159extern void ide_led(uchar led, uchar status);
160#define LED_IDE1 1
161#define LED_IDE2 2
162#define CONFIG_IDE_LED 1
163#define DEVICE_LED(x) 1
164#endif
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165#endif
166
167#ifdef CONFIG_IDE_RESET
168static void ide_reset (void);
169#else
170#define ide_reset() /* dummy */
171#endif
172
173static void ide_ident (block_dev_desc_t *dev_desc);
174static uchar ide_wait (int dev, ulong t);
175
176#define IDE_TIME_OUT 2000 /* 2 sec timeout */
177
178#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
179
180#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
181
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182static void __inline__ ide_outb(int dev, int port, unsigned char val);
183static unsigned char __inline__ ide_inb(int dev, int port);
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184static void input_data(int dev, ulong *sect_buf, int words);
185static void output_data(int dev, ulong *sect_buf, int words);
186static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
187
188
189#ifdef CONFIG_ATAPI
190static void atapi_inquiry(block_dev_desc_t *dev_desc);
eb867a76 191ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
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192#endif
193
194
195#ifdef CONFIG_IDE_8xx_DIRECT
196static void set_pcmcia_timing (int pmode);
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197#endif
198
199/* ------------------------------------------------------------------------- */
200
201int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
202{
203 int rcode = 0;
204
205 switch (argc) {
206 case 0:
207 case 1:
208 printf ("Usage:\n%s\n", cmdtp->usage);
209 return 1;
210 case 2:
211 if (strncmp(argv[1],"res",3) == 0) {
212 puts ("\nReset IDE"
213#ifdef CONFIG_IDE_8xx_DIRECT
214 " on PCMCIA " PCMCIA_SLOT_MSG
215#endif
216 ": ");
217
218 ide_init ();
219 return 0;
220 } else if (strncmp(argv[1],"inf",3) == 0) {
221 int i;
222
223 putc ('\n');
224
225 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
226 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
227 continue; /* list only known devices */
228 printf ("IDE device %d: ", i);
229 dev_print(&ide_dev_desc[i]);
230 }
231 return 0;
232
233 } else if (strncmp(argv[1],"dev",3) == 0) {
234 if ((curr_device < 0) || (curr_device >= CFG_IDE_MAXDEVICE)) {
235 puts ("\nno IDE devices available\n");
236 return 1;
237 }
238 printf ("\nIDE device %d: ", curr_device);
239 dev_print(&ide_dev_desc[curr_device]);
240 return 0;
241 } else if (strncmp(argv[1],"part",4) == 0) {
242 int dev, ok;
243
244 for (ok=0, dev=0; dev<CFG_IDE_MAXDEVICE; ++dev) {
245 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
246 ++ok;
247 if (dev)
248 putc ('\n');
249 print_part(&ide_dev_desc[dev]);
250 }
251 }
252 if (!ok) {
253 puts ("\nno IDE devices available\n");
254 rcode ++;
255 }
256 return rcode;
257 }
258 printf ("Usage:\n%s\n", cmdtp->usage);
259 return 1;
260 case 3:
261 if (strncmp(argv[1],"dev",3) == 0) {
262 int dev = (int)simple_strtoul(argv[2], NULL, 10);
263
264 printf ("\nIDE device %d: ", dev);
265 if (dev >= CFG_IDE_MAXDEVICE) {
266 puts ("unknown device\n");
267 return 1;
268 }
269 dev_print(&ide_dev_desc[dev]);
270 /*ide_print (dev);*/
271
272 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
273 return 1;
274 }
275
276 curr_device = dev;
277
278 puts ("... is now current device\n");
279
280 return 0;
281 } else if (strncmp(argv[1],"part",4) == 0) {
282 int dev = (int)simple_strtoul(argv[2], NULL, 10);
283
284 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
285 print_part(&ide_dev_desc[dev]);
286 } else {
287 printf ("\nIDE device %d not available\n", dev);
288 rcode = 1;
289 }
290 return rcode;
291#if 0
292 } else if (strncmp(argv[1],"pio",4) == 0) {
293 int mode = (int)simple_strtoul(argv[2], NULL, 10);
294
295 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
296 puts ("\nSetting ");
297 pio_mode = mode;
298 ide_init ();
299 } else {
300 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
301 mode, IDE_MAX_PIO_MODE);
302 }
303 return;
304#endif
305 }
306
307 printf ("Usage:\n%s\n", cmdtp->usage);
308 return 1;
309 default:
310 /* at least 4 args */
311
312 if (strcmp(argv[1],"read") == 0) {
313 ulong addr = simple_strtoul(argv[2], NULL, 16);
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314 ulong cnt = simple_strtoul(argv[4], NULL, 16);
315 ulong n;
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316#ifdef CFG_64BIT_STRTOUL
317 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 318
c40b2956 319 printf ("\nIDE read: device %d block # %qd, count %ld ... ",
c609719b 320 curr_device, blk, cnt);
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321#else
322 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
323
324 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
325 curr_device, blk, cnt);
326#endif
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327
328 n = ide_dev_desc[curr_device].block_read (curr_device,
329 blk, cnt,
330 (ulong *)addr);
331 /* flush cache after read */
332 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
333
334 printf ("%ld blocks read: %s\n",
335 n, (n==cnt) ? "OK" : "ERROR");
336 if (n==cnt) {
337 return 0;
338 } else {
339 return 1;
340 }
341 } else if (strcmp(argv[1],"write") == 0) {
342 ulong addr = simple_strtoul(argv[2], NULL, 16);
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343 ulong cnt = simple_strtoul(argv[4], NULL, 16);
344 ulong n;
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345#ifdef CFG_64BIT_STRTOUL
346 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 347
c40b2956 348 printf ("\nIDE write: device %d block # %qd, count %ld ... ",
c609719b 349 curr_device, blk, cnt);
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350#else
351 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
352
353 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
354 curr_device, blk, cnt);
355#endif
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356
357 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
358
359 printf ("%ld blocks written: %s\n",
360 n, (n==cnt) ? "OK" : "ERROR");
361 if (n==cnt) {
362 return 0;
363 } else {
364 return 1;
365 }
366 } else {
367 printf ("Usage:\n%s\n", cmdtp->usage);
368 rcode = 1;
369 }
370
371 return rcode;
372 }
373}
374
375int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
376{
377 char *boot_device = NULL;
378 char *ep;
379 int dev, part = 0;
1a344f29 380 ulong addr, cnt, checksum;
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381 disk_partition_t info;
382 image_header_t *hdr;
383 int rcode = 0;
384
385 switch (argc) {
386 case 1:
387 addr = CFG_LOAD_ADDR;
388 boot_device = getenv ("bootdevice");
389 break;
390 case 2:
391 addr = simple_strtoul(argv[1], NULL, 16);
392 boot_device = getenv ("bootdevice");
393 break;
394 case 3:
395 addr = simple_strtoul(argv[1], NULL, 16);
396 boot_device = argv[2];
397 break;
398 default:
399 printf ("Usage:\n%s\n", cmdtp->usage);
400 SHOW_BOOT_PROGRESS (-1);
401 return 1;
402 }
403
404 if (!boot_device) {
405 puts ("\n** No boot device **\n");
406 SHOW_BOOT_PROGRESS (-1);
407 return 1;
408 }
409
410 dev = simple_strtoul(boot_device, &ep, 16);
411
412 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
413 printf ("\n** Device %d not available\n", dev);
414 SHOW_BOOT_PROGRESS (-1);
415 return 1;
416 }
417
418 if (*ep) {
419 if (*ep != ':') {
420 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
421 SHOW_BOOT_PROGRESS (-1);
422 return 1;
423 }
424 part = simple_strtoul(++ep, NULL, 16);
425 }
b05dcb58 426 if (get_partition_info (ide_dev_desc, part, &info)) {
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427 SHOW_BOOT_PROGRESS (-1);
428 return 1;
429 }
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430 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
431 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
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432 printf ("\n** Invalid partition type \"%.32s\""
433 " (expect \"" BOOT_PART_TYPE "\")\n",
434 info.type);
435 SHOW_BOOT_PROGRESS (-1);
436 return 1;
437 }
438
439 printf ("\nLoading from IDE device %d, partition %d: "
440 "Name: %.32s Type: %.32s\n",
441 dev, part, info.name, info.type);
442
1a344f29 443 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
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444 info.start, info.size, info.blksz);
445
446 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
447 printf ("** Read error on %d:%d\n", dev, part);
448 SHOW_BOOT_PROGRESS (-1);
449 return 1;
450 }
451
452 hdr = (image_header_t *)addr;
453
1a344f29 454 if (ntohl(hdr->ih_magic) != IH_MAGIC) {
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455 printf("\n** Bad Magic Number **\n");
456 SHOW_BOOT_PROGRESS (-1);
457 return 1;
458 }
459
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460 checksum = ntohl(hdr->ih_hcrc);
461 hdr->ih_hcrc = 0;
462
77ddac94 463 if (crc32 (0, (uchar *)hdr, sizeof(image_header_t)) != checksum) {
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464 puts ("\n** Bad Header Checksum **\n");
465 SHOW_BOOT_PROGRESS (-2);
466 return 1;
467 }
b9649854 468 hdr->ih_hcrc = htonl(checksum); /* restore checksum for later use */
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469
470 print_image_hdr (hdr);
471
472 cnt = (ntohl(hdr->ih_size) + sizeof(image_header_t));
473 cnt += info.blksz - 1;
474 cnt /= info.blksz;
475 cnt -= 1;
476
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477 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
478 (ulong *)(addr+info.blksz)) != cnt) {
479 printf ("** Read error on %d:%d\n", dev, part);
480 SHOW_BOOT_PROGRESS (-1);
481 return 1;
482 }
483
484
485 /* Loading ok, update default load address */
486
487 load_addr = addr;
488
489 /* Check if we should attempt an auto-start */
490 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
491 char *local_args[2];
492 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
493
494 local_args[0] = argv[0];
495 local_args[1] = NULL;
496
497 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
498
499 do_bootm (cmdtp, 0, 1, local_args);
500 rcode = 1;
501 }
502 return rcode;
503}
504
505/* ------------------------------------------------------------------------- */
506
507void ide_init (void)
508{
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509
510#ifdef CONFIG_IDE_8xx_DIRECT
511 volatile immap_t *immr = (immap_t *)CFG_IMMR;
512 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
513#endif
514 unsigned char c;
515 int i, bus;
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516#ifdef CONFIG_AMIGAONEG3SE
517 unsigned int max_bus_scan;
518 unsigned int ata_reset_time;
519 char *s;
520#endif
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521#ifdef CONFIG_IDE_8xx_PCCARD
522 extern int pcmcia_on (void);
523 extern int ide_devices_found; /* Initialized in check_ide_device() */
524#endif /* CONFIG_IDE_8xx_PCCARD */
525
526#ifdef CONFIG_IDE_PREINIT
4d13cbad 527 extern int ide_preinit (void);
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528 WATCHDOG_RESET();
529
530 if (ide_preinit ()) {
531 puts ("ide_preinit failed\n");
532 return;
533 }
534#endif /* CONFIG_IDE_PREINIT */
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535
536#ifdef CONFIG_IDE_8xx_PCCARD
537 extern int pcmcia_on (void);
6069ff26 538 extern int ide_devices_found; /* Initialized in check_ide_device() */
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539
540 WATCHDOG_RESET();
541
6069ff26 542 ide_devices_found = 0;
c609719b 543 /* initialize the PCMCIA IDE adapter card */
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544 pcmcia_on();
545 if (!ide_devices_found)
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546 return;
547 udelay (1000000); /* 1 s */
548#endif /* CONFIG_IDE_8xx_PCCARD */
549
550 WATCHDOG_RESET();
551
15647dc7 552#ifdef CONFIG_IDE_8xx_DIRECT
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553 /* Initialize PIO timing tables */
554 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
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555 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
556 gd->bus_clk);
557 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
558 gd->bus_clk);
559 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
560 gd->bus_clk);
561 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
562 " len=%3d ns/%d clk"
563 " hold=%2d ns/%d clk\n",
564 i,
565 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
566 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
567 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
c609719b 568 }
15647dc7 569#endif /* CONFIG_IDE_8xx_DIRECT */
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570
571 /* Reset the IDE just to be sure.
572 * Light LED's to show
573 */
574 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
575 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
576
577#ifdef CONFIG_IDE_8xx_DIRECT
578 /* PCMCIA / IDE initialization for common mem space */
579 pcmp->pcmc_pgcrb = 0;
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580
581 /* start in PIO mode 0 - most relaxed timings */
582 pio_mode = 0;
583 set_pcmcia_timing (pio_mode);
15647dc7 584#endif /* CONFIG_IDE_8xx_DIRECT */
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585
586 /*
587 * Wait for IDE to get ready.
588 * According to spec, this can take up to 31 seconds!
589 */
c7de829c 590#ifndef CONFIG_AMIGAONEG3SE
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591 for (bus=0; bus<CFG_IDE_MAXBUS; ++bus) {
592 int dev = bus * (CFG_IDE_MAXDEVICE / CFG_IDE_MAXBUS);
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593#else
594 s = getenv("ide_maxbus");
595 if (s)
1a344f29 596 max_bus_scan = simple_strtol(s, NULL, 10);
c7de829c 597 else
1a344f29 598 max_bus_scan = CFG_IDE_MAXBUS;
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599
600 for (bus=0; bus<max_bus_scan; ++bus) {
601 int dev = bus * (CFG_IDE_MAXDEVICE / max_bus_scan);
602#endif
c609719b 603
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604#ifdef CONFIG_IDE_8xx_PCCARD
605 /* Skip non-ide devices from probing */
606 if ((ide_devices_found & (1 << bus)) == 0) {
607 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
608 continue;
609 }
610#endif
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611 printf ("Bus %d: ", bus);
612
613 ide_bus_ok[bus] = 0;
614
615 /* Select device
616 */
617 udelay (100000); /* 100 ms */
2262cfee 618 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
c609719b 619 udelay (100000); /* 100 ms */
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620#ifdef CONFIG_AMIGAONEG3SE
621 ata_reset_time = ATA_RESET_TIME;
622 s = getenv("ide_reset_timeout");
623 if (s) ata_reset_time = 2*simple_strtol(s, NULL, 10);
624#endif
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625 i = 0;
626 do {
627 udelay (10000); /* 10 ms */
628
2262cfee 629 c = ide_inb (dev, ATA_STATUS);
c609719b 630 i++;
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631#ifdef CONFIG_AMIGAONEG3SE
632 if (i > (ata_reset_time * 100)) {
633#else
c609719b 634 if (i > (ATA_RESET_TIME * 100)) {
c7de829c 635#endif
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636 puts ("** Timeout **\n");
637 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
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638#ifdef CONFIG_AMIGAONEG3SE
639 /* If this is the second bus, the first one was OK */
c40b2956 640 if (bus != 0) {
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641 ide_bus_ok[bus] = 0;
642 goto skip_bus;
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643 }
644#endif
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645 return;
646 }
647 if ((i >= 100) && ((i%100)==0)) {
648 putc ('.');
649 }
650 } while (c & ATA_STAT_BUSY);
651
652 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
653 puts ("not available ");
1a344f29 654 debug ("Status = 0x%02X ", c);
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655#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
656 } else if ((c & ATA_STAT_READY) == 0) {
657 puts ("not available ");
1a344f29 658 debug ("Status = 0x%02X ", c);
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659#endif
660 } else {
661 puts ("OK ");
662 ide_bus_ok[bus] = 1;
663 }
664 WATCHDOG_RESET();
665 }
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666
667#ifdef CONFIG_AMIGAONEG3SE
668 skip_bus:
669#endif
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670 putc ('\n');
671
672 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
673
674 curr_device = -1;
675 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
676#ifdef CONFIG_IDE_LED
677 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
678#endif
5cf9da48 679 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
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680 ide_dev_desc[i].if_type=IF_TYPE_IDE;
681 ide_dev_desc[i].dev=i;
682 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
683 ide_dev_desc[i].blksz=0;
684 ide_dev_desc[i].lba=0;
685 ide_dev_desc[i].block_read=ide_read;
686 if (!ide_bus_ok[IDE_BUS(i)])
687 continue;
688 ide_led (led, 1); /* LED on */
689 ide_ident(&ide_dev_desc[i]);
690 ide_led (led, 0); /* LED off */
691 dev_print(&ide_dev_desc[i]);
692/* ide_print (i); */
693 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
694 init_part (&ide_dev_desc[i]); /* initialize partition type */
695 if (curr_device < 0)
696 curr_device = i;
697 }
698 }
699 WATCHDOG_RESET();
700}
701
702/* ------------------------------------------------------------------------- */
703
704block_dev_desc_t * ide_get_dev(int dev)
705{
735dd97b 706 return (dev < CFG_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
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707}
708
709
710#ifdef CONFIG_IDE_8xx_DIRECT
711
712static void
713set_pcmcia_timing (int pmode)
714{
715 volatile immap_t *immr = (immap_t *)CFG_IMMR;
716 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
717 ulong timings;
718
1a344f29 719 debug ("Set timing for PIO Mode %d\n", pmode);
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720
721 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
722 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
723 | PCMCIA_SL (pio_config_clk[pmode].t_length)
724 ;
725
726 /* IDE 0
727 */
728 pcmp->pcmc_pbr0 = CFG_PCMCIA_PBR0;
729 pcmp->pcmc_por0 = CFG_PCMCIA_POR0
730#if (CFG_PCMCIA_POR0 != 0)
731 | timings
732#endif
733 ;
1a344f29 734 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
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735
736 pcmp->pcmc_pbr1 = CFG_PCMCIA_PBR1;
737 pcmp->pcmc_por1 = CFG_PCMCIA_POR1
738#if (CFG_PCMCIA_POR1 != 0)
739 | timings
740#endif
741 ;
1a344f29 742 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
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743
744 pcmp->pcmc_pbr2 = CFG_PCMCIA_PBR2;
745 pcmp->pcmc_por2 = CFG_PCMCIA_POR2
746#if (CFG_PCMCIA_POR2 != 0)
747 | timings
748#endif
749 ;
1a344f29 750 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
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751
752 pcmp->pcmc_pbr3 = CFG_PCMCIA_PBR3;
753 pcmp->pcmc_por3 = CFG_PCMCIA_POR3
754#if (CFG_PCMCIA_POR3 != 0)
755 | timings
756#endif
757 ;
1a344f29 758 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
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759
760 /* IDE 1
761 */
762 pcmp->pcmc_pbr4 = CFG_PCMCIA_PBR4;
763 pcmp->pcmc_por4 = CFG_PCMCIA_POR4
764#if (CFG_PCMCIA_POR4 != 0)
765 | timings
766#endif
767 ;
1a344f29 768 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
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769
770 pcmp->pcmc_pbr5 = CFG_PCMCIA_PBR5;
771 pcmp->pcmc_por5 = CFG_PCMCIA_POR5
772#if (CFG_PCMCIA_POR5 != 0)
773 | timings
774#endif
775 ;
1a344f29 776 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
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777
778 pcmp->pcmc_pbr6 = CFG_PCMCIA_PBR6;
779 pcmp->pcmc_por6 = CFG_PCMCIA_POR6
780#if (CFG_PCMCIA_POR6 != 0)
781 | timings
782#endif
783 ;
1a344f29 784 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
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785
786 pcmp->pcmc_pbr7 = CFG_PCMCIA_PBR7;
787 pcmp->pcmc_por7 = CFG_PCMCIA_POR7
788#if (CFG_PCMCIA_POR7 != 0)
789 | timings
790#endif
791 ;
1a344f29 792 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
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793
794}
795
796#endif /* CONFIG_IDE_8xx_DIRECT */
797
798/* ------------------------------------------------------------------------- */
799
db01a2ea 800#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b 801static void __inline__
2262cfee 802ide_outb(int dev, int port, unsigned char val)
c609719b 803{
1a344f29 804 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
9fd5e31f 805 dev, port, val, (ATA_CURR_BASE(dev)+port));
d4ca31c4 806
c609719b 807 /* Ensure I/O operations complete */
5cf91d6b 808 EIEIO;
c609719b 809 *((uchar *)(ATA_CURR_BASE(dev)+port)) = val;
c609719b 810}
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811#else /* ! __PPC__ */
812static void __inline__
813ide_outb(int dev, int port, unsigned char val)
814{
15647dc7 815 outb(val, ATA_CURR_BASE(dev)+port);
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816}
817#endif /* __PPC__ */
818
c609719b 819
db01a2ea 820#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b 821static unsigned char __inline__
2262cfee 822ide_inb(int dev, int port)
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WD
823{
824 uchar val;
825 /* Ensure I/O operations complete */
5cf91d6b 826 EIEIO;
c609719b 827 val = *((uchar *)(ATA_CURR_BASE(dev)+port));
1a344f29 828 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
9fd5e31f 829 dev, port, (ATA_CURR_BASE(dev)+port), val);
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830 return (val);
831}
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832#else /* ! __PPC__ */
833static unsigned char __inline__
834ide_inb(int dev, int port)
835{
15647dc7 836 return inb(ATA_CURR_BASE(dev)+port);
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837}
838#endif /* __PPC__ */
c609719b 839
2262cfee 840#ifdef __PPC__
cceb871f 841# ifdef CONFIG_AMIGAONEG3SE
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842static void
843output_data_short(int dev, ulong *sect_buf, int words)
844{
845 ushort *dbuf;
846 volatile ushort *pbuf;
8bde7f77 847
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848 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
849 dbuf = (ushort *)sect_buf;
850 while (words--) {
5cf91d6b 851 EIEIO;
c7de829c 852 *pbuf = *dbuf++;
5cf91d6b 853 EIEIO;
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854 }
855
856 if (words&1)
1a344f29 857 *pbuf = 0;
c7de829c 858}
cceb871f 859# endif /* CONFIG_AMIGAONEG3SE */
5da627a4 860#endif /* __PPC_ */
c7de829c 861
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862/* We only need to swap data if we are running on a big endian cpu. */
863/* But Au1x00 cpu:s already swaps data in big endian mode! */
0c32d96d 864#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
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865#define input_swap_data(x,y,z) input_data(x,y,z)
866#else
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867static void
868input_swap_data(int dev, ulong *sect_buf, int words)
869{
1a344f29 870#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
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871 uchar i;
872 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
873 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
874 ushort *dbuf = (ushort *)sect_buf;
875
876 while (words--) {
877 for (i=0; i<2; i++) {
878 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
879 *(uchar *)dbuf = *pbuf_odd;
880 dbuf+=1;
881 }
882 }
f4733a07 883#else
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884 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
885 ushort *dbuf = (ushort *)sect_buf;
886
887 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
888
889 while (words--) {
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890#ifdef __MIPS__
891 *dbuf++ = swab16p((u16*)pbuf);
892 *dbuf++ = swab16p((u16*)pbuf);
893#else
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894 *dbuf++ = ld_le16(pbuf);
895 *dbuf++ = ld_le16(pbuf);
0c32d96d 896#endif /* !MIPS */
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897 }
898#endif
c609719b 899}
5da627a4 900#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
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901
902
db01a2ea 903#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
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904static void
905output_data(int dev, ulong *sect_buf, int words)
906{
1a344f29 907#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
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908 uchar *dbuf;
909 volatile uchar *pbuf_even;
910 volatile uchar *pbuf_odd;
911
912 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
913 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
914 dbuf = (uchar *)sect_buf;
915 while (words--) {
5cf91d6b 916 EIEIO;
a522fa0e 917 *pbuf_even = *dbuf++;
5cf91d6b 918 EIEIO;
a522fa0e 919 *pbuf_odd = *dbuf++;
5cf91d6b 920 EIEIO;
a522fa0e 921 *pbuf_even = *dbuf++;
5cf91d6b 922 EIEIO;
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923 *pbuf_odd = *dbuf++;
924 }
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925#else
926 ushort *dbuf;
927 volatile ushort *pbuf;
928
929 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
930 dbuf = (ushort *)sect_buf;
931 while (words--) {
932 EIEIO;
933 *pbuf = *dbuf++;
934 EIEIO;
935 *pbuf = *dbuf++;
936 }
937#endif
c609719b 938}
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939#else /* ! __PPC__ */
940static void
941output_data(int dev, ulong *sect_buf, int words)
942{
15647dc7 943 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
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944}
945#endif /* __PPC__ */
c609719b 946
db01a2ea 947#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
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948static void
949input_data(int dev, ulong *sect_buf, int words)
950{
1a344f29 951#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
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952 uchar *dbuf;
953 volatile uchar *pbuf_even;
954 volatile uchar *pbuf_odd;
955
956 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
957 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
958 dbuf = (uchar *)sect_buf;
959 while (words--) {
1a344f29 960 *dbuf++ = *pbuf_even;
cd172b71 961 EIEIO;
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962 SYNC;
963 *dbuf++ = *pbuf_odd;
5cf91d6b 964 EIEIO;
1a344f29 965 SYNC;
a522fa0e 966 *dbuf++ = *pbuf_even;
5cf91d6b 967 EIEIO;
1a344f29 968 SYNC;
a522fa0e 969 *dbuf++ = *pbuf_odd;
5cf91d6b 970 EIEIO;
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971 SYNC;
972 }
973#else
974 ushort *dbuf;
975 volatile ushort *pbuf;
976
977 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
978 dbuf = (ushort *)sect_buf;
979
980 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
981
982 while (words--) {
cd172b71 983 EIEIO;
1a344f29 984 *dbuf++ = *pbuf;
cd172b71 985 EIEIO;
1a344f29 986 *dbuf++ = *pbuf;
a522fa0e 987 }
1a344f29 988#endif
c609719b 989}
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990#else /* ! __PPC__ */
991static void
992input_data(int dev, ulong *sect_buf, int words)
993{
15647dc7 994 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
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995}
996
997#endif /* __PPC__ */
c609719b 998
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999#ifdef CONFIG_AMIGAONEG3SE
1000static void
1001input_data_short(int dev, ulong *sect_buf, int words)
1002{
1003 ushort *dbuf;
1004 volatile ushort *pbuf;
1005
1006 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1007 dbuf = (ushort *)sect_buf;
1008 while (words--) {
5cf91d6b 1009 EIEIO;
c7de829c 1010 *dbuf++ = *pbuf;
5cf91d6b 1011 EIEIO;
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WD
1012 }
1013
c40b2956 1014 if (words&1) {
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1015 ushort dummy;
1016 dummy = *pbuf;
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1017 }
1018}
1019#endif
1020
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1021/* -------------------------------------------------------------------------
1022 */
1023static void ide_ident (block_dev_desc_t *dev_desc)
1024{
1025 ulong iobuf[ATA_SECTORWORDS];
1026 unsigned char c;
1027 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
1028
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1029#ifdef CONFIG_AMIGAONEG3SE
1030 int max_bus_scan;
c7de829c 1031 char *s;
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WD
1032#endif
1033#ifdef CONFIG_ATAPI
1034 int retries = 0;
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1035 int do_retry = 0;
1036#endif
1037
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1038#if 0
1039 int mode, cycle_time;
1040#endif
1041 int device;
1042 device=dev_desc->dev;
1043 printf (" Device %d: ", device);
1044
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1045#ifdef CONFIG_AMIGAONEG3SE
1046 s = getenv("ide_maxbus");
1047 if (s) {
1048 max_bus_scan = simple_strtol(s, NULL, 10);
1049 } else {
1050 max_bus_scan = CFG_IDE_MAXBUS;
1051 }
1052 if (device >= max_bus_scan*2) {
1053 dev_desc->type=DEV_TYPE_UNKNOWN;
1054 return;
1055 }
1056#endif
1057
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1058 ide_led (DEVICE_LED(device), 1); /* LED on */
1059 /* Select device
1060 */
2262cfee 1061 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
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1062 dev_desc->if_type=IF_TYPE_IDE;
1063#ifdef CONFIG_ATAPI
c7de829c 1064
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1065 do_retry = 0;
1066 retries = 0;
1067
1068 /* Warning: This will be tricky to read */
c40b2956 1069 while (retries <= 1) {
c609719b 1070 /* check signature */
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1071 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
1072 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1073 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1074 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
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1075 /* ATAPI Signature found */
1076 dev_desc->if_type=IF_TYPE_ATAPI;
1077 /* Start Ident Command
1078 */
2262cfee 1079 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
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1080 /*
1081 * Wait for completion - ATAPI devices need more time
1082 * to become ready
1083 */
1084 c = ide_wait (device, ATAPI_TIME_OUT);
c40b2956 1085 } else
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1086#endif
1087 {
1088 /* Start Ident Command
1089 */
2262cfee 1090 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
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1091
1092 /* Wait for completion
1093 */
1094 c = ide_wait (device, IDE_TIME_OUT);
1095 }
1096 ide_led (DEVICE_LED(device), 0); /* LED off */
1097
1098 if (((c & ATA_STAT_DRQ) == 0) ||
1099 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
64f70bed 1100#ifdef CONFIG_ATAPI
c7de829c 1101#ifdef CONFIG_AMIGAONEG3SE
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1102 s = getenv("ide_doreset");
1103 if (s && strcmp(s, "on") == 0)
1104#endif
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1105 {
1106 /* Need to soft reset the device in case it's an ATAPI... */
1107 debug ("Retrying...\n");
1108 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1109 udelay(100000);
1110 ide_outb (device, ATA_COMMAND, 0x08);
1111 udelay (500000); /* 500 ms */
1112 }
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1113 /* Select device
1114 */
c7de829c 1115 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c7de829c 1116 retries++;
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1117#else
1118 return;
1119#endif
c609719b 1120 }
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1121#ifdef CONFIG_ATAPI
1122 else
1123 break;
c7de829c 1124 } /* see above - ugly to read */
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WD
1125
1126 if (retries == 2) /* Not found */
1127 return;
1128#endif
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1129
1130 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1131
1132 ident_cpy (dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1133 ident_cpy (dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1134 ident_cpy (dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
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WD
1135#ifdef __LITTLE_ENDIAN
1136 /*
1137 * firmware revision and model number have Big Endian Byte
1138 * order in Word. Convert both to little endian.
1139 *
1140 * See CF+ and CompactFlash Specification Revision 2.0:
1141 * 6.2.1.6: Identfy Drive, Table 39 for more details
1142 */
1143
1144 strswab (dev_desc->revision);
1145 strswab (dev_desc->vendor);
1146#endif /* __LITTLE_ENDIAN */
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1147
1148 if ((iop->config & 0x0080)==0x0080)
1149 dev_desc->removable = 1;
1150 else
1151 dev_desc->removable = 0;
1152
1153#if 0
1154 /*
1155 * Drive PIO mode autoselection
1156 */
1157 mode = iop->tPIO;
1158
1159 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1160 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1161 mode = 2;
1a344f29 1162 debug ("Override tPIO -> 2\n");
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WD
1163 }
1164 if (iop->field_valid & 2) { /* drive implements ATA2? */
1a344f29 1165 debug ("Drive implements ATA2\n");
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1166 if (iop->capability & 8) { /* drive supports use_iordy? */
1167 cycle_time = iop->eide_pio_iordy;
1168 } else {
1169 cycle_time = iop->eide_pio;
1170 }
1a344f29 1171 debug ("cycle time = %d\n", cycle_time);
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1172 mode = 4;
1173 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1174 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1175 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1176 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1177 }
1178 printf ("PIO mode to use: PIO %d\n", mode);
1179#endif /* 0 */
1180
1181#ifdef CONFIG_ATAPI
1182 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1183 atapi_inquiry(dev_desc);
1184 return;
1185 }
1186#endif /* CONFIG_ATAPI */
1187
c3f9d493 1188#ifdef __BIG_ENDIAN
c609719b
WD
1189 /* swap shorts */
1190 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
c3f9d493
WD
1191#else /* ! __BIG_ENDIAN */
1192 /*
1193 * do not swap shorts on little endian
1194 *
1195 * See CF+ and CompactFlash Specification Revision 2.0:
1196 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1197 */
1198 dev_desc->lba = iop->lba_capacity;
1199#endif /* __BIG_ENDIAN */
c40b2956 1200
42dfe7a1 1201#ifdef CONFIG_LBA48
c40b2956 1202 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
6e592385
WD
1203 dev_desc->lba48 = 1;
1204 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
c40b2956
WD
1205 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1206 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1207 ((unsigned long long)iop->lba48_capacity[3] << 48);
1208 } else {
c40b2956
WD
1209 dev_desc->lba48 = 0;
1210 }
1211#endif /* CONFIG_LBA48 */
c609719b
WD
1212 /* assuming HD */
1213 dev_desc->type=DEV_TYPE_HARDDISK;
1214 dev_desc->blksz=ATA_BLOCKSIZE;
1215 dev_desc->lun=0; /* just to fill something in... */
1216
1217#if 0 /* only used to test the powersaving mode,
1218 * if enabled, the drive goes after 5 sec
1219 * in standby mode */
2262cfee 1220 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b 1221 c = ide_wait (device, IDE_TIME_OUT);
2262cfee
WD
1222 ide_outb (device, ATA_SECT_CNT, 1);
1223 ide_outb (device, ATA_LBA_LOW, 0);
1224 ide_outb (device, ATA_LBA_MID, 0);
1225 ide_outb (device, ATA_LBA_HIGH, 0);
1a344f29 1226 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
2262cfee 1227 ide_outb (device, ATA_COMMAND, 0xe3);
c609719b
WD
1228 udelay (50);
1229 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1230#endif
1231}
1232
1233
1234/* ------------------------------------------------------------------------- */
1235
eb867a76 1236ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD
1237{
1238 ulong n = 0;
1239 unsigned char c;
1240 unsigned char pwrsave=0; /* power save */
42dfe7a1 1241#ifdef CONFIG_LBA48
c40b2956 1242 unsigned char lba48 = 0;
c609719b 1243
c40b2956
WD
1244 if (blknr & 0x0000fffff0000000) {
1245 /* more than 28 bits used, use 48bit mode */
1246 lba48 = 1;
1247 }
1248#endif
1a344f29 1249 debug ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n",
c609719b
WD
1250 device, blknr, blkcnt, (ulong)buffer);
1251
1252 ide_led (DEVICE_LED(device), 1); /* LED on */
1253
1254 /* Select device
1255 */
2262cfee 1256 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1257 c = ide_wait (device, IDE_TIME_OUT);
1258
1259 if (c & ATA_STAT_BUSY) {
1260 printf ("IDE read: device %d not ready\n", device);
1261 goto IDE_READ_E;
1262 }
1263
1264 /* first check if the drive is in Powersaving mode, if yes,
1265 * increase the timeout value */
2262cfee 1266 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
c609719b
WD
1267 udelay (50);
1268
1269 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1270
1271 if (c & ATA_STAT_BUSY) {
1272 printf ("IDE read: device %d not ready\n", device);
1273 goto IDE_READ_E;
1274 }
1275 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1276 printf ("No Powersaving mode %X\n", c);
1277 } else {
2262cfee 1278 c = ide_inb(device,ATA_SECT_CNT);
1a344f29 1279 debug ("Powersaving %02X\n",c);
c609719b
WD
1280 if(c==0)
1281 pwrsave=1;
1282 }
1283
1284
1285 while (blkcnt-- > 0) {
1286
1287 c = ide_wait (device, IDE_TIME_OUT);
1288
1289 if (c & ATA_STAT_BUSY) {
1290 printf ("IDE read: device %d not ready\n", device);
1291 break;
1292 }
42dfe7a1 1293#ifdef CONFIG_LBA48
c40b2956
WD
1294 if (lba48) {
1295 /* write high bits */
1296 ide_outb (device, ATA_SECT_CNT, 0);
1297 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1298 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1299 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1300 }
1301#endif
2262cfee
WD
1302 ide_outb (device, ATA_SECT_CNT, 1);
1303 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1304 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1305 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 1306
42dfe7a1 1307#ifdef CONFIG_LBA48
c40b2956
WD
1308 if (lba48) {
1309 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1310 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1311
1312 } else
1313#endif
1314 {
1315 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1316 ATA_DEVICE(device) |
1317 ((blknr >> 24) & 0xF) );
1318 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1319 }
c609719b
WD
1320
1321 udelay (50);
1322
1323 if(pwrsave) {
1324 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1325 pwrsave=0;
1326 } else {
1327 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1328 }
1329
1330 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
42dfe7a1 1331#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
c40b2956 1332 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
c609719b 1333 device, blknr, c);
c40b2956
WD
1334#else
1335 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1336 device, (ulong)blknr, c);
1337#endif
c609719b
WD
1338 break;
1339 }
1340
1341 input_data (device, buffer, ATA_SECTORWORDS);
2262cfee 1342 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
c609719b
WD
1343
1344 ++n;
1345 ++blknr;
1346 buffer += ATA_SECTORWORDS;
1347 }
1348IDE_READ_E:
1349 ide_led (DEVICE_LED(device), 0); /* LED off */
1350 return (n);
1351}
1352
1353/* ------------------------------------------------------------------------- */
1354
1355
eb867a76 1356ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD
1357{
1358 ulong n = 0;
1359 unsigned char c;
42dfe7a1 1360#ifdef CONFIG_LBA48
c40b2956
WD
1361 unsigned char lba48 = 0;
1362
1363 if (blknr & 0x0000fffff0000000) {
1364 /* more than 28 bits used, use 48bit mode */
1365 lba48 = 1;
1366 }
1367#endif
c609719b
WD
1368
1369 ide_led (DEVICE_LED(device), 1); /* LED on */
1370
1371 /* Select device
1372 */
2262cfee 1373 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1374
1375 while (blkcnt-- > 0) {
1376
1377 c = ide_wait (device, IDE_TIME_OUT);
1378
1379 if (c & ATA_STAT_BUSY) {
1380 printf ("IDE read: device %d not ready\n", device);
1381 goto WR_OUT;
1382 }
42dfe7a1 1383#ifdef CONFIG_LBA48
c40b2956
WD
1384 if (lba48) {
1385 /* write high bits */
1386 ide_outb (device, ATA_SECT_CNT, 0);
1387 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1388 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1389 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1390 }
1391#endif
2262cfee
WD
1392 ide_outb (device, ATA_SECT_CNT, 1);
1393 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1394 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1395 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 1396
42dfe7a1 1397#ifdef CONFIG_LBA48
c40b2956
WD
1398 if (lba48) {
1399 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1400 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1401
1402 } else
1403#endif
1404 {
1405 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1406 ATA_DEVICE(device) |
1407 ((blknr >> 24) & 0xF) );
1408 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1409 }
c609719b
WD
1410
1411 udelay (50);
1412
1413 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1414
1415 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
42dfe7a1 1416#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
c40b2956 1417 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
c609719b 1418 device, blknr, c);
c40b2956
WD
1419#else
1420 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1421 device, (ulong)blknr, c);
1422#endif
c609719b
WD
1423 goto WR_OUT;
1424 }
1425
1426 output_data (device, buffer, ATA_SECTORWORDS);
2262cfee 1427 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
c609719b
WD
1428 ++n;
1429 ++blknr;
1430 buffer += ATA_SECTORWORDS;
1431 }
1432WR_OUT:
1433 ide_led (DEVICE_LED(device), 0); /* LED off */
1434 return (n);
1435}
1436
1437/* ------------------------------------------------------------------------- */
1438
1439/*
1440 * copy src to dest, skipping leading and trailing blanks and null
1441 * terminate the string
7d7ce412 1442 * "len" is the size of available memory including the terminating '\0'
c609719b 1443 */
7d7ce412 1444static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
c609719b 1445{
7d7ce412
WD
1446 unsigned char *end, *last;
1447
1448 last = dst;
6fb6af6d 1449 end = src + len - 1;
7d7ce412
WD
1450
1451 /* reserve space for '\0' */
1452 if (len < 2)
1453 goto OUT;
efa329cb 1454
7d7ce412
WD
1455 /* skip leading white space */
1456 while ((*src) && (src<end) && (*src==' '))
1457 ++src;
1458
1459 /* copy string, omitting trailing white space */
1460 while ((*src) && (src<end)) {
1461 *dst++ = *src;
1462 if (*src++ != ' ')
1463 last = dst;
c609719b 1464 }
7d7ce412
WD
1465OUT:
1466 *last = '\0';
c609719b
WD
1467}
1468
1469/* ------------------------------------------------------------------------- */
1470
1471/*
1472 * Wait until Busy bit is off, or timeout (in ms)
1473 * Return last status
1474 */
1475static uchar ide_wait (int dev, ulong t)
1476{
1477 ulong delay = 10 * t; /* poll every 100 us */
1478 uchar c;
1479
2262cfee 1480 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
c609719b
WD
1481 udelay (100);
1482 if (delay-- == 0) {
1483 break;
1484 }
1485 }
1486 return (c);
1487}
1488
1489/* ------------------------------------------------------------------------- */
1490
1491#ifdef CONFIG_IDE_RESET
1492extern void ide_set_reset(int idereset);
1493
1494static void ide_reset (void)
1495{
1496#if defined(CFG_PB_12V_ENABLE) || defined(CFG_PB_IDE_MOTOR)
1497 volatile immap_t *immr = (immap_t *)CFG_IMMR;
1498#endif
1499 int i;
1500
1501 curr_device = -1;
1502 for (i=0; i<CFG_IDE_MAXBUS; ++i)
1503 ide_bus_ok[i] = 0;
1504 for (i=0; i<CFG_IDE_MAXDEVICE; ++i)
1505 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1506
1507 ide_set_reset (1); /* assert reset */
1508
1509 WATCHDOG_RESET();
1510
1511#ifdef CFG_PB_12V_ENABLE
1512 immr->im_cpm.cp_pbdat &= ~(CFG_PB_12V_ENABLE); /* 12V Enable output OFF */
1513 immr->im_cpm.cp_pbpar &= ~(CFG_PB_12V_ENABLE);
1514 immr->im_cpm.cp_pbodr &= ~(CFG_PB_12V_ENABLE);
1515 immr->im_cpm.cp_pbdir |= CFG_PB_12V_ENABLE;
1516
1517 /* wait 500 ms for the voltage to stabilize
1518 */
1519 for (i=0; i<500; ++i) {
1520 udelay (1000);
1521 }
1522
1523 immr->im_cpm.cp_pbdat |= CFG_PB_12V_ENABLE; /* 12V Enable output ON */
1524#endif /* CFG_PB_12V_ENABLE */
1525
1526#ifdef CFG_PB_IDE_MOTOR
1527 /* configure IDE Motor voltage monitor pin as input */
1528 immr->im_cpm.cp_pbpar &= ~(CFG_PB_IDE_MOTOR);
1529 immr->im_cpm.cp_pbodr &= ~(CFG_PB_IDE_MOTOR);
1530 immr->im_cpm.cp_pbdir &= ~(CFG_PB_IDE_MOTOR);
1531
1532 /* wait up to 1 s for the motor voltage to stabilize
1533 */
1534 for (i=0; i<1000; ++i) {
1535 if ((immr->im_cpm.cp_pbdat & CFG_PB_IDE_MOTOR) != 0) {
1536 break;
1537 }
1538 udelay (1000);
1539 }
1540
1541 if (i == 1000) { /* Timeout */
1542 printf ("\nWarning: 5V for IDE Motor missing\n");
1543# ifdef CONFIG_STATUS_LED
1544# ifdef STATUS_LED_YELLOW
1545 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1546# endif
1547# ifdef STATUS_LED_GREEN
1548 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1549# endif
1550# endif /* CONFIG_STATUS_LED */
1551 }
1552#endif /* CFG_PB_IDE_MOTOR */
1553
1554 WATCHDOG_RESET();
1555
1556 /* de-assert RESET signal */
1557 ide_set_reset(0);
1558
1559 /* wait 250 ms */
1560 for (i=0; i<250; ++i) {
1561 udelay (1000);
1562 }
1563}
1564
1565#endif /* CONFIG_IDE_RESET */
1566
1567/* ------------------------------------------------------------------------- */
1568
e2ffd59b
WD
1569#if defined(CONFIG_IDE_LED) && \
1570 !defined(CONFIG_AMIGAONEG3SE)&& \
1571 !defined(CONFIG_CPC45) && \
1572 !defined(CONFIG_HMI10) && \
1573 !defined(CONFIG_KUP4K) && \
1574 !defined(CONFIG_KUP4X)
c609719b
WD
1575
1576static uchar led_buffer = 0; /* Buffer for current LED status */
1577
1578static void ide_led (uchar led, uchar status)
1579{
1580 uchar *led_port = LED_PORT;
1581
1582 if (status) { /* switch LED on */
1583 led_buffer |= led;
1584 } else { /* switch LED off */
1585 led_buffer &= ~led;
1586 }
1587
1588 *led_port = led_buffer;
1589}
1590
1591#endif /* CONFIG_IDE_LED */
1592
1593/* ------------------------------------------------------------------------- */
1594
1595#ifdef CONFIG_ATAPI
1596/****************************************************************************
1597 * ATAPI Support
1598 */
1599
db01a2ea 1600#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b
WD
1601/* since ATAPI may use commands with not 4 bytes alligned length
1602 * we have our own transfer functions, 2 bytes alligned */
1603static void
1604output_data_shorts(int dev, ushort *sect_buf, int shorts)
1605{
1a344f29 1606#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
1607 uchar *dbuf;
1608 volatile uchar *pbuf_even;
1609 volatile uchar *pbuf_odd;
1610
1611 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1612 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1613 while (shorts--) {
5cf91d6b 1614 EIEIO;
a522fa0e 1615 *pbuf_even = *dbuf++;
5cf91d6b 1616 EIEIO;
a522fa0e
WD
1617 *pbuf_odd = *dbuf++;
1618 }
1a344f29 1619#else
c609719b
WD
1620 ushort *dbuf;
1621 volatile ushort *pbuf;
1622
1623 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1624 dbuf = (ushort *)sect_buf;
db01a2ea 1625
1a344f29 1626 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
db01a2ea 1627
c609719b 1628 while (shorts--) {
5cf91d6b 1629 EIEIO;
1a344f29 1630 *pbuf = *dbuf++;
c609719b 1631 }
1a344f29
WD
1632#endif
1633}
1634
1635static void
1636input_data_shorts(int dev, ushort *sect_buf, int shorts)
1637{
1638#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
1639 uchar *dbuf;
1640 volatile uchar *pbuf_even;
1641 volatile uchar *pbuf_odd;
1642
1643 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1644 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1645 while (shorts--) {
5cf91d6b 1646 EIEIO;
a522fa0e 1647 *dbuf++ = *pbuf_even;
5cf91d6b 1648 EIEIO;
a522fa0e
WD
1649 *dbuf++ = *pbuf_odd;
1650 }
1a344f29
WD
1651#else
1652 ushort *dbuf;
1653 volatile ushort *pbuf;
1654
1655 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1656 dbuf = (ushort *)sect_buf;
1657
1658 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1659
1660 while (shorts--) {
1661 EIEIO;
1662 *dbuf++ = *pbuf;
1663 }
1664#endif
c609719b
WD
1665}
1666
2262cfee
WD
1667#else /* ! __PPC__ */
1668static void
1669output_data_shorts(int dev, ushort *sect_buf, int shorts)
1670{
15647dc7 1671 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD
1672}
1673
2262cfee
WD
1674static void
1675input_data_shorts(int dev, ushort *sect_buf, int shorts)
1676{
15647dc7 1677 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD
1678}
1679
1680#endif /* __PPC__ */
1681
c609719b
WD
1682/*
1683 * Wait until (Status & mask) == res, or timeout (in ms)
1684 * Return last status
1685 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1686 * and then they set their DRQ Bit
1687 */
1688static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1689{
1690 ulong delay = 10 * t; /* poll every 100 us */
1691 uchar c;
1692
2262cfee
WD
1693 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1694 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
c609719b
WD
1695 /* break if error occurs (doesn't make sense to wait more) */
1696 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1697 break;
1698 udelay (100);
1699 if (delay-- == 0) {
1700 break;
1701 }
1702 }
1703 return (c);
1704}
1705
1706/*
1707 * issue an atapi command
1708 */
1709unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1710{
1711 unsigned char c,err,mask,res;
1712 int n;
1713 ide_led (DEVICE_LED(device), 1); /* LED on */
1714
1715 /* Select device
1716 */
1717 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1718 res = 0;
c7de829c
WD
1719#ifdef CONFIG_AMIGAONEG3SE
1720# warning THF: Removed LBA mode ???
1721#endif
2262cfee 1722 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1723 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1724 if ((c & mask) != res) {
1725 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1726 err=0xFF;
1727 goto AI_OUT;
1728 }
1729 /* write taskfile */
2262cfee 1730 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
c7de829c
WD
1731 ide_outb (device, ATA_SECT_CNT, 0);
1732 ide_outb (device, ATA_SECT_NUM, 0);
2262cfee 1733 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
c7de829c
WD
1734 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
1735#ifdef CONFIG_AMIGAONEG3SE
1736# warning THF: Removed LBA mode ???
1737#endif
2262cfee 1738 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b 1739
2262cfee 1740 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
c609719b
WD
1741 udelay (50);
1742
1743 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1744 res = ATA_STAT_DRQ;
1745 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1746
1747 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1748 printf ("ATTAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
1749 err=0xFF;
1750 goto AI_OUT;
1751 }
1752
1753 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
1754 /* ATAPI Command written wait for completition */
1755 udelay (5000); /* device must set bsy */
1756
1757 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1758 /* if no data wait for DRQ = 0 BSY = 0
1759 * if data wait for DRQ = 1 BSY = 0 */
1760 res=0;
1761 if(buflen)
1762 res = ATA_STAT_DRQ;
1763 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1764 if ((c & mask) != res ) {
1765 if (c & ATA_STAT_ERR) {
2262cfee 1766 err=(ide_inb(device,ATA_ERROR_REG))>>4;
1a344f29 1767 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
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WD
1768 } else {
1769 printf ("ATTAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
1770 err=0xFF;
1771 }
1772 goto AI_OUT;
1773 }
2262cfee 1774 n=ide_inb(device, ATA_CYL_HIGH);
c609719b 1775 n<<=8;
2262cfee 1776 n+=ide_inb(device, ATA_CYL_LOW);
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WD
1777 if(n>buflen) {
1778 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1779 err=0xff;
1780 goto AI_OUT;
1781 }
1782 if((n==0)&&(buflen<0)) {
1783 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1784 err=0xff;
1785 goto AI_OUT;
1786 }
1787 if(n!=buflen) {
1a344f29 1788 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
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WD
1789 }
1790 if(n!=0) { /* data transfer */
1a344f29 1791 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
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WD
1792 /* we transfer shorts */
1793 n>>=1;
1794 /* ok now decide if it is an in or output */
2262cfee 1795 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
1a344f29 1796 debug ("Write to device\n");
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1797 output_data_shorts(device,(unsigned short *)buffer,n);
1798 } else {
1a344f29 1799 debug ("Read from device @ %p shorts %d\n",buffer,n);
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1800 input_data_shorts(device,(unsigned short *)buffer,n);
1801 }
1802 }
1803 udelay(5000); /* seems that some CD ROMs need this... */
1804 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1805 res=0;
1806 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1807 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
2262cfee 1808 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
1a344f29 1809 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
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WD
1810 } else {
1811 err = 0;
1812 }
1813AI_OUT:
1814 ide_led (DEVICE_LED(device), 0); /* LED off */
1815 return (err);
1816}
1817
1818/*
1819 * sending the command to atapi_issue. If an status other than good
1820 * returns, an request_sense will be issued
1821 */
1822
1823#define ATAPI_DRIVE_NOT_READY 100
1824#define ATAPI_UNIT_ATTN 10
1825
1826unsigned char atapi_issue_autoreq (int device,
1827 unsigned char* ccb,
1828 int ccblen,
1829 unsigned char *buffer,
1830 int buflen)
1831{
1832 unsigned char sense_data[18],sense_ccb[12];
1833 unsigned char res,key,asc,ascq;
1834 int notready,unitattn;
1835
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WD
1836#ifdef CONFIG_AMIGAONEG3SE
1837 char *s;
1838 unsigned int timeout, retrycnt;
1839
1840 s = getenv("ide_cd_timeout");
1841 timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
1842
1843 retrycnt = 0;
1844#endif
1845
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WD
1846 unitattn=ATAPI_UNIT_ATTN;
1847 notready=ATAPI_DRIVE_NOT_READY;
1848
1849retry:
1850 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1851 if (res==0)
1852 return (0); /* Ok */
1853
1854 if (res==0xFF)
1855 return (0xFF); /* error */
1856
1a344f29 1857 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
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WD
1858
1859 memset(sense_ccb,0,sizeof(sense_ccb));
1860 memset(sense_data,0,sizeof(sense_data));
1861 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
c7de829c 1862 sense_ccb[4]=18; /* allocation Length */
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WD
1863
1864 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1865 key=(sense_data[2]&0xF);
1866 asc=(sense_data[12]);
1867 ascq=(sense_data[13]);
1868
1a344f29
WD
1869 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1870 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
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WD
1871 sense_data[0],
1872 key,
1873 asc,
1874 ascq);
1875
1876 if((key==0))
1877 return 0; /* ok device ready */
1878
1879 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1880 if(unitattn-->0) {
1881 udelay(200*1000);
1882 goto retry;
1883 }
1884 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1885 goto error;
1886 }
1887 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1888 if (notready-->0) {
1889 udelay(200*1000);
1890 goto retry;
1891 }
1892 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1893 goto error;
1894 }
1895 if(asc==0x3a) {
1a344f29 1896 debug ("Media not present\n");
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WD
1897 goto error;
1898 }
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WD
1899
1900#ifdef CONFIG_AMIGAONEG3SE
1901 if ((sense_data[2]&0xF)==0x0B) {
1a344f29 1902 debug ("ABORTED COMMAND...retry\n");
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WD
1903 if (retrycnt++ < 4)
1904 goto retry;
1905 return (0xFF);
1906 }
1907
1908 if ((sense_data[2]&0xf) == 0x02 &&
1909 sense_data[12] == 0x04 &&
1910 sense_data[13] == 0x01 ) {
1a344f29 1911 debug ("Waiting for unit to become active\n");
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WD
1912 udelay(timeout);
1913 if (retrycnt++ < 4)
1914 goto retry;
1915 return 0xFF;
1916 }
1917#endif /* CONFIG_AMIGAONEG3SE */
1918
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WD
1919 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1920error:
1a344f29 1921 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
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WD
1922 return (0xFF);
1923}
1924
1925
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WD
1926static void atapi_inquiry(block_dev_desc_t * dev_desc)
1927{
1928 unsigned char ccb[12]; /* Command descriptor block */
1929 unsigned char iobuf[64]; /* temp buf */
1930 unsigned char c;
1931 int device;
1932
1933 device=dev_desc->dev;
1934 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
1935 dev_desc->block_read=atapi_read;
1936
1937 memset(ccb,0,sizeof(ccb));
1938 memset(iobuf,0,sizeof(iobuf));
1939
1940 ccb[0]=ATAPI_CMD_INQUIRY;
1941 ccb[4]=40; /* allocation Legnth */
1942 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
1943
1a344f29 1944 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
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1945 if (c!=0)
1946 return;
1947
1948 /* copy device ident strings */
1949 ident_cpy(dev_desc->vendor,&iobuf[8],8);
1950 ident_cpy(dev_desc->product,&iobuf[16],16);
1951 ident_cpy(dev_desc->revision,&iobuf[32],5);
1952
1953 dev_desc->lun=0;
1954 dev_desc->lba=0;
1955 dev_desc->blksz=0;
1956 dev_desc->type=iobuf[0] & 0x1f;
1957
1958 if ((iobuf[1]&0x80)==0x80)
1959 dev_desc->removable = 1;
1960 else
1961 dev_desc->removable = 0;
1962
1963 memset(ccb,0,sizeof(ccb));
1964 memset(iobuf,0,sizeof(iobuf));
1965 ccb[0]=ATAPI_CMD_START_STOP;
1966 ccb[4]=0x03; /* start */
1967
1968 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1969
1a344f29 1970 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
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1971 if (c!=0)
1972 return;
1973
1974 memset(ccb,0,sizeof(ccb));
1975 memset(iobuf,0,sizeof(iobuf));
1976 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1977
1a344f29 1978 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
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WD
1979 if (c!=0)
1980 return;
1981
1982 memset(ccb,0,sizeof(ccb));
1983 memset(iobuf,0,sizeof(iobuf));
1984 ccb[0]=ATAPI_CMD_READ_CAP;
1985 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
1a344f29 1986 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
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1987 if (c!=0)
1988 return;
1989
1a344f29 1990 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
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1991 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
1992 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
1993
1994 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
1995 ((unsigned long)iobuf[1]<<16) +
1996 ((unsigned long)iobuf[2]<< 8) +
1997 ((unsigned long)iobuf[3]);
1998 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
1999 ((unsigned long)iobuf[5]<<16) +
2000 ((unsigned long)iobuf[6]<< 8) +
2001 ((unsigned long)iobuf[7]);
42dfe7a1 2002#ifdef CONFIG_LBA48
c40b2956 2003 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
42dfe7a1 2004#endif
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WD
2005 return;
2006}
2007
2008
2009/*
2010 * atapi_read:
2011 * we transfer only one block per command, since the multiple DRQ per
2012 * command is not yet implemented
2013 */
2014#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
2015#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
2016#define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
2017
eb867a76 2018ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
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WD
2019{
2020 ulong n = 0;
2021 unsigned char ccb[12]; /* Command descriptor block */
2022 ulong cnt;
2023
1a344f29 2024 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
c609719b
WD
2025 device, blknr, blkcnt, (ulong)buffer);
2026
2027 do {
2028 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
2029 cnt=ATAPI_READ_MAX_BLOCK;
2030 } else {
2031 cnt=blkcnt;
2032 }
2033 ccb[0]=ATAPI_CMD_READ_12;
2034 ccb[1]=0; /* reserved */
2035 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
2036 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
2037 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
2038 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
2039 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
2040 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
2041 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
2042 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
2043 ccb[10]=0; /* reserved */
2044 ccb[11]=0; /* reserved */
2045
2046 if (atapi_issue_autoreq(device,ccb,12,
2047 (unsigned char *)buffer,
2048 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
2049 return (n);
2050 }
2051 n+=cnt;
2052 blkcnt-=cnt;
2053 blknr+=cnt;
2054 buffer+=cnt*(ATAPI_READ_BLOCK_SIZE/4); /* ulong blocksize in ulong */
2055 } while (blkcnt > 0);
2056 return (n);
2057}
2058
2059/* ------------------------------------------------------------------------- */
2060
2061#endif /* CONFIG_ATAPI */
2062
0d498393
WD
2063U_BOOT_CMD(
2064 ide, 5, 1, do_ide,
8bde7f77
WD
2065 "ide - IDE sub-system\n",
2066 "reset - reset IDE controller\n"
2067 "ide info - show available IDE devices\n"
2068 "ide device [dev] - show or set current device\n"
2069 "ide part [dev] - print partition table of one or all IDE devices\n"
2070 "ide read addr blk# cnt\n"
2071 "ide write addr blk# cnt - read/write `cnt'"
2072 " blocks starting at block `blk#'\n"
2073 " to/from memory address `addr'\n"
2074);
2075
0d498393
WD
2076U_BOOT_CMD(
2077 diskboot, 3, 1, do_diskboot,
8bde7f77
WD
2078 "diskboot- boot from IDE device\n",
2079 "loadAddr dev:part\n"
2080);
2081
c609719b 2082#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */