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c609719b 1/*
1a344f29 2 * (C) Copyright 2000-2005
c609719b
WD
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * IDE support
27 */
28#include <common.h>
29#include <config.h>
30#include <watchdog.h>
31#include <command.h>
32#include <image.h>
33#include <asm/byteorder.h>
f98984cb 34#include <asm/io.h>
735dd97b 35
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36#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
37# include <pcmcia.h>
38#endif
735dd97b 39
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40#ifdef CONFIG_8xx
41# include <mpc8xx.h>
42#endif
735dd97b 43
132ba5fd
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44#ifdef CONFIG_MPC5xxx
45#include <mpc5xxx.h>
46#endif
735dd97b 47
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48#include <ide.h>
49#include <ata.h>
735dd97b 50
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51#ifdef CONFIG_STATUS_LED
52# include <status_led.h>
53#endif
735dd97b 54
15647dc7 55#ifndef __PPC__
2262cfee
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56#include <asm/io.h>
57#endif
c609719b 58
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59#ifdef CONFIG_IDE_8xx_DIRECT
60DECLARE_GLOBAL_DATA_PTR;
61#endif
62
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63#ifdef __PPC__
64# define EIEIO __asm__ volatile ("eieio")
1a344f29 65# define SYNC __asm__ volatile ("sync")
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66#else
67# define EIEIO /* nothing */
1a344f29 68# define SYNC /* nothing */
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69#endif
70
15647dc7 71#ifdef CONFIG_IDE_8xx_DIRECT
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72/* Timings for IDE Interface
73 *
74 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
75 * 70 165 30 PIO-Mode 0, [ns]
76 * 4 9 2 [Cycles]
77 * 50 125 20 PIO-Mode 1, [ns]
78 * 3 7 2 [Cycles]
79 * 30 100 15 PIO-Mode 2, [ns]
80 * 2 6 1 [Cycles]
81 * 30 80 10 PIO-Mode 3, [ns]
82 * 2 5 1 [Cycles]
83 * 25 70 10 PIO-Mode 4, [ns]
84 * 2 4 1 [Cycles]
85 */
86
87const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
88{
89 /* Setup Length Hold */
90 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
91 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
92 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
93 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
94 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
95};
96
97static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
98
99#ifndef CFG_PIO_MODE
100#define CFG_PIO_MODE 0 /* use a relaxed default */
101#endif
102static int pio_mode = CFG_PIO_MODE;
103
104/* Make clock cycles and always round up */
105
106#define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
107
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108#endif /* CONFIG_IDE_8xx_DIRECT */
109
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110/* ------------------------------------------------------------------------- */
111
112/* Current I/O Device */
113static int curr_device = -1;
114
115/* Current offset for IDE0 / IDE1 bus access */
116ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
117#if defined(CFG_ATA_IDE0_OFFSET)
118 CFG_ATA_IDE0_OFFSET,
119#endif
120#if defined(CFG_ATA_IDE1_OFFSET) && (CFG_IDE_MAXBUS > 1)
121 CFG_ATA_IDE1_OFFSET,
122#endif
123};
124
15647dc7 125
c7de829c 126#ifndef CONFIG_AMIGAONEG3SE
1a344f29 127static int ide_bus_ok[CFG_IDE_MAXBUS];
c7de829c 128#else
1a344f29 129static int ide_bus_ok[CFG_IDE_MAXBUS] = {0,};
c7de829c 130#endif
c609719b 131
fa838874 132block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
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133/* ------------------------------------------------------------------------- */
134
135#ifdef CONFIG_IDE_LED
e2ffd59b 136#if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
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137static void ide_led (uchar led, uchar status);
138#else
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139extern void ide_led (uchar led, uchar status);
140#endif
141#else
c7de829c 142#ifndef CONFIG_AMIGAONEG3SE
c609719b 143#define ide_led(a,b) /* dummy */
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144#else
145extern void ide_led(uchar led, uchar status);
146#define LED_IDE1 1
147#define LED_IDE2 2
148#define CONFIG_IDE_LED 1
149#define DEVICE_LED(x) 1
150#endif
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151#endif
152
153#ifdef CONFIG_IDE_RESET
154static void ide_reset (void);
155#else
156#define ide_reset() /* dummy */
157#endif
158
159static void ide_ident (block_dev_desc_t *dev_desc);
160static uchar ide_wait (int dev, ulong t);
161
162#define IDE_TIME_OUT 2000 /* 2 sec timeout */
163
164#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
165
166#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
167
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168void inline ide_outb(int dev, int port, unsigned char val);
169unsigned char inline ide_inb(int dev, int port);
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170static void input_data(int dev, ulong *sect_buf, int words);
171static void output_data(int dev, ulong *sect_buf, int words);
172static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
173
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174#ifndef CFG_ATA_PORT_ADDR
175#define CFG_ATA_PORT_ADDR(port) (port)
176#endif
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177
178#ifdef CONFIG_ATAPI
179static void atapi_inquiry(block_dev_desc_t *dev_desc);
eb867a76 180ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
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181#endif
182
183
184#ifdef CONFIG_IDE_8xx_DIRECT
185static void set_pcmcia_timing (int pmode);
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186#endif
187
188/* ------------------------------------------------------------------------- */
189
190int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
191{
192 int rcode = 0;
193
194 switch (argc) {
195 case 0:
196 case 1:
197 printf ("Usage:\n%s\n", cmdtp->usage);
198 return 1;
199 case 2:
200 if (strncmp(argv[1],"res",3) == 0) {
201 puts ("\nReset IDE"
202#ifdef CONFIG_IDE_8xx_DIRECT
203 " on PCMCIA " PCMCIA_SLOT_MSG
204#endif
205 ": ");
206
207 ide_init ();
208 return 0;
209 } else if (strncmp(argv[1],"inf",3) == 0) {
210 int i;
211
212 putc ('\n');
213
214 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
215 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
216 continue; /* list only known devices */
217 printf ("IDE device %d: ", i);
218 dev_print(&ide_dev_desc[i]);
219 }
220 return 0;
221
222 } else if (strncmp(argv[1],"dev",3) == 0) {
223 if ((curr_device < 0) || (curr_device >= CFG_IDE_MAXDEVICE)) {
224 puts ("\nno IDE devices available\n");
225 return 1;
226 }
227 printf ("\nIDE device %d: ", curr_device);
228 dev_print(&ide_dev_desc[curr_device]);
229 return 0;
230 } else if (strncmp(argv[1],"part",4) == 0) {
231 int dev, ok;
232
233 for (ok=0, dev=0; dev<CFG_IDE_MAXDEVICE; ++dev) {
234 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
235 ++ok;
236 if (dev)
237 putc ('\n');
238 print_part(&ide_dev_desc[dev]);
239 }
240 }
241 if (!ok) {
242 puts ("\nno IDE devices available\n");
243 rcode ++;
244 }
245 return rcode;
246 }
247 printf ("Usage:\n%s\n", cmdtp->usage);
248 return 1;
249 case 3:
250 if (strncmp(argv[1],"dev",3) == 0) {
251 int dev = (int)simple_strtoul(argv[2], NULL, 10);
252
253 printf ("\nIDE device %d: ", dev);
254 if (dev >= CFG_IDE_MAXDEVICE) {
255 puts ("unknown device\n");
256 return 1;
257 }
258 dev_print(&ide_dev_desc[dev]);
259 /*ide_print (dev);*/
260
261 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
262 return 1;
263 }
264
265 curr_device = dev;
266
267 puts ("... is now current device\n");
268
269 return 0;
270 } else if (strncmp(argv[1],"part",4) == 0) {
271 int dev = (int)simple_strtoul(argv[2], NULL, 10);
272
273 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
274 print_part(&ide_dev_desc[dev]);
275 } else {
276 printf ("\nIDE device %d not available\n", dev);
277 rcode = 1;
278 }
279 return rcode;
280#if 0
281 } else if (strncmp(argv[1],"pio",4) == 0) {
282 int mode = (int)simple_strtoul(argv[2], NULL, 10);
283
284 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
285 puts ("\nSetting ");
286 pio_mode = mode;
287 ide_init ();
288 } else {
289 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
290 mode, IDE_MAX_PIO_MODE);
291 }
292 return;
293#endif
294 }
295
296 printf ("Usage:\n%s\n", cmdtp->usage);
297 return 1;
298 default:
299 /* at least 4 args */
300
301 if (strcmp(argv[1],"read") == 0) {
302 ulong addr = simple_strtoul(argv[2], NULL, 16);
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303 ulong cnt = simple_strtoul(argv[4], NULL, 16);
304 ulong n;
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305#ifdef CFG_64BIT_STRTOUL
306 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 307
c40b2956 308 printf ("\nIDE read: device %d block # %qd, count %ld ... ",
c609719b 309 curr_device, blk, cnt);
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310#else
311 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
312
313 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
314 curr_device, blk, cnt);
315#endif
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316
317 n = ide_dev_desc[curr_device].block_read (curr_device,
318 blk, cnt,
319 (ulong *)addr);
320 /* flush cache after read */
321 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
322
323 printf ("%ld blocks read: %s\n",
324 n, (n==cnt) ? "OK" : "ERROR");
325 if (n==cnt) {
326 return 0;
327 } else {
328 return 1;
329 }
330 } else if (strcmp(argv[1],"write") == 0) {
331 ulong addr = simple_strtoul(argv[2], NULL, 16);
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332 ulong cnt = simple_strtoul(argv[4], NULL, 16);
333 ulong n;
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334#ifdef CFG_64BIT_STRTOUL
335 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 336
c40b2956 337 printf ("\nIDE write: device %d block # %qd, count %ld ... ",
c609719b 338 curr_device, blk, cnt);
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WD
339#else
340 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
341
342 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
343 curr_device, blk, cnt);
344#endif
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345
346 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
347
348 printf ("%ld blocks written: %s\n",
349 n, (n==cnt) ? "OK" : "ERROR");
350 if (n==cnt) {
351 return 0;
352 } else {
353 return 1;
354 }
355 } else {
356 printf ("Usage:\n%s\n", cmdtp->usage);
357 rcode = 1;
358 }
359
360 return rcode;
361 }
362}
363
364int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
365{
366 char *boot_device = NULL;
367 char *ep;
368 int dev, part = 0;
1a344f29 369 ulong addr, cnt, checksum;
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370 disk_partition_t info;
371 image_header_t *hdr;
372 int rcode = 0;
373
fad63407 374 show_boot_progress (41);
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375 switch (argc) {
376 case 1:
377 addr = CFG_LOAD_ADDR;
378 boot_device = getenv ("bootdevice");
379 break;
380 case 2:
381 addr = simple_strtoul(argv[1], NULL, 16);
382 boot_device = getenv ("bootdevice");
383 break;
384 case 3:
385 addr = simple_strtoul(argv[1], NULL, 16);
386 boot_device = argv[2];
387 break;
388 default:
389 printf ("Usage:\n%s\n", cmdtp->usage);
fad63407 390 show_boot_progress (-42);
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391 return 1;
392 }
fad63407 393 show_boot_progress (42);
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394
395 if (!boot_device) {
396 puts ("\n** No boot device **\n");
fad63407 397 show_boot_progress (-43);
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398 return 1;
399 }
fad63407 400 show_boot_progress (43);
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401
402 dev = simple_strtoul(boot_device, &ep, 16);
403
404 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
405 printf ("\n** Device %d not available\n", dev);
fad63407 406 show_boot_progress (-44);
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407 return 1;
408 }
fad63407 409 show_boot_progress (44);
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410
411 if (*ep) {
412 if (*ep != ':') {
413 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
fad63407 414 show_boot_progress (-45);
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415 return 1;
416 }
417 part = simple_strtoul(++ep, NULL, 16);
418 }
fad63407 419 show_boot_progress (45);
7882751c 420 if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
fad63407 421 show_boot_progress (-46);
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422 return 1;
423 }
fad63407 424 show_boot_progress (46);
77ddac94
WD
425 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
426 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
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427 printf ("\n** Invalid partition type \"%.32s\""
428 " (expect \"" BOOT_PART_TYPE "\")\n",
429 info.type);
fad63407 430 show_boot_progress (-47);
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431 return 1;
432 }
fad63407 433 show_boot_progress (47);
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434
435 printf ("\nLoading from IDE device %d, partition %d: "
436 "Name: %.32s Type: %.32s\n",
437 dev, part, info.name, info.type);
438
1a344f29 439 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
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WD
440 info.start, info.size, info.blksz);
441
442 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
443 printf ("** Read error on %d:%d\n", dev, part);
fad63407 444 show_boot_progress (-48);
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445 return 1;
446 }
fad63407 447 show_boot_progress (48);
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448
449 hdr = (image_header_t *)addr;
450
1a344f29 451 if (ntohl(hdr->ih_magic) != IH_MAGIC) {
c609719b 452 printf("\n** Bad Magic Number **\n");
fad63407 453 show_boot_progress (-49);
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454 return 1;
455 }
fad63407 456 show_boot_progress (49);
c609719b 457
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WD
458 checksum = ntohl(hdr->ih_hcrc);
459 hdr->ih_hcrc = 0;
460
77ddac94 461 if (crc32 (0, (uchar *)hdr, sizeof(image_header_t)) != checksum) {
1a344f29 462 puts ("\n** Bad Header Checksum **\n");
fad63407 463 show_boot_progress (-50);
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WD
464 return 1;
465 }
fad63407 466 show_boot_progress (50);
b9649854 467 hdr->ih_hcrc = htonl(checksum); /* restore checksum for later use */
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WD
468
469 print_image_hdr (hdr);
470
471 cnt = (ntohl(hdr->ih_size) + sizeof(image_header_t));
472 cnt += info.blksz - 1;
473 cnt /= info.blksz;
474 cnt -= 1;
475
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476 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
477 (ulong *)(addr+info.blksz)) != cnt) {
478 printf ("** Read error on %d:%d\n", dev, part);
fad63407 479 show_boot_progress (-51);
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480 return 1;
481 }
fad63407 482 show_boot_progress (51);
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483
484
485 /* Loading ok, update default load address */
486
487 load_addr = addr;
488
489 /* Check if we should attempt an auto-start */
490 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
491 char *local_args[2];
492 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
493
494 local_args[0] = argv[0];
495 local_args[1] = NULL;
496
497 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
498
499 do_bootm (cmdtp, 0, 1, local_args);
500 rcode = 1;
501 }
502 return rcode;
503}
504
505/* ------------------------------------------------------------------------- */
506
507void ide_init (void)
508{
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509
510#ifdef CONFIG_IDE_8xx_DIRECT
511 volatile immap_t *immr = (immap_t *)CFG_IMMR;
512 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
513#endif
514 unsigned char c;
515 int i, bus;
51056dd9 516#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
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517 unsigned int ata_reset_time = ATA_RESET_TIME;
518 char *s;
51056dd9 519#endif
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520#ifdef CONFIG_AMIGAONEG3SE
521 unsigned int max_bus_scan;
c7de829c 522#endif
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523#ifdef CONFIG_IDE_8xx_PCCARD
524 extern int pcmcia_on (void);
525 extern int ide_devices_found; /* Initialized in check_ide_device() */
526#endif /* CONFIG_IDE_8xx_PCCARD */
527
528#ifdef CONFIG_IDE_PREINIT
4d13cbad 529 extern int ide_preinit (void);
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530 WATCHDOG_RESET();
531
532 if (ide_preinit ()) {
533 puts ("ide_preinit failed\n");
534 return;
535 }
536#endif /* CONFIG_IDE_PREINIT */
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537
538#ifdef CONFIG_IDE_8xx_PCCARD
539 extern int pcmcia_on (void);
6069ff26 540 extern int ide_devices_found; /* Initialized in check_ide_device() */
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541
542 WATCHDOG_RESET();
543
6069ff26 544 ide_devices_found = 0;
c609719b 545 /* initialize the PCMCIA IDE adapter card */
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WD
546 pcmcia_on();
547 if (!ide_devices_found)
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548 return;
549 udelay (1000000); /* 1 s */
550#endif /* CONFIG_IDE_8xx_PCCARD */
551
552 WATCHDOG_RESET();
553
15647dc7 554#ifdef CONFIG_IDE_8xx_DIRECT
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555 /* Initialize PIO timing tables */
556 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
1a344f29
WD
557 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
558 gd->bus_clk);
559 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
560 gd->bus_clk);
561 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
562 gd->bus_clk);
563 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
564 " len=%3d ns/%d clk"
565 " hold=%2d ns/%d clk\n",
566 i,
567 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
568 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
569 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
c609719b 570 }
15647dc7 571#endif /* CONFIG_IDE_8xx_DIRECT */
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572
573 /* Reset the IDE just to be sure.
574 * Light LED's to show
575 */
576 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
577 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
578
579#ifdef CONFIG_IDE_8xx_DIRECT
580 /* PCMCIA / IDE initialization for common mem space */
581 pcmp->pcmc_pgcrb = 0;
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582
583 /* start in PIO mode 0 - most relaxed timings */
584 pio_mode = 0;
585 set_pcmcia_timing (pio_mode);
15647dc7 586#endif /* CONFIG_IDE_8xx_DIRECT */
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587
588 /*
589 * Wait for IDE to get ready.
590 * According to spec, this can take up to 31 seconds!
591 */
c7de829c 592#ifndef CONFIG_AMIGAONEG3SE
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593 for (bus=0; bus<CFG_IDE_MAXBUS; ++bus) {
594 int dev = bus * (CFG_IDE_MAXDEVICE / CFG_IDE_MAXBUS);
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595#else
596 s = getenv("ide_maxbus");
597 if (s)
1a344f29 598 max_bus_scan = simple_strtol(s, NULL, 10);
c7de829c 599 else
1a344f29 600 max_bus_scan = CFG_IDE_MAXBUS;
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601
602 for (bus=0; bus<max_bus_scan; ++bus) {
603 int dev = bus * (CFG_IDE_MAXDEVICE / max_bus_scan);
604#endif
c609719b 605
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WD
606#ifdef CONFIG_IDE_8xx_PCCARD
607 /* Skip non-ide devices from probing */
608 if ((ide_devices_found & (1 << bus)) == 0) {
609 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
610 continue;
611 }
612#endif
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WD
613 printf ("Bus %d: ", bus);
614
615 ide_bus_ok[bus] = 0;
616
617 /* Select device
618 */
619 udelay (100000); /* 100 ms */
2262cfee 620 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
c609719b 621 udelay (100000); /* 100 ms */
51056dd9
WD
622#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
623 if ((s = getenv("ide_reset_timeout")) != NULL)
624 ata_reset_time = simple_strtol(s, NULL, 10);
c7de829c 625#endif
c609719b
WD
626 i = 0;
627 do {
628 udelay (10000); /* 10 ms */
629
2262cfee 630 c = ide_inb (dev, ATA_STATUS);
c609719b 631 i++;
51056dd9 632#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
c7de829c
WD
633 if (i > (ata_reset_time * 100)) {
634#else
c609719b 635 if (i > (ATA_RESET_TIME * 100)) {
c7de829c 636#endif
c609719b
WD
637 puts ("** Timeout **\n");
638 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
c7de829c
WD
639#ifdef CONFIG_AMIGAONEG3SE
640 /* If this is the second bus, the first one was OK */
c40b2956 641 if (bus != 0) {
1a344f29
WD
642 ide_bus_ok[bus] = 0;
643 goto skip_bus;
c7de829c
WD
644 }
645#endif
c609719b
WD
646 return;
647 }
648 if ((i >= 100) && ((i%100)==0)) {
649 putc ('.');
650 }
651 } while (c & ATA_STAT_BUSY);
652
653 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
654 puts ("not available ");
1a344f29 655 debug ("Status = 0x%02X ", c);
c609719b
WD
656#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
657 } else if ((c & ATA_STAT_READY) == 0) {
658 puts ("not available ");
1a344f29 659 debug ("Status = 0x%02X ", c);
c609719b
WD
660#endif
661 } else {
662 puts ("OK ");
663 ide_bus_ok[bus] = 1;
664 }
665 WATCHDOG_RESET();
666 }
c7de829c
WD
667
668#ifdef CONFIG_AMIGAONEG3SE
669 skip_bus:
670#endif
c609719b
WD
671 putc ('\n');
672
673 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
674
675 curr_device = -1;
676 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
677#ifdef CONFIG_IDE_LED
678 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
679#endif
5cf9da48 680 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
c609719b
WD
681 ide_dev_desc[i].if_type=IF_TYPE_IDE;
682 ide_dev_desc[i].dev=i;
683 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
684 ide_dev_desc[i].blksz=0;
685 ide_dev_desc[i].lba=0;
686 ide_dev_desc[i].block_read=ide_read;
687 if (!ide_bus_ok[IDE_BUS(i)])
688 continue;
689 ide_led (led, 1); /* LED on */
690 ide_ident(&ide_dev_desc[i]);
691 ide_led (led, 0); /* LED off */
692 dev_print(&ide_dev_desc[i]);
693/* ide_print (i); */
694 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
695 init_part (&ide_dev_desc[i]); /* initialize partition type */
696 if (curr_device < 0)
697 curr_device = i;
698 }
699 }
700 WATCHDOG_RESET();
701}
702
703/* ------------------------------------------------------------------------- */
704
705block_dev_desc_t * ide_get_dev(int dev)
706{
735dd97b 707 return (dev < CFG_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
c609719b
WD
708}
709
710
711#ifdef CONFIG_IDE_8xx_DIRECT
712
713static void
714set_pcmcia_timing (int pmode)
715{
716 volatile immap_t *immr = (immap_t *)CFG_IMMR;
717 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
718 ulong timings;
719
1a344f29 720 debug ("Set timing for PIO Mode %d\n", pmode);
c609719b
WD
721
722 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
723 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
724 | PCMCIA_SL (pio_config_clk[pmode].t_length)
725 ;
726
727 /* IDE 0
728 */
729 pcmp->pcmc_pbr0 = CFG_PCMCIA_PBR0;
730 pcmp->pcmc_por0 = CFG_PCMCIA_POR0
731#if (CFG_PCMCIA_POR0 != 0)
732 | timings
733#endif
734 ;
1a344f29 735 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
c609719b
WD
736
737 pcmp->pcmc_pbr1 = CFG_PCMCIA_PBR1;
738 pcmp->pcmc_por1 = CFG_PCMCIA_POR1
739#if (CFG_PCMCIA_POR1 != 0)
740 | timings
741#endif
742 ;
1a344f29 743 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
c609719b
WD
744
745 pcmp->pcmc_pbr2 = CFG_PCMCIA_PBR2;
746 pcmp->pcmc_por2 = CFG_PCMCIA_POR2
747#if (CFG_PCMCIA_POR2 != 0)
748 | timings
749#endif
750 ;
1a344f29 751 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
c609719b
WD
752
753 pcmp->pcmc_pbr3 = CFG_PCMCIA_PBR3;
754 pcmp->pcmc_por3 = CFG_PCMCIA_POR3
755#if (CFG_PCMCIA_POR3 != 0)
756 | timings
757#endif
758 ;
1a344f29 759 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
c609719b
WD
760
761 /* IDE 1
762 */
763 pcmp->pcmc_pbr4 = CFG_PCMCIA_PBR4;
764 pcmp->pcmc_por4 = CFG_PCMCIA_POR4
765#if (CFG_PCMCIA_POR4 != 0)
766 | timings
767#endif
768 ;
1a344f29 769 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
c609719b
WD
770
771 pcmp->pcmc_pbr5 = CFG_PCMCIA_PBR5;
772 pcmp->pcmc_por5 = CFG_PCMCIA_POR5
773#if (CFG_PCMCIA_POR5 != 0)
774 | timings
775#endif
776 ;
1a344f29 777 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
c609719b
WD
778
779 pcmp->pcmc_pbr6 = CFG_PCMCIA_PBR6;
780 pcmp->pcmc_por6 = CFG_PCMCIA_POR6
781#if (CFG_PCMCIA_POR6 != 0)
782 | timings
783#endif
784 ;
1a344f29 785 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
c609719b
WD
786
787 pcmp->pcmc_pbr7 = CFG_PCMCIA_PBR7;
788 pcmp->pcmc_por7 = CFG_PCMCIA_POR7
789#if (CFG_PCMCIA_POR7 != 0)
790 | timings
791#endif
792 ;
1a344f29 793 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
c609719b
WD
794
795}
796
797#endif /* CONFIG_IDE_8xx_DIRECT */
798
799/* ------------------------------------------------------------------------- */
800
f98984cb
HS
801void inline
802__ide_outb(int dev, int port, unsigned char val)
c609719b 803{
1a344f29 804 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
f98984cb
HS
805 dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
806 outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
2262cfee 807}
f98984cb
HS
808void inline ide_outb (int dev, int port, unsigned char val)
809 __attribute__((weak, alias("__ide_outb")));
c609719b 810
f98984cb
HS
811unsigned char inline
812__ide_inb(int dev, int port)
c609719b
WD
813{
814 uchar val;
f98984cb 815 val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
1a344f29 816 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
f98984cb
HS
817 dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val);
818 return val;
2262cfee 819}
f98984cb
HS
820unsigned char inline ide_inb(int dev, int port)
821 __attribute__((weak, alias("__ide_inb")));
c609719b 822
2262cfee 823#ifdef __PPC__
cceb871f 824# ifdef CONFIG_AMIGAONEG3SE
c7de829c
WD
825static void
826output_data_short(int dev, ulong *sect_buf, int words)
827{
828 ushort *dbuf;
829 volatile ushort *pbuf;
8bde7f77 830
c7de829c
WD
831 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
832 dbuf = (ushort *)sect_buf;
833 while (words--) {
5cf91d6b 834 EIEIO;
c7de829c 835 *pbuf = *dbuf++;
5cf91d6b 836 EIEIO;
c7de829c
WD
837 }
838
839 if (words&1)
1a344f29 840 *pbuf = 0;
c7de829c 841}
cceb871f 842# endif /* CONFIG_AMIGAONEG3SE */
5da627a4 843#endif /* __PPC_ */
c7de829c 844
5da627a4
WD
845/* We only need to swap data if we are running on a big endian cpu. */
846/* But Au1x00 cpu:s already swaps data in big endian mode! */
0c32d96d 847#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
5da627a4
WD
848#define input_swap_data(x,y,z) input_data(x,y,z)
849#else
c609719b
WD
850static void
851input_swap_data(int dev, ulong *sect_buf, int words)
852{
1a344f29 853#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
854 uchar i;
855 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
856 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
857 ushort *dbuf = (ushort *)sect_buf;
858
859 while (words--) {
860 for (i=0; i<2; i++) {
861 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
862 *(uchar *)dbuf = *pbuf_odd;
863 dbuf+=1;
864 }
865 }
f4733a07 866#else
1a344f29
WD
867 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
868 ushort *dbuf = (ushort *)sect_buf;
869
870 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
871
872 while (words--) {
0c32d96d
WD
873#ifdef __MIPS__
874 *dbuf++ = swab16p((u16*)pbuf);
875 *dbuf++ = swab16p((u16*)pbuf);
566a494f
HS
876#elif defined(CONFIG_PCS440EP)
877 *dbuf++ = *pbuf;
878 *dbuf++ = *pbuf;
0c32d96d 879#else
1a344f29
WD
880 *dbuf++ = ld_le16(pbuf);
881 *dbuf++ = ld_le16(pbuf);
0c32d96d 882#endif /* !MIPS */
1a344f29
WD
883 }
884#endif
c609719b 885}
5da627a4 886#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
2262cfee
WD
887
888
eda3e1e6 889#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
c609719b
WD
890static void
891output_data(int dev, ulong *sect_buf, int words)
892{
1a344f29 893#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
894 uchar *dbuf;
895 volatile uchar *pbuf_even;
896 volatile uchar *pbuf_odd;
897
898 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
899 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
900 dbuf = (uchar *)sect_buf;
901 while (words--) {
5cf91d6b 902 EIEIO;
a522fa0e 903 *pbuf_even = *dbuf++;
5cf91d6b 904 EIEIO;
a522fa0e 905 *pbuf_odd = *dbuf++;
5cf91d6b 906 EIEIO;
a522fa0e 907 *pbuf_even = *dbuf++;
5cf91d6b 908 EIEIO;
a522fa0e
WD
909 *pbuf_odd = *dbuf++;
910 }
1a344f29
WD
911#else
912 ushort *dbuf;
913 volatile ushort *pbuf;
914
915 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
916 dbuf = (ushort *)sect_buf;
917 while (words--) {
566a494f
HS
918#if defined(CONFIG_PCS440EP)
919 /* not tested, because CF was write protected */
920 EIEIO;
921 *pbuf = ld_le16(dbuf++);
922 EIEIO;
923 *pbuf = ld_le16(dbuf++);
924#else
1a344f29
WD
925 EIEIO;
926 *pbuf = *dbuf++;
927 EIEIO;
928 *pbuf = *dbuf++;
566a494f 929#endif
1a344f29
WD
930 }
931#endif
c609719b 932}
2262cfee
WD
933#else /* ! __PPC__ */
934static void
935output_data(int dev, ulong *sect_buf, int words)
936{
15647dc7 937 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
2262cfee
WD
938}
939#endif /* __PPC__ */
c609719b 940
eda3e1e6 941#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
c609719b
WD
942static void
943input_data(int dev, ulong *sect_buf, int words)
944{
1a344f29 945#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
946 uchar *dbuf;
947 volatile uchar *pbuf_even;
948 volatile uchar *pbuf_odd;
949
950 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
951 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
952 dbuf = (uchar *)sect_buf;
953 while (words--) {
1a344f29 954 *dbuf++ = *pbuf_even;
cd172b71 955 EIEIO;
1a344f29
WD
956 SYNC;
957 *dbuf++ = *pbuf_odd;
5cf91d6b 958 EIEIO;
1a344f29 959 SYNC;
a522fa0e 960 *dbuf++ = *pbuf_even;
5cf91d6b 961 EIEIO;
1a344f29 962 SYNC;
a522fa0e 963 *dbuf++ = *pbuf_odd;
5cf91d6b 964 EIEIO;
1a344f29
WD
965 SYNC;
966 }
967#else
968 ushort *dbuf;
969 volatile ushort *pbuf;
970
971 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
972 dbuf = (ushort *)sect_buf;
973
974 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
975
976 while (words--) {
566a494f
HS
977#if defined(CONFIG_PCS440EP)
978 EIEIO;
979 *dbuf++ = ld_le16(pbuf);
980 EIEIO;
981 *dbuf++ = ld_le16(pbuf);
982#else
cd172b71 983 EIEIO;
1a344f29 984 *dbuf++ = *pbuf;
cd172b71 985 EIEIO;
1a344f29 986 *dbuf++ = *pbuf;
566a494f 987#endif
a522fa0e 988 }
1a344f29 989#endif
c609719b 990}
2262cfee
WD
991#else /* ! __PPC__ */
992static void
993input_data(int dev, ulong *sect_buf, int words)
994{
15647dc7 995 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
2262cfee
WD
996}
997
998#endif /* __PPC__ */
c609719b 999
c7de829c
WD
1000#ifdef CONFIG_AMIGAONEG3SE
1001static void
1002input_data_short(int dev, ulong *sect_buf, int words)
1003{
1004 ushort *dbuf;
1005 volatile ushort *pbuf;
1006
1007 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1008 dbuf = (ushort *)sect_buf;
1009 while (words--) {
5cf91d6b 1010 EIEIO;
c7de829c 1011 *dbuf++ = *pbuf;
5cf91d6b 1012 EIEIO;
c7de829c
WD
1013 }
1014
c40b2956 1015 if (words&1) {
1a344f29
WD
1016 ushort dummy;
1017 dummy = *pbuf;
c7de829c
WD
1018 }
1019}
1020#endif
1021
c609719b
WD
1022/* -------------------------------------------------------------------------
1023 */
1024static void ide_ident (block_dev_desc_t *dev_desc)
1025{
1026 ulong iobuf[ATA_SECTORWORDS];
1027 unsigned char c;
1028 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
1029
c7de829c
WD
1030#ifdef CONFIG_AMIGAONEG3SE
1031 int max_bus_scan;
c7de829c 1032 char *s;
64f70bed
WD
1033#endif
1034#ifdef CONFIG_ATAPI
1035 int retries = 0;
c7de829c
WD
1036 int do_retry = 0;
1037#endif
1038
c609719b
WD
1039#if 0
1040 int mode, cycle_time;
1041#endif
1042 int device;
1043 device=dev_desc->dev;
1044 printf (" Device %d: ", device);
1045
c7de829c
WD
1046#ifdef CONFIG_AMIGAONEG3SE
1047 s = getenv("ide_maxbus");
1048 if (s) {
1049 max_bus_scan = simple_strtol(s, NULL, 10);
1050 } else {
1051 max_bus_scan = CFG_IDE_MAXBUS;
1052 }
1053 if (device >= max_bus_scan*2) {
1054 dev_desc->type=DEV_TYPE_UNKNOWN;
1055 return;
1056 }
1057#endif
1058
c609719b
WD
1059 ide_led (DEVICE_LED(device), 1); /* LED on */
1060 /* Select device
1061 */
2262cfee 1062 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1063 dev_desc->if_type=IF_TYPE_IDE;
1064#ifdef CONFIG_ATAPI
c7de829c 1065
c7de829c
WD
1066 do_retry = 0;
1067 retries = 0;
1068
1069 /* Warning: This will be tricky to read */
c40b2956 1070 while (retries <= 1) {
c609719b 1071 /* check signature */
2262cfee
WD
1072 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
1073 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1074 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1075 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
c609719b
WD
1076 /* ATAPI Signature found */
1077 dev_desc->if_type=IF_TYPE_ATAPI;
1078 /* Start Ident Command
1079 */
2262cfee 1080 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
c609719b
WD
1081 /*
1082 * Wait for completion - ATAPI devices need more time
1083 * to become ready
1084 */
1085 c = ide_wait (device, ATAPI_TIME_OUT);
c40b2956 1086 } else
c609719b
WD
1087#endif
1088 {
1089 /* Start Ident Command
1090 */
2262cfee 1091 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
c609719b
WD
1092
1093 /* Wait for completion
1094 */
1095 c = ide_wait (device, IDE_TIME_OUT);
1096 }
1097 ide_led (DEVICE_LED(device), 0); /* LED off */
1098
1099 if (((c & ATA_STAT_DRQ) == 0) ||
1100 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
64f70bed 1101#ifdef CONFIG_ATAPI
c7de829c 1102#ifdef CONFIG_AMIGAONEG3SE
64f70bed
WD
1103 s = getenv("ide_doreset");
1104 if (s && strcmp(s, "on") == 0)
1105#endif
1a344f29
WD
1106 {
1107 /* Need to soft reset the device in case it's an ATAPI... */
1108 debug ("Retrying...\n");
1109 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1110 udelay(100000);
1111 ide_outb (device, ATA_COMMAND, 0x08);
1112 udelay (500000); /* 500 ms */
1113 }
64f70bed
WD
1114 /* Select device
1115 */
c7de829c 1116 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c7de829c 1117 retries++;
64f70bed
WD
1118#else
1119 return;
1120#endif
c609719b 1121 }
64f70bed
WD
1122#ifdef CONFIG_ATAPI
1123 else
1124 break;
c7de829c 1125 } /* see above - ugly to read */
64f70bed
WD
1126
1127 if (retries == 2) /* Not found */
1128 return;
1129#endif
c609719b
WD
1130
1131 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1132
7a60ee7c
JCPV
1133 ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1134 ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1135 ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
c3f9d493
WD
1136#ifdef __LITTLE_ENDIAN
1137 /*
1138 * firmware revision and model number have Big Endian Byte
1139 * order in Word. Convert both to little endian.
1140 *
1141 * See CF+ and CompactFlash Specification Revision 2.0:
1142 * 6.2.1.6: Identfy Drive, Table 39 for more details
1143 */
1144
1145 strswab (dev_desc->revision);
1146 strswab (dev_desc->vendor);
1147#endif /* __LITTLE_ENDIAN */
c609719b
WD
1148
1149 if ((iop->config & 0x0080)==0x0080)
1150 dev_desc->removable = 1;
1151 else
1152 dev_desc->removable = 0;
1153
1154#if 0
1155 /*
1156 * Drive PIO mode autoselection
1157 */
1158 mode = iop->tPIO;
1159
1160 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1161 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1162 mode = 2;
1a344f29 1163 debug ("Override tPIO -> 2\n");
c609719b
WD
1164 }
1165 if (iop->field_valid & 2) { /* drive implements ATA2? */
1a344f29 1166 debug ("Drive implements ATA2\n");
c609719b
WD
1167 if (iop->capability & 8) { /* drive supports use_iordy? */
1168 cycle_time = iop->eide_pio_iordy;
1169 } else {
1170 cycle_time = iop->eide_pio;
1171 }
1a344f29 1172 debug ("cycle time = %d\n", cycle_time);
c609719b
WD
1173 mode = 4;
1174 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1175 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1176 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1177 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1178 }
1179 printf ("PIO mode to use: PIO %d\n", mode);
1180#endif /* 0 */
1181
1182#ifdef CONFIG_ATAPI
1183 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1184 atapi_inquiry(dev_desc);
1185 return;
1186 }
1187#endif /* CONFIG_ATAPI */
1188
c3f9d493 1189#ifdef __BIG_ENDIAN
c609719b
WD
1190 /* swap shorts */
1191 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
c3f9d493
WD
1192#else /* ! __BIG_ENDIAN */
1193 /*
1194 * do not swap shorts on little endian
1195 *
1196 * See CF+ and CompactFlash Specification Revision 2.0:
1197 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1198 */
1199 dev_desc->lba = iop->lba_capacity;
1200#endif /* __BIG_ENDIAN */
c40b2956 1201
42dfe7a1 1202#ifdef CONFIG_LBA48
c40b2956 1203 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
6e592385
WD
1204 dev_desc->lba48 = 1;
1205 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
c40b2956
WD
1206 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1207 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1208 ((unsigned long long)iop->lba48_capacity[3] << 48);
1209 } else {
c40b2956
WD
1210 dev_desc->lba48 = 0;
1211 }
1212#endif /* CONFIG_LBA48 */
c609719b
WD
1213 /* assuming HD */
1214 dev_desc->type=DEV_TYPE_HARDDISK;
1215 dev_desc->blksz=ATA_BLOCKSIZE;
1216 dev_desc->lun=0; /* just to fill something in... */
1217
1218#if 0 /* only used to test the powersaving mode,
1219 * if enabled, the drive goes after 5 sec
1220 * in standby mode */
2262cfee 1221 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b 1222 c = ide_wait (device, IDE_TIME_OUT);
2262cfee
WD
1223 ide_outb (device, ATA_SECT_CNT, 1);
1224 ide_outb (device, ATA_LBA_LOW, 0);
1225 ide_outb (device, ATA_LBA_MID, 0);
1226 ide_outb (device, ATA_LBA_HIGH, 0);
1a344f29 1227 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
2262cfee 1228 ide_outb (device, ATA_COMMAND, 0xe3);
c609719b
WD
1229 udelay (50);
1230 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1231#endif
1232}
1233
1234
1235/* ------------------------------------------------------------------------- */
1236
eb867a76 1237ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD
1238{
1239 ulong n = 0;
1240 unsigned char c;
1241 unsigned char pwrsave=0; /* power save */
42dfe7a1 1242#ifdef CONFIG_LBA48
c40b2956 1243 unsigned char lba48 = 0;
c609719b 1244
c40b2956
WD
1245 if (blknr & 0x0000fffff0000000) {
1246 /* more than 28 bits used, use 48bit mode */
1247 lba48 = 1;
1248 }
1249#endif
1a344f29 1250 debug ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n",
c609719b
WD
1251 device, blknr, blkcnt, (ulong)buffer);
1252
1253 ide_led (DEVICE_LED(device), 1); /* LED on */
1254
1255 /* Select device
1256 */
2262cfee 1257 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1258 c = ide_wait (device, IDE_TIME_OUT);
1259
1260 if (c & ATA_STAT_BUSY) {
1261 printf ("IDE read: device %d not ready\n", device);
1262 goto IDE_READ_E;
1263 }
1264
1265 /* first check if the drive is in Powersaving mode, if yes,
1266 * increase the timeout value */
2262cfee 1267 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
c609719b
WD
1268 udelay (50);
1269
1270 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1271
1272 if (c & ATA_STAT_BUSY) {
1273 printf ("IDE read: device %d not ready\n", device);
1274 goto IDE_READ_E;
1275 }
1276 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1277 printf ("No Powersaving mode %X\n", c);
1278 } else {
2262cfee 1279 c = ide_inb(device,ATA_SECT_CNT);
1a344f29 1280 debug ("Powersaving %02X\n",c);
c609719b
WD
1281 if(c==0)
1282 pwrsave=1;
1283 }
1284
1285
1286 while (blkcnt-- > 0) {
1287
1288 c = ide_wait (device, IDE_TIME_OUT);
1289
1290 if (c & ATA_STAT_BUSY) {
1291 printf ("IDE read: device %d not ready\n", device);
1292 break;
1293 }
42dfe7a1 1294#ifdef CONFIG_LBA48
c40b2956
WD
1295 if (lba48) {
1296 /* write high bits */
1297 ide_outb (device, ATA_SECT_CNT, 0);
1298 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1299 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1300 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1301 }
1302#endif
2262cfee
WD
1303 ide_outb (device, ATA_SECT_CNT, 1);
1304 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1305 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1306 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 1307
42dfe7a1 1308#ifdef CONFIG_LBA48
c40b2956
WD
1309 if (lba48) {
1310 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1311 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1312
1313 } else
1314#endif
1315 {
1316 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1317 ATA_DEVICE(device) |
1318 ((blknr >> 24) & 0xF) );
1319 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1320 }
c609719b
WD
1321
1322 udelay (50);
1323
1324 if(pwrsave) {
1325 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1326 pwrsave=0;
1327 } else {
1328 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1329 }
1330
1331 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
42dfe7a1 1332#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
c40b2956 1333 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
c609719b 1334 device, blknr, c);
c40b2956
WD
1335#else
1336 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1337 device, (ulong)blknr, c);
1338#endif
c609719b
WD
1339 break;
1340 }
1341
1342 input_data (device, buffer, ATA_SECTORWORDS);
2262cfee 1343 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
c609719b
WD
1344
1345 ++n;
1346 ++blknr;
0b94504d 1347 buffer += ATA_BLOCKSIZE;
c609719b
WD
1348 }
1349IDE_READ_E:
1350 ide_led (DEVICE_LED(device), 0); /* LED off */
1351 return (n);
1352}
1353
1354/* ------------------------------------------------------------------------- */
1355
1356
eb867a76 1357ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD
1358{
1359 ulong n = 0;
1360 unsigned char c;
42dfe7a1 1361#ifdef CONFIG_LBA48
c40b2956
WD
1362 unsigned char lba48 = 0;
1363
1364 if (blknr & 0x0000fffff0000000) {
1365 /* more than 28 bits used, use 48bit mode */
1366 lba48 = 1;
1367 }
1368#endif
c609719b
WD
1369
1370 ide_led (DEVICE_LED(device), 1); /* LED on */
1371
1372 /* Select device
1373 */
2262cfee 1374 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1375
1376 while (blkcnt-- > 0) {
1377
1378 c = ide_wait (device, IDE_TIME_OUT);
1379
1380 if (c & ATA_STAT_BUSY) {
1381 printf ("IDE read: device %d not ready\n", device);
1382 goto WR_OUT;
1383 }
42dfe7a1 1384#ifdef CONFIG_LBA48
c40b2956
WD
1385 if (lba48) {
1386 /* write high bits */
1387 ide_outb (device, ATA_SECT_CNT, 0);
1388 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1389 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1390 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1391 }
1392#endif
2262cfee
WD
1393 ide_outb (device, ATA_SECT_CNT, 1);
1394 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1395 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1396 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 1397
42dfe7a1 1398#ifdef CONFIG_LBA48
c40b2956
WD
1399 if (lba48) {
1400 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1401 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1402
1403 } else
1404#endif
1405 {
1406 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1407 ATA_DEVICE(device) |
1408 ((blknr >> 24) & 0xF) );
1409 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1410 }
c609719b
WD
1411
1412 udelay (50);
1413
1414 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1415
1416 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
42dfe7a1 1417#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
c40b2956 1418 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
c609719b 1419 device, blknr, c);
c40b2956
WD
1420#else
1421 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1422 device, (ulong)blknr, c);
1423#endif
c609719b
WD
1424 goto WR_OUT;
1425 }
1426
1427 output_data (device, buffer, ATA_SECTORWORDS);
2262cfee 1428 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
c609719b
WD
1429 ++n;
1430 ++blknr;
0b94504d 1431 buffer += ATA_BLOCKSIZE;
c609719b
WD
1432 }
1433WR_OUT:
1434 ide_led (DEVICE_LED(device), 0); /* LED off */
1435 return (n);
1436}
1437
1438/* ------------------------------------------------------------------------- */
1439
1440/*
1441 * copy src to dest, skipping leading and trailing blanks and null
1442 * terminate the string
7d7ce412 1443 * "len" is the size of available memory including the terminating '\0'
c609719b 1444 */
7d7ce412 1445static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
c609719b 1446{
7d7ce412
WD
1447 unsigned char *end, *last;
1448
1449 last = dst;
6fb6af6d 1450 end = src + len - 1;
7d7ce412
WD
1451
1452 /* reserve space for '\0' */
1453 if (len < 2)
1454 goto OUT;
efa329cb 1455
7d7ce412
WD
1456 /* skip leading white space */
1457 while ((*src) && (src<end) && (*src==' '))
1458 ++src;
1459
1460 /* copy string, omitting trailing white space */
1461 while ((*src) && (src<end)) {
1462 *dst++ = *src;
1463 if (*src++ != ' ')
1464 last = dst;
c609719b 1465 }
7d7ce412
WD
1466OUT:
1467 *last = '\0';
c609719b
WD
1468}
1469
1470/* ------------------------------------------------------------------------- */
1471
1472/*
1473 * Wait until Busy bit is off, or timeout (in ms)
1474 * Return last status
1475 */
1476static uchar ide_wait (int dev, ulong t)
1477{
1478 ulong delay = 10 * t; /* poll every 100 us */
1479 uchar c;
1480
2262cfee 1481 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
c609719b
WD
1482 udelay (100);
1483 if (delay-- == 0) {
1484 break;
1485 }
1486 }
1487 return (c);
1488}
1489
1490/* ------------------------------------------------------------------------- */
1491
1492#ifdef CONFIG_IDE_RESET
1493extern void ide_set_reset(int idereset);
1494
1495static void ide_reset (void)
1496{
1497#if defined(CFG_PB_12V_ENABLE) || defined(CFG_PB_IDE_MOTOR)
1498 volatile immap_t *immr = (immap_t *)CFG_IMMR;
1499#endif
1500 int i;
1501
1502 curr_device = -1;
1503 for (i=0; i<CFG_IDE_MAXBUS; ++i)
1504 ide_bus_ok[i] = 0;
1505 for (i=0; i<CFG_IDE_MAXDEVICE; ++i)
1506 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1507
1508 ide_set_reset (1); /* assert reset */
1509
1510 WATCHDOG_RESET();
1511
1512#ifdef CFG_PB_12V_ENABLE
1513 immr->im_cpm.cp_pbdat &= ~(CFG_PB_12V_ENABLE); /* 12V Enable output OFF */
1514 immr->im_cpm.cp_pbpar &= ~(CFG_PB_12V_ENABLE);
1515 immr->im_cpm.cp_pbodr &= ~(CFG_PB_12V_ENABLE);
1516 immr->im_cpm.cp_pbdir |= CFG_PB_12V_ENABLE;
1517
1518 /* wait 500 ms for the voltage to stabilize
1519 */
1520 for (i=0; i<500; ++i) {
1521 udelay (1000);
1522 }
1523
1524 immr->im_cpm.cp_pbdat |= CFG_PB_12V_ENABLE; /* 12V Enable output ON */
1525#endif /* CFG_PB_12V_ENABLE */
1526
1527#ifdef CFG_PB_IDE_MOTOR
1528 /* configure IDE Motor voltage monitor pin as input */
1529 immr->im_cpm.cp_pbpar &= ~(CFG_PB_IDE_MOTOR);
1530 immr->im_cpm.cp_pbodr &= ~(CFG_PB_IDE_MOTOR);
1531 immr->im_cpm.cp_pbdir &= ~(CFG_PB_IDE_MOTOR);
1532
1533 /* wait up to 1 s for the motor voltage to stabilize
1534 */
1535 for (i=0; i<1000; ++i) {
1536 if ((immr->im_cpm.cp_pbdat & CFG_PB_IDE_MOTOR) != 0) {
1537 break;
1538 }
1539 udelay (1000);
1540 }
1541
1542 if (i == 1000) { /* Timeout */
1543 printf ("\nWarning: 5V for IDE Motor missing\n");
1544# ifdef CONFIG_STATUS_LED
1545# ifdef STATUS_LED_YELLOW
1546 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1547# endif
1548# ifdef STATUS_LED_GREEN
1549 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1550# endif
1551# endif /* CONFIG_STATUS_LED */
1552 }
1553#endif /* CFG_PB_IDE_MOTOR */
1554
1555 WATCHDOG_RESET();
1556
1557 /* de-assert RESET signal */
1558 ide_set_reset(0);
1559
1560 /* wait 250 ms */
1561 for (i=0; i<250; ++i) {
1562 udelay (1000);
1563 }
1564}
1565
1566#endif /* CONFIG_IDE_RESET */
1567
1568/* ------------------------------------------------------------------------- */
1569
e2ffd59b
WD
1570#if defined(CONFIG_IDE_LED) && \
1571 !defined(CONFIG_AMIGAONEG3SE)&& \
1572 !defined(CONFIG_CPC45) && \
1573 !defined(CONFIG_HMI10) && \
1574 !defined(CONFIG_KUP4K) && \
1575 !defined(CONFIG_KUP4X)
c609719b
WD
1576
1577static uchar led_buffer = 0; /* Buffer for current LED status */
1578
1579static void ide_led (uchar led, uchar status)
1580{
1581 uchar *led_port = LED_PORT;
1582
1583 if (status) { /* switch LED on */
1584 led_buffer |= led;
1585 } else { /* switch LED off */
1586 led_buffer &= ~led;
1587 }
1588
1589 *led_port = led_buffer;
1590}
1591
1592#endif /* CONFIG_IDE_LED */
1593
1594/* ------------------------------------------------------------------------- */
1595
1596#ifdef CONFIG_ATAPI
1597/****************************************************************************
1598 * ATAPI Support
1599 */
1600
db01a2ea 1601#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b
WD
1602/* since ATAPI may use commands with not 4 bytes alligned length
1603 * we have our own transfer functions, 2 bytes alligned */
1604static void
1605output_data_shorts(int dev, ushort *sect_buf, int shorts)
1606{
1a344f29 1607#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
1608 uchar *dbuf;
1609 volatile uchar *pbuf_even;
1610 volatile uchar *pbuf_odd;
1611
1612 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1613 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1614 while (shorts--) {
5cf91d6b 1615 EIEIO;
a522fa0e 1616 *pbuf_even = *dbuf++;
5cf91d6b 1617 EIEIO;
a522fa0e
WD
1618 *pbuf_odd = *dbuf++;
1619 }
1a344f29 1620#else
c609719b
WD
1621 ushort *dbuf;
1622 volatile ushort *pbuf;
1623
1624 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1625 dbuf = (ushort *)sect_buf;
db01a2ea 1626
1a344f29 1627 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
db01a2ea 1628
c609719b 1629 while (shorts--) {
5cf91d6b 1630 EIEIO;
1a344f29 1631 *pbuf = *dbuf++;
c609719b 1632 }
1a344f29
WD
1633#endif
1634}
1635
1636static void
1637input_data_shorts(int dev, ushort *sect_buf, int shorts)
1638{
1639#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD
1640 uchar *dbuf;
1641 volatile uchar *pbuf_even;
1642 volatile uchar *pbuf_odd;
1643
1644 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1645 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1646 while (shorts--) {
5cf91d6b 1647 EIEIO;
a522fa0e 1648 *dbuf++ = *pbuf_even;
5cf91d6b 1649 EIEIO;
a522fa0e
WD
1650 *dbuf++ = *pbuf_odd;
1651 }
1a344f29
WD
1652#else
1653 ushort *dbuf;
1654 volatile ushort *pbuf;
1655
1656 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1657 dbuf = (ushort *)sect_buf;
1658
1659 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1660
1661 while (shorts--) {
1662 EIEIO;
1663 *dbuf++ = *pbuf;
1664 }
1665#endif
c609719b
WD
1666}
1667
2262cfee
WD
1668#else /* ! __PPC__ */
1669static void
1670output_data_shorts(int dev, ushort *sect_buf, int shorts)
1671{
15647dc7 1672 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD
1673}
1674
2262cfee
WD
1675static void
1676input_data_shorts(int dev, ushort *sect_buf, int shorts)
1677{
15647dc7 1678 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD
1679}
1680
1681#endif /* __PPC__ */
1682
c609719b
WD
1683/*
1684 * Wait until (Status & mask) == res, or timeout (in ms)
1685 * Return last status
1686 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1687 * and then they set their DRQ Bit
1688 */
1689static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1690{
1691 ulong delay = 10 * t; /* poll every 100 us */
1692 uchar c;
1693
2262cfee
WD
1694 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1695 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
c609719b
WD
1696 /* break if error occurs (doesn't make sense to wait more) */
1697 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1698 break;
1699 udelay (100);
1700 if (delay-- == 0) {
1701 break;
1702 }
1703 }
1704 return (c);
1705}
1706
1707/*
1708 * issue an atapi command
1709 */
1710unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1711{
1712 unsigned char c,err,mask,res;
1713 int n;
1714 ide_led (DEVICE_LED(device), 1); /* LED on */
1715
1716 /* Select device
1717 */
1718 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1719 res = 0;
c7de829c
WD
1720#ifdef CONFIG_AMIGAONEG3SE
1721# warning THF: Removed LBA mode ???
1722#endif
2262cfee 1723 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
1724 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1725 if ((c & mask) != res) {
1726 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1727 err=0xFF;
1728 goto AI_OUT;
1729 }
1730 /* write taskfile */
2262cfee 1731 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
c7de829c
WD
1732 ide_outb (device, ATA_SECT_CNT, 0);
1733 ide_outb (device, ATA_SECT_NUM, 0);
2262cfee 1734 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
c7de829c
WD
1735 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
1736#ifdef CONFIG_AMIGAONEG3SE
1737# warning THF: Removed LBA mode ???
1738#endif
2262cfee 1739 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b 1740
2262cfee 1741 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
c609719b
WD
1742 udelay (50);
1743
1744 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1745 res = ATA_STAT_DRQ;
1746 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1747
1748 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1749 printf ("ATTAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
1750 err=0xFF;
1751 goto AI_OUT;
1752 }
1753
1754 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
1755 /* ATAPI Command written wait for completition */
1756 udelay (5000); /* device must set bsy */
1757
1758 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1759 /* if no data wait for DRQ = 0 BSY = 0
1760 * if data wait for DRQ = 1 BSY = 0 */
1761 res=0;
1762 if(buflen)
1763 res = ATA_STAT_DRQ;
1764 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1765 if ((c & mask) != res ) {
1766 if (c & ATA_STAT_ERR) {
2262cfee 1767 err=(ide_inb(device,ATA_ERROR_REG))>>4;
1a344f29 1768 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
c609719b
WD
1769 } else {
1770 printf ("ATTAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
1771 err=0xFF;
1772 }
1773 goto AI_OUT;
1774 }
2262cfee 1775 n=ide_inb(device, ATA_CYL_HIGH);
c609719b 1776 n<<=8;
2262cfee 1777 n+=ide_inb(device, ATA_CYL_LOW);
c609719b
WD
1778 if(n>buflen) {
1779 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1780 err=0xff;
1781 goto AI_OUT;
1782 }
1783 if((n==0)&&(buflen<0)) {
1784 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1785 err=0xff;
1786 goto AI_OUT;
1787 }
1788 if(n!=buflen) {
1a344f29 1789 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
c609719b
WD
1790 }
1791 if(n!=0) { /* data transfer */
1a344f29 1792 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
c609719b
WD
1793 /* we transfer shorts */
1794 n>>=1;
1795 /* ok now decide if it is an in or output */
2262cfee 1796 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
1a344f29 1797 debug ("Write to device\n");
c609719b
WD
1798 output_data_shorts(device,(unsigned short *)buffer,n);
1799 } else {
1a344f29 1800 debug ("Read from device @ %p shorts %d\n",buffer,n);
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WD
1801 input_data_shorts(device,(unsigned short *)buffer,n);
1802 }
1803 }
1804 udelay(5000); /* seems that some CD ROMs need this... */
1805 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1806 res=0;
1807 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1808 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
2262cfee 1809 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
1a344f29 1810 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
c609719b
WD
1811 } else {
1812 err = 0;
1813 }
1814AI_OUT:
1815 ide_led (DEVICE_LED(device), 0); /* LED off */
1816 return (err);
1817}
1818
1819/*
1820 * sending the command to atapi_issue. If an status other than good
1821 * returns, an request_sense will be issued
1822 */
1823
1824#define ATAPI_DRIVE_NOT_READY 100
1825#define ATAPI_UNIT_ATTN 10
1826
1827unsigned char atapi_issue_autoreq (int device,
1828 unsigned char* ccb,
1829 int ccblen,
1830 unsigned char *buffer,
1831 int buflen)
1832{
1833 unsigned char sense_data[18],sense_ccb[12];
1834 unsigned char res,key,asc,ascq;
1835 int notready,unitattn;
1836
c7de829c
WD
1837#ifdef CONFIG_AMIGAONEG3SE
1838 char *s;
1839 unsigned int timeout, retrycnt;
1840
1841 s = getenv("ide_cd_timeout");
1842 timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
1843
1844 retrycnt = 0;
1845#endif
1846
c609719b
WD
1847 unitattn=ATAPI_UNIT_ATTN;
1848 notready=ATAPI_DRIVE_NOT_READY;
1849
1850retry:
1851 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1852 if (res==0)
1853 return (0); /* Ok */
1854
1855 if (res==0xFF)
1856 return (0xFF); /* error */
1857
1a344f29 1858 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
c609719b
WD
1859
1860 memset(sense_ccb,0,sizeof(sense_ccb));
1861 memset(sense_data,0,sizeof(sense_data));
1862 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
c7de829c 1863 sense_ccb[4]=18; /* allocation Length */
c609719b
WD
1864
1865 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1866 key=(sense_data[2]&0xF);
1867 asc=(sense_data[12]);
1868 ascq=(sense_data[13]);
1869
1a344f29
WD
1870 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1871 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
c609719b
WD
1872 sense_data[0],
1873 key,
1874 asc,
1875 ascq);
1876
1877 if((key==0))
1878 return 0; /* ok device ready */
1879
1880 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1881 if(unitattn-->0) {
1882 udelay(200*1000);
1883 goto retry;
1884 }
1885 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1886 goto error;
1887 }
1888 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1889 if (notready-->0) {
1890 udelay(200*1000);
1891 goto retry;
1892 }
1893 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1894 goto error;
1895 }
1896 if(asc==0x3a) {
1a344f29 1897 debug ("Media not present\n");
c609719b
WD
1898 goto error;
1899 }
c7de829c
WD
1900
1901#ifdef CONFIG_AMIGAONEG3SE
1902 if ((sense_data[2]&0xF)==0x0B) {
1a344f29 1903 debug ("ABORTED COMMAND...retry\n");
c7de829c
WD
1904 if (retrycnt++ < 4)
1905 goto retry;
1906 return (0xFF);
1907 }
1908
1909 if ((sense_data[2]&0xf) == 0x02 &&
1910 sense_data[12] == 0x04 &&
1911 sense_data[13] == 0x01 ) {
1a344f29 1912 debug ("Waiting for unit to become active\n");
c7de829c
WD
1913 udelay(timeout);
1914 if (retrycnt++ < 4)
1915 goto retry;
1916 return 0xFF;
1917 }
1918#endif /* CONFIG_AMIGAONEG3SE */
1919
c609719b
WD
1920 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1921error:
1a344f29 1922 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
c609719b
WD
1923 return (0xFF);
1924}
1925
1926
c609719b
WD
1927static void atapi_inquiry(block_dev_desc_t * dev_desc)
1928{
1929 unsigned char ccb[12]; /* Command descriptor block */
1930 unsigned char iobuf[64]; /* temp buf */
1931 unsigned char c;
1932 int device;
1933
1934 device=dev_desc->dev;
1935 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
1936 dev_desc->block_read=atapi_read;
1937
1938 memset(ccb,0,sizeof(ccb));
1939 memset(iobuf,0,sizeof(iobuf));
1940
1941 ccb[0]=ATAPI_CMD_INQUIRY;
1942 ccb[4]=40; /* allocation Legnth */
1943 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
1944
1a344f29 1945 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
c609719b
WD
1946 if (c!=0)
1947 return;
1948
1949 /* copy device ident strings */
7a60ee7c
JCPV
1950 ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
1951 ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
1952 ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
c609719b
WD
1953
1954 dev_desc->lun=0;
1955 dev_desc->lba=0;
1956 dev_desc->blksz=0;
1957 dev_desc->type=iobuf[0] & 0x1f;
1958
1959 if ((iobuf[1]&0x80)==0x80)
1960 dev_desc->removable = 1;
1961 else
1962 dev_desc->removable = 0;
1963
1964 memset(ccb,0,sizeof(ccb));
1965 memset(iobuf,0,sizeof(iobuf));
1966 ccb[0]=ATAPI_CMD_START_STOP;
1967 ccb[4]=0x03; /* start */
1968
1969 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1970
1a344f29 1971 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
c609719b
WD
1972 if (c!=0)
1973 return;
1974
1975 memset(ccb,0,sizeof(ccb));
1976 memset(iobuf,0,sizeof(iobuf));
1977 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1978
1a344f29 1979 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
c609719b
WD
1980 if (c!=0)
1981 return;
1982
1983 memset(ccb,0,sizeof(ccb));
1984 memset(iobuf,0,sizeof(iobuf));
1985 ccb[0]=ATAPI_CMD_READ_CAP;
1986 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
1a344f29 1987 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
c609719b
WD
1988 if (c!=0)
1989 return;
1990
1a344f29 1991 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
c609719b
WD
1992 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
1993 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
1994
1995 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
1996 ((unsigned long)iobuf[1]<<16) +
1997 ((unsigned long)iobuf[2]<< 8) +
1998 ((unsigned long)iobuf[3]);
1999 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
2000 ((unsigned long)iobuf[5]<<16) +
2001 ((unsigned long)iobuf[6]<< 8) +
2002 ((unsigned long)iobuf[7]);
42dfe7a1 2003#ifdef CONFIG_LBA48
c40b2956 2004 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
42dfe7a1 2005#endif
c609719b
WD
2006 return;
2007}
2008
2009
2010/*
2011 * atapi_read:
2012 * we transfer only one block per command, since the multiple DRQ per
2013 * command is not yet implemented
2014 */
2015#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
2016#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
2017#define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
2018
eb867a76 2019ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD
2020{
2021 ulong n = 0;
2022 unsigned char ccb[12]; /* Command descriptor block */
2023 ulong cnt;
2024
1a344f29 2025 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
c609719b
WD
2026 device, blknr, blkcnt, (ulong)buffer);
2027
2028 do {
2029 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
2030 cnt=ATAPI_READ_MAX_BLOCK;
2031 } else {
2032 cnt=blkcnt;
2033 }
2034 ccb[0]=ATAPI_CMD_READ_12;
2035 ccb[1]=0; /* reserved */
2036 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
2037 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
2038 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
2039 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
2040 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
2041 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
2042 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
2043 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
2044 ccb[10]=0; /* reserved */
2045 ccb[11]=0; /* reserved */
2046
2047 if (atapi_issue_autoreq(device,ccb,12,
2048 (unsigned char *)buffer,
2049 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
2050 return (n);
2051 }
2052 n+=cnt;
2053 blkcnt-=cnt;
2054 blknr+=cnt;
0b94504d 2055 buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
c609719b
WD
2056 } while (blkcnt > 0);
2057 return (n);
2058}
2059
2060/* ------------------------------------------------------------------------- */
2061
2062#endif /* CONFIG_ATAPI */
2063
0d498393
WD
2064U_BOOT_CMD(
2065 ide, 5, 1, do_ide,
8bde7f77
WD
2066 "ide - IDE sub-system\n",
2067 "reset - reset IDE controller\n"
2068 "ide info - show available IDE devices\n"
2069 "ide device [dev] - show or set current device\n"
2070 "ide part [dev] - print partition table of one or all IDE devices\n"
2071 "ide read addr blk# cnt\n"
2072 "ide write addr blk# cnt - read/write `cnt'"
2073 " blocks starting at block `blk#'\n"
2074 " to/from memory address `addr'\n"
2075);
2076
0d498393
WD
2077U_BOOT_CMD(
2078 diskboot, 3, 1, do_diskboot,
8bde7f77
WD
2079 "diskboot- boot from IDE device\n",
2080 "loadAddr dev:part\n"
2081);