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[new uImage] Define a API for image handling operations
[people/ms/u-boot.git] / common / cmd_ide.c
CommitLineData
c609719b 1/*
1a344f29 2 * (C) Copyright 2000-2005
c609719b
WD		 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * IDE support
27 */
28#include <common.h>
29#include <config.h>
30#include <watchdog.h>
31#include <command.h>
32#include <image.h>
33#include <asm/byteorder.h>
f98984cb 34#include <asm/io.h>
735dd97b 35
c609719b
WD		 36#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
37# include <pcmcia.h>
38#endif
735dd97b 39
c609719b
WD		 40#ifdef CONFIG_8xx
41# include <mpc8xx.h>
42#endif
735dd97b 43
132ba5fd
WD		 44#ifdef CONFIG_MPC5xxx
45#include <mpc5xxx.h>
46#endif
735dd97b 47
c609719b
WD		 48#include <ide.h>
49#include <ata.h>
735dd97b 50
c609719b
WD		 51#ifdef CONFIG_STATUS_LED
52# include <status_led.h>
53#endif
735dd97b 54
15647dc7 55#ifndef __PPC__
2262cfee
WD		 56#include <asm/io.h>
57#endif
c609719b 58
d87080b7
WD		 59#ifdef CONFIG_IDE_8xx_DIRECT
60DECLARE_GLOBAL_DATA_PTR;
61#endif
62
5cf91d6b
WD		 63#ifdef __PPC__
64# define EIEIO __asm__ volatile ("eieio")
1a344f29 65# define SYNC __asm__ volatile ("sync")
5cf91d6b
WD		 66#else
67# define EIEIO /* nothing */
1a344f29 68# define SYNC /* nothing */
c609719b
WD		 69#endif
70
15647dc7 71#ifdef CONFIG_IDE_8xx_DIRECT
c609719b
WD		 72/* Timings for IDE Interface
73 *
74 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
75 * 70 165 30 PIO-Mode 0, [ns]
76 * 4 9 2 [Cycles]
77 * 50 125 20 PIO-Mode 1, [ns]
78 * 3 7 2 [Cycles]
79 * 30 100 15 PIO-Mode 2, [ns]
80 * 2 6 1 [Cycles]
81 * 30 80 10 PIO-Mode 3, [ns]
82 * 2 5 1 [Cycles]
83 * 25 70 10 PIO-Mode 4, [ns]
84 * 2 4 1 [Cycles]
85 */
86
87const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
88{
89 /* Setup Length Hold */
90 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
91 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
92 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
93 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
94 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
95};
96
97static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
98
99#ifndef CFG_PIO_MODE
100#define CFG_PIO_MODE 0 /* use a relaxed default */
101#endif
102static int pio_mode = CFG_PIO_MODE;
103
104/* Make clock cycles and always round up */
105
106#define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
107
15647dc7
WD		 108#endif /* CONFIG_IDE_8xx_DIRECT */
109
c609719b
WD		 110/* ------------------------------------------------------------------------- */
111
112/* Current I/O Device */
113static int curr_device = -1;
114
115/* Current offset for IDE0 / IDE1 bus access */
116ulong ide_bus_offset[CFG_IDE_MAXBUS] = {
117#if defined(CFG_ATA_IDE0_OFFSET)
118 CFG_ATA_IDE0_OFFSET,
119#endif
120#if defined(CFG_ATA_IDE1_OFFSET) && (CFG_IDE_MAXBUS > 1)
121 CFG_ATA_IDE1_OFFSET,
122#endif
123};
124
15647dc7 125
c7de829c 126#ifndef CONFIG_AMIGAONEG3SE
1a344f29 127static int ide_bus_ok[CFG_IDE_MAXBUS];
c7de829c 128#else
1a344f29 129static int ide_bus_ok[CFG_IDE_MAXBUS] = {0,};
c7de829c 130#endif
c609719b 131
fa838874 132block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
c609719b
WD		 133/* ------------------------------------------------------------------------- */
134
135#ifdef CONFIG_IDE_LED
e2ffd59b 136#if !defined(CONFIG_KUP4K) && !defined(CONFIG_KUP4X) &&!defined(CONFIG_BMS2003) &&!defined(CONFIG_CPC45)
c609719b
WD		 137static void ide_led (uchar led, uchar status);
138#else
1f53a416
WD		 139extern void ide_led (uchar led, uchar status);
140#endif
141#else
c7de829c 142#ifndef CONFIG_AMIGAONEG3SE
c609719b 143#define ide_led(a,b) /* dummy */
c7de829c
WD		 144#else
145extern void ide_led(uchar led, uchar status);
146#define LED_IDE1 1
147#define LED_IDE2 2
148#define CONFIG_IDE_LED 1
149#define DEVICE_LED(x) 1
150#endif
c609719b
WD		 151#endif
152
153#ifdef CONFIG_IDE_RESET
154static void ide_reset (void);
155#else
156#define ide_reset() /* dummy */
157#endif
158
159static void ide_ident (block_dev_desc_t *dev_desc);
160static uchar ide_wait (int dev, ulong t);
161
162#define IDE_TIME_OUT 2000 /* 2 sec timeout */
163
164#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
165
166#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
167
f98984cb
HS		 168void inline ide_outb(int dev, int port, unsigned char val);
169unsigned char inline ide_inb(int dev, int port);
c609719b
WD		 170static void input_data(int dev, ulong *sect_buf, int words);
171static void output_data(int dev, ulong *sect_buf, int words);
172static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
173
566a494f
HS		 174#ifndef CFG_ATA_PORT_ADDR
175#define CFG_ATA_PORT_ADDR(port) (port)
176#endif
c609719b
WD		 177
178#ifdef CONFIG_ATAPI
179static void atapi_inquiry(block_dev_desc_t *dev_desc);
eb867a76 180ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
c609719b
WD		 181#endif
182
183
184#ifdef CONFIG_IDE_8xx_DIRECT
185static void set_pcmcia_timing (int pmode);
c609719b
WD		 186#endif
187
188/* ------------------------------------------------------------------------- */
189
190int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
191{
192 int rcode = 0;
193
194 switch (argc) {
195 case 0:
196 case 1:
197 printf ("Usage:\n%s\n", cmdtp->usage);
198 return 1;
199 case 2:
200 if (strncmp(argv[1],"res",3) == 0) {
201 puts ("\nReset IDE"
202#ifdef CONFIG_IDE_8xx_DIRECT
203 " on PCMCIA " PCMCIA_SLOT_MSG
204#endif
205 ": ");
206
207 ide_init ();
208 return 0;
209 } else if (strncmp(argv[1],"inf",3) == 0) {
210 int i;
211
212 putc ('\n');
213
214 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
215 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
216 continue; /* list only known devices */
217 printf ("IDE device %d: ", i);
218 dev_print(&ide_dev_desc[i]);
219 }
220 return 0;
221
222 } else if (strncmp(argv[1],"dev",3) == 0) {
223 if ((curr_device < 0) || (curr_device >= CFG_IDE_MAXDEVICE)) {
224 puts ("\nno IDE devices available\n");
225 return 1;
226 }
227 printf ("\nIDE device %d: ", curr_device);
228 dev_print(&ide_dev_desc[curr_device]);
229 return 0;
230 } else if (strncmp(argv[1],"part",4) == 0) {
231 int dev, ok;
232
233 for (ok=0, dev=0; dev<CFG_IDE_MAXDEVICE; ++dev) {
234 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
235 ++ok;
236 if (dev)
237 putc ('\n');
238 print_part(&ide_dev_desc[dev]);
239 }
240 }
241 if (!ok) {
242 puts ("\nno IDE devices available\n");
243 rcode ++;
244 }
245 return rcode;
246 }
247 printf ("Usage:\n%s\n", cmdtp->usage);
248 return 1;
249 case 3:
250 if (strncmp(argv[1],"dev",3) == 0) {
251 int dev = (int)simple_strtoul(argv[2], NULL, 10);
252
253 printf ("\nIDE device %d: ", dev);
254 if (dev >= CFG_IDE_MAXDEVICE) {
255 puts ("unknown device\n");
256 return 1;
257 }
258 dev_print(&ide_dev_desc[dev]);
259 /*ide_print (dev);*/
260
261 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
262 return 1;
263 }
264
265 curr_device = dev;
266
267 puts ("... is now current device\n");
268
269 return 0;
270 } else if (strncmp(argv[1],"part",4) == 0) {
271 int dev = (int)simple_strtoul(argv[2], NULL, 10);
272
273 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
274 print_part(&ide_dev_desc[dev]);
275 } else {
276 printf ("\nIDE device %d not available\n", dev);
277 rcode = 1;
278 }
279 return rcode;
280#if 0
281 } else if (strncmp(argv[1],"pio",4) == 0) {
282 int mode = (int)simple_strtoul(argv[2], NULL, 10);
283
284 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
285 puts ("\nSetting ");
286 pio_mode = mode;
287 ide_init ();
288 } else {
289 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
290 mode, IDE_MAX_PIO_MODE);
291 }
292 return;
293#endif
294 }
295
296 printf ("Usage:\n%s\n", cmdtp->usage);
297 return 1;
298 default:
299 /* at least 4 args */
300
301 if (strcmp(argv[1],"read") == 0) {
302 ulong addr = simple_strtoul(argv[2], NULL, 16);
c609719b
WD		 303 ulong cnt = simple_strtoul(argv[4], NULL, 16);
304 ulong n;
42dfe7a1
WD		 305#ifdef CFG_64BIT_STRTOUL
306 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 307
c40b2956 308 printf ("\nIDE read: device %d block # %qd, count %ld ... ",
c609719b 309 curr_device, blk, cnt);
42dfe7a1
WD		 310#else
311 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
312
313 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
314 curr_device, blk, cnt);
315#endif
c609719b
WD		 316
317 n = ide_dev_desc[curr_device].block_read (curr_device,
318 blk, cnt,
319 (ulong *)addr);
320 /* flush cache after read */
321 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
322
323 printf ("%ld blocks read: %s\n",
324 n, (n==cnt) ? "OK" : "ERROR");
325 if (n==cnt) {
326 return 0;
327 } else {
328 return 1;
329 }
330 } else if (strcmp(argv[1],"write") == 0) {
331 ulong addr = simple_strtoul(argv[2], NULL, 16);
c609719b
WD		 332 ulong cnt = simple_strtoul(argv[4], NULL, 16);
333 ulong n;
42dfe7a1
WD		 334#ifdef CFG_64BIT_STRTOUL
335 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 336
c40b2956 337 printf ("\nIDE write: device %d block # %qd, count %ld ... ",
c609719b 338 curr_device, blk, cnt);
42dfe7a1
WD		 339#else
340 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
341
342 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
343 curr_device, blk, cnt);
344#endif
c609719b
WD		 345
346 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
347
348 printf ("%ld blocks written: %s\n",
349 n, (n==cnt) ? "OK" : "ERROR");
350 if (n==cnt) {
351 return 0;
352 } else {
353 return 1;
354 }
355 } else {
356 printf ("Usage:\n%s\n", cmdtp->usage);
357 rcode = 1;
358 }
359
360 return rcode;
361 }
362}
363
364int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
365{
366 char *boot_device = NULL;
367 char *ep;
368 int dev, part = 0;
b97a2a0a 369 ulong addr, cnt;
c609719b
WD		 370 disk_partition_t info;
371 image_header_t *hdr;
372 int rcode = 0;
373
fad63407 374 show_boot_progress (41);
c609719b
WD		 375 switch (argc) {
376 case 1:
377 addr = CFG_LOAD_ADDR;
378 boot_device = getenv ("bootdevice");
379 break;
380 case 2:
381 addr = simple_strtoul(argv[1], NULL, 16);
382 boot_device = getenv ("bootdevice");
383 break;
384 case 3:
385 addr = simple_strtoul(argv[1], NULL, 16);
386 boot_device = argv[2];
387 break;
388 default:
389 printf ("Usage:\n%s\n", cmdtp->usage);
fad63407 390 show_boot_progress (-42);
c609719b
WD		 391 return 1;
392 }
fad63407 393 show_boot_progress (42);
c609719b
WD		 394
395 if (!boot_device) {
396 puts ("\n** No boot device **\n");
fad63407 397 show_boot_progress (-43);
c609719b
WD		 398 return 1;
399 }
fad63407 400 show_boot_progress (43);
c609719b
WD		 401
402 dev = simple_strtoul(boot_device, &ep, 16);
403
404 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
405 printf ("\n** Device %d not available\n", dev);
fad63407 406 show_boot_progress (-44);
c609719b
WD		 407 return 1;
408 }
fad63407 409 show_boot_progress (44);
c609719b
WD		 410
411 if (*ep) {
412 if (*ep != ':') {
413 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
fad63407 414 show_boot_progress (-45);
c609719b
WD		 415 return 1;
416 }
417 part = simple_strtoul(++ep, NULL, 16);
418 }
fad63407 419 show_boot_progress (45);
7882751c 420 if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
fad63407 421 show_boot_progress (-46);
c609719b
WD		 422 return 1;
423 }
fad63407 424 show_boot_progress (46);
77ddac94
WD		 425 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
426 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
c609719b
WD		 427 printf ("\n** Invalid partition type \"%.32s\""
428 " (expect \"" BOOT_PART_TYPE "\")\n",
429 info.type);
fad63407 430 show_boot_progress (-47);
c609719b
WD		 431 return 1;
432 }
fad63407 433 show_boot_progress (47);
c609719b
WD		 434
435 printf ("\nLoading from IDE device %d, partition %d: "
436 "Name: %.32s Type: %.32s\n",
437 dev, part, info.name, info.type);
438
1a344f29 439 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
c609719b
WD		 440 info.start, info.size, info.blksz);
441
442 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
443 printf ("** Read error on %d:%d\n", dev, part);
fad63407 444 show_boot_progress (-48);
c609719b
WD		 445 return 1;
446 }
fad63407 447 show_boot_progress (48);
c609719b
WD		 448
449 hdr = (image_header_t *)addr;
450
b97a2a0a 451 if (!image_check_magic (hdr)) {
c609719b 452 printf("\n** Bad Magic Number **\n");
fad63407 453 show_boot_progress (-49);
c609719b
WD		 454 return 1;
455 }
fad63407 456 show_boot_progress (49);
c609719b 457
b97a2a0a 458 if (!image_check_hcrc (hdr)) {
1a344f29 459 puts ("\n** Bad Header Checksum **\n");
fad63407 460 show_boot_progress (-50);
1a344f29
WD		 461 return 1;
462 }
fad63407 463 show_boot_progress (50);
1a344f29
WD		 464
465 print_image_hdr (hdr);
466
b97a2a0a 467 cnt = image_get_image_size (hdr);
1a344f29
WD		 468 cnt += info.blksz - 1;
469 cnt /= info.blksz;
470 cnt -= 1;
471
c609719b
WD		 472 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
473 (ulong *)(addr+info.blksz)) != cnt) {
474 printf ("** Read error on %d:%d\n", dev, part);
fad63407 475 show_boot_progress (-51);
c609719b
WD		 476 return 1;
477 }
fad63407 478 show_boot_progress (51);
c609719b
WD		 479
480
481 /* Loading ok, update default load address */
482
483 load_addr = addr;
484
485 /* Check if we should attempt an auto-start */
486 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
487 char *local_args[2];
488 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
489
490 local_args[0] = argv[0];
491 local_args[1] = NULL;
492
493 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
494
495 do_bootm (cmdtp, 0, 1, local_args);
496 rcode = 1;
497 }
498 return rcode;
499}
500
501/* ------------------------------------------------------------------------- */
502
503void ide_init (void)
504{
c609719b
WD		 505
506#ifdef CONFIG_IDE_8xx_DIRECT
507 volatile immap_t *immr = (immap_t *)CFG_IMMR;
508 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
509#endif
510 unsigned char c;
511 int i, bus;
51056dd9 512#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
9045f33c
WD		 513 unsigned int ata_reset_time = ATA_RESET_TIME;
514 char *s;
51056dd9 515#endif
c7de829c
WD		 516#ifdef CONFIG_AMIGAONEG3SE
517 unsigned int max_bus_scan;
c7de829c 518#endif
9fd5e31f
WD		 519#ifdef CONFIG_IDE_8xx_PCCARD
520 extern int pcmcia_on (void);
521 extern int ide_devices_found; /* Initialized in check_ide_device() */
522#endif /* CONFIG_IDE_8xx_PCCARD */
523
524#ifdef CONFIG_IDE_PREINIT
4d13cbad 525 extern int ide_preinit (void);
9fd5e31f
WD		 526 WATCHDOG_RESET();
527
528 if (ide_preinit ()) {
529 puts ("ide_preinit failed\n");
530 return;
531 }
532#endif /* CONFIG_IDE_PREINIT */
c609719b
WD		 533
534#ifdef CONFIG_IDE_8xx_PCCARD
535 extern int pcmcia_on (void);
6069ff26 536 extern int ide_devices_found; /* Initialized in check_ide_device() */
c609719b
WD		 537
538 WATCHDOG_RESET();
539
6069ff26 540 ide_devices_found = 0;
c609719b 541 /* initialize the PCMCIA IDE adapter card */
6069ff26
WD		 542 pcmcia_on();
543 if (!ide_devices_found)
c609719b
WD		 544 return;
545 udelay (1000000); /* 1 s */
546#endif /* CONFIG_IDE_8xx_PCCARD */
547
548 WATCHDOG_RESET();
549
15647dc7 550#ifdef CONFIG_IDE_8xx_DIRECT
c609719b
WD		 551 /* Initialize PIO timing tables */
552 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
1a344f29
WD		 553 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
554 gd->bus_clk);
555 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
556 gd->bus_clk);
557 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
558 gd->bus_clk);
559 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
560 " len=%3d ns/%d clk"
561 " hold=%2d ns/%d clk\n",
562 i,
563 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
564 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
565 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
c609719b 566 }
15647dc7 567#endif /* CONFIG_IDE_8xx_DIRECT */
c609719b
WD		 568
569 /* Reset the IDE just to be sure.
570 * Light LED's to show
571 */
572 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
573 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
574
575#ifdef CONFIG_IDE_8xx_DIRECT
576 /* PCMCIA / IDE initialization for common mem space */
577 pcmp->pcmc_pgcrb = 0;
c609719b
WD		 578
579 /* start in PIO mode 0 - most relaxed timings */
580 pio_mode = 0;
581 set_pcmcia_timing (pio_mode);
15647dc7 582#endif /* CONFIG_IDE_8xx_DIRECT */
c609719b
WD		 583
584 /*
585 * Wait for IDE to get ready.
586 * According to spec, this can take up to 31 seconds!
587 */
c7de829c 588#ifndef CONFIG_AMIGAONEG3SE
c609719b
WD		 589 for (bus=0; bus<CFG_IDE_MAXBUS; ++bus) {
590 int dev = bus * (CFG_IDE_MAXDEVICE / CFG_IDE_MAXBUS);
c7de829c
WD		 591#else
592 s = getenv("ide_maxbus");
593 if (s)
1a344f29 594 max_bus_scan = simple_strtol(s, NULL, 10);
c7de829c 595 else
1a344f29 596 max_bus_scan = CFG_IDE_MAXBUS;
c7de829c
WD		 597
598 for (bus=0; bus<max_bus_scan; ++bus) {
599 int dev = bus * (CFG_IDE_MAXDEVICE / max_bus_scan);
600#endif
c609719b 601
6069ff26
WD		 602#ifdef CONFIG_IDE_8xx_PCCARD
603 /* Skip non-ide devices from probing */
604 if ((ide_devices_found & (1 << bus)) == 0) {
605 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
606 continue;
607 }
608#endif
c609719b
WD		 609 printf ("Bus %d: ", bus);
610
611 ide_bus_ok[bus] = 0;
612
613 /* Select device
614 */
615 udelay (100000); /* 100 ms */
2262cfee 616 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
c609719b 617 udelay (100000); /* 100 ms */
51056dd9
WD		 618#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
619 if ((s = getenv("ide_reset_timeout")) != NULL)
620 ata_reset_time = simple_strtol(s, NULL, 10);
c7de829c 621#endif
c609719b
WD		 622 i = 0;
623 do {
624 udelay (10000); /* 10 ms */
625
2262cfee 626 c = ide_inb (dev, ATA_STATUS);
c609719b 627 i++;
51056dd9 628#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
c7de829c
WD		 629 if (i > (ata_reset_time * 100)) {
630#else
c609719b 631 if (i > (ATA_RESET_TIME * 100)) {
c7de829c 632#endif
c609719b
WD		 633 puts ("** Timeout **\n");
634 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
c7de829c
WD		 635#ifdef CONFIG_AMIGAONEG3SE
636 /* If this is the second bus, the first one was OK */
c40b2956 637 if (bus != 0) {
1a344f29
WD		 638 ide_bus_ok[bus] = 0;
639 goto skip_bus;
c7de829c
WD		 640 }
641#endif
c609719b
WD		 642 return;
643 }
644 if ((i >= 100) && ((i%100)==0)) {
645 putc ('.');
646 }
647 } while (c & ATA_STAT_BUSY);
648
649 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
650 puts ("not available ");
1a344f29 651 debug ("Status = 0x%02X ", c);
c609719b
WD		 652#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
653 } else if ((c & ATA_STAT_READY) == 0) {
654 puts ("not available ");
1a344f29 655 debug ("Status = 0x%02X ", c);
c609719b
WD		 656#endif
657 } else {
658 puts ("OK ");
659 ide_bus_ok[bus] = 1;
660 }
661 WATCHDOG_RESET();
662 }
c7de829c
WD		 663
664#ifdef CONFIG_AMIGAONEG3SE
665 skip_bus:
666#endif
c609719b
WD		 667 putc ('\n');
668
669 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
670
671 curr_device = -1;
672 for (i=0; i<CFG_IDE_MAXDEVICE; ++i) {
673#ifdef CONFIG_IDE_LED
674 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
675#endif
5cf9da48 676 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
c609719b
WD		 677 ide_dev_desc[i].if_type=IF_TYPE_IDE;
678 ide_dev_desc[i].dev=i;
679 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
680 ide_dev_desc[i].blksz=0;
681 ide_dev_desc[i].lba=0;
682 ide_dev_desc[i].block_read=ide_read;
683 if (!ide_bus_ok[IDE_BUS(i)])
684 continue;
685 ide_led (led, 1); /* LED on */
686 ide_ident(&ide_dev_desc[i]);
687 ide_led (led, 0); /* LED off */
688 dev_print(&ide_dev_desc[i]);
689/* ide_print (i); */
690 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
691 init_part (&ide_dev_desc[i]); /* initialize partition type */
692 if (curr_device < 0)
693 curr_device = i;
694 }
695 }
696 WATCHDOG_RESET();
697}
698
699/* ------------------------------------------------------------------------- */
700
701block_dev_desc_t * ide_get_dev(int dev)
702{
735dd97b 703 return (dev < CFG_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
c609719b
WD		 704}
705
706
707#ifdef CONFIG_IDE_8xx_DIRECT
708
709static void
710set_pcmcia_timing (int pmode)
711{
712 volatile immap_t *immr = (immap_t *)CFG_IMMR;
713 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
714 ulong timings;
715
1a344f29 716 debug ("Set timing for PIO Mode %d\n", pmode);
c609719b
WD		 717
718 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
719 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
720 | PCMCIA_SL (pio_config_clk[pmode].t_length)
721 ;
722
723 /* IDE 0
724 */
725 pcmp->pcmc_pbr0 = CFG_PCMCIA_PBR0;
726 pcmp->pcmc_por0 = CFG_PCMCIA_POR0
727#if (CFG_PCMCIA_POR0 != 0)
728 | timings
729#endif
730 ;
1a344f29 731 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
c609719b
WD		 732
733 pcmp->pcmc_pbr1 = CFG_PCMCIA_PBR1;
734 pcmp->pcmc_por1 = CFG_PCMCIA_POR1
735#if (CFG_PCMCIA_POR1 != 0)
736 | timings
737#endif
738 ;
1a344f29 739 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
c609719b
WD		 740
741 pcmp->pcmc_pbr2 = CFG_PCMCIA_PBR2;
742 pcmp->pcmc_por2 = CFG_PCMCIA_POR2
743#if (CFG_PCMCIA_POR2 != 0)
744 | timings
745#endif
746 ;
1a344f29 747 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
c609719b
WD		 748
749 pcmp->pcmc_pbr3 = CFG_PCMCIA_PBR3;
750 pcmp->pcmc_por3 = CFG_PCMCIA_POR3
751#if (CFG_PCMCIA_POR3 != 0)
752 | timings
753#endif
754 ;
1a344f29 755 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
c609719b
WD		 756
757 /* IDE 1
758 */
759 pcmp->pcmc_pbr4 = CFG_PCMCIA_PBR4;
760 pcmp->pcmc_por4 = CFG_PCMCIA_POR4
761#if (CFG_PCMCIA_POR4 != 0)
762 | timings
763#endif
764 ;
1a344f29 765 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
c609719b
WD		 766
767 pcmp->pcmc_pbr5 = CFG_PCMCIA_PBR5;
768 pcmp->pcmc_por5 = CFG_PCMCIA_POR5
769#if (CFG_PCMCIA_POR5 != 0)
770 | timings
771#endif
772 ;
1a344f29 773 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
c609719b
WD		 774
775 pcmp->pcmc_pbr6 = CFG_PCMCIA_PBR6;
776 pcmp->pcmc_por6 = CFG_PCMCIA_POR6
777#if (CFG_PCMCIA_POR6 != 0)
778 | timings
779#endif
780 ;
1a344f29 781 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
c609719b
WD		 782
783 pcmp->pcmc_pbr7 = CFG_PCMCIA_PBR7;
784 pcmp->pcmc_por7 = CFG_PCMCIA_POR7
785#if (CFG_PCMCIA_POR7 != 0)
786 | timings
787#endif
788 ;
1a344f29 789 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
c609719b
WD		 790
791}
792
793#endif /* CONFIG_IDE_8xx_DIRECT */
794
795/* ------------------------------------------------------------------------- */
796
f98984cb
HS		 797void inline
798__ide_outb(int dev, int port, unsigned char val)
c609719b 799{
1a344f29 800 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
f98984cb
HS		 801 dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
802 outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
2262cfee 803}
f98984cb
HS		 804void inline ide_outb (int dev, int port, unsigned char val)
805 __attribute__((weak, alias("__ide_outb")));
c609719b 806
f98984cb
HS		 807unsigned char inline
808__ide_inb(int dev, int port)
c609719b
WD		 809{
810 uchar val;
f98984cb 811 val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
1a344f29 812 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
f98984cb
HS		 813 dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val);
814 return val;
2262cfee 815}
f98984cb
HS		 816unsigned char inline ide_inb(int dev, int port)
817 __attribute__((weak, alias("__ide_inb")));
c609719b 818
2262cfee 819#ifdef __PPC__
cceb871f 820# ifdef CONFIG_AMIGAONEG3SE
c7de829c
WD		 821static void
822output_data_short(int dev, ulong *sect_buf, int words)
823{
824 ushort *dbuf;
825 volatile ushort *pbuf;
8bde7f77 826
c7de829c
WD		 827 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
828 dbuf = (ushort *)sect_buf;
829 while (words--) {
5cf91d6b 830 EIEIO;
c7de829c 831 *pbuf = *dbuf++;
5cf91d6b 832 EIEIO;
c7de829c
WD		 833 }
834
835 if (words&1)
1a344f29 836 *pbuf = 0;
c7de829c 837}
cceb871f 838# endif /* CONFIG_AMIGAONEG3SE */
5da627a4 839#endif /* __PPC_ */
c7de829c 840
5da627a4
WD		 841/* We only need to swap data if we are running on a big endian cpu. */
842/* But Au1x00 cpu:s already swaps data in big endian mode! */
0c32d96d 843#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
5da627a4
WD		 844#define input_swap_data(x,y,z) input_data(x,y,z)
845#else
c609719b
WD		 846static void
847input_swap_data(int dev, ulong *sect_buf, int words)
848{
1a344f29 849#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD		 850 uchar i;
851 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
852 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
853 ushort *dbuf = (ushort *)sect_buf;
854
855 while (words--) {
856 for (i=0; i<2; i++) {
857 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
858 *(uchar *)dbuf = *pbuf_odd;
859 dbuf+=1;
860 }
861 }
f4733a07 862#else
1a344f29
WD		 863 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
864 ushort *dbuf = (ushort *)sect_buf;
865
866 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
867
868 while (words--) {
0c32d96d
WD		 869#ifdef __MIPS__
870 *dbuf++ = swab16p((u16*)pbuf);
871 *dbuf++ = swab16p((u16*)pbuf);
566a494f
HS		 872#elif defined(CONFIG_PCS440EP)
873 *dbuf++ = *pbuf;
874 *dbuf++ = *pbuf;
0c32d96d 875#else
1a344f29
WD		 876 *dbuf++ = ld_le16(pbuf);
877 *dbuf++ = ld_le16(pbuf);
0c32d96d 878#endif /* !MIPS */
1a344f29
WD		 879 }
880#endif
c609719b 881}
5da627a4 882#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
2262cfee
WD		 883
884
eda3e1e6 885#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
c609719b
WD		 886static void
887output_data(int dev, ulong *sect_buf, int words)
888{
1a344f29 889#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD		 890 uchar *dbuf;
891 volatile uchar *pbuf_even;
892 volatile uchar *pbuf_odd;
893
894 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
895 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
896 dbuf = (uchar *)sect_buf;
897 while (words--) {
5cf91d6b 898 EIEIO;
a522fa0e 899 *pbuf_even = *dbuf++;
5cf91d6b 900 EIEIO;
a522fa0e 901 *pbuf_odd = *dbuf++;
5cf91d6b 902 EIEIO;
a522fa0e 903 *pbuf_even = *dbuf++;
5cf91d6b 904 EIEIO;
a522fa0e
WD		 905 *pbuf_odd = *dbuf++;
906 }
1a344f29
WD		 907#else
908 ushort *dbuf;
909 volatile ushort *pbuf;
910
911 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
912 dbuf = (ushort *)sect_buf;
913 while (words--) {
566a494f
HS		 914#if defined(CONFIG_PCS440EP)
915 /* not tested, because CF was write protected */
916 EIEIO;
917 *pbuf = ld_le16(dbuf++);
918 EIEIO;
919 *pbuf = ld_le16(dbuf++);
920#else
1a344f29
WD		 921 EIEIO;
922 *pbuf = *dbuf++;
923 EIEIO;
924 *pbuf = *dbuf++;
566a494f 925#endif
1a344f29
WD		 926 }
927#endif
c609719b 928}
2262cfee
WD		 929#else /* ! __PPC__ */
930static void
931output_data(int dev, ulong *sect_buf, int words)
932{
15647dc7 933 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
2262cfee
WD		 934}
935#endif /* __PPC__ */
c609719b 936
eda3e1e6 937#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
c609719b
WD		 938static void
939input_data(int dev, ulong *sect_buf, int words)
940{
1a344f29 941#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD		 942 uchar *dbuf;
943 volatile uchar *pbuf_even;
944 volatile uchar *pbuf_odd;
945
946 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
947 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
948 dbuf = (uchar *)sect_buf;
949 while (words--) {
1a344f29 950 *dbuf++ = *pbuf_even;
cd172b71 951 EIEIO;
1a344f29
WD		 952 SYNC;
953 *dbuf++ = *pbuf_odd;
5cf91d6b 954 EIEIO;
1a344f29 955 SYNC;
a522fa0e 956 *dbuf++ = *pbuf_even;
5cf91d6b 957 EIEIO;
1a344f29 958 SYNC;
a522fa0e 959 *dbuf++ = *pbuf_odd;
5cf91d6b 960 EIEIO;
1a344f29
WD		 961 SYNC;
962 }
963#else
964 ushort *dbuf;
965 volatile ushort *pbuf;
966
967 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
968 dbuf = (ushort *)sect_buf;
969
970 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
971
972 while (words--) {
566a494f
HS		 973#if defined(CONFIG_PCS440EP)
974 EIEIO;
975 *dbuf++ = ld_le16(pbuf);
976 EIEIO;
977 *dbuf++ = ld_le16(pbuf);
978#else
cd172b71 979 EIEIO;
1a344f29 980 *dbuf++ = *pbuf;
cd172b71 981 EIEIO;
1a344f29 982 *dbuf++ = *pbuf;
566a494f 983#endif
a522fa0e 984 }
1a344f29 985#endif
c609719b 986}
2262cfee
WD		 987#else /* ! __PPC__ */
988static void
989input_data(int dev, ulong *sect_buf, int words)
990{
15647dc7 991 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
2262cfee
WD		 992}
993
994#endif /* __PPC__ */
c609719b 995
c7de829c
WD		 996#ifdef CONFIG_AMIGAONEG3SE
997static void
998input_data_short(int dev, ulong *sect_buf, int words)
999{
1000 ushort *dbuf;
1001 volatile ushort *pbuf;
1002
1003 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1004 dbuf = (ushort *)sect_buf;
1005 while (words--) {
5cf91d6b 1006 EIEIO;
c7de829c 1007 *dbuf++ = *pbuf;
5cf91d6b 1008 EIEIO;
c7de829c
WD		 1009 }
1010
c40b2956 1011 if (words&1) {
1a344f29
WD		 1012 ushort dummy;
1013 dummy = *pbuf;
c7de829c
WD		 1014 }
1015}
1016#endif
1017
c609719b
WD		 1018/* -------------------------------------------------------------------------
1019 */
1020static void ide_ident (block_dev_desc_t *dev_desc)
1021{
1022 ulong iobuf[ATA_SECTORWORDS];
1023 unsigned char c;
1024 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
1025
c7de829c
WD		 1026#ifdef CONFIG_AMIGAONEG3SE
1027 int max_bus_scan;
c7de829c 1028 char *s;
64f70bed
WD		 1029#endif
1030#ifdef CONFIG_ATAPI
1031 int retries = 0;
c7de829c
WD		 1032 int do_retry = 0;
1033#endif
1034
c609719b
WD		 1035#if 0
1036 int mode, cycle_time;
1037#endif
1038 int device;
1039 device=dev_desc->dev;
1040 printf (" Device %d: ", device);
1041
c7de829c
WD		 1042#ifdef CONFIG_AMIGAONEG3SE
1043 s = getenv("ide_maxbus");
1044 if (s) {
1045 max_bus_scan = simple_strtol(s, NULL, 10);
1046 } else {
1047 max_bus_scan = CFG_IDE_MAXBUS;
1048 }
1049 if (device >= max_bus_scan*2) {
1050 dev_desc->type=DEV_TYPE_UNKNOWN;
1051 return;
1052 }
1053#endif
1054
c609719b
WD		 1055 ide_led (DEVICE_LED(device), 1); /* LED on */
1056 /* Select device
1057 */
2262cfee 1058 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD		 1059 dev_desc->if_type=IF_TYPE_IDE;
1060#ifdef CONFIG_ATAPI
c7de829c 1061
c7de829c
WD		 1062 do_retry = 0;
1063 retries = 0;
1064
1065 /* Warning: This will be tricky to read */
c40b2956 1066 while (retries <= 1) {
c609719b 1067 /* check signature */
2262cfee
WD		 1068 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
1069 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1070 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1071 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
c609719b
WD		 1072 /* ATAPI Signature found */
1073 dev_desc->if_type=IF_TYPE_ATAPI;
1074 /* Start Ident Command
1075 */
2262cfee 1076 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
c609719b
WD		 1077 /*
1078 * Wait for completion - ATAPI devices need more time
1079 * to become ready
1080 */
1081 c = ide_wait (device, ATAPI_TIME_OUT);
c40b2956 1082 } else
c609719b
WD		 1083#endif
1084 {
1085 /* Start Ident Command
1086 */
2262cfee 1087 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
c609719b
WD		 1088
1089 /* Wait for completion
1090 */
1091 c = ide_wait (device, IDE_TIME_OUT);
1092 }
1093 ide_led (DEVICE_LED(device), 0); /* LED off */
1094
1095 if (((c & ATA_STAT_DRQ) == 0) ||
1096 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
64f70bed 1097#ifdef CONFIG_ATAPI
c7de829c 1098#ifdef CONFIG_AMIGAONEG3SE
64f70bed
WD		 1099 s = getenv("ide_doreset");
1100 if (s && strcmp(s, "on") == 0)
1101#endif
1a344f29
WD		 1102 {
1103 /* Need to soft reset the device in case it's an ATAPI... */
1104 debug ("Retrying...\n");
1105 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1106 udelay(100000);
1107 ide_outb (device, ATA_COMMAND, 0x08);
1108 udelay (500000); /* 500 ms */
1109 }
64f70bed
WD		 1110 /* Select device
1111 */
c7de829c 1112 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c7de829c 1113 retries++;
64f70bed
WD		 1114#else
1115 return;
1116#endif
c609719b 1117 }
64f70bed
WD		 1118#ifdef CONFIG_ATAPI
1119 else
1120 break;
c7de829c 1121 } /* see above - ugly to read */
64f70bed
WD		 1122
1123 if (retries == 2) /* Not found */
1124 return;
1125#endif
c609719b
WD		 1126
1127 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1128
7a60ee7c
JCPV		 1129 ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1130 ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1131 ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
c3f9d493
WD		 1132#ifdef __LITTLE_ENDIAN
1133 /*
1134 * firmware revision and model number have Big Endian Byte
1135 * order in Word. Convert both to little endian.
1136 *
1137 * See CF+ and CompactFlash Specification Revision 2.0:
1138 * 6.2.1.6: Identfy Drive, Table 39 for more details
1139 */
1140
1141 strswab (dev_desc->revision);
1142 strswab (dev_desc->vendor);
1143#endif /* __LITTLE_ENDIAN */
c609719b
WD		 1144
1145 if ((iop->config & 0x0080)==0x0080)
1146 dev_desc->removable = 1;
1147 else
1148 dev_desc->removable = 0;
1149
1150#if 0
1151 /*
1152 * Drive PIO mode autoselection
1153 */
1154 mode = iop->tPIO;
1155
1156 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1157 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1158 mode = 2;
1a344f29 1159 debug ("Override tPIO -> 2\n");
c609719b
WD		 1160 }
1161 if (iop->field_valid & 2) { /* drive implements ATA2? */
1a344f29 1162 debug ("Drive implements ATA2\n");
c609719b
WD		 1163 if (iop->capability & 8) { /* drive supports use_iordy? */
1164 cycle_time = iop->eide_pio_iordy;
1165 } else {
1166 cycle_time = iop->eide_pio;
1167 }
1a344f29 1168 debug ("cycle time = %d\n", cycle_time);
c609719b
WD		 1169 mode = 4;
1170 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1171 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1172 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1173 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1174 }
1175 printf ("PIO mode to use: PIO %d\n", mode);
1176#endif /* 0 */
1177
1178#ifdef CONFIG_ATAPI
1179 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1180 atapi_inquiry(dev_desc);
1181 return;
1182 }
1183#endif /* CONFIG_ATAPI */
1184
c3f9d493 1185#ifdef __BIG_ENDIAN
c609719b
WD		 1186 /* swap shorts */
1187 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
c3f9d493
WD		 1188#else /* ! __BIG_ENDIAN */
1189 /*
1190 * do not swap shorts on little endian
1191 *
1192 * See CF+ and CompactFlash Specification Revision 2.0:
1193 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1194 */
1195 dev_desc->lba = iop->lba_capacity;
1196#endif /* __BIG_ENDIAN */
c40b2956 1197
42dfe7a1 1198#ifdef CONFIG_LBA48
c40b2956 1199 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
6e592385
WD		 1200 dev_desc->lba48 = 1;
1201 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
c40b2956
WD		 1202 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1203 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1204 ((unsigned long long)iop->lba48_capacity[3] << 48);
1205 } else {
c40b2956
WD		 1206 dev_desc->lba48 = 0;
1207 }
1208#endif /* CONFIG_LBA48 */
c609719b
WD		 1209 /* assuming HD */
1210 dev_desc->type=DEV_TYPE_HARDDISK;
1211 dev_desc->blksz=ATA_BLOCKSIZE;
1212 dev_desc->lun=0; /* just to fill something in... */
1213
1214#if 0 /* only used to test the powersaving mode,
1215 * if enabled, the drive goes after 5 sec
1216 * in standby mode */
2262cfee 1217 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b 1218 c = ide_wait (device, IDE_TIME_OUT);
2262cfee
WD		 1219 ide_outb (device, ATA_SECT_CNT, 1);
1220 ide_outb (device, ATA_LBA_LOW, 0);
1221 ide_outb (device, ATA_LBA_MID, 0);
1222 ide_outb (device, ATA_LBA_HIGH, 0);
1a344f29 1223 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
2262cfee 1224 ide_outb (device, ATA_COMMAND, 0xe3);
c609719b
WD		 1225 udelay (50);
1226 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1227#endif
1228}
1229
1230
1231/* ------------------------------------------------------------------------- */
1232
eb867a76 1233ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD		 1234{
1235 ulong n = 0;
1236 unsigned char c;
1237 unsigned char pwrsave=0; /* power save */
42dfe7a1 1238#ifdef CONFIG_LBA48
c40b2956 1239 unsigned char lba48 = 0;
c609719b 1240
c40b2956
WD		 1241 if (blknr & 0x0000fffff0000000) {
1242 /* more than 28 bits used, use 48bit mode */
1243 lba48 = 1;
1244 }
1245#endif
1a344f29 1246 debug ("ide_read dev %d start %qX, blocks %lX buffer at %lX\n",
c609719b
WD		 1247 device, blknr, blkcnt, (ulong)buffer);
1248
1249 ide_led (DEVICE_LED(device), 1); /* LED on */
1250
1251 /* Select device
1252 */
2262cfee 1253 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD		 1254 c = ide_wait (device, IDE_TIME_OUT);
1255
1256 if (c & ATA_STAT_BUSY) {
1257 printf ("IDE read: device %d not ready\n", device);
1258 goto IDE_READ_E;
1259 }
1260
1261 /* first check if the drive is in Powersaving mode, if yes,
1262 * increase the timeout value */
2262cfee 1263 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
c609719b
WD		 1264 udelay (50);
1265
1266 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1267
1268 if (c & ATA_STAT_BUSY) {
1269 printf ("IDE read: device %d not ready\n", device);
1270 goto IDE_READ_E;
1271 }
1272 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1273 printf ("No Powersaving mode %X\n", c);
1274 } else {
2262cfee 1275 c = ide_inb(device,ATA_SECT_CNT);
1a344f29 1276 debug ("Powersaving %02X\n",c);
c609719b
WD		 1277 if(c==0)
1278 pwrsave=1;
1279 }
1280
1281
1282 while (blkcnt-- > 0) {
1283
1284 c = ide_wait (device, IDE_TIME_OUT);
1285
1286 if (c & ATA_STAT_BUSY) {
1287 printf ("IDE read: device %d not ready\n", device);
1288 break;
1289 }
42dfe7a1 1290#ifdef CONFIG_LBA48
c40b2956
WD		 1291 if (lba48) {
1292 /* write high bits */
1293 ide_outb (device, ATA_SECT_CNT, 0);
1294 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1295 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1296 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1297 }
1298#endif
2262cfee
WD		 1299 ide_outb (device, ATA_SECT_CNT, 1);
1300 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1301 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1302 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 1303
42dfe7a1 1304#ifdef CONFIG_LBA48
c40b2956
WD		 1305 if (lba48) {
1306 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1307 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1308
1309 } else
1310#endif
1311 {
1312 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1313 ATA_DEVICE(device) |
1314 ((blknr >> 24) & 0xF) );
1315 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1316 }
c609719b
WD		 1317
1318 udelay (50);
1319
1320 if(pwrsave) {
1321 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1322 pwrsave=0;
1323 } else {
1324 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1325 }
1326
1327 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
42dfe7a1 1328#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
c40b2956 1329 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
c609719b 1330 device, blknr, c);
c40b2956
WD		 1331#else
1332 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1333 device, (ulong)blknr, c);
1334#endif
c609719b
WD		 1335 break;
1336 }
1337
1338 input_data (device, buffer, ATA_SECTORWORDS);
2262cfee 1339 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
c609719b
WD		 1340
1341 ++n;
1342 ++blknr;
0b94504d 1343 buffer += ATA_BLOCKSIZE;
c609719b
WD		 1344 }
1345IDE_READ_E:
1346 ide_led (DEVICE_LED(device), 0); /* LED off */
1347 return (n);
1348}
1349
1350/* ------------------------------------------------------------------------- */
1351
1352
eb867a76 1353ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD		 1354{
1355 ulong n = 0;
1356 unsigned char c;
42dfe7a1 1357#ifdef CONFIG_LBA48
c40b2956
WD		 1358 unsigned char lba48 = 0;
1359
1360 if (blknr & 0x0000fffff0000000) {
1361 /* more than 28 bits used, use 48bit mode */
1362 lba48 = 1;
1363 }
1364#endif
c609719b
WD		 1365
1366 ide_led (DEVICE_LED(device), 1); /* LED on */
1367
1368 /* Select device
1369 */
2262cfee 1370 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD		 1371
1372 while (blkcnt-- > 0) {
1373
1374 c = ide_wait (device, IDE_TIME_OUT);
1375
1376 if (c & ATA_STAT_BUSY) {
1377 printf ("IDE read: device %d not ready\n", device);
1378 goto WR_OUT;
1379 }
42dfe7a1 1380#ifdef CONFIG_LBA48
c40b2956
WD		 1381 if (lba48) {
1382 /* write high bits */
1383 ide_outb (device, ATA_SECT_CNT, 0);
1384 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1385 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1386 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1387 }
1388#endif
2262cfee
WD		 1389 ide_outb (device, ATA_SECT_CNT, 1);
1390 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1391 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1392 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 1393
42dfe7a1 1394#ifdef CONFIG_LBA48
c40b2956
WD		 1395 if (lba48) {
1396 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1397 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1398
1399 } else
1400#endif
1401 {
1402 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1403 ATA_DEVICE(device) |
1404 ((blknr >> 24) & 0xF) );
1405 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1406 }
c609719b
WD		 1407
1408 udelay (50);
1409
1410 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1411
1412 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
42dfe7a1 1413#if defined(CFG_64BIT_LBA) && defined(CFG_64BIT_VSPRINTF)
c40b2956 1414 printf ("Error (no IRQ) dev %d blk %qd: status 0x%02x\n",
c609719b 1415 device, blknr, c);
c40b2956
WD		 1416#else
1417 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1418 device, (ulong)blknr, c);
1419#endif
c609719b
WD		 1420 goto WR_OUT;
1421 }
1422
1423 output_data (device, buffer, ATA_SECTORWORDS);
2262cfee 1424 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
c609719b
WD		 1425 ++n;
1426 ++blknr;
0b94504d 1427 buffer += ATA_BLOCKSIZE;
c609719b
WD		 1428 }
1429WR_OUT:
1430 ide_led (DEVICE_LED(device), 0); /* LED off */
1431 return (n);
1432}
1433
1434/* ------------------------------------------------------------------------- */
1435
1436/*
1437 * copy src to dest, skipping leading and trailing blanks and null
1438 * terminate the string
7d7ce412 1439 * "len" is the size of available memory including the terminating '\0'
c609719b 1440 */
7d7ce412 1441static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
c609719b 1442{
7d7ce412
WD		 1443 unsigned char *end, *last;
1444
1445 last = dst;
6fb6af6d 1446 end = src + len - 1;
7d7ce412
WD		 1447
1448 /* reserve space for '\0' */
1449 if (len < 2)
1450 goto OUT;
efa329cb 1451
7d7ce412
WD		 1452 /* skip leading white space */
1453 while ((*src) && (src<end) && (*src==' '))
1454 ++src;
1455
1456 /* copy string, omitting trailing white space */
1457 while ((*src) && (src<end)) {
1458 *dst++ = *src;
1459 if (*src++ != ' ')
1460 last = dst;
c609719b 1461 }
7d7ce412
WD		 1462OUT:
1463 *last = '\0';
c609719b
WD		 1464}
1465
1466/* ------------------------------------------------------------------------- */
1467
1468/*
1469 * Wait until Busy bit is off, or timeout (in ms)
1470 * Return last status
1471 */
1472static uchar ide_wait (int dev, ulong t)
1473{
1474 ulong delay = 10 * t; /* poll every 100 us */
1475 uchar c;
1476
2262cfee 1477 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
c609719b
WD		 1478 udelay (100);
1479 if (delay-- == 0) {
1480 break;
1481 }
1482 }
1483 return (c);
1484}
1485
1486/* ------------------------------------------------------------------------- */
1487
1488#ifdef CONFIG_IDE_RESET
1489extern void ide_set_reset(int idereset);
1490
1491static void ide_reset (void)
1492{
1493#if defined(CFG_PB_12V_ENABLE) || defined(CFG_PB_IDE_MOTOR)
1494 volatile immap_t *immr = (immap_t *)CFG_IMMR;
1495#endif
1496 int i;
1497
1498 curr_device = -1;
1499 for (i=0; i<CFG_IDE_MAXBUS; ++i)
1500 ide_bus_ok[i] = 0;
1501 for (i=0; i<CFG_IDE_MAXDEVICE; ++i)
1502 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1503
1504 ide_set_reset (1); /* assert reset */
1505
1506 WATCHDOG_RESET();
1507
1508#ifdef CFG_PB_12V_ENABLE
1509 immr->im_cpm.cp_pbdat &= ~(CFG_PB_12V_ENABLE); /* 12V Enable output OFF */
1510 immr->im_cpm.cp_pbpar &= ~(CFG_PB_12V_ENABLE);
1511 immr->im_cpm.cp_pbodr &= ~(CFG_PB_12V_ENABLE);
1512 immr->im_cpm.cp_pbdir |= CFG_PB_12V_ENABLE;
1513
1514 /* wait 500 ms for the voltage to stabilize
1515 */
1516 for (i=0; i<500; ++i) {
1517 udelay (1000);
1518 }
1519
1520 immr->im_cpm.cp_pbdat |= CFG_PB_12V_ENABLE; /* 12V Enable output ON */
1521#endif /* CFG_PB_12V_ENABLE */
1522
1523#ifdef CFG_PB_IDE_MOTOR
1524 /* configure IDE Motor voltage monitor pin as input */
1525 immr->im_cpm.cp_pbpar &= ~(CFG_PB_IDE_MOTOR);
1526 immr->im_cpm.cp_pbodr &= ~(CFG_PB_IDE_MOTOR);
1527 immr->im_cpm.cp_pbdir &= ~(CFG_PB_IDE_MOTOR);
1528
1529 /* wait up to 1 s for the motor voltage to stabilize
1530 */
1531 for (i=0; i<1000; ++i) {
1532 if ((immr->im_cpm.cp_pbdat & CFG_PB_IDE_MOTOR) != 0) {
1533 break;
1534 }
1535 udelay (1000);
1536 }
1537
1538 if (i == 1000) { /* Timeout */
1539 printf ("\nWarning: 5V for IDE Motor missing\n");
1540# ifdef CONFIG_STATUS_LED
1541# ifdef STATUS_LED_YELLOW
1542 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1543# endif
1544# ifdef STATUS_LED_GREEN
1545 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1546# endif
1547# endif /* CONFIG_STATUS_LED */
1548 }
1549#endif /* CFG_PB_IDE_MOTOR */
1550
1551 WATCHDOG_RESET();
1552
1553 /* de-assert RESET signal */
1554 ide_set_reset(0);
1555
1556 /* wait 250 ms */
1557 for (i=0; i<250; ++i) {
1558 udelay (1000);
1559 }
1560}
1561
1562#endif /* CONFIG_IDE_RESET */
1563
1564/* ------------------------------------------------------------------------- */
1565
e2ffd59b
WD		 1566#if defined(CONFIG_IDE_LED) && \
1567 !defined(CONFIG_AMIGAONEG3SE)&& \
1568 !defined(CONFIG_CPC45) && \
1569 !defined(CONFIG_HMI10) && \
1570 !defined(CONFIG_KUP4K) && \
1571 !defined(CONFIG_KUP4X)
c609719b
WD		 1572
1573static uchar led_buffer = 0; /* Buffer for current LED status */
1574
1575static void ide_led (uchar led, uchar status)
1576{
1577 uchar *led_port = LED_PORT;
1578
1579 if (status) { /* switch LED on */
1580 led_buffer |= led;
1581 } else { /* switch LED off */
1582 led_buffer &= ~led;
1583 }
1584
1585 *led_port = led_buffer;
1586}
1587
1588#endif /* CONFIG_IDE_LED */
1589
1590/* ------------------------------------------------------------------------- */
1591
1592#ifdef CONFIG_ATAPI
1593/****************************************************************************
1594 * ATAPI Support
1595 */
1596
db01a2ea 1597#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
c609719b
WD		 1598/* since ATAPI may use commands with not 4 bytes alligned length
1599 * we have our own transfer functions, 2 bytes alligned */
1600static void
1601output_data_shorts(int dev, ushort *sect_buf, int shorts)
1602{
1a344f29 1603#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD		 1604 uchar *dbuf;
1605 volatile uchar *pbuf_even;
1606 volatile uchar *pbuf_odd;
1607
1608 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1609 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1610 while (shorts--) {
5cf91d6b 1611 EIEIO;
a522fa0e 1612 *pbuf_even = *dbuf++;
5cf91d6b 1613 EIEIO;
a522fa0e
WD		 1614 *pbuf_odd = *dbuf++;
1615 }
1a344f29 1616#else
c609719b
WD		 1617 ushort *dbuf;
1618 volatile ushort *pbuf;
1619
1620 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1621 dbuf = (ushort *)sect_buf;
db01a2ea 1622
1a344f29 1623 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
db01a2ea 1624
c609719b 1625 while (shorts--) {
5cf91d6b 1626 EIEIO;
1a344f29 1627 *pbuf = *dbuf++;
c609719b 1628 }
1a344f29
WD		 1629#endif
1630}
1631
1632static void
1633input_data_shorts(int dev, ushort *sect_buf, int shorts)
1634{
1635#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
a522fa0e
WD		 1636 uchar *dbuf;
1637 volatile uchar *pbuf_even;
1638 volatile uchar *pbuf_odd;
1639
1640 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1641 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1642 while (shorts--) {
5cf91d6b 1643 EIEIO;
a522fa0e 1644 *dbuf++ = *pbuf_even;
5cf91d6b 1645 EIEIO;
a522fa0e
WD		 1646 *dbuf++ = *pbuf_odd;
1647 }
1a344f29
WD		 1648#else
1649 ushort *dbuf;
1650 volatile ushort *pbuf;
1651
1652 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1653 dbuf = (ushort *)sect_buf;
1654
1655 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1656
1657 while (shorts--) {
1658 EIEIO;
1659 *dbuf++ = *pbuf;
1660 }
1661#endif
c609719b
WD		 1662}
1663
2262cfee
WD		 1664#else /* ! __PPC__ */
1665static void
1666output_data_shorts(int dev, ushort *sect_buf, int shorts)
1667{
15647dc7 1668 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD		 1669}
1670
2262cfee
WD		 1671static void
1672input_data_shorts(int dev, ushort *sect_buf, int shorts)
1673{
15647dc7 1674 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD		 1675}
1676
1677#endif /* __PPC__ */
1678
c609719b
WD		 1679/*
1680 * Wait until (Status & mask) == res, or timeout (in ms)
1681 * Return last status
1682 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1683 * and then they set their DRQ Bit
1684 */
1685static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1686{
1687 ulong delay = 10 * t; /* poll every 100 us */
1688 uchar c;
1689
2262cfee
WD		 1690 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1691 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
c609719b
WD		 1692 /* break if error occurs (doesn't make sense to wait more) */
1693 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1694 break;
1695 udelay (100);
1696 if (delay-- == 0) {
1697 break;
1698 }
1699 }
1700 return (c);
1701}
1702
1703/*
1704 * issue an atapi command
1705 */
1706unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1707{
1708 unsigned char c,err,mask,res;
1709 int n;
1710 ide_led (DEVICE_LED(device), 1); /* LED on */
1711
1712 /* Select device
1713 */
1714 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1715 res = 0;
c7de829c
WD		 1716#ifdef CONFIG_AMIGAONEG3SE
1717# warning THF: Removed LBA mode ???
1718#endif
2262cfee 1719 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD		 1720 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1721 if ((c & mask) != res) {
1722 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1723 err=0xFF;
1724 goto AI_OUT;
1725 }
1726 /* write taskfile */
2262cfee 1727 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
c7de829c
WD		 1728 ide_outb (device, ATA_SECT_CNT, 0);
1729 ide_outb (device, ATA_SECT_NUM, 0);
2262cfee 1730 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
c7de829c
WD		 1731 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
1732#ifdef CONFIG_AMIGAONEG3SE
1733# warning THF: Removed LBA mode ???
1734#endif
2262cfee 1735 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b 1736
2262cfee 1737 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
c609719b
WD		 1738 udelay (50);
1739
1740 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1741 res = ATA_STAT_DRQ;
1742 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1743
1744 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1745 printf ("ATTAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
1746 err=0xFF;
1747 goto AI_OUT;
1748 }
1749
1750 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
1751 /* ATAPI Command written wait for completition */
1752 udelay (5000); /* device must set bsy */
1753
1754 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1755 /* if no data wait for DRQ = 0 BSY = 0
1756 * if data wait for DRQ = 1 BSY = 0 */
1757 res=0;
1758 if(buflen)
1759 res = ATA_STAT_DRQ;
1760 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1761 if ((c & mask) != res ) {
1762 if (c & ATA_STAT_ERR) {
2262cfee 1763 err=(ide_inb(device,ATA_ERROR_REG))>>4;
1a344f29 1764 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
c609719b
WD		 1765 } else {
1766 printf ("ATTAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
1767 err=0xFF;
1768 }
1769 goto AI_OUT;
1770 }
2262cfee 1771 n=ide_inb(device, ATA_CYL_HIGH);
c609719b 1772 n<<=8;
2262cfee 1773 n+=ide_inb(device, ATA_CYL_LOW);
c609719b
WD		 1774 if(n>buflen) {
1775 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1776 err=0xff;
1777 goto AI_OUT;
1778 }
1779 if((n==0)&&(buflen<0)) {
1780 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1781 err=0xff;
1782 goto AI_OUT;
1783 }
1784 if(n!=buflen) {
1a344f29 1785 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
c609719b
WD		 1786 }
1787 if(n!=0) { /* data transfer */
1a344f29 1788 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
c609719b
WD		 1789 /* we transfer shorts */
1790 n>>=1;
1791 /* ok now decide if it is an in or output */
2262cfee 1792 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
1a344f29 1793 debug ("Write to device\n");
c609719b
WD		 1794 output_data_shorts(device,(unsigned short *)buffer,n);
1795 } else {
1a344f29 1796 debug ("Read from device @ %p shorts %d\n",buffer,n);
c609719b
WD		 1797 input_data_shorts(device,(unsigned short *)buffer,n);
1798 }
1799 }
1800 udelay(5000); /* seems that some CD ROMs need this... */
1801 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1802 res=0;
1803 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1804 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
2262cfee 1805 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
1a344f29 1806 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
c609719b
WD		 1807 } else {
1808 err = 0;
1809 }
1810AI_OUT:
1811 ide_led (DEVICE_LED(device), 0); /* LED off */
1812 return (err);
1813}
1814
1815/*
1816 * sending the command to atapi_issue. If an status other than good
1817 * returns, an request_sense will be issued
1818 */
1819
1820#define ATAPI_DRIVE_NOT_READY 100
1821#define ATAPI_UNIT_ATTN 10
1822
1823unsigned char atapi_issue_autoreq (int device,
1824 unsigned char* ccb,
1825 int ccblen,
1826 unsigned char *buffer,
1827 int buflen)
1828{
1829 unsigned char sense_data[18],sense_ccb[12];
1830 unsigned char res,key,asc,ascq;
1831 int notready,unitattn;
1832
c7de829c
WD		 1833#ifdef CONFIG_AMIGAONEG3SE
1834 char *s;
1835 unsigned int timeout, retrycnt;
1836
1837 s = getenv("ide_cd_timeout");
1838 timeout = s ? (simple_strtol(s, NULL, 10)*1000000)/5 : 0;
1839
1840 retrycnt = 0;
1841#endif
1842
c609719b
WD		 1843 unitattn=ATAPI_UNIT_ATTN;
1844 notready=ATAPI_DRIVE_NOT_READY;
1845
1846retry:
1847 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1848 if (res==0)
1849 return (0); /* Ok */
1850
1851 if (res==0xFF)
1852 return (0xFF); /* error */
1853
1a344f29 1854 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
c609719b
WD		 1855
1856 memset(sense_ccb,0,sizeof(sense_ccb));
1857 memset(sense_data,0,sizeof(sense_data));
1858 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
c7de829c 1859 sense_ccb[4]=18; /* allocation Length */
c609719b
WD		 1860
1861 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1862 key=(sense_data[2]&0xF);
1863 asc=(sense_data[12]);
1864 ascq=(sense_data[13]);
1865
1a344f29
WD		 1866 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1867 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
c609719b
WD		 1868 sense_data[0],
1869 key,
1870 asc,
1871 ascq);
1872
1873 if((key==0))
1874 return 0; /* ok device ready */
1875
1876 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1877 if(unitattn-->0) {
1878 udelay(200*1000);
1879 goto retry;
1880 }
1881 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1882 goto error;
1883 }
1884 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1885 if (notready-->0) {
1886 udelay(200*1000);
1887 goto retry;
1888 }
1889 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1890 goto error;
1891 }
1892 if(asc==0x3a) {
1a344f29 1893 debug ("Media not present\n");
c609719b
WD		 1894 goto error;
1895 }
c7de829c
WD		 1896
1897#ifdef CONFIG_AMIGAONEG3SE
1898 if ((sense_data[2]&0xF)==0x0B) {
1a344f29 1899 debug ("ABORTED COMMAND...retry\n");
c7de829c
WD		 1900 if (retrycnt++ < 4)
1901 goto retry;
1902 return (0xFF);
1903 }
1904
1905 if ((sense_data[2]&0xf) == 0x02 &&
1906 sense_data[12] == 0x04 &&
1907 sense_data[13] == 0x01 ) {
1a344f29 1908 debug ("Waiting for unit to become active\n");
c7de829c
WD		 1909 udelay(timeout);
1910 if (retrycnt++ < 4)
1911 goto retry;
1912 return 0xFF;
1913 }
1914#endif /* CONFIG_AMIGAONEG3SE */
1915
c609719b
WD		 1916 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1917error:
1a344f29 1918 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
c609719b
WD		 1919 return (0xFF);
1920}
1921
1922
c609719b
WD		 1923static void atapi_inquiry(block_dev_desc_t * dev_desc)
1924{
1925 unsigned char ccb[12]; /* Command descriptor block */
1926 unsigned char iobuf[64]; /* temp buf */
1927 unsigned char c;
1928 int device;
1929
1930 device=dev_desc->dev;
1931 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
1932 dev_desc->block_read=atapi_read;
1933
1934 memset(ccb,0,sizeof(ccb));
1935 memset(iobuf,0,sizeof(iobuf));
1936
1937 ccb[0]=ATAPI_CMD_INQUIRY;
1938 ccb[4]=40; /* allocation Legnth */
1939 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
1940
1a344f29 1941 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
c609719b
WD		 1942 if (c!=0)
1943 return;
1944
1945 /* copy device ident strings */
7a60ee7c
JCPV		 1946 ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
1947 ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
1948 ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
c609719b
WD		 1949
1950 dev_desc->lun=0;
1951 dev_desc->lba=0;
1952 dev_desc->blksz=0;
1953 dev_desc->type=iobuf[0] & 0x1f;
1954
1955 if ((iobuf[1]&0x80)==0x80)
1956 dev_desc->removable = 1;
1957 else
1958 dev_desc->removable = 0;
1959
1960 memset(ccb,0,sizeof(ccb));
1961 memset(iobuf,0,sizeof(iobuf));
1962 ccb[0]=ATAPI_CMD_START_STOP;
1963 ccb[4]=0x03; /* start */
1964
1965 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1966
1a344f29 1967 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
c609719b
WD		 1968 if (c!=0)
1969 return;
1970
1971 memset(ccb,0,sizeof(ccb));
1972 memset(iobuf,0,sizeof(iobuf));
1973 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1974
1a344f29 1975 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
c609719b
WD		 1976 if (c!=0)
1977 return;
1978
1979 memset(ccb,0,sizeof(ccb));
1980 memset(iobuf,0,sizeof(iobuf));
1981 ccb[0]=ATAPI_CMD_READ_CAP;
1982 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
1a344f29 1983 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
c609719b
WD		 1984 if (c!=0)
1985 return;
1986
1a344f29 1987 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
c609719b
WD		 1988 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
1989 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
1990
1991 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
1992 ((unsigned long)iobuf[1]<<16) +
1993 ((unsigned long)iobuf[2]<< 8) +
1994 ((unsigned long)iobuf[3]);
1995 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
1996 ((unsigned long)iobuf[5]<<16) +
1997 ((unsigned long)iobuf[6]<< 8) +
1998 ((unsigned long)iobuf[7]);
42dfe7a1 1999#ifdef CONFIG_LBA48
c40b2956 2000 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
42dfe7a1 2001#endif
c609719b
WD		 2002 return;
2003}
2004
2005
2006/*
2007 * atapi_read:
2008 * we transfer only one block per command, since the multiple DRQ per
2009 * command is not yet implemented
2010 */
2011#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
2012#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
2013#define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
2014
eb867a76 2015ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
c609719b
WD		 2016{
2017 ulong n = 0;
2018 unsigned char ccb[12]; /* Command descriptor block */
2019 ulong cnt;
2020
1a344f29 2021 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
c609719b
WD		 2022 device, blknr, blkcnt, (ulong)buffer);
2023
2024 do {
2025 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
2026 cnt=ATAPI_READ_MAX_BLOCK;
2027 } else {
2028 cnt=blkcnt;
2029 }
2030 ccb[0]=ATAPI_CMD_READ_12;
2031 ccb[1]=0; /* reserved */
2032 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
2033 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
2034 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
2035 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
2036 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
2037 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
2038 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
2039 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
2040 ccb[10]=0; /* reserved */
2041 ccb[11]=0; /* reserved */
2042
2043 if (atapi_issue_autoreq(device,ccb,12,
2044 (unsigned char *)buffer,
2045 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
2046 return (n);
2047 }
2048 n+=cnt;
2049 blkcnt-=cnt;
2050 blknr+=cnt;
0b94504d 2051 buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
c609719b
WD		 2052 } while (blkcnt > 0);
2053 return (n);
2054}
2055
2056/* ------------------------------------------------------------------------- */
2057
2058#endif /* CONFIG_ATAPI */
2059
0d498393
WD		 2060U_BOOT_CMD(
2061 ide, 5, 1, do_ide,
8bde7f77
WD		 2062 "ide - IDE sub-system\n",
2063 "reset - reset IDE controller\n"
2064 "ide info - show available IDE devices\n"
2065 "ide device [dev] - show or set current device\n"
2066 "ide part [dev] - print partition table of one or all IDE devices\n"
2067 "ide read addr blk# cnt\n"
2068 "ide write addr blk# cnt - read/write `cnt'"
2069 " blocks starting at block `blk#'\n"
2070 " to/from memory address `addr'\n"
2071);
2072
0d498393
WD		 2073U_BOOT_CMD(
2074 diskboot, 3, 1, do_diskboot,
8bde7f77
WD		 2075 "diskboot- boot from IDE device\n",
2076 "loadAddr dev:part\n"
2077);
"Das U-Boot" Source Tree