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Commit | Line | Data |
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3863585b WD |
1 | /* |
2 | * (C) Copyright 2000 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | /* | |
25 | * Memory Functions | |
26 | * | |
27 | * Copied from FADS ROM, Dan Malek (dmalek@jlc.net) | |
28 | */ | |
29 | ||
30 | #include <common.h> | |
31 | #include <command.h> | |
2abbe075 WD |
32 | #ifdef CONFIG_HAS_DATAFLASH |
33 | #include <dataflash.h> | |
34 | #endif | |
a6e6fc61 | 35 | #include <watchdog.h> |
15a33e49 SG |
36 | #include <linux/compiler.h> |
37 | ||
38 | DECLARE_GLOBAL_DATA_PTR; | |
3863585b | 39 | |
54841ab5 | 40 | static int mod_mem(cmd_tbl_t *, int, int, int, char * const []); |
3863585b WD |
41 | |
42 | /* Display values from last command. | |
43 | * Memory modify remembered values are different from display memory. | |
44 | */ | |
d6efe244 MF |
45 | static uint dp_last_addr, dp_last_size; |
46 | static uint dp_last_length = 0x40; | |
47 | static uint mm_last_addr, mm_last_size; | |
3863585b WD |
48 | |
49 | static ulong base_address = 0; | |
50 | ||
51 | /* Memory Display | |
52 | * | |
53 | * Syntax: | |
54 | * md{.b, .w, .l} {addr} {len} | |
55 | */ | |
56 | #define DISP_LINE_LEN 16 | |
088f1b19 | 57 | static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
3863585b | 58 | { |
27b207fd | 59 | ulong addr, length; |
c95c4280 GL |
60 | #if defined(CONFIG_HAS_DATAFLASH) |
61 | ulong nbytes, linebytes; | |
62 | #endif | |
27b207fd | 63 | int size; |
3863585b WD |
64 | int rc = 0; |
65 | ||
66 | /* We use the last specified parameters, unless new ones are | |
67 | * entered. | |
68 | */ | |
69 | addr = dp_last_addr; | |
70 | size = dp_last_size; | |
71 | length = dp_last_length; | |
72 | ||
47e26b1b | 73 | if (argc < 2) |
4c12eeb8 | 74 | return CMD_RET_USAGE; |
3863585b WD |
75 | |
76 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
77 | /* New command specified. Check for a size specification. | |
78 | * Defaults to long if no or incorrect specification. | |
79 | */ | |
27b207fd WD |
80 | if ((size = cmd_get_data_size(argv[0], 4)) < 0) |
81 | return 1; | |
3863585b WD |
82 | |
83 | /* Address is specified since argc > 1 | |
84 | */ | |
85 | addr = simple_strtoul(argv[1], NULL, 16); | |
86 | addr += base_address; | |
87 | ||
88 | /* If another parameter, it is the length to display. | |
89 | * Length is the number of objects, not number of bytes. | |
90 | */ | |
91 | if (argc > 2) | |
92 | length = simple_strtoul(argv[2], NULL, 16); | |
93 | } | |
94 | ||
c95c4280 | 95 | #if defined(CONFIG_HAS_DATAFLASH) |
3863585b WD |
96 | /* Print the lines. |
97 | * | |
98 | * We buffer all read data, so we can make sure data is read only | |
99 | * once, and all accesses are with the specified bus width. | |
100 | */ | |
101 | nbytes = length * size; | |
102 | do { | |
103 | char linebuf[DISP_LINE_LEN]; | |
c95c4280 | 104 | void* p; |
3863585b | 105 | linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes; |
2abbe075 | 106 | |
c95c4280 GL |
107 | rc = read_dataflash(addr, (linebytes/size)*size, linebuf); |
108 | p = (rc == DATAFLASH_OK) ? linebuf : (void*)addr; | |
109 | print_buffer(addr, p, size, linebytes/size, DISP_LINE_LEN/size); | |
110 | ||
3863585b | 111 | nbytes -= linebytes; |
c95c4280 | 112 | addr += linebytes; |
3863585b WD |
113 | if (ctrlc()) { |
114 | rc = 1; | |
115 | break; | |
116 | } | |
117 | } while (nbytes > 0); | |
c95c4280 | 118 | #else |
4c727c77 MF |
119 | |
120 | # if defined(CONFIG_BLACKFIN) | |
121 | /* See if we're trying to display L1 inst */ | |
122 | if (addr_bfin_on_chip_mem(addr)) { | |
123 | char linebuf[DISP_LINE_LEN]; | |
124 | ulong linebytes, nbytes = length * size; | |
125 | do { | |
126 | linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; | |
127 | memcpy(linebuf, (void *)addr, linebytes); | |
128 | print_buffer(addr, linebuf, size, linebytes/size, DISP_LINE_LEN/size); | |
129 | ||
130 | nbytes -= linebytes; | |
131 | addr += linebytes; | |
132 | if (ctrlc()) { | |
133 | rc = 1; | |
134 | break; | |
135 | } | |
136 | } while (nbytes > 0); | |
137 | } else | |
138 | # endif | |
139 | ||
140 | { | |
141 | /* Print the lines. */ | |
94c50f11 KG |
142 | print_buffer(addr, (void*)addr, size, length, DISP_LINE_LEN/size); |
143 | addr += size*length; | |
4c727c77 | 144 | } |
c95c4280 | 145 | #endif |
3863585b WD |
146 | |
147 | dp_last_addr = addr; | |
148 | dp_last_length = length; | |
149 | dp_last_size = size; | |
150 | return (rc); | |
151 | } | |
152 | ||
088f1b19 | 153 | static int do_mem_mm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
3863585b WD |
154 | { |
155 | return mod_mem (cmdtp, 1, flag, argc, argv); | |
156 | } | |
088f1b19 | 157 | static int do_mem_nm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
3863585b WD |
158 | { |
159 | return mod_mem (cmdtp, 0, flag, argc, argv); | |
160 | } | |
161 | ||
088f1b19 | 162 | static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
3863585b | 163 | { |
27b207fd WD |
164 | ulong addr, writeval, count; |
165 | int size; | |
3863585b | 166 | |
47e26b1b | 167 | if ((argc < 3) || (argc > 4)) |
4c12eeb8 | 168 | return CMD_RET_USAGE; |
3863585b WD |
169 | |
170 | /* Check for size specification. | |
171 | */ | |
27b207fd WD |
172 | if ((size = cmd_get_data_size(argv[0], 4)) < 1) |
173 | return 1; | |
3863585b WD |
174 | |
175 | /* Address is specified since argc > 1 | |
176 | */ | |
177 | addr = simple_strtoul(argv[1], NULL, 16); | |
178 | addr += base_address; | |
179 | ||
180 | /* Get the value to write. | |
181 | */ | |
182 | writeval = simple_strtoul(argv[2], NULL, 16); | |
183 | ||
184 | /* Count ? */ | |
185 | if (argc == 4) { | |
186 | count = simple_strtoul(argv[3], NULL, 16); | |
187 | } else { | |
188 | count = 1; | |
189 | } | |
190 | ||
191 | while (count-- > 0) { | |
192 | if (size == 4) | |
193 | *((ulong *)addr) = (ulong )writeval; | |
194 | else if (size == 2) | |
195 | *((ushort *)addr) = (ushort)writeval; | |
196 | else | |
197 | *((u_char *)addr) = (u_char)writeval; | |
198 | addr += size; | |
199 | } | |
200 | return 0; | |
201 | } | |
202 | ||
4aaf29b2 | 203 | #ifdef CONFIG_MX_CYCLIC |
54841ab5 | 204 | int do_mem_mdc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
4aaf29b2 SR |
205 | { |
206 | int i; | |
207 | ulong count; | |
208 | ||
47e26b1b | 209 | if (argc < 4) |
4c12eeb8 | 210 | return CMD_RET_USAGE; |
4aaf29b2 SR |
211 | |
212 | count = simple_strtoul(argv[3], NULL, 10); | |
213 | ||
214 | for (;;) { | |
215 | do_mem_md (NULL, 0, 3, argv); | |
216 | ||
217 | /* delay for <count> ms... */ | |
218 | for (i=0; i<count; i++) | |
219 | udelay (1000); | |
220 | ||
221 | /* check for ctrl-c to abort... */ | |
222 | if (ctrlc()) { | |
223 | puts("Abort\n"); | |
224 | return 0; | |
225 | } | |
226 | } | |
227 | ||
228 | return 0; | |
229 | } | |
230 | ||
54841ab5 | 231 | int do_mem_mwc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
4aaf29b2 SR |
232 | { |
233 | int i; | |
234 | ulong count; | |
235 | ||
47e26b1b | 236 | if (argc < 4) |
4c12eeb8 | 237 | return CMD_RET_USAGE; |
4aaf29b2 SR |
238 | |
239 | count = simple_strtoul(argv[3], NULL, 10); | |
240 | ||
241 | for (;;) { | |
242 | do_mem_mw (NULL, 0, 3, argv); | |
243 | ||
244 | /* delay for <count> ms... */ | |
245 | for (i=0; i<count; i++) | |
246 | udelay (1000); | |
247 | ||
248 | /* check for ctrl-c to abort... */ | |
249 | if (ctrlc()) { | |
250 | puts("Abort\n"); | |
251 | return 0; | |
252 | } | |
253 | } | |
254 | ||
255 | return 0; | |
256 | } | |
257 | #endif /* CONFIG_MX_CYCLIC */ | |
258 | ||
088f1b19 | 259 | static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
3863585b | 260 | { |
27b207fd WD |
261 | ulong addr1, addr2, count, ngood; |
262 | int size; | |
3863585b | 263 | int rcode = 0; |
054ea170 | 264 | const char *type; |
3863585b | 265 | |
47e26b1b | 266 | if (argc != 4) |
4c12eeb8 | 267 | return CMD_RET_USAGE; |
3863585b WD |
268 | |
269 | /* Check for size specification. | |
270 | */ | |
27b207fd WD |
271 | if ((size = cmd_get_data_size(argv[0], 4)) < 0) |
272 | return 1; | |
054ea170 | 273 | type = size == 4 ? "word" : size == 2 ? "halfword" : "byte"; |
3863585b WD |
274 | |
275 | addr1 = simple_strtoul(argv[1], NULL, 16); | |
276 | addr1 += base_address; | |
277 | ||
278 | addr2 = simple_strtoul(argv[2], NULL, 16); | |
279 | addr2 += base_address; | |
280 | ||
281 | count = simple_strtoul(argv[3], NULL, 16); | |
282 | ||
2abbe075 WD |
283 | #ifdef CONFIG_HAS_DATAFLASH |
284 | if (addr_dataflash(addr1) | addr_dataflash(addr2)){ | |
4b9206ed | 285 | puts ("Comparison with DataFlash space not supported.\n\r"); |
2abbe075 WD |
286 | return 0; |
287 | } | |
288 | #endif | |
289 | ||
4c727c77 MF |
290 | #ifdef CONFIG_BLACKFIN |
291 | if (addr_bfin_on_chip_mem(addr1) || addr_bfin_on_chip_mem(addr2)) { | |
292 | puts ("Comparison with L1 instruction memory not supported.\n\r"); | |
293 | return 0; | |
294 | } | |
295 | #endif | |
296 | ||
feb12a1f | 297 | for (ngood = 0; ngood < count; ++ngood) { |
054ea170 | 298 | ulong word1, word2; |
3863585b | 299 | if (size == 4) { |
054ea170 MF |
300 | word1 = *(ulong *)addr1; |
301 | word2 = *(ulong *)addr2; | |
302 | } else if (size == 2) { | |
303 | word1 = *(ushort *)addr1; | |
304 | word2 = *(ushort *)addr2; | |
305 | } else { | |
306 | word1 = *(u_char *)addr1; | |
307 | word2 = *(u_char *)addr2; | |
3863585b | 308 | } |
054ea170 MF |
309 | if (word1 != word2) { |
310 | printf("%s at 0x%08lx (%#0*lx) != %s at 0x%08lx (%#0*lx)\n", | |
311 | type, addr1, size, word1, | |
312 | type, addr2, size, word2); | |
313 | rcode = 1; | |
314 | break; | |
3863585b | 315 | } |
054ea170 | 316 | |
3863585b WD |
317 | addr1 += size; |
318 | addr2 += size; | |
eaadb44e SR |
319 | |
320 | /* reset watchdog from time to time */ | |
feb12a1f | 321 | if ((ngood % (64 << 10)) == 0) |
eaadb44e | 322 | WATCHDOG_RESET(); |
3863585b WD |
323 | } |
324 | ||
054ea170 | 325 | printf("Total of %ld %s(s) were the same\n", ngood, type); |
3863585b WD |
326 | return rcode; |
327 | } | |
328 | ||
088f1b19 | 329 | static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
3863585b | 330 | { |
27b207fd WD |
331 | ulong addr, dest, count; |
332 | int size; | |
3863585b | 333 | |
47e26b1b | 334 | if (argc != 4) |
4c12eeb8 | 335 | return CMD_RET_USAGE; |
3863585b WD |
336 | |
337 | /* Check for size specification. | |
338 | */ | |
27b207fd WD |
339 | if ((size = cmd_get_data_size(argv[0], 4)) < 0) |
340 | return 1; | |
3863585b WD |
341 | |
342 | addr = simple_strtoul(argv[1], NULL, 16); | |
343 | addr += base_address; | |
344 | ||
345 | dest = simple_strtoul(argv[2], NULL, 16); | |
346 | dest += base_address; | |
347 | ||
348 | count = simple_strtoul(argv[3], NULL, 16); | |
349 | ||
350 | if (count == 0) { | |
351 | puts ("Zero length ???\n"); | |
352 | return 1; | |
353 | } | |
354 | ||
6d0f6bcf | 355 | #ifndef CONFIG_SYS_NO_FLASH |
3863585b | 356 | /* check if we are copying to Flash */ |
2abbe075 WD |
357 | if ( (addr2info(dest) != NULL) |
358 | #ifdef CONFIG_HAS_DATAFLASH | |
84d0c2f1 | 359 | && (!addr_dataflash(dest)) |
2abbe075 WD |
360 | #endif |
361 | ) { | |
3863585b WD |
362 | int rc; |
363 | ||
4b9206ed | 364 | puts ("Copy to Flash... "); |
3863585b | 365 | |
77ddac94 | 366 | rc = flash_write ((char *)addr, dest, count*size); |
3863585b WD |
367 | if (rc != 0) { |
368 | flash_perror (rc); | |
369 | return (1); | |
370 | } | |
371 | puts ("done\n"); | |
372 | return 0; | |
373 | } | |
374 | #endif | |
375 | ||
2abbe075 WD |
376 | #ifdef CONFIG_HAS_DATAFLASH |
377 | /* Check if we are copying from RAM or Flash to DataFlash */ | |
378 | if (addr_dataflash(dest) && !addr_dataflash(addr)){ | |
379 | int rc; | |
380 | ||
4b9206ed | 381 | puts ("Copy to DataFlash... "); |
2abbe075 WD |
382 | |
383 | rc = write_dataflash (dest, addr, count*size); | |
384 | ||
385 | if (rc != 1) { | |
386 | dataflash_perror (rc); | |
387 | return (1); | |
388 | } | |
389 | puts ("done\n"); | |
390 | return 0; | |
391 | } | |
8bde7f77 | 392 | |
2abbe075 | 393 | /* Check if we are copying from DataFlash to RAM */ |
880cc438 | 394 | if (addr_dataflash(addr) && !addr_dataflash(dest) |
6d0f6bcf | 395 | #ifndef CONFIG_SYS_NO_FLASH |
880cc438 SP |
396 | && (addr2info(dest) == NULL) |
397 | #endif | |
398 | ){ | |
5779d8d9 WD |
399 | int rc; |
400 | rc = read_dataflash(addr, count * size, (char *) dest); | |
401 | if (rc != 1) { | |
d4ca31c4 WD |
402 | dataflash_perror (rc); |
403 | return (1); | |
404 | } | |
2abbe075 WD |
405 | return 0; |
406 | } | |
407 | ||
408 | if (addr_dataflash(addr) && addr_dataflash(dest)){ | |
4b9206ed | 409 | puts ("Unsupported combination of source/destination.\n\r"); |
2abbe075 WD |
410 | return 1; |
411 | } | |
412 | #endif | |
413 | ||
4c727c77 MF |
414 | #ifdef CONFIG_BLACKFIN |
415 | /* See if we're copying to/from L1 inst */ | |
416 | if (addr_bfin_on_chip_mem(dest) || addr_bfin_on_chip_mem(addr)) { | |
417 | memcpy((void *)dest, (void *)addr, count * size); | |
418 | return 0; | |
419 | } | |
420 | #endif | |
421 | ||
3863585b WD |
422 | while (count-- > 0) { |
423 | if (size == 4) | |
424 | *((ulong *)dest) = *((ulong *)addr); | |
425 | else if (size == 2) | |
426 | *((ushort *)dest) = *((ushort *)addr); | |
427 | else | |
428 | *((u_char *)dest) = *((u_char *)addr); | |
429 | addr += size; | |
430 | dest += size; | |
eaadb44e SR |
431 | |
432 | /* reset watchdog from time to time */ | |
433 | if ((count % (64 << 10)) == 0) | |
434 | WATCHDOG_RESET(); | |
3863585b WD |
435 | } |
436 | return 0; | |
437 | } | |
438 | ||
088f1b19 KP |
439 | static int do_mem_base(cmd_tbl_t *cmdtp, int flag, int argc, |
440 | char * const argv[]) | |
3863585b WD |
441 | { |
442 | if (argc > 1) { | |
443 | /* Set new base address. | |
444 | */ | |
445 | base_address = simple_strtoul(argv[1], NULL, 16); | |
446 | } | |
447 | /* Print the current base address. | |
448 | */ | |
449 | printf("Base Address: 0x%08lx\n", base_address); | |
450 | return 0; | |
451 | } | |
452 | ||
088f1b19 KP |
453 | static int do_mem_loop(cmd_tbl_t *cmdtp, int flag, int argc, |
454 | char * const argv[]) | |
3863585b | 455 | { |
f3b3c3df | 456 | ulong addr, length, i; |
27b207fd | 457 | int size; |
3863585b WD |
458 | volatile uint *longp; |
459 | volatile ushort *shortp; | |
460 | volatile u_char *cp; | |
461 | ||
47e26b1b | 462 | if (argc < 3) |
4c12eeb8 | 463 | return CMD_RET_USAGE; |
3863585b | 464 | |
85de63e2 RD |
465 | /* |
466 | * Check for a size specification. | |
3863585b WD |
467 | * Defaults to long if no or incorrect specification. |
468 | */ | |
27b207fd WD |
469 | if ((size = cmd_get_data_size(argv[0], 4)) < 0) |
470 | return 1; | |
3863585b WD |
471 | |
472 | /* Address is always specified. | |
473 | */ | |
474 | addr = simple_strtoul(argv[1], NULL, 16); | |
475 | ||
476 | /* Length is the number of objects, not number of bytes. | |
477 | */ | |
478 | length = simple_strtoul(argv[2], NULL, 16); | |
479 | ||
480 | /* We want to optimize the loops to run as fast as possible. | |
481 | * If we have only one object, just run infinite loops. | |
482 | */ | |
483 | if (length == 1) { | |
484 | if (size == 4) { | |
485 | longp = (uint *)addr; | |
486 | for (;;) | |
487 | i = *longp; | |
488 | } | |
489 | if (size == 2) { | |
490 | shortp = (ushort *)addr; | |
491 | for (;;) | |
492 | i = *shortp; | |
493 | } | |
494 | cp = (u_char *)addr; | |
495 | for (;;) | |
496 | i = *cp; | |
497 | } | |
498 | ||
499 | if (size == 4) { | |
500 | for (;;) { | |
501 | longp = (uint *)addr; | |
502 | i = length; | |
503 | while (i-- > 0) | |
f3b3c3df | 504 | *longp++; |
3863585b WD |
505 | } |
506 | } | |
507 | if (size == 2) { | |
508 | for (;;) { | |
509 | shortp = (ushort *)addr; | |
510 | i = length; | |
511 | while (i-- > 0) | |
f3b3c3df | 512 | *shortp++; |
3863585b WD |
513 | } |
514 | } | |
515 | for (;;) { | |
516 | cp = (u_char *)addr; | |
517 | i = length; | |
518 | while (i-- > 0) | |
f3b3c3df | 519 | *cp++; |
3863585b WD |
520 | } |
521 | } | |
522 | ||
56523f12 | 523 | #ifdef CONFIG_LOOPW |
54841ab5 | 524 | int do_mem_loopw (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
56523f12 WD |
525 | { |
526 | ulong addr, length, i, data; | |
527 | int size; | |
528 | volatile uint *longp; | |
529 | volatile ushort *shortp; | |
530 | volatile u_char *cp; | |
81050926 | 531 | |
47e26b1b | 532 | if (argc < 4) |
4c12eeb8 | 533 | return CMD_RET_USAGE; |
56523f12 | 534 | |
85de63e2 RD |
535 | /* |
536 | * Check for a size specification. | |
56523f12 WD |
537 | * Defaults to long if no or incorrect specification. |
538 | */ | |
539 | if ((size = cmd_get_data_size(argv[0], 4)) < 0) | |
540 | return 1; | |
541 | ||
542 | /* Address is always specified. | |
543 | */ | |
544 | addr = simple_strtoul(argv[1], NULL, 16); | |
545 | ||
546 | /* Length is the number of objects, not number of bytes. | |
547 | */ | |
548 | length = simple_strtoul(argv[2], NULL, 16); | |
549 | ||
550 | /* data to write */ | |
551 | data = simple_strtoul(argv[3], NULL, 16); | |
81050926 | 552 | |
56523f12 WD |
553 | /* We want to optimize the loops to run as fast as possible. |
554 | * If we have only one object, just run infinite loops. | |
555 | */ | |
556 | if (length == 1) { | |
557 | if (size == 4) { | |
558 | longp = (uint *)addr; | |
559 | for (;;) | |
560 | *longp = data; | |
561 | } | |
562 | if (size == 2) { | |
563 | shortp = (ushort *)addr; | |
564 | for (;;) | |
565 | *shortp = data; | |
566 | } | |
567 | cp = (u_char *)addr; | |
568 | for (;;) | |
569 | *cp = data; | |
570 | } | |
571 | ||
572 | if (size == 4) { | |
573 | for (;;) { | |
574 | longp = (uint *)addr; | |
575 | i = length; | |
576 | while (i-- > 0) | |
577 | *longp++ = data; | |
578 | } | |
579 | } | |
580 | if (size == 2) { | |
581 | for (;;) { | |
582 | shortp = (ushort *)addr; | |
583 | i = length; | |
584 | while (i-- > 0) | |
585 | *shortp++ = data; | |
586 | } | |
587 | } | |
588 | for (;;) { | |
589 | cp = (u_char *)addr; | |
590 | i = length; | |
591 | while (i-- > 0) | |
592 | *cp++ = data; | |
593 | } | |
594 | } | |
595 | #endif /* CONFIG_LOOPW */ | |
596 | ||
3863585b WD |
597 | /* |
598 | * Perform a memory test. A more complete alternative test can be | |
6d0f6bcf | 599 | * configured using CONFIG_SYS_ALT_MEMTEST. The complete test loops until |
3863585b WD |
600 | * interrupted by ctrl-c or by a failure of one of the sub-tests. |
601 | */ | |
088f1b19 KP |
602 | static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc, |
603 | char * const argv[]) | |
3863585b WD |
604 | { |
605 | vu_long *addr, *start, *end; | |
606 | ulong val; | |
607 | ulong readback; | |
87b22b77 | 608 | ulong errs = 0; |
b6fc6fd4 DE |
609 | int iterations = 1; |
610 | int iteration_limit; | |
3863585b | 611 | |
6d0f6bcf | 612 | #if defined(CONFIG_SYS_ALT_MEMTEST) |
6f4abee7 | 613 | vu_long len; |
3863585b WD |
614 | vu_long offset; |
615 | vu_long test_offset; | |
616 | vu_long pattern; | |
617 | vu_long temp; | |
618 | vu_long anti_pattern; | |
619 | vu_long num_words; | |
6d0f6bcf JCPV |
620 | #if defined(CONFIG_SYS_MEMTEST_SCRATCH) |
621 | vu_long *dummy = (vu_long*)CONFIG_SYS_MEMTEST_SCRATCH; | |
5f535fe1 | 622 | #else |
088f1b19 | 623 | vu_long *dummy = NULL; /* yes, this is address 0x0, not NULL */ |
5f535fe1 | 624 | #endif |
3863585b | 625 | int j; |
3863585b WD |
626 | |
627 | static const ulong bitpattern[] = { | |
628 | 0x00000001, /* single bit */ | |
629 | 0x00000003, /* two adjacent bits */ | |
630 | 0x00000007, /* three adjacent bits */ | |
631 | 0x0000000F, /* four adjacent bits */ | |
632 | 0x00000005, /* two non-adjacent bits */ | |
633 | 0x00000015, /* three non-adjacent bits */ | |
634 | 0x00000055, /* four non-adjacent bits */ | |
635 | 0xaaaaaaaa, /* alternating 1/0 */ | |
636 | }; | |
637 | #else | |
638 | ulong incr; | |
639 | ulong pattern; | |
3863585b WD |
640 | #endif |
641 | ||
b6fc6fd4 | 642 | if (argc > 1) |
3863585b | 643 | start = (ulong *)simple_strtoul(argv[1], NULL, 16); |
b6fc6fd4 | 644 | else |
6d0f6bcf | 645 | start = (ulong *)CONFIG_SYS_MEMTEST_START; |
3863585b | 646 | |
b6fc6fd4 | 647 | if (argc > 2) |
3863585b | 648 | end = (ulong *)simple_strtoul(argv[2], NULL, 16); |
b6fc6fd4 | 649 | else |
6d0f6bcf | 650 | end = (ulong *)(CONFIG_SYS_MEMTEST_END); |
3863585b | 651 | |
b6fc6fd4 | 652 | if (argc > 3) |
3863585b | 653 | pattern = (ulong)simple_strtoul(argv[3], NULL, 16); |
b6fc6fd4 | 654 | else |
3863585b | 655 | pattern = 0; |
b6fc6fd4 DE |
656 | |
657 | if (argc > 4) | |
658 | iteration_limit = (ulong)simple_strtoul(argv[4], NULL, 16); | |
659 | else | |
660 | iteration_limit = 0; | |
3863585b | 661 | |
6d0f6bcf | 662 | #if defined(CONFIG_SYS_ALT_MEMTEST) |
3863585b | 663 | printf ("Testing %08x ... %08x:\n", (uint)start, (uint)end); |
9504a551 | 664 | debug("%s:%d: start 0x%p end 0x%p\n", |
3863585b WD |
665 | __FUNCTION__, __LINE__, start, end); |
666 | ||
667 | for (;;) { | |
668 | if (ctrlc()) { | |
669 | putc ('\n'); | |
670 | return 1; | |
671 | } | |
672 | ||
b6fc6fd4 DE |
673 | |
674 | if (iteration_limit && iterations > iteration_limit) { | |
87b22b77 PG |
675 | printf("Tested %d iteration(s) with %lu errors.\n", |
676 | iterations-1, errs); | |
677 | return errs != 0; | |
b6fc6fd4 DE |
678 | } |
679 | ||
3863585b | 680 | printf("Iteration: %6d\r", iterations); |
9504a551 | 681 | debug("\n"); |
3863585b WD |
682 | iterations++; |
683 | ||
684 | /* | |
685 | * Data line test: write a pattern to the first | |
686 | * location, write the 1's complement to a 'parking' | |
687 | * address (changes the state of the data bus so a | |
85de63e2 | 688 | * floating bus doesn't give a false OK), and then |
3863585b WD |
689 | * read the value back. Note that we read it back |
690 | * into a variable because the next time we read it, | |
691 | * it might be right (been there, tough to explain to | |
692 | * the quality guys why it prints a failure when the | |
693 | * "is" and "should be" are obviously the same in the | |
694 | * error message). | |
695 | * | |
696 | * Rather than exhaustively testing, we test some | |
697 | * patterns by shifting '1' bits through a field of | |
698 | * '0's and '0' bits through a field of '1's (i.e. | |
699 | * pattern and ~pattern). | |
700 | */ | |
701 | addr = start; | |
702 | for (j = 0; j < sizeof(bitpattern)/sizeof(bitpattern[0]); j++) { | |
703 | val = bitpattern[j]; | |
704 | for(; val != 0; val <<= 1) { | |
705 | *addr = val; | |
706 | *dummy = ~val; /* clear the test data off of the bus */ | |
707 | readback = *addr; | |
708 | if(readback != val) { | |
87b22b77 | 709 | printf ("FAILURE (data line): " |
3863585b WD |
710 | "expected %08lx, actual %08lx\n", |
711 | val, readback); | |
87b22b77 PG |
712 | errs++; |
713 | if (ctrlc()) { | |
714 | putc ('\n'); | |
715 | return 1; | |
716 | } | |
3863585b WD |
717 | } |
718 | *addr = ~val; | |
719 | *dummy = val; | |
720 | readback = *addr; | |
721 | if(readback != ~val) { | |
722 | printf ("FAILURE (data line): " | |
723 | "Is %08lx, should be %08lx\n", | |
e1599e83 | 724 | readback, ~val); |
87b22b77 PG |
725 | errs++; |
726 | if (ctrlc()) { | |
727 | putc ('\n'); | |
728 | return 1; | |
729 | } | |
3863585b WD |
730 | } |
731 | } | |
732 | } | |
733 | ||
734 | /* | |
735 | * Based on code whose Original Author and Copyright | |
736 | * information follows: Copyright (c) 1998 by Michael | |
737 | * Barr. This software is placed into the public | |
738 | * domain and may be used for any purpose. However, | |
739 | * this notice must not be changed or removed and no | |
740 | * warranty is either expressed or implied by its | |
741 | * publication or distribution. | |
742 | */ | |
743 | ||
744 | /* | |
745 | * Address line test | |
746 | * | |
747 | * Description: Test the address bus wiring in a | |
748 | * memory region by performing a walking | |
749 | * 1's test on the relevant bits of the | |
750 | * address and checking for aliasing. | |
751 | * This test will find single-bit | |
85de63e2 | 752 | * address failures such as stuck-high, |
3863585b WD |
753 | * stuck-low, and shorted pins. The base |
754 | * address and size of the region are | |
755 | * selected by the caller. | |
756 | * | |
757 | * Notes: For best results, the selected base | |
758 | * address should have enough LSB 0's to | |
759 | * guarantee single address bit changes. | |
760 | * For example, to test a 64-Kbyte | |
761 | * region, select a base address on a | |
762 | * 64-Kbyte boundary. Also, select the | |
763 | * region size as a power-of-two if at | |
764 | * all possible. | |
765 | * | |
766 | * Returns: 0 if the test succeeds, 1 if the test fails. | |
3863585b | 767 | */ |
6f4abee7 | 768 | len = ((ulong)end - (ulong)start)/sizeof(vu_long); |
3863585b WD |
769 | pattern = (vu_long) 0xaaaaaaaa; |
770 | anti_pattern = (vu_long) 0x55555555; | |
771 | ||
9504a551 | 772 | debug("%s:%d: length = 0x%.8lx\n", |
3863585b | 773 | __FUNCTION__, __LINE__, |
6f4abee7 | 774 | len); |
3863585b WD |
775 | /* |
776 | * Write the default pattern at each of the | |
777 | * power-of-two offsets. | |
778 | */ | |
6f4abee7 | 779 | for (offset = 1; offset < len; offset <<= 1) { |
3863585b WD |
780 | start[offset] = pattern; |
781 | } | |
782 | ||
783 | /* | |
784 | * Check for address bits stuck high. | |
785 | */ | |
786 | test_offset = 0; | |
787 | start[test_offset] = anti_pattern; | |
788 | ||
6f4abee7 | 789 | for (offset = 1; offset < len; offset <<= 1) { |
3863585b WD |
790 | temp = start[offset]; |
791 | if (temp != pattern) { | |
792 | printf ("\nFAILURE: Address bit stuck high @ 0x%.8lx:" | |
793 | " expected 0x%.8lx, actual 0x%.8lx\n", | |
794 | (ulong)&start[offset], pattern, temp); | |
87b22b77 PG |
795 | errs++; |
796 | if (ctrlc()) { | |
797 | putc ('\n'); | |
798 | return 1; | |
799 | } | |
3863585b WD |
800 | } |
801 | } | |
802 | start[test_offset] = pattern; | |
a6e6fc61 | 803 | WATCHDOG_RESET(); |
3863585b WD |
804 | |
805 | /* | |
806 | * Check for addr bits stuck low or shorted. | |
807 | */ | |
6f4abee7 | 808 | for (test_offset = 1; test_offset < len; test_offset <<= 1) { |
3863585b WD |
809 | start[test_offset] = anti_pattern; |
810 | ||
6f4abee7 | 811 | for (offset = 1; offset < len; offset <<= 1) { |
3863585b WD |
812 | temp = start[offset]; |
813 | if ((temp != pattern) && (offset != test_offset)) { | |
814 | printf ("\nFAILURE: Address bit stuck low or shorted @" | |
815 | " 0x%.8lx: expected 0x%.8lx, actual 0x%.8lx\n", | |
816 | (ulong)&start[offset], pattern, temp); | |
87b22b77 PG |
817 | errs++; |
818 | if (ctrlc()) { | |
819 | putc ('\n'); | |
820 | return 1; | |
821 | } | |
3863585b WD |
822 | } |
823 | } | |
824 | start[test_offset] = pattern; | |
825 | } | |
826 | ||
827 | /* | |
828 | * Description: Test the integrity of a physical | |
829 | * memory device by performing an | |
830 | * increment/decrement test over the | |
831 | * entire region. In the process every | |
832 | * storage bit in the device is tested | |
833 | * as a zero and a one. The base address | |
834 | * and the size of the region are | |
835 | * selected by the caller. | |
836 | * | |
837 | * Returns: 0 if the test succeeds, 1 if the test fails. | |
838 | */ | |
839 | num_words = ((ulong)end - (ulong)start)/sizeof(vu_long) + 1; | |
840 | ||
841 | /* | |
842 | * Fill memory with a known pattern. | |
843 | */ | |
844 | for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) { | |
a6e6fc61 | 845 | WATCHDOG_RESET(); |
3863585b WD |
846 | start[offset] = pattern; |
847 | } | |
848 | ||
849 | /* | |
850 | * Check each location and invert it for the second pass. | |
851 | */ | |
852 | for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) { | |
a6e6fc61 | 853 | WATCHDOG_RESET(); |
3863585b WD |
854 | temp = start[offset]; |
855 | if (temp != pattern) { | |
856 | printf ("\nFAILURE (read/write) @ 0x%.8lx:" | |
857 | " expected 0x%.8lx, actual 0x%.8lx)\n", | |
858 | (ulong)&start[offset], pattern, temp); | |
87b22b77 PG |
859 | errs++; |
860 | if (ctrlc()) { | |
861 | putc ('\n'); | |
862 | return 1; | |
863 | } | |
3863585b WD |
864 | } |
865 | ||
866 | anti_pattern = ~pattern; | |
867 | start[offset] = anti_pattern; | |
868 | } | |
869 | ||
870 | /* | |
871 | * Check each location for the inverted pattern and zero it. | |
872 | */ | |
873 | for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) { | |
a6e6fc61 | 874 | WATCHDOG_RESET(); |
3863585b WD |
875 | anti_pattern = ~pattern; |
876 | temp = start[offset]; | |
877 | if (temp != anti_pattern) { | |
878 | printf ("\nFAILURE (read/write): @ 0x%.8lx:" | |
879 | " expected 0x%.8lx, actual 0x%.8lx)\n", | |
880 | (ulong)&start[offset], anti_pattern, temp); | |
87b22b77 PG |
881 | errs++; |
882 | if (ctrlc()) { | |
883 | putc ('\n'); | |
884 | return 1; | |
885 | } | |
3863585b WD |
886 | } |
887 | start[offset] = 0; | |
888 | } | |
889 | } | |
890 | ||
891 | #else /* The original, quickie test */ | |
892 | incr = 1; | |
893 | for (;;) { | |
894 | if (ctrlc()) { | |
895 | putc ('\n'); | |
896 | return 1; | |
897 | } | |
898 | ||
b6fc6fd4 | 899 | if (iteration_limit && iterations > iteration_limit) { |
87b22b77 PG |
900 | printf("Tested %d iteration(s) with %lu errors.\n", |
901 | iterations-1, errs); | |
902 | return errs != 0; | |
b6fc6fd4 DE |
903 | } |
904 | ++iterations; | |
905 | ||
3863585b WD |
906 | printf ("\rPattern %08lX Writing..." |
907 | "%12s" | |
908 | "\b\b\b\b\b\b\b\b\b\b", | |
909 | pattern, ""); | |
910 | ||
911 | for (addr=start,val=pattern; addr<end; addr++) { | |
a6e6fc61 | 912 | WATCHDOG_RESET(); |
3863585b WD |
913 | *addr = val; |
914 | val += incr; | |
915 | } | |
916 | ||
4b9206ed | 917 | puts ("Reading..."); |
3863585b WD |
918 | |
919 | for (addr=start,val=pattern; addr<end; addr++) { | |
a6e6fc61 | 920 | WATCHDOG_RESET(); |
3863585b WD |
921 | readback = *addr; |
922 | if (readback != val) { | |
923 | printf ("\nMem error @ 0x%08X: " | |
924 | "found %08lX, expected %08lX\n", | |
92549358 | 925 | (uint)(uintptr_t)addr, readback, val); |
87b22b77 PG |
926 | errs++; |
927 | if (ctrlc()) { | |
928 | putc ('\n'); | |
929 | return 1; | |
930 | } | |
3863585b WD |
931 | } |
932 | val += incr; | |
933 | } | |
934 | ||
935 | /* | |
936 | * Flip the pattern each time to make lots of zeros and | |
937 | * then, the next time, lots of ones. We decrement | |
938 | * the "negative" patterns and increment the "positive" | |
939 | * patterns to preserve this feature. | |
940 | */ | |
941 | if(pattern & 0x80000000) { | |
942 | pattern = -pattern; /* complement & increment */ | |
943 | } | |
944 | else { | |
945 | pattern = ~pattern; | |
946 | } | |
947 | incr = -incr; | |
948 | } | |
3863585b | 949 | #endif |
87b22b77 | 950 | return 0; /* not reached */ |
3863585b WD |
951 | } |
952 | ||
953 | ||
954 | /* Modify memory. | |
955 | * | |
956 | * Syntax: | |
957 | * mm{.b, .w, .l} {addr} | |
958 | * nm{.b, .w, .l} {addr} | |
959 | */ | |
960 | static int | |
54841ab5 | 961 | mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) |
3863585b | 962 | { |
27b207fd WD |
963 | ulong addr, i; |
964 | int nbytes, size; | |
3863585b | 965 | |
47e26b1b | 966 | if (argc != 2) |
4c12eeb8 | 967 | return CMD_RET_USAGE; |
3863585b WD |
968 | |
969 | #ifdef CONFIG_BOOT_RETRY_TIME | |
970 | reset_cmd_timeout(); /* got a good command to get here */ | |
971 | #endif | |
972 | /* We use the last specified parameters, unless new ones are | |
973 | * entered. | |
974 | */ | |
975 | addr = mm_last_addr; | |
976 | size = mm_last_size; | |
977 | ||
978 | if ((flag & CMD_FLAG_REPEAT) == 0) { | |
979 | /* New command specified. Check for a size specification. | |
980 | * Defaults to long if no or incorrect specification. | |
981 | */ | |
27b207fd WD |
982 | if ((size = cmd_get_data_size(argv[0], 4)) < 0) |
983 | return 1; | |
3863585b WD |
984 | |
985 | /* Address is specified since argc > 1 | |
986 | */ | |
987 | addr = simple_strtoul(argv[1], NULL, 16); | |
988 | addr += base_address; | |
989 | } | |
990 | ||
2abbe075 WD |
991 | #ifdef CONFIG_HAS_DATAFLASH |
992 | if (addr_dataflash(addr)){ | |
4b9206ed | 993 | puts ("Can't modify DataFlash in place. Use cp instead.\n\r"); |
2abbe075 WD |
994 | return 0; |
995 | } | |
996 | #endif | |
997 | ||
4c727c77 MF |
998 | #ifdef CONFIG_BLACKFIN |
999 | if (addr_bfin_on_chip_mem(addr)) { | |
1000 | puts ("Can't modify L1 instruction in place. Use cp instead.\n\r"); | |
1001 | return 0; | |
1002 | } | |
1003 | #endif | |
1004 | ||
3863585b WD |
1005 | /* Print the address, followed by value. Then accept input for |
1006 | * the next value. A non-converted value exits. | |
1007 | */ | |
1008 | do { | |
1009 | printf("%08lx:", addr); | |
1010 | if (size == 4) | |
1011 | printf(" %08x", *((uint *)addr)); | |
1012 | else if (size == 2) | |
1013 | printf(" %04x", *((ushort *)addr)); | |
1014 | else | |
1015 | printf(" %02x", *((u_char *)addr)); | |
1016 | ||
1017 | nbytes = readline (" ? "); | |
1018 | if (nbytes == 0 || (nbytes == 1 && console_buffer[0] == '-')) { | |
1019 | /* <CR> pressed as only input, don't modify current | |
1020 | * location and move to next. "-" pressed will go back. | |
1021 | */ | |
1022 | if (incrflag) | |
1023 | addr += nbytes ? -size : size; | |
1024 | nbytes = 1; | |
1025 | #ifdef CONFIG_BOOT_RETRY_TIME | |
1026 | reset_cmd_timeout(); /* good enough to not time out */ | |
1027 | #endif | |
1028 | } | |
1029 | #ifdef CONFIG_BOOT_RETRY_TIME | |
1030 | else if (nbytes == -2) { | |
1031 | break; /* timed out, exit the command */ | |
1032 | } | |
1033 | #endif | |
1034 | else { | |
1035 | char *endp; | |
1036 | i = simple_strtoul(console_buffer, &endp, 16); | |
1037 | nbytes = endp - console_buffer; | |
1038 | if (nbytes) { | |
1039 | #ifdef CONFIG_BOOT_RETRY_TIME | |
1040 | /* good enough to not time out | |
1041 | */ | |
1042 | reset_cmd_timeout(); | |
1043 | #endif | |
1044 | if (size == 4) | |
1045 | *((uint *)addr) = i; | |
1046 | else if (size == 2) | |
1047 | *((ushort *)addr) = i; | |
1048 | else | |
1049 | *((u_char *)addr) = i; | |
1050 | if (incrflag) | |
1051 | addr += size; | |
1052 | } | |
1053 | } | |
1054 | } while (nbytes); | |
1055 | ||
1056 | mm_last_addr = addr; | |
1057 | mm_last_size = size; | |
1058 | return 0; | |
1059 | } | |
1060 | ||
710b9938 MF |
1061 | #ifdef CONFIG_CMD_CRC32 |
1062 | ||
c26e454d WD |
1063 | #ifndef CONFIG_CRC32_VERIFY |
1064 | ||
088f1b19 | 1065 | static int do_mem_crc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
3863585b | 1066 | { |
71f95118 WD |
1067 | ulong addr, length; |
1068 | ulong crc; | |
1069 | ulong *ptr; | |
3863585b | 1070 | |
47e26b1b | 1071 | if (argc < 3) |
4c12eeb8 | 1072 | return CMD_RET_USAGE; |
3863585b | 1073 | |
71f95118 | 1074 | addr = simple_strtoul (argv[1], NULL, 16); |
3863585b WD |
1075 | addr += base_address; |
1076 | ||
71f95118 | 1077 | length = simple_strtoul (argv[2], NULL, 16); |
3863585b | 1078 | |
39c6e039 | 1079 | crc = crc32_wd (0, (const uchar *) addr, length, CHUNKSZ_CRC32); |
3863585b WD |
1080 | |
1081 | printf ("CRC32 for %08lx ... %08lx ==> %08lx\n", | |
71f95118 | 1082 | addr, addr + length - 1, crc); |
3863585b | 1083 | |
71f95118 WD |
1084 | if (argc > 3) { |
1085 | ptr = (ulong *) simple_strtoul (argv[3], NULL, 16); | |
1086 | *ptr = crc; | |
1087 | } | |
3863585b WD |
1088 | |
1089 | return 0; | |
1090 | } | |
1091 | ||
c26e454d WD |
1092 | #else /* CONFIG_CRC32_VERIFY */ |
1093 | ||
54841ab5 | 1094 | int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
c26e454d WD |
1095 | { |
1096 | ulong addr, length; | |
1097 | ulong crc; | |
1098 | ulong *ptr; | |
6e592385 | 1099 | ulong vcrc; |
c26e454d WD |
1100 | int verify; |
1101 | int ac; | |
54841ab5 | 1102 | char * const *av; |
c26e454d WD |
1103 | |
1104 | if (argc < 3) { | |
47e26b1b | 1105 | usage: |
4c12eeb8 | 1106 | return CMD_RET_USAGE; |
c26e454d WD |
1107 | } |
1108 | ||
1109 | av = argv + 1; | |
1110 | ac = argc - 1; | |
1111 | if (strcmp(*av, "-v") == 0) { | |
1112 | verify = 1; | |
1113 | av++; | |
1114 | ac--; | |
1115 | if (ac < 3) | |
1116 | goto usage; | |
1117 | } else | |
1118 | verify = 0; | |
1119 | ||
1120 | addr = simple_strtoul(*av++, NULL, 16); | |
1121 | addr += base_address; | |
1122 | length = simple_strtoul(*av++, NULL, 16); | |
1123 | ||
39c6e039 | 1124 | crc = crc32_wd (0, (const uchar *) addr, length, CHUNKSZ_CRC32); |
c26e454d WD |
1125 | |
1126 | if (!verify) { | |
1127 | printf ("CRC32 for %08lx ... %08lx ==> %08lx\n", | |
1128 | addr, addr + length - 1, crc); | |
1129 | if (ac > 2) { | |
1130 | ptr = (ulong *) simple_strtoul (*av++, NULL, 16); | |
1131 | *ptr = crc; | |
1132 | } | |
1133 | } else { | |
1134 | vcrc = simple_strtoul(*av++, NULL, 16); | |
1135 | if (vcrc != crc) { | |
1136 | printf ("CRC32 for %08lx ... %08lx ==> %08lx != %08lx ** ERROR **\n", | |
1137 | addr, addr + length - 1, crc, vcrc); | |
1138 | return 1; | |
1139 | } | |
1140 | } | |
1141 | ||
1142 | return 0; | |
1143 | ||
1144 | } | |
1145 | #endif /* CONFIG_CRC32_VERIFY */ | |
1146 | ||
710b9938 MF |
1147 | #endif |
1148 | ||
8bde7f77 | 1149 | /**************************************************/ |
0d498393 | 1150 | U_BOOT_CMD( |
53677ef1 | 1151 | md, 3, 1, do_mem_md, |
2fb2604d | 1152 | "memory display", |
a89c33db | 1153 | "[.b, .w, .l] address [# of objects]" |
8bde7f77 WD |
1154 | ); |
1155 | ||
1156 | ||
0d498393 | 1157 | U_BOOT_CMD( |
53677ef1 | 1158 | mm, 2, 1, do_mem_mm, |
a89c33db WD |
1159 | "memory modify (auto-incrementing address)", |
1160 | "[.b, .w, .l] address" | |
8bde7f77 WD |
1161 | ); |
1162 | ||
1163 | ||
0d498393 | 1164 | U_BOOT_CMD( |
53677ef1 | 1165 | nm, 2, 1, do_mem_nm, |
2fb2604d | 1166 | "memory modify (constant address)", |
a89c33db | 1167 | "[.b, .w, .l] address" |
8bde7f77 WD |
1168 | ); |
1169 | ||
0d498393 | 1170 | U_BOOT_CMD( |
53677ef1 | 1171 | mw, 4, 1, do_mem_mw, |
2fb2604d | 1172 | "memory write (fill)", |
a89c33db | 1173 | "[.b, .w, .l] address value [count]" |
8bde7f77 WD |
1174 | ); |
1175 | ||
0d498393 | 1176 | U_BOOT_CMD( |
53677ef1 | 1177 | cp, 4, 1, do_mem_cp, |
2fb2604d | 1178 | "memory copy", |
a89c33db | 1179 | "[.b, .w, .l] source target count" |
8bde7f77 WD |
1180 | ); |
1181 | ||
0d498393 | 1182 | U_BOOT_CMD( |
53677ef1 | 1183 | cmp, 4, 1, do_mem_cmp, |
2fb2604d | 1184 | "memory compare", |
a89c33db | 1185 | "[.b, .w, .l] addr1 addr2 count" |
8bde7f77 WD |
1186 | ); |
1187 | ||
710b9938 MF |
1188 | #ifdef CONFIG_CMD_CRC32 |
1189 | ||
c26e454d WD |
1190 | #ifndef CONFIG_CRC32_VERIFY |
1191 | ||
0d498393 | 1192 | U_BOOT_CMD( |
53677ef1 | 1193 | crc32, 4, 1, do_mem_crc, |
2fb2604d | 1194 | "checksum calculation", |
a89c33db | 1195 | "address count [addr]\n - compute CRC32 checksum [save at addr]" |
8bde7f77 WD |
1196 | ); |
1197 | ||
c26e454d WD |
1198 | #else /* CONFIG_CRC32_VERIFY */ |
1199 | ||
1200 | U_BOOT_CMD( | |
53677ef1 | 1201 | crc32, 5, 1, do_mem_crc, |
2fb2604d | 1202 | "checksum calculation", |
c26e454d | 1203 | "address count [addr]\n - compute CRC32 checksum [save at addr]\n" |
a89c33db | 1204 | "-v address count crc\n - verify crc of memory area" |
c26e454d WD |
1205 | ); |
1206 | ||
1207 | #endif /* CONFIG_CRC32_VERIFY */ | |
1208 | ||
710b9938 MF |
1209 | #endif |
1210 | ||
15a33e49 SG |
1211 | #ifdef CONFIG_CMD_MEMINFO |
1212 | __weak void board_show_dram(ulong size) | |
1213 | { | |
1214 | puts("DRAM: "); | |
1215 | print_size(size, "\n"); | |
1216 | } | |
1217 | ||
1218 | static int do_mem_info(cmd_tbl_t *cmdtp, int flag, int argc, | |
1219 | char * const argv[]) | |
1220 | { | |
1221 | board_show_dram(gd->ram_size); | |
1222 | ||
1223 | return 0; | |
1224 | } | |
1225 | #endif | |
1226 | ||
0d498393 | 1227 | U_BOOT_CMD( |
53677ef1 | 1228 | base, 2, 1, do_mem_base, |
2fb2604d | 1229 | "print or set address offset", |
8bde7f77 | 1230 | "\n - print address offset for memory commands\n" |
a89c33db | 1231 | "base off\n - set address offset for memory commands to 'off'" |
8bde7f77 WD |
1232 | ); |
1233 | ||
0d498393 | 1234 | U_BOOT_CMD( |
53677ef1 | 1235 | loop, 3, 1, do_mem_loop, |
2fb2604d | 1236 | "infinite loop on address range", |
a89c33db | 1237 | "[.b, .w, .l] address number_of_objects" |
8bde7f77 WD |
1238 | ); |
1239 | ||
56523f12 WD |
1240 | #ifdef CONFIG_LOOPW |
1241 | U_BOOT_CMD( | |
53677ef1 | 1242 | loopw, 4, 1, do_mem_loopw, |
2fb2604d | 1243 | "infinite write loop on address range", |
a89c33db | 1244 | "[.b, .w, .l] address number_of_objects data_to_write" |
56523f12 WD |
1245 | ); |
1246 | #endif /* CONFIG_LOOPW */ | |
1247 | ||
0d498393 | 1248 | U_BOOT_CMD( |
b6fc6fd4 | 1249 | mtest, 5, 1, do_mem_mtest, |
a89c33db WD |
1250 | "simple RAM read/write test", |
1251 | "[start [end [pattern [iterations]]]]" | |
8bde7f77 WD |
1252 | ); |
1253 | ||
4aaf29b2 SR |
1254 | #ifdef CONFIG_MX_CYCLIC |
1255 | U_BOOT_CMD( | |
53677ef1 | 1256 | mdc, 4, 1, do_mem_mdc, |
2fb2604d | 1257 | "memory display cyclic", |
a89c33db | 1258 | "[.b, .w, .l] address count delay(ms)" |
4aaf29b2 SR |
1259 | ); |
1260 | ||
1261 | U_BOOT_CMD( | |
53677ef1 | 1262 | mwc, 4, 1, do_mem_mwc, |
2fb2604d | 1263 | "memory write cyclic", |
a89c33db | 1264 | "[.b, .w, .l] address value delay(ms)" |
4aaf29b2 SR |
1265 | ); |
1266 | #endif /* CONFIG_MX_CYCLIC */ | |
15a33e49 SG |
1267 | |
1268 | #ifdef CONFIG_CMD_MEMINFO | |
1269 | U_BOOT_CMD( | |
1270 | meminfo, 3, 1, do_mem_info, | |
1271 | "display memory information", | |
1272 | "" | |
1273 | ); | |
1274 | #endif |